Improving oxidation conformality through in-situ integrated processing

A non-oxidizing pretreatment with inert gases or plasmas reduces the sticking coefficient on Si-containing surfaces in HAR structures, enhancing oxide layer conformality and addressing efficiency issues in 3D NAND flash devices.

JP2025537362APending Publication Date: 2025-11-14APPLIED MATERIALS INC
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Patent Information

Application Number
JP2025530265
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2022-11-29
Filing Date
2023-11-29
Publication Date
2025-11-14

AI Technical Summary

Technical Problem

The challenge in manufacturing high aspect ratio (HAR) structures, such as those in 3D NAND flash devices, is the non-conformal deposition of oxide layers due to impurity accumulation and high sticking coefficients, leading to material buildup and void formation, which affects processing efficiency.

Method used

A non-oxidizing pretreatment process using inert gases or plasmas is applied in situ to reduce the sticking coefficient of Si-containing surfaces, followed by oxidation, improving conformality and reducing impurity accumulation.

Benefits of technology

The conformality of oxide layers in HAR structures is enhanced by 4% to 5%, maintaining processing efficiency and preventing material buildup, thus improving the manufacturing process.

✦ Generated by Eureka AI based on patent content.

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Abstract

A method for processing a substrate is provided. In some embodiments, the method includes exposing a substrate to a vacuum, the substrate having one or more memory holes or trenches. The method further includes treating the substrate with a pre-treatment gas or plasma. The method includes oxidizing the substrate while the substrate is still under vacuum. In some embodiments, impurities have accumulated in the one or more memory holes.
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Description

[Technical Field]

[0001]

[0001] Embodiments described herein generally relate to systems and methods for improving the conformality of high aspect ratio (HAR) structures in semiconductor devices. More specifically, this application relates to pre-treating Si-containing surfaces to reduce the surface sticking coefficient and improve the conformality of subsequent oxide growth on the Si-containing surfaces. [Background technology]

[0002]

[0002] The fabrication of silicon integrated circuits has placed challenging demands on the manufacturing process to increase the number of devices while shrinking the minimum feature size on a chip. These demands extend to manufacturing processes that involve depositing layers of different materials over challenging geometries and then etching features within those layers. The manufacturing process for next-generation NAND flash memory involves particularly challenging device geometries and scales. NAND is a type of non-volatile storage technology that does not require power to retain data. To increase memory capacity within the same physical space, three-dimensional NAND (3D NAND) designs have been developed. Such designs typically involve the introduction and deposition of alternating oxide and nitride layers on a substrate. The alternating oxide and nitride layers are then etched to form structures with one or more surfaces that extend substantially perpendicular to the substrate. These design considerations have led the field to move from processing structures with relatively low aspect ratios, such as a 10:1 aspect ratio, to HAR structures, such as those with aspect ratios of 100:1 or greater. These HAR structures are referred to as memory holes or pillars. Previous manufacturing processes included filling the gaps in the memory holes or slits (trench) of 3D NAND.

[0003]

[0003] The holes in memory devices are often formed by conformally oxidizing silicon or silicon nitride (Si x N y) layer, e.g., Si3N4. Holes in memory devices can have high or ultra-high aspect ratios, e.g., 40:1 aspect ratios, 40:1 to 100:1 aspect ratios, 100:1 aspect ratios, or even greater than 100:1. New manufacturing processes promise to conformally deposit layers on the surfaces of holes rather than simply filling gaps and trenches. More conformal deposition can reduce material buildup on top of structures. Such buildup can cause material to prematurely seal the tops of trenches between adjacent structures, resulting in the formation of voids within the trenches. Unfortunately, slower deposition rates also mean longer deposition times, reducing processing efficiency and production rates.

[0004]

[0004] Therefore, there is a need for improved systems and processes for processing HAR structures. Summary of the Invention

[0005]

[0005] The present disclosure relates generally to systems and methods for improving the conformality of HAR structures in semiconductor devices, such as 3D NAND flash devices, and more particularly to pre-treating Si-containing surfaces to reduce the surface sticking coefficient and improve the conformality of subsequent oxide growth on the Si-containing surfaces.

[0006] In at least one aspect, a method of processing a substrate is provided. The method includes exposing a substrate to a vacuum, the substrate having one or more memory holes or trenches. The method further includes treating the substrate with a pre-treatment gas or plasma. The method further includes oxidizing the substrate while the substrate is still under vacuum.

[0007]

[0007] Embodiments may include one or more of the following: impurities accumulate in at least one of the one or more memory holes or trenches; the impurity accumulation comprises hydrocarbons; the substrate processing is performed at a temperature, the temperature being between 50°C and 850°C; the substrate processing is performed at a temperature, the temperature being between 50°C and 300°C; the substrate comprises Si, SiON, or SiN; treating the substrate with a pretreatment gas or plasma is performed for a time period ranging from 5 seconds to 3 minutes; treating the substrate with a pretreatment gas or plasma is performed in a chamber, and oxidizing the substrate is performed in the chamber; the pretreatment gas or plasma comprises an inert gas; the inert gas comprises N2, Ar, He, or a combination thereof; the pretreatment gas or plasma comprises H2 or H· radicals; oxidizing the substrate may be a single-step process; oxidizing the substrate may be a multi-step process; treating the substrate is performed at a pressure between 0.1 Torr and atmospheric pressure.

[0008] In another aspect, a method of processing a substrate is provided. The method includes exposing a substrate to a vacuum, the substrate having one or more memory holes or trenches. The method further includes treating the substrate with an inert gas. The method further includes oxidizing the substrate while the substrate is still under vacuum.

[0009]

[0009] Embodiments may include one or more of the following: impurities are accumulated in at least one of the one or more memory holes or trenches; the processing of the substrate is performed at a temperature, the temperature being between 50° C. and 300° C.; and the inert gas has a flow rate of between 10 sccm and 20 slm.

[0010] In yet another aspect, a method for processing a substrate is provided. The method includes exposing a substrate to a vacuum, the substrate having one or more memory holes or trenches. The method further includes treating the substrate with a gas including H or H radicals. The method further includes oxidizing the substrate while the substrate is still under vacuum.

[0011]

[0011] Embodiments can include processing the substrate at a temperature, the temperature being between 50°C and 300°C.

[0012] In another aspect, a non-transitory computer readable medium has stored thereon instructions that, when executed by a processor, cause the processor to perform the steps of the apparatus and / or method described above.

[0013]

[0013] In order that the above-described features of the present disclosure may be understood in detail, the above-summarized disclosure will be more particularly described by reference to embodiments, some of which are illustrated in the accompanying drawings. It should be noted, however, that the accompanying drawings depict only typical embodiments of the present disclosure and therefore should not be considered as limiting the scope of the present disclosure, which may also admit of other equally effective embodiments. [Brief explanation of the drawings]

[0014] [Figure 1] FIG. 1 illustrates a processing sequence according to one or more embodiments of the present disclosure. [Figure 2] 5A-5D are cross-sectional views illustrating various stages of enhancing conformality in a memory hole according to one or more embodiments of the present disclosure. [Figure 3] FIG. 1 is a cross-sectional view of an oxidation chamber for performing an oxidation process according to one or more embodiments of the present disclosure. [Figure 4] FIG. 1 is a cross-sectional view of a cleaning chamber used to perform a reduction process in accordance with one or more embodiments of the present disclosure. [Figure 5] FIG. 1 illustrates a top view of a vacuum processing system in accordance with one or more embodiments of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0015]

[0019] To facilitate understanding, wherever possible, the same reference numerals have been used to designate identical elements common to the figures. It is contemplated that elements and features of one embodiment may be beneficially incorporated in other embodiments without further recitation.

[0016]

[0020] Embodiments of the present disclosure generally relate to systems and methods for improving the conformality of HAR structures in semiconductor devices, such as 3D NAND flash devices. More specifically, the present disclosure relates to subjecting silicon-containing surfaces to a non-oxidizing pretreatment to reduce the surface's sticking coefficient and improve the conformality of subsequent oxide growth on the silicon-containing surfaces.

[0017]

[0021] 3D NAND flash devices significantly increase surface area by increasing the aspect ratio of HAR structures on the substrate. These HAR structures often define or include holes, such as memory holes, word line slits, or trenches. All discussion of memory holes below also applies to word line slits and trenches. As the aspect ratio of memory holes continues to increase, growing conformal films within these memory holes becomes increasingly difficult. "Conformality" generally refers to a layer of uniform and / or consistent thickness on the surface of the structure. In the context of memory holes, "conformality" may be most relevant when describing the thickness of oxidation on the surface of the structure that is substantially perpendicular to the substrate. Processes that experience impurity accumulation increase the sticking coefficient of oxygen radicals during the oxidation process. For example, air breaks are often unavoidable when transferring substrates between processing tools from one processing step to another prior to oxidation. During this time, impurities, such as surface carbon and moisture, can accumulate on the silicon-containing surfaces of the memory holes. The sticking coefficient is the number of atoms or molecules reacting at the surface divided by the total number of collisions between the atoms or molecules and the surface. As the sticking coefficient increases, the oxide growth in the memory hole becomes non-conformal.

[0018]

[0022] Described herein are systems and methods using pretreatment gases or plasmas to reduce the sticking coefficient of Si-containing surfaces. These pretreatment gases or plasmas can be used to remove impurity buildup, thereby reducing the sticking coefficient of the Si-containing surfaces of memory holes. Furthermore, the conformality of the oxide layer subsequently formed in the memory holes can be improved by 4% to 5%. In at least one aspect, the methods and systems for reducing the sticking coefficient include a non-oxidizing treatment process, such as at least one of a hydrogen bake process, an inert gas vent process, and a hydrogen radical treatment process. The non-oxidizing treatment process is performed in situ prior to a subsequent oxidation process. In at least one embodiment, the non-oxidizing treatment process is performed in a process chamber integrated on the same cluster tool as a process chamber configured to perform a subsequent oxidation process. In at least another embodiment, the treatment process is performed in situ in the same chamber as the subsequent oxidation process. This type of in situ treatment process allows for an air break before oxidation without significantly impairing conformality.

[0019]

[0023] FIG. 1 is an exemplary flow diagram illustrating a method 100 of processing one or more memory hole structures according to one or more embodiments of the present disclosure. FIGS. 2A-2D are cross-sectional views illustrating various stages of forming one or more memory hole structures according to one or more embodiments of the present disclosure. To illustrate the method of FIG. 1, reference is made to FIGS. 2A-2D, which provide cross-sectional views of several embodiments of memory hole structures at various stages of fabrication. While FIGS. 2A-2D are described in conjunction with method 100, it will be understood that the structures disclosed in FIGS. 2A-2D are not limited to method 100, but rather may stand alone as structures independent of method 100. Similarly, while method 100 is described in conjunction with FIGS. 2A-2D, it will be understood that method 100 is not limited to the structures disclosed in FIGS. 2A-2D, but rather may stand alone as structures independent of the structures disclosed in FIGS. 2A-2D. For example, method 100 can be used to form other types of holes, such as word line slits or trenches in memory devices.

[0020]

[0024] 2A is a cross-sectional view illustrating a portion of a 3D NAND memory device 200 during an intermediate stage of fabrication corresponding to step 110 of method 100. It should be understood that 3D NAND memory device 200 is an example, and other types of HAR structures may benefit from the embodiments described herein. Device 200 includes a memory hole structure 202 formed on a semiconductor substrate 204. In step 110, memory hole structure 202 is formed on semiconductor substrate 204. Step 110, or portions of step 110, may be performed in a first processing chamber or first processing system (not shown).

[0021]

[0025] The semiconductor substrate 204 may be any suitable starting material for forming an integrated circuit, such as a silicon (Si) wafer or a germanium (Ge) wafer. The semiconductor substrate 204 may be a silicon semiconductor substrate having one or more layers formed thereon, such as a film stack, that are employed to form structures on the semiconductor substrate 204, such as the 3D NAND memory device 200. The semiconductor substrate 204 may be crystalline silicon (e.g., Si <100> or Si <111> The semiconductor substrate 204 may include materials such as silicon dioxide, strained silicon, silicon germanium, doped or undoped polysilicon, doped or undoped silicon, patterned or unpatterned wafers, silicon-on-insulator (SOI), carbon-doped silicon dioxide, silicon nitride, doped silicon, germanium, gallium arsenide, glass, sapphire, metal layers disposed on silicon, etc. The semiconductor substrate 204 may be configured as a 200 mm, 300 mm, or 450 mm diameter wafer, or as a rectangular or square panel.

[0022]

[0026] The memory hole structure 202 includes sidewalls 206 and a bottom surface 208 that define a memory hole 210. The memory hole structure 202 may further include multiple memory cells stacked alternately between multiple insulating layers, which are not shown for simplicity. The sidewalls 206 and optional bottom surface 208 are defined by a silicon-containing film 212. Any suitable silicon-containing film may be used. The silicon-containing film 212 may be a silicon film, a silicon oxynitride (SiO x N y ) film, or silicon nitride (Si x N y ) film. Any suitable process can be used to deposit silicon-containing film 212. In at least one embodiment, silicon-containing film 212 can be deposited via an atomic layer deposition (ALD) process, such as an ALD SiN deposition process or an ALD Si deposition process. Step 110 can be performed by a deposition tool, such as an ALD tool (not shown). Step 110 is typically performed in a processing system separate from the processing chamber used to oxidize memory device 200.

[0023]

[0027] FIG. 2B is a cross-sectional view of a portion of 3D NAND memory device 200 during an intermediate step in fabrication, corresponding to step 120 of method 100. During step 120, after step 110, device 200 is removed from a first processing system (not shown) and transferred to a second processing system used in steps 130, 140, 150, and 160 (described in more detail in the discussion of FIGS. 3-5). In at least one embodiment, the second processing system comprises a vacuum processing system, such as vacuum processing system 500 shown in FIG. 5. In at least one embodiment, the second processing system comprises a stand-alone vacuum processing chamber, such as processing system 300 shown in FIG. 3. During step 120, device 200 may be transferred immediately, or there may be an indefinite period of time before a substrate is introduced into the processing chamber. During step 120, exposure to air and moisture can cause impurities to accumulate in the memory holes. FIG. 2B illustrates memory device 200 during and after step 120, showing impurity accumulation 230 formed on the surface of silicon-containing film 212. The impurity accumulation 230 may become more widespread if the substrate is exposed to air for a longer period of time. Exposure of the substrate to more humid conditions may also cause the impurity accumulation 230 to become more widespread. It should be noted that FIG. 2B illustrates an exemplary embodiment of impurity accumulation 230. In other embodiments, the impurity accumulation 230 may be irregular and may be more concentrated at the top 232 of the memory hole 210 along the silicon-containing film 212, extend further into the silicon-containing film 212, or be larger or smaller. The impurity accumulation 230 is naturally more concentrated at the top 232 of the silicon-containing film 212 than at the bottom 233 of the silicon-containing film 212 due to the dimensions of the memory hole 210. In some embodiments, the impurity accumulation 230 includes contaminants such as carbon, hydrocarbons, moisture, or a combination thereof.

[0024]

[0028] After the device 200 is transferred to the second processing system, the device 200 is exposed to a vacuum in step 130 .

[0025]

[0029] FIG. 2C is a cross-sectional view of a portion of 3D NAND memory device 200 during an intermediate stage of fabrication corresponding to step 140 of method 100. During the pretreatment process of step 140, the substrate is exposed to a pretreatment gas or plasma in step 140 while the substrate is under vacuum. The pretreatment gas or plasma may be an inert gas, H, H radicals, or any combination thereof. The pretreatment gas or plasma may be a non-oxidizing pretreatment gas or plasma. The inert gas may include nitrogen (N), argon (Ar), or helium (He). The inert gas may also be a mixture of N, Ar, and He, with the percentage of each gas in the mixture ranging from 0% to 100%.

[0026]

[0030] The non-oxidizing treatment process of step 140 is performed in situ prior to the subsequent oxidation process of step 150. In at least one embodiment, the non-oxidizing treatment process of step 140 is performed in a process chamber configured to perform the subsequent oxidation process, such as a process chamber integrated on the same cluster tool as processing system 300, such as vacuum processing system 500, such as processing system 400. In at least another embodiment, the treatment process is performed in situ in the same processing system 300 as the subsequent oxidation process.

[0027]

[0031] While the substrate is under vacuum, it is exposed to a pretreatment gas or plasma in step 140. The pretreatment gas or plasma may be an inert gas, H, or H radicals. The inert gas may include nitrogen (N), argon (Ar), or helium (He). The inert gas may also be a mixture of N, Ar, and He, with the percentage of each gas in the mixture ranging from 0% to 100%.

[0028]

[0032] The flow rate of the pretreatment gas or plasma may range from 10 sccm to 20 slm during step 140. In other embodiments, the flow rate of the pretreatment gas or plasma may range from 1 slm to 10 slm.

[0029]

[0033] The pressure in the processing chamber can be from 0.1 Torr to atmospheric pressure during step 140. In other embodiments, the pressure in the processing chamber can be from 0.5 Torr to 100 Torr, for example, from about 2 Torr to about 100 Torr.

[0030]

[0034] During step 140, the temperature of the pretreatment gas or plasma can be between 50° C. and 800° C. Additionally, the substrate can be maintained at or near the temperature of the pretreatment gas. In other embodiments, the temperature of the pretreatment gas or plasma can be between 50° C. and 300° C. In yet other embodiments, the temperature of the pretreatment gas or plasma can be between 150° C. and 300° C.

[0031]

[0035] Step 140 may be performed for between 5 seconds and 3 minutes. In another embodiment, step 140 may be performed for between 10 seconds and 1 minute.

[0032]

[0036] In at least one embodiment in which step 140 includes a radical treatment process, H· radicals can be formed by flowing hydrogen gas (H) into a remote plasma source, such as remote plasma source 304 or remote plasma source 450, described further below in FIGS. 3 and 4. The remote plasma source is fluidly coupled to the processing region and can ignite and sustain a plasma of the hydrogen gas to form the hydrogen radicals. The hydrogen radicals can then be flowed into the processing region. In other embodiments, the remote plasma can be formed in a portion of the processing region of the processing chamber separated from a portion of the processing region having a substrate disposed therein. For example, in those embodiments, the remote plasma can be formed in a portion of the processing region separated from the substrate processing portion by a showerhead.

[0033]

[0037] In at least another embodiment where step 140 includes a thermal treatment process, the thermal treatment process can be performed to remove any residual by-products or contaminants from the processing region. During the thermal treatment process of step 140, the processing region is maintained under vacuum conditions below atmospheric pressure, such as below 760 Torr, less than about 700 Torr, less than about 600 Torr, less than about 500 Torr, less than about 400 Torr, less than about 300 Torr, or less than about 200 Torr. In some embodiments, the processing region is maintained at a pressure in the range of about 0.1 Torr to about 760 Torr, or in the range of about 2 Torr to about 760 Torr, or in the range of about 400 Torr to about 600 Torr, or in the range of about 500 Torr to about 530 Torr. During the thermal treatment process, hydrogen gas (e.g., H) can be flowed into the processing region at a flow rate of about 10 sccm to about 20 slm. The hydrogen gas can be introduced into the processing region along with an inert gas. In one embodiment, the process gas mixture comprises hydrogen in the range of about 0.1% to about 100%, with the remainder being an inert carrier gas such as argon, helium, or xenon. In one example, the process gas mixture comprises hydrogen gas in the range of about 90% to about 100%, e.g., 100% hydrogen. In some embodiments, the process time, where the device 200 is maintained at the thermal treatment temperature, is about 5 seconds or more, about 20 seconds or more, e.g., about 30 seconds or more, about 40 seconds or more, about 50 seconds or more, about 1 minute or more, about 1.5 minutes or more, about 2 minutes or more, about 2.5 minutes or more, about 3 minutes or more, about 3.5 minutes or more, about 4 minutes or more, about 4.5 minutes or more, e.g., about 5 minutes or more.

[0034]

[0038] In at least one embodiment, after step 140, memory device 200 is oxidized in the same chamber in step 150. As shown in FIG. 2D, step 150 forms an oxide layer 220 on silicon-containing film 212. Oxide layer 220 may be silicon dioxide (SiO) or silicon oxynitride (SiO x N y , x and y are integers). Oxide layer 220 may be large or small based on the conditions of step 150 (discussed further below). The thickness of the oxide layer may range from 5 Å to 15 nm.

[0035]

[0039] The oxide layer 220 may be formed by introducing oxygen (O) or a mixture of oxygen and a second gas into an oxidation chamber (discussed further below in the description of Figures 3-5). In some embodiments, the second gas may be hydrogen (H), argon (Ar), nitrogen (N), helium (He), or any combination thereof.

[0036]

[0040] The oxidation in step 150 can be performed in a single step or in multiple steps. In one embodiment, the single-step oxidation in step 150 can be performed at a temperature between 500°C and 800°C. In another embodiment, the multi-step oxidation in step 150 can be performed with a first step performed at a temperature of 500°C and a second step at a temperature of 800°C. In a multi-step oxidation process, the first step can be performed slowly to improve the conformality of the oxide layer 220. In yet another embodiment, the multi-step oxidation process in step 150 can be performed with a first step at a temperature of 500°C, a second step at a temperature of 600°C, a third step at a temperature of 700°C, and a fourth step at a temperature of 800°C. In this embodiment, the gradual increase in temperature can improve the conformality of the oxide layer 220. In another embodiment, the oxidation in step 150 can be performed at a temperature of 800°C, and non-temperature variables are varied. In some embodiments, the non-temperature variable may be the oxidizer species, gas ratio, or dilution with a non-oxidizing gas, including hydrogen (H), argon (Ar), nitrogen (N), or helium (He), or any combination thereof.

[0037]

[0041] In at least one embodiment, the treatment process of step 140 is performed in a process chamber integrated on the same cluster tool as a process chamber configured to perform the subsequent oxidation process of step 150. In at least another embodiment, the treatment process of step 140 is performed in situ in the same process chamber as the subsequent oxidation process of step 150. The in situ treatment process of step 140 allows for an air break prior to the oxidation process of step 150 without significantly impairing conformality.

[0038]

[0042] After the oxidation step in step 150, the substrate with one or more memory holes can be subjected to further processing in step 160.

[0039]

[0043] FIG. 3 is a cross-sectional view of an exemplary processing system 300 that can be used in steps 120, 130, 140, 150, and 160. The processing system 300 includes a processing chamber 302 and a remote plasma source 304. The processing chamber 302 may be a rapid thermal processing (RTP) chamber. The processing system 300 may be configured to perform the non-oxidizing pretreatment process of step 140 and the oxidation process of step 150. The remote plasma source 304 may be any suitable remote plasma source, such as a microwave-coupled plasma source capable of operating at approximately 6 kW of power. The remote plasma source 304 is coupled to the processing chamber 302 to flow plasma formed in the remote plasma source 304 toward the processing chamber 302. The remote plasma source 304 is coupled to the processing chamber 302 via a connector 306. Radicals formed in the remote plasma source 304 flow through the connector 306 into the processing chamber 302 during substrate processing.

[0040]

[0044] The remote plasma source 304 includes a body 308 surrounding a tube 310 in which plasma is generated. The tube 310 may be made of quartz or sapphire. The body 308 includes a first end 314 coupled to an inlet 312, and one or more gas sources 318 may be coupled to the inlet 312 to introduce one or more gases into the remote plasma source 304. In one embodiment, the one or more gas sources 318 include an oxygen-containing gas source, and the one or more gases include an oxygen-containing gas. The body 308 includes a second end 316 opposite the first end 314, and the second end 316 is coupled to the connector 306. A coupling liner (not shown) may be disposed within the body 308 at the second end 316. A power source 320 (e.g., an RF power source) is coupled to the remote plasma source 304 via a matching network 322 and can provide power to the remote plasma source 304 to facilitate plasma formation. The radicals in the plasma are flowed into the processing chamber 302 through a connector 306 .

[0041]

[0045] The processing chamber 302 includes a chamber body 325, a substrate support 328, and a window assembly 330. The chamber body 325 includes a first side 324 and a second side 326 opposite the first side 324. In some embodiments, a lamp assembly 332, surrounded by an upper sidewall 334, is positioned above and coupled to the window assembly 330. The lamp assembly 332 may include a plurality of lamps 336 and a plurality of tubes 338, each of which may be disposed in a corresponding tube 338. The window assembly 330 may include a plurality of light pipes 340, each of which may be aligned with a corresponding tube 338 such that thermal energy generated by the plurality of lamps 336 can reach a substrate disposed in the processing chamber 302. In some embodiments, the plurality of light pipes 340 can be evacuated by applying a vacuum to an exhaust port 344 fluidly coupled to the plurality of light pipes 340. The window assembly 330 may have conduits 343 formed therein for circulating a cooling fluid through the window assembly 330 .

[0042]

[0046] The chamber body 325, the substrate support 328, and the window assembly 330 may define a processing region 346. The substrate 342 is disposed in the processing region 346 and is supported by a support ring 348 above a reflector plate 350. The support ring 348 may be attached to a rotatable cylinder 352 to facilitate rotation of the substrate 342. The cylinder 352 may be levitated and rotated by a magnetic levitation system (not shown). The reflector plate 350 reflects energy to the backside of the substrate 342 to facilitate uniform heating of the substrate 342 and promote energy efficiency of the processing system 300. Multiple fiber optic probes 354 may be positioned through the substrate support 328 and the reflector plate 350 to facilitate temperature monitoring of the substrate 342.

[0043]

[0047] The liner assembly 356 is positioned on the first side 324 of the chamber body 325 to direct radicals from the remote plasma source 304 to the processing region 346 of the processing chamber 302. The liner assembly 356 may be made of an oxidation-resistant material, such as quartz, to reduce interaction with process gases, such as oxygen radicals. The liner assembly 356 is designed to reduce constriction of the flow of radicals into the processing chamber 302. The liner assembly 356 is described in more detail below. The processing chamber 302 further includes a distributed pumping structure 333 formed in the substrate support 328 adjacent the second side 326 of the chamber body 325 to regulate the flow of radicals from the liner assembly 356 to a pumping port. The distributed pumping structure 333 is located adjacent the second side 326 of the chamber body 325.

[0044]

[0048] A controller 380 may be coupled to and control the operation of various components of the processing system 300, such as the processing chamber 302 and / or the remote plasma source 304. The controller 380 generally includes a central processing unit (CPU) 382, ​​a memory 386, and support circuits 384 for the CPU 382. The controller 380 may control the processing system 300 directly or through other computers or controllers (not shown) associated with specific support system components. The controller 380 may be one of any type of general-purpose computer processor that can be used in an industrial environment to control various chambers and sub-processors. The memory 386, or computer-readable medium, may be one or more of readily available memory, such as random access memory (RAM), read-only memory (ROM), a floppy disk, a hard disk, a flash drive, or any other form of digital storage, local or remote. The support circuits 384 are coupled to the CPU 382 to support the processor in a conventional manner. The support circuits 384 may include cache, power supplies, clock circuits, input / output circuits and subsystems, etc. The processing steps may be stored in memory 386 as software routines 388 that may be executed or invoked to transform controller 380 into a special purpose controller that controls the operation of processing system 300. Controller 380 may be configured to perform any of the methods described herein, such as method 100.

[0045]

[0049] 4 is a cross-sectional view of an exemplary processing chamber 400 that can be used in step 140. The processing chamber 400 can be configured to perform a hydrogen radical treatment process. The processing chamber 400 has a chamber body 410 including a chamber housing 416, a process kit housing 418, and a lid 440. The chamber housing 416 and the lid 440 can be made of aluminum, stainless steel, or other suitable materials. The process kit housing 418 can be made of an aluminum alloy or other suitable materials. The lid 440 is removably coupled to the chamber housing 416 via the process kit housing 418.

[0046]

[0050] The process kit housing 418 may be a ring-shaped housing having a top surface that couples to the lid 440 and a bottom surface that couples to the chamber housing 416. The process kit housing 418 has a shield portion 429 extending downward from an inner surface 431 of the process kit housing 418. The inner surface 431 of the process kit housing 418 surrounds and supports a gas distribution plate 426 thereon. The gas distribution plate 426 may be a quartz showerhead. A plenum 448 is defined between the gas distribution plate 426 and the lid 440. The gas distribution plate 426 includes a plurality of apertures 427 formed through its thickness to allow gas to flow through ports 442 into the plenum 448. The apertures 427 are evenly distributed across the diameter of the gas distribution plate 426 to ensure uniform distribution of gas or radicals to the substrate 408. Gas flowing through the apertures 427 is distributed across a substrate 408 positioned in a process region 430 defined between the gas distribution plate 426 and the substrate support 414. The substrate support 414 may include a heater. The shield portion 429 also helps confine electrically neutral radicals within the process region 430. In one embodiment, the shield portion 429 extends adjacent to or below the edge of the substrate support 414.

[0047]

[0051] The processing chamber 400 includes a remote plasma source 450 coupled to a port 442 by a conduit 460. The port 442 is formed in the lid 440. The conduit 460 defines an inlet 456, which may have a first inner diameter and a second inner diameter larger than the first inner diameter. The first inner diameter may be disposed adjacent to the remote plasma source 450, and the second inner diameter may be disposed adjacent to the lid 440. In one embodiment, the first inner diameter may be about 12 mm to about 30 mm, for example, about 20 mm, and the second inner diameter may be about 35 mm to about 60 mm, for example, about 40 mm.

[0048]

[0052] The conduit 460 is configured to filter ions generated in the remote plasma source 450 before they enter the process region 430, allowing electrically neutral radicals to enter the process region 430. This reduces the relative concentration of ions in the process region 430. In one embodiment, the gas flowing through the inlet 456 is filtered by a magnetic field generated by one or more magnets positioned adjacent to the conduit 460. The magnets generate a magnetic field across the conduit 460 to filter out charged particles entrained with the reactive radicals flowing from the remote plasma source 450.

[0049]

[0053] In the embodiment shown in FIG. 4 , a first magnet 452 and a second magnet 454 are positioned adjacent to the conduit 460. The first magnet 452 and the second magnet 454 may be permanent magnets or electromagnets. The magnets 452, 454 may be positioned on opposite sides of the first inner diameter of the conduit 460. For example, the magnets 452, 454 may be glued or fixed to opposite sides of the outer periphery of the conduit 460. The magnets 452, 454 may be alternately fixed to the chamber lid 440 or other components of the chamber body 410. The relative distance between the opposing magnets and the inlet 456 formed in the conduit 460 affects the strength of the magnetic field passing through the inlet 456, thereby affecting filtration efficiency. The magnetic field can also be adjusted by using different magnets, i.e., by replacing the magnets 452, 454 with magnets of different strengths. Passing charged particles contact the inner surface 470 of the conduit 460 and are attracted to it, becoming electrically neutral, non-ionic species. In this way, the filtered, electrically neutral radicals are delivered to the substrate surface and react with and clean contaminants on the substrate.

[0050]

[0054] In some embodiments, ions can be further filtered by providing a quartz surface in the flow path of the process gas (i.e., radicals and ions) passing into the chamber body 410. For example, the inner surface 470 of the conduit 460 defining the inlet 456 may be wholly or partially coated with or made of quartz. Additionally, the surfaces defining the plenum 448 and / or gas distribution plate 426 may also be wholly or at least partially coated with or made of quartz. For example, in the embodiment of FIG. 4 , an upper liner 424 may be disposed along the inner surface 431 of the process kit housing 418. The upper liner 424 may have a ring-shaped body that surrounds the plenum 448, with its inner surface defining the outer boundary of the plenum 448. The upper liner 424 may be made of quartz. The upper liner 424 may rest on the gas distribution plate 426 or may be supported by any other suitable fastening method.

[0051]

[0055] A liner plate 444 may be disposed along the bottom surface of the lid 440. The liner plate 444 may be coated with or made of quartz. The liner plate 444 defines the upper boundary of a plenum 448. Thus, the liner plate 444, the top liner 424, and the gas distribution plate 426 define the plenum 448. A bottom liner 425 may be disposed along the inner surface 431 of the process kit housing 418. The bottom liner 425 may have a ring-shaped body that surrounds the process region 430 when assembled for processing, with its inner surface defining the outer boundary of the process region 430. The bottom liner 425 may be coated with or made of quartz. The bottom liner 425 may be supported by a shield 429. In one embodiment as shown, a ledge 403 extends radially inward at the end of the shield portion 429 to support the bottom liner 425. Thus, the conduit 460, liner plate 444, top liner 424, bottom liner 425, and gas distribution plate together provide quartz surfaces along the process gas flow path. These components reduce radical recombination compared to other chamber materials (e.g., aluminum). In this manner, the process gas is substantially reduced in charged particle content and may consist primarily of neutral species, such as radicals and molecules, as it flows through the gas distribution plate 426 and into the process region 430. The electrically neutral radicals remain reactive as they reach and react with a substrate surface disposed on a substrate support to remove unwanted materials, such as carbon contaminants, from the substrate surface.

[0052]

[0056] A substrate support 414 is disposed in the process region 430 of the chamber body 410. The substrate support 414 is coupled to the bottom of the chamber housing 416 via a central shaft 441. The substrate support 414 has a substrate support surface for supporting a substrate 408 thereon during processes such as those described above with respect to steps 120, 130, 140, 150, and 160. An optional focus ring 438 may be disposed on the substrate support 414 around the periphery of the substrate support surface. The focus ring 438 confines plasma or neutral species to a region above the substrate 408 during processing. The focus ring 438 may be made of quartz.

[0053]

[0057] The substrate support 414 may be made of aluminum with multiple sapphire contacts (not shown) disposed on the substrate support surface to minimize contact between the substrate support surface and a substrate disposed on the sapphire contacts. The substrate support 414 is driven by a drive unit 437 to move vertically between a loading position and a processing position. The substrate support 414 may have one or more heating elements 435 embedded therein to provide uniform thermal energy to the substrate support surface. Suitable heating elements 435 may include, among other heating elements, resistive heaters, thermoelectric elements, or conduits for flowing heat transfer fluids. The heating elements 435 may maintain the temperature of the substrate 408 during processing. In some embodiments, the substrate support 414 may have a notch formed through the periphery of the substrate support surface to allow a substrate handler (not shown) to handle the substrate 408 from the edge of the substrate when the substrate support 414 is disposed in the loading position. During the cleaning process, the substrate support 414 with the substrate 408 disposed thereon is positioned at a processing position, which is the desired position for processing the substrate 408 .

[0054]

[0058] The processing chamber 400 includes a pump 417. The pump 417 is connected to the chamber body 410 through a foreline 461. The foreline 461 is connected to the chamber body 410 at an opening 415 formed in the bottom of a chamber housing 416. The processing chamber 400 also includes a throttle valve 463 disposed in the foreline 461. The throttle valve 463 operates to open or close to the extent necessary to maintain the pressure in the processing chamber 400 in the desired vacuum range for the plasma cleaning process being performed. The pump 417 and the throttle valve 463 control the pressure inside the chamber body 410. In some embodiments, the pump 417 is a dry pump, a low-pressure pump, or a turbo pump.

[0055]

[0059] FIG. 5 illustrates an exemplary vacuum processing system 500 that can be used to complete the method 100 shown in FIG. 1 in accordance with an embodiment of the present disclosure. As shown in FIG. 5, multiple processing chambers 502a, 502b, 502c, and 502d are coupled to a first transfer chamber 504. The processing chambers 502a-502d can be used to perform any substrate-related process, such as annealing, chemical vapor deposition, physical vapor deposition, epitaxial processes, etching processes, substrate preparation, thermal oxidation or nitridation processes, degassing, etc. In one embodiment, the processing chamber 502a can be a film formation chamber, such as a vapor phase epitaxy deposition chamber, for example, an Epi chamber available from Applied Materials, Inc., Santa Clara, California. In another embodiment, the processing chamber 502a can be a processing chamber that can be adapted to perform a reduction process. Any of the processing chambers 502a-502d can be a Radiance® H2 Bake (RTH) chamber available from Applied Materials, Inc. Chambers from other manufacturers can also be used. In embodiments in which one of the processing chambers 502a-502d is an RTH chamber, one of the remaining processing chambers 502a-502d is an oxidation chamber, such as processing chamber 302.

[0056]

[0060] Processing chamber 502b may be a rapid thermal processing chamber (RTP). Processing chamber 502c may be a plasma etch chamber or a plasma clean chamber. For example, processing chamber 502b may be processing chamber 302 described with respect to FIG. 3. Processing chamber 502d may be a degassing chamber. The first transfer chamber 504 is also coupled to at least one transition station, such as a pair of pass-through stations 506, 508. The pass-through stations 506, 508 allow substrates to be transferred between the first transfer chamber 504 and the second transfer chamber 510 while maintaining vacuum conditions. The first transfer chamber 504 includes a robotic substrate handling mechanism (not shown) for transferring substrates between the pass-through stations 506, 508 and any of the processing chambers 502a-502d. Although the illustrated processing chambers 502a-502d are arranged in a particular order in FIG. 5, they may be arranged in any desired order.

[0057]

[0061] One end of the pass-through stations 506, 508 is coupled to a second transfer chamber 510. Thus, the first transfer chamber 504 and the second transfer chamber 510 are separated and coupled by the pass-through stations 506, 508. The second transfer chamber 510 is coupled to a plasma cleaning chamber 514, which may be a plasma chamber, such as a processing chamber adapted to perform step 140 shown in FIG. 1 to remove impurities from a Si-containing surface of a substrate. In one embodiment, the plasma cleaning chamber 514 is a Siconi™ or Selectra™ chamber available from Applied Materials, Inc. of Santa Clara, California. In another embodiment, the plasma cleaning chamber 514 may be the processing chamber 302 described with reference to FIG. 3 or the processing chamber 400 described with reference to FIG. 4.

[0058]

[0062] In one embodiment, at least one transition station, e.g., one of pass-through stations 506, 508, is configured to perform a reduction process, such as an AKTIV Pre-Clean™, PCxT Reactive Preclean™ (RPC), or Selectra™ chamber available from Applied Materials, Inc. Alternatively, a plasma cleaning chamber can be coupled to one of pass-through stations 506, 508 to remove impurities from the surface of a Si-containing substrate. Thus, vacuum processing system 500 may have a reduction process chamber that is one of pass-through stations 506, 508 or is connected to one of pass-through stations 506, 508. In one embodiment shown in FIG. 5, pass-through station 506 includes reduction process chamber 400. Reduction process chamber 400 may be a version of processing chamber 400 (FIG. 4) adapted to perform at least step 140 to remove impurities from a Si-containing surface of a substrate. Although only one reduction process chamber 400 is coupled to the illustrated pass-through station, in this case, pass-through station 506, it should be noted that a plasma cleaning chamber (e.g., a version of processing chamber 302 or processing chamber 400) may be coupled to both pass-through stations 506 and 508.

[0059]

[0063] The second transfer chamber 510 also has a robotic substrate handling mechanism (not shown) for transferring substrates between a set of load lock chambers 512 and the plasma cleaning chamber 514 or the reduction process chamber 400. A factory interface 520 is connected to the second transfer chamber 510 by the load lock chambers 512. The factory interface 520 is coupled to one or more pods 530 on the opposite side of the load lock chambers 512. The pods 530 are typically front-opening unified pods (FOUPs) that are accessible from a clean room (not shown).

[0060]

[0064] Although two transfer chambers are illustrated, it is contemplated that either of the transfer chambers may be omitted. In an embodiment in which the second transfer chamber 510 is omitted, the reduction process chamber 400 may be located within or coupled to the first transfer chamber 504 in the position currently occupied by the illustrated pass-through station 506 or 508. The first transfer chamber 504 may be coupled to one or more processing chambers capable of forming crystalline silicon or silicon germanium, for example, an epitaxy chamber such as a Centura™ Epi chamber available from Applied Materials, Inc., Santa Clara, California. Alternatively, the first transfer chamber 504 may be omitted, and the reduction process chamber 400 may be located within or coupled to the pass-through station 506 coupled to the second transfer chamber 510.

[0061]

[0065] During operation, substrates are transported from the pod 530 to the vacuum processing system 500 in a transport cassette (not shown) located within one of the load lock chambers 512. A robotic transport mechanism within the second transfer chamber 510 transports the substrates, one at a time, from the load lock chamber 512 to the plasma cleaning chamber 514, where a cleaning process is performed to remove oxides from the substrate's surface. Once the oxides have been removed from the substrate's surface, the robotic transport mechanism located within the second transfer chamber 510 transfers the substrate from the plasma cleaning chamber 514 to the reduction process chamber 400, where a reduction process, such as that included in step 140, is performed to remove impurities such as carbon or hydrocarbons from the substrate's surface. The clean substrate is then transferred by the robotic transport mechanism located within the first transfer chamber 504 from the reduction process chamber 400 to one or more processing chambers 502a-502d, where an oxidation process, such as the oxidation process of step 150, is performed.

[0062]

[0066] Once processing in one or more of the processing chambers 502a-502d is complete, a robotic transport mechanism located within the first transfer chamber 504 moves the substrate from one of the processing chambers 502 to the pass-through station 508. The substrate is then removed from the pass-through station 508 by a robotic transport mechanism located within the second transfer chamber 510 and transferred to another load lock chamber 512 through which it is withdrawn from the vacuum processing system 500.

[0063]

[0067] Because the processes of steps 130, 140, 150, and 160 are performed within the same vacuum processing system 500, the vacuum is not broken as the substrate is transferred between the various chambers, reducing the chance of contamination and improving memory hole conformality. It should be understood that the movement of the substrate is described herein for illustrative purposes. A controller (not shown) can be used to schedule the movement of the substrate through the vacuum processing system 500 according to a desired sequence program, which can be varied depending on the application.

[0064]

[0068] In the above Summary of the Invention, Detailed Description, and the following claims, as well as the accompanying drawings, reference is made to particular features (including method steps) of the present disclosure. It is to be understood that the disclosure herein includes all possible combinations of such particular features. For example, if a particular feature is disclosed in a particular aspect or embodiment of the present disclosure, or in the context of a particular claim, that feature can also be used in combination with and / or in the context of other particular aspects and embodiments of the present disclosure, and in the present disclosure generally, to the extent possible.

[0065]

[0069] As used herein, the terms "comprising," "including," "having," and their grammatical equivalents mean that other components, ingredients, steps, etc. are optionally present. For example, an article "comprising" (or "comprising") components A, B, and C may consist solely of (i.e., include only) components A, B, and C, or it may include not only components A, B, and C, but also one or more other components.

[0066]

[0070] When reference is made herein to a method comprising two or more defined steps, the defined steps may be performed in any order or simultaneously, unless the context excludes this possibility, and the method may include one or more other steps performed before any defined step, between two defined steps, or after all defined steps, unless the context excludes this possibility.

[0067]

[0071] While the foregoing is directed to embodiments of the present disclosure, other and further embodiments of the present disclosure may be devised without departing from the basic scope thereof as determined by the following claims.

Claims

1. A method for processing a substrate, comprising: exposing a substrate to a vacuum, the substrate having one or more memory holes or trenches; treating the substrate with a pretreatment gas or plasma; oxidizing the substrate while the substrate is still under vacuum; A method comprising:

2. The method of claim 1 , wherein impurities are accumulated in at least one of the one or more memory holes or trenches.

3. The method of claim 2 , wherein the accumulation of impurities comprises hydrocarbons.

4. 10. The method of claim 1, wherein the processing of the substrate occurs at a temperature, the temperature being between 50°C and 850°C.

5. 10. The method of claim 1, wherein the processing of the substrate occurs at a temperature, the temperature being between 50°C and 300°C.

6. The substrate is made of Si, SiO x N y 10. The method of claim 1, wherein the silicon nitride layer comprises a silicon nitride (SiN) or SiN.

7. The method of claim 1 , wherein treating the substrate with the pretreatment gas or plasma is carried out for a time period ranging from 5 seconds to 3 minutes.

8. The method of claim 1 , wherein treating the substrate with the pretreatment gas or plasma is performed in a chamber, and oxidizing the substrate is performed in the chamber.

9. The method of claim 1 , wherein the pretreatment gas or plasma comprises an inert gas.

10. The inert gas is N 2 10. The method of claim 9, wherein the oxygen comprises Ar, He, or a combination thereof.

11. The pretreatment gas or plasma is H 2 or H radicals.

12. The method of claim 1 , wherein oxidizing the substrate is a single-step process.

13. The method of claim 1 , wherein oxidizing the substrate is a multi-step process.

14. The method of claim 1 , wherein the processing of the substrate is performed at a pressure of at least 0.1 Torr but not more than atmospheric pressure.

15. A method for processing a substrate, comprising: exposing a substrate to a vacuum, the substrate having one or more memory holes or trenches; treating the substrate with an inert gas; oxidizing the substrate while the substrate is still under vacuum; A method comprising:

16. 16. The method of claim 15, wherein impurities are accumulated in at least one of the one or more memory holes or trenches.

17. 16. The method of claim 15, wherein the processing of the substrate occurs at a temperature, the temperature being between 50°C and 300°C.

18. 16. The method of claim 15, wherein the inert gas has a flow rate of between 10 sccm and 20 slm.

19. A method for processing a substrate, comprising: exposing a substrate to a vacuum, the substrate having one or more memory holes or trenches; H 2 or treating the substrate with a gas containing H radicals; oxidizing the substrate while the substrate is still under vacuum; A method comprising:

20. 20. The method of claim 19, wherein the processing of the substrate occurs at a temperature, the temperature being between 50°C and 300°C.

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