Wordline Contact Formation for NAND Devices

Abstract

Disclosed is an approach for forming direct word line contacts for 3-D NAND devices. One method may include providing a film stack including multiple alternating first and second layers and forming multiple contact openings in the film stack, each contact opening being formed at a different etch depth from a top surface of the film stack. The method may further include depositing a liner over the film stack including each of the contact openings, removing the first layer to form multiple word line openings in the film stack, and depositing a first conductive material within the word line openings to form multiple word lines. The method may further include removing the liner from a bottom of each contact opening and depositing a second conductive material within the contact openings to form multiple word line contacts.

Description

[Technical Field]

[0001] Related Applications

[0001] This application claims priority to U.S. Provisional Patent Application No. 63 / 429,851, entitled "Wordline Contact Formation for NAND Device," filed December 2, 2022, the entire contents of which are incorporated herein by reference.

[0002] Field

[0002] The present embodiments relate to processing of NAND devices, and more particularly to techniques for direct word line contact formation for 3D NAND devices. [Background technology]

[0003]

[0003] Current substrate (e.g., wafer) manufacturing techniques optimize etch rates, etch profiles, and etch selectivities to reduce manufacturing costs and increase the density of circuit elements on the substrate. However, etch features such as memory holes continue to shrink and / or their aspect ratios (e.g., the ratio of the feature's depth to its width) increase. For example, in the fabrication of three-dimensional (3D) NAND devices, substrates can contain up to 96 layers, and can be expanded to 128 layers. In addition, for example, the aspect ratio of memory holes can range from 100 to 200, and the depth of memory holes can range from approximately 6 μm to 8 μm, making etching memory holes one of the most critical and challenging steps in fabricating 3D NAND devices. For example, etching at such high aspect ratios requires not only high etch rates and etch selectivities, e.g., to mask materials on the substrate, but also straight features without bends or kinks, no under-etching and minimal microloading, minimal aspect ratio dependent etching (ARDE), and uniformity across the substrate (e.g., critical dimension variation 3σ<1%).

[0004]

[0004] When fabricating 3D NAND devices with layers configured in a staircase pattern, the formation of wordline landing pads is defined as first forming the staircase (e.g., lithography and etching steps) and / or a chop process to etch multiple layers, followed by filling the gaps in the staircase region. However, the selectivity margin during etching of wordline contacts remains challenging.

[0005]

[0005] It is with respect to these and other considerations that the present disclosure is provided. Summary of the Invention

[0006] This Summary is provided to introduce in a simplified form selected concepts that are detailed below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended as an aid in determining the scope of the claimed subject matter.

[0007] In view of the foregoing, a method may include providing a film stack including multiple alternating first and second layers and forming a plurality of contact openings in the film stack, wherein each contact opening of the plurality of contact openings is formed at a different etch depth from a top surface of the film stack. The method may further include depositing a liner over the film stack including each contact opening of the plurality of contact openings, removing the first layer to form a plurality of word line openings in the film stack, and depositing a first conductive material within the plurality of word line openings to form a plurality of word lines. The method may further include removing the liner from a bottom of each contact opening of the plurality of contact openings and depositing a second conductive material within the plurality of contact openings to form a plurality of word line contacts.

[0008]

[0008] In some approaches, the system may include a processor and a memory storing instructions executable by the processor, the instructions being for forming a film stack including multiple alternating layers of first and second layers; forming multiple contact openings in the film stack, with each contact opening of the multiple contact openings being etched to a different depth from the top surface of the film stack; depositing a liner over the film stack including inside each contact opening of the multiple contact openings; removing the first layer to form multiple word line openings in the film stack; depositing a first conductive material inside the multiple word line openings to form multiple word lines; removing the liner from a bottom of each contact opening of the multiple contact openings; and depositing a second conductive material inside the multiple contact openings to form multiple word line contacts.

[0009] In some approaches, a memory device may include a stack of layers including multiple alternating layers of first layers and horizontally oriented word lines, and a plurality of contact openings formed vertically through the stack of layers, each contact opening of the multiple contact openings extending to a top surface of the stack of layers and each contact opening of the multiple contact openings formed at a different etch depth from the top surface of the film stack. The device may further include a word line contact formed within each contact opening of the multiple contact openings. [Brief explanation of the drawings]

[0010]

[0010] The accompanying drawings illustrate exemplary techniques of the present disclosure, including practical applications of the principles of the present disclosure, as follows:

[0011] [Figure 1]

[0011] FIG. 2 is a cross-sectional side view of a patterned first masking layer over a stack of alternating first and second layers of an exemplary device according to an embodiment of the present disclosure. [Figure 2]

[0012] 3 is a cross-sectional side view of a first set of contact openings formed in a stack of alternating first and second layers of an exemplary device according to an embodiment of the present disclosure. [Figure 3]

[0013] FIG. 2 is a cross-sectional side view of a patterned second masking layer over a stack of alternating first and second layers of an exemplary device according to an embodiment of the present disclosure. [Figure 4]

[0014] FIG. 10 is a cross-sectional side view of a second set of contact openings formed in a stack of alternating first and second layers of an exemplary device according to an embodiment of the present disclosure. [Figure 5]

[0015] FIG. 10 is a cross-sectional side view of a patterned third masking layer over a stack of alternating first and second layers of an exemplary device according to an embodiment of the present disclosure. [Figure 6]

[0016] FIG. 10 is a cross-sectional side view of a third set of contact openings formed in a stack of alternating first and second layers of an exemplary device according to an embodiment of the present disclosure. [Figure 7]

[0017] 1 is a cross-sectional side view of a liner formed within a plurality of contact openings according to an embodiment of the present disclosure. [Figure 8]

[0018] FIG. 10 is a cross-sectional side view of an exemplary device according to an embodiment of the present disclosure after removing a second layer. [Figure 9]

[0019] 1 illustrates a cross-sectional side view of an exemplary device according to an embodiment of the present disclosure after forming multiple word lines. [Figure 10]

[0020] 10 is a cross-sectional side view of an exemplary device according to an embodiment of the present disclosure after removing the liner from the bottom of each of the plurality of contact openings. [Figure 11]

[0021] FIG. 10 is a cross-sectional side view of an exemplary device according to an embodiment of the present disclosure after forming a plurality of contacts. [Figure 12]

[0022] FIG. 12A is a top view of a NAND device including multiple groups of contacts therein, according to an embodiment of the present disclosure.

[0023] FIG. 12B is a cross-sectional side view of a contact from a first group of contacts of a plurality of groups of contacts of a NAND device according to an embodiment of the present disclosure.

[0024] FIG. 12C is a cross-sectional side view of a contact from a second group of contacts of a plurality of groups of contacts of a NAND device according to an embodiment of the present disclosure.

[0025] FIG. 12D is a cross-sectional side view of a contact from a third group of contacts of a plurality of groups of contacts of a NAND device according to an embodiment of the present disclosure.

[0026] FIG. 12E is a cross-sectional side view of a portion of a contact from a third group of contacts of a plurality of groups of contacts of a NAND device according to an embodiment of the present disclosure.

[0027] FIG. 12F is a cross-sectional side view of a contact from a fourth group of contacts of a plurality of groups of contacts of a NAND device according to an embodiment of the present disclosure. [Figure 13]

[0028] 13A-13D are side perspective views of an exemplary device during the formation of multiple contact openings according to embodiments of the present disclosure. [Figure 14]

[0029] FIG. 1 is a schematic diagram of an exemplary system, according to an embodiment of the present disclosure. [Figure 15]

[0030] FIG. 1 is a flow diagram of a method for forming an exemplary device according to an embodiment of the present disclosure.

[0012]

[0031] The drawings are not necessarily to scale. The drawings are merely representational and are not intended to represent specific parameters of the present disclosure. The drawings are intended to illustrate exemplary embodiments of the present disclosure and therefore are not to be considered limiting in scope. In the drawings, like numbering represents like elements.

[0013]

[0032] Additionally, some elements in some of the drawings may be omitted or not drawn to scale for clarity of illustration. The cross-sectional views may be in "slice" format or in the form of a "close-up" cross-section, which for clarity of illustration omits some background lines visible in a "true" cross-section. Additionally, some reference numbers may be omitted in some of the drawings for clarity. DETAILED DESCRIPTION OF THE INVENTION

[0014]

[0033] The methods, systems, and devices according to the present disclosure will now be described in more detail with reference to the accompanying drawings, which illustrate various embodiments. The present methods, systems, and devices may be embodied in many different forms and are not to be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the methods to those skilled in the art.

[0015]

[0034] The embodiments described herein are directed to a 3-D NAND direct wordline contact back-end integration technique for minimizing aspect-ratio dependent etching. The disclosed direct wordline contact technique can reduce multiple conventional processing steps (e.g., staircase formation lithography and etch, chop lithography and etch, and staircase area gap-fill deposition and planarization), thus providing significant throughput and cost-effectiveness. Furthermore, by forming the wordline contact openings before depositing the wordline metal, contact metal selectivity can be improved and the use of a stop layer can be eliminated. Furthermore, the disclosed direct wordline contact back-end processing approach varies the dimensions of the contact openings to compensate for aspect-ratio dependent etching and to reduce wordline contact stress by combining contact metal and oxide deposition to fill the gaps in the large contact openings.

[0016]

[0035] FIG. 1 is a perspective view of a memory device (herein “device”) 100 at an early stage of processing according to one or more embodiments described herein. The device 100 may include a film stack 102 having multiple alternating horizontal first layers 106A-106E and second layers 108A-108D stacked one on top of the other. The film stack 102 may be part of a memory cell device, such as a three-dimensional (3D) memory device (e.g., NAND). Without limitation, the first layer 106 may be a dielectric material such as silicon oxide (SiO), and the second layer 108 may be a second dielectric material such as silicon nitride. In other embodiments, suitable dielectric materials for the first layer 106 and / or the second layer 108 may include silicon oxynitride, silicon carbide, silicon oxycarbide, titanium nitride, a composite of an oxide and nitride, at least one or more oxide layers sandwiching a nitride layer, and combinations thereof, among others.

[0017]

[0036] As further shown, the device 100 may include a first masking layer 110 formed directly on the top surface 112 of the film stack 102. The first masking layer 110 may be a photoresist layer that includes a set (i.e., one or more) first mask openings 115A, 115B formed (e.g., etched) therein. As shown, the first mask openings 115A, 115B may be formed selectively with respect to the top surface 112 of the film stack 102.

[0018]

[0037] 2 shows a pair of first contact holes or openings 118A, 118B formed through the top layer of the film stack 102. In the illustrated embodiment, the first contact openings 118A, 118B are formed through the uppermost first layer 106A exposed within the first mask openings 115A, 115B in the first masking layer 110. The first contact openings 118A, 118B may be etched selectively to the top surface 123 of the second layer 108A.

[0019]

[0038] 3, a second masking layer 124 may then be formed over the film stack 102 and etched to form a set of second mask openings 126A, 126B therein. As shown, the second masking layer 124 may cover the first contact opening 118A, and the second mask opening 126B may be aligned with the first contact opening 118B. The mask opening 126A may be formed between the first contact openings 118A, 118B.

[0020]

[0039] As shown in FIG. 4, the film stack 102 can be etched again to form a set of third contact openings 128A, 128B. The etching can be performed on the device 100 while the second masking layer 124, which is then removed, is present. Therefore, the first contact opening 118A is generally unaffected by this etching step. The third contact opening 128A is formed through the first layer 106A, the second layer 108A, and the first layer 106B. The third contact opening 128A may extend to the top surface 130 of the second layer 108B. Meanwhile, the third contact opening 128B is formed through the first layer 106A, the second layer 108A, the first layer 106B, the second layer 108B, and the first layer 106C. The third contact opening 128B may extend to the top surface 131 of the second layer 108C. As shown, the third contact openings 128A and 128B extend to different depths from the top surface 112 of the film stack 102.

[0021]

[0040] 5, a third masking layer 132 may then be formed over the film stack 102 and etched to form a third mask opening 134 therein. As shown, the third masking layer 132 may cover the first contact opening 118A and the third contact openings 128A, 128B. The third mask opening 134 may be formed selectively to the top surface 112 of the film stack 102.

[0022]

[0041] As shown in FIG. 6 , the film stack 102 can be etched again to form a fourth contact opening 136. The etch can be performed on the device 100 while the third masking layer 132 is present, which is then removed. Thus, the first contact opening 118A and the third contact openings 128A, 128B are generally unaffected during the formation of the fourth contact opening 136. The fourth contact opening 136 is formed through the first layers 106A-106D and the second layers 108A-108C. The fourth contact opening 136 may extend to the top surface 139 of the second layer 108D. As shown, the first contact opening 118A, the third contact opening 128A, the third contact opening 128B, and the fourth contact opening 136 extend to different depths from the top surface 112 of the film stack 102. The masking and etching steps may be repeated depending on the number of layers present in film stack 102. It will be understood that in other embodiments device 100 may include more layers.

[0023]

[0042] 7, a liner 140 may then be formed over the device 100, including within each of the first contact opening 118A, the third contact opening 128A, the third contact opening 128B, and the fourth contact opening 136 of the first film stack 102. In some embodiments, the liner 140 may be an oxide layer (e.g., SiO, AlO, etc.) formed (e.g., via atomic layer deposition (ALD)) along the top surface 112 of the film stack 102 and along the sidewalls 148 and bottoms 149 of the plurality of contact openings. As further shown, a gap fill 141 may be formed within each of the plurality of contact openings. Without limitation, the gap fill 141 may be a sacrificial carbon film.

[0024]

[0043] As shown in FIG. 8 , the second layers 108A-108D have been removed from the film stack 102, for example, by a horizontal wet etching process, forming a plurality of word line openings 150 therein. The first layers 106A-106E and the liner 140 are typically unaffected by the wet etching. Then, as shown in FIG. 9 , a first conductive material 154 (e.g., tungsten (W) or molybdenum (Mo)) may be deposited within the plurality of word line openings 150 to form a plurality of word lines 152 in the device 100. Then, as shown in FIG. 10 , the gap fill 141 and the liner 140 may be removed, with the liner 140 being removed from the top surface 112 of the film stack 102 and the bottoms 149 of the plurality of contact openings. In some embodiments, the liner 140 may be vertically etched to expose a top surface 156 of one or more of the plurality of word lines 152. As shown, the liner 140 remains along the sidewalls 148 of the plurality of contact openings.

[0025]

[0044] 11 , a second conductive material 160 may be deposited within the contact openings to form word line contacts 162. In some embodiments, the second conductive material 160 may be tungsten co-deposited with titanium nitride (TiN) on the top surfaces 156 of the word lines 152. The second conductive material 160 may be separated from the first layers 106A-106E by a liner 140 along the sidewalls 148 of the contact openings.

[0026]

[0045] 12A is a top view of a device 200 including multiple groups of wordline contacts formed in a film stack 202. For example, group 1 ("GR1") may include a first plurality of wordline contacts 205 formed in a first plurality of contact openings 207, group 2 ("GR2") may include a second plurality of wordline contacts 209 formed in a second plurality of contact openings 211, group 3 ("GR3") may include a third plurality of wordline contacts 213 formed in a third plurality of contact openings 215, group 4 ("GR4") may include a fourth plurality of wordline contacts 219 formed in a fourth plurality of contact openings 221, etc.

[0027]

[0046] Each of the first, second, third, and fourth pluralities of word line contacts 205, 209, and 219 may be formed using the techniques shown in Figures 1-11 and described above. For example, as more clearly shown in Figures 12B and 12E, device 200 may include a plurality of word lines 252 formed within film stack 202 and a liner 240 formed within first and third pluralities of contact openings 207 and 215. A contact liner 266 and a conductive material 260 may be deposited within first and third pluralities of contact openings 207 and 215 to form first and third pluralities of word line contacts 205 and 213, respectively. In various embodiments, the conductive material 260 can be W, tungsten silicide (WSi), tungsten polysilicon (W / Poly), tungsten alloy, tantalum (Ta), titanium (Ti), copper (Cu), ruthenium (Ru), nickel (Ni), cobalt (Co), chromium (Cr), iron (Fe), manganese (Mn), aluminum (Al), hafnium (Hf), vanadium (V), molybdenum (Mo), palladium (Pd), gold (Au), silver (Au), platinum (Pt), alloys thereof, or combinations thereof, while the contact liner 266 can be a metal nitride layer or a metal silicon nitride layer, such as TiN, tantalum nitride (TaN), TaSiN, TiSiN, and combinations thereof, among others.

[0028]

[0047] As shown, the first, second, third, and fourth pluralities of word line contacts 205, 209, 213, and 219 may be grouped into various groups having different CDs to compensate for the different aspect ratios of the respective contact openings 207, 211, 215, and 221 of device 200. For example, as shown in FIGS. 12B-12D, the first plurality of contact openings 207 of GR1 and the second plurality of contact openings 211 of GR2 may be formed at different etch depths from the top surface 212 of film stack 202, and the third plurality of contact openings 215 of GR3 may be formed at a different (i.e., larger) etch depth from the top surface 212 of film stack 202 than the second plurality of contact openings 211. As further shown in FIG. 12F, the fourth plurality of contact openings 221 of GR4 may be formed at a larger etch depth than the third plurality of contact openings 215. As a result, the average length / depth of the word line contacts in device 200 may increase between GR1 and GR4. Furthermore, in the illustrated embodiment, the average diameter of third plurality of contact openings 215 is larger than the average diameter of second plurality of contact openings 211, which is larger than the average diameter of first plurality of contact openings 207. Each word line contact may extend all the way to top surface 212 of film stack 202, eliminating the need for a staircase configuration of film stack 202. In other words, top surface 212 of film stack 202 in GR1 is coplanar with top surface 212 of film stack 202 in GR4.

[0029]

[0048] In some embodiments, as shown in Figures 12D and 12F, a dielectric gap fill 270 can be formed within the third plurality of contact openings 215 and the fourth plurality of contact openings 221. The dielectric gap fill 270 can be beneficial for large contact holes to reduce wafer stress and lower cost of ownership. As shown, the gap fill 270 can be surrounded by the conductive material 260 of the third plurality of word line contacts 213 and the fourth plurality of word line contacts 219, respectively. Without limitation, the dielectric gap fill 270 can be SiO2, SiN, SiON, or other suitable dielectric material and can be formed by a suitable deposition process, such as CVD, ALD, a sputtering process, or a coating process.

[0030]

[0049] 13 further illustrates the formation of multiple word line contact openings 301 in film stack 302 according to the techniques described herein. Multiple contact openings 301 may be formed (e.g., etched 305) using the same or similar techniques used to form the word line contact openings of devices 100 and / or 200. In the illustrated embodiment, a total of 360 ON pairs may be present in device 300. For example, nine (9) etching / lithography steps are used to form the 360 ​​pairs, as shown in Table 1 below. TIFF2025537915000002.tif77170

[0031]

[0050] FIG. 14 is a schematic diagram of an exemplary system / apparatus 400 according to embodiments of the present disclosure. Operation of the system 400 will be described with reference to the device 100. In some embodiments, the system 400 may be a cluster tool operable to perform the processes necessary to form the devices 100 and 200 described herein. Without limitation, the system 400 may include at least one central transfer station / chamber 402 and one or more robots 404 within the transfer station / chamber 402, operable to move a robot blade and wafer between each of a plurality of processing chambers 410A-410N connected to or adjacent to the transfer station / chamber 402. In some embodiments, the system 400 may include any type of suitable chamber, including, but not limited to, a first deposition chamber 410A, a first etch chamber 410B, a second deposition chamber 410C, a second etch chamber 410D, and a third deposition chamber 410E. The first deposition chamber 410A, the second deposition chamber 410C, and the third deposition chamber 410E may comprise one or more of an atomic layer deposition chamber, a plasma-enhanced atomic layer deposition chamber, a chemical vapor deposition chamber, a plasma-enhanced chemical vapor deposition chamber, or a physical deposition chamber. The specific arrangement of process chambers and components may vary depending on the cluster tool and should not be construed as limiting the scope of the present disclosure. For example, in alternative embodiments, only a single deposition chamber and / or a single etch chamber is present in the system 400. In another example, one or more of the deposition chambers may include multiple process regions within the same chamber, allowing for a common supply of gases, common pressure control, and common process gas exhaust / pumping. The modular design of the system allows for rapid conversion from one configuration to any other configuration.

[0032]

[0051] In some embodiments, the first deposition chamber 410A can be used to deposit the film stack 102 as alternating layers of first layers 106 and second layers 108, and multiple masking layers (e.g., a first masking layer 110, a second masking layer 124, and a third masking layer 132) can be deposited on the film stack 102.

[0033]

[0052] The first etching chamber 410B can be used to etch multiple masking layers and to form multiple contact openings (e.g., first contact opening 118A, third contact opening 128A, third contact opening 128B, and fourth contact opening 136) in the film stack 102, with each contact opening of the multiple contact openings being formed at a different etching depth from the top surface 112 of the film stack 102.

[0034]

[0053] The second deposition chamber 410C can be used to deposit a liner 140 over the film stack 102, including the inside of each of the multiple contact openings, and the second etching chamber 410D can be used to remove the first layer 106 to form multiple word line openings 150 in the film stack 102.

[0035]

[0054] The third deposition chamber 410E may be used to form the plurality of word lines 152 by depositing the first conductive material 154 inside the plurality of word line openings 150, and the second etching chamber 410D may be used to perforate the liner 140 along the bottom 149 of each contact opening of the plurality of contact openings.

[0036]

[0055] The third deposition chamber 410E (or another deposition chamber) may also be used to deposit a second conductive material 160 within the contact openings to form word line contacts 162.

[0037]

[0056] A system controller 420 is in communication with the robot 404, the transfer station / chamber 402, and the plurality of processing chambers 410A-410E. The system controller 420 may be any suitable component capable of controlling the processing chambers 410A-410E and one or more robots 404, as well as the processes occurring within the processing chambers 410A-410E. For example, the system controller 420 may be a computer including a central processing unit 422, a memory 424, appropriate circuitry / logic / instructions, and storage.

[0038]

[0057] The processes or instructions may generally be stored in the memory 424 of the system controller 420 as software routines that, when executed by the processor 422, cause the processing chambers 410A-410N to perform the processes of the present disclosure. The software routines may also be stored and / or executed by a second processor (not shown) remote from the hardware controlled by the processor 422. Some or all of one or more methods of the present disclosure may also be performed in hardware. Thus, the processes may be implemented in software and in hardware using a computer system, for example, as an application-specific integrated circuit or other type of hardware implementation, or as a combination of software and hardware. The software routines, when executed by the processor 422, transform a general-purpose computer into a specific-purpose computer (controller) that controls chamber operation to perform a process.

[0039]

[0058] 15 , a process 500 according to an embodiment of the present disclosure is shown. In block 501, process 500 may include providing a film stack including a plurality of alternating first and second layers. In some embodiments, the first plurality of alternating first and second layers is a dielectric material, and the second plurality of alternating first and second layers is a dielectric material or a conductive material. In some embodiments, the first plurality of alternating first and second layers is silicon oxide, and the second plurality of alternating first and second layers is silicon nitride.

[0040]

[0059] At block 502, process 500 may include forming a plurality of contact openings in the film stack, each contact opening of the plurality of contact openings formed at a different etch depth from the top surface of the film stack. In some embodiments, forming the plurality of contact openings in the film stack may include patterning a first set of openings through a first masking layer and etching the first set of openings through the first set of contact openings of the plurality of contact openings. Forming the plurality of contact openings in the film stack may further include patterning a second set of openings through a second masking layer, wherein one opening of the second set of openings is aligned with one contact opening of the first set of contact openings, and etching the second set of contact openings of the plurality of contact openings through the second set of openings. Forming the plurality of contact openings in the film stack can further include patterning a third set of openings through a third masking layer, the third masking layer being formed over the first set of contact openings and the second set of contact openings, and etching the third set of contact openings of the plurality of contact openings through the third set of openings. In some embodiments, the first depth of the first set of contact openings is less than the second depth of the second set of contact openings, and the second depth of the second set of contact openings is less than the third depth of the third set of contact openings.

[0041]

[0060] In block 503, the process 500 may include depositing a liner over the film stack, including the interior of each contact opening of the plurality of contact openings.

[0042]

[0061] At block 504, the process 500 may include removing the first layer to form a plurality of word line openings in the film stack. In some embodiments, the word line openings are formed using a lateral wet etch process.

[0043]

[0062] In block 505, the process 500 may include forming a plurality of word lines by depositing a first conductive material within the plurality of word line openings. In some embodiments, the first conductive material is W or Mo.

[0044]

[0063] At block 506, process 500 may include removing the liner from a bottom of each contact opening of the plurality of contact openings. In some embodiments, removing the liner from the bottom of each contact opening of the plurality of contact openings exposes a top surface of one or more of the plurality of word lines. In some embodiments, the liner is removed from the bottom of each contact opening of the plurality of contact openings without removing the liner from the sidewalls of each contact opening of the plurality of contact openings.

[0045]

[0064] In block 507, the process 500 may include depositing a second conductive material within the contact openings to form word line contacts. In some embodiments, the second conductive material 160 may be W, which is deposited along with TiN on top surfaces of the word lines.

[0046]

[0065] In some embodiments, the process 500 may further include forming a second plurality of contact openings in the film stack, wherein each contact opening of the second plurality of contact openings is formed at a different etch depth from the top surface of the film stack, wherein an average diameter of the second plurality of contact openings is greater than an average diameter of the first plurality of contact openings, and wherein an average depth of the second plurality of contact openings is greater than an average depth of the first plurality of contact openings. In some embodiments, the second plurality of contact openings may be formed adjacent to the first plurality of contact openings. In some embodiments, the second plurality of contact openings may be formed simultaneously with the first plurality of contact openings.

[0047]

[0066] In various embodiments, a design tool can be provided and configured to generate a dataset used to pattern a semiconductor layer of a device, e.g., as described herein. For example, the dataset can generate a photomask used during a lithography process to pattern a layer for a structure described herein. Such a design tool can include a collection of one or more modules and can be comprised of hardware, software, or a combination thereof. Thus, for example, a tool can be a collection of one or more software modules, hardware modules, software / hardware modules, or any combination or permutation thereof. As another example, a tool can be a computing device or other apparatus that executes software or is implemented in hardware.

[0048]

[0067] For convenience and clarity, terms such as "top," "bottom," "upper," "lower," "vertical," "horizontal," "lateral," and "longitudinal" are used herein to describe the relative locations and orientations of components and the parts that make them up, as seen in the figures. Terminology includes the words specifically mentioned, derivatives thereof, and words of similar import.

[0049]

[0068] As used herein, elements or operations referred to in the singular should be understood to include the plural unless the exclusion of the plural elements or operations is expressly stated. Furthermore, references to "one embodiment" of the present disclosure are not intended to be limiting. Additional embodiments may also include the recited features.

[0050]

[0069] Additionally, the terms "substantial" or "substantially," as well as "approximately" or "generally," can be used interchangeably in some embodiments and can be described using any relative measure accepted by one of ordinary skill in the art. For example, these terms can serve as a comparison to a reference parameter and indicate a tolerance that can provide the intended function. Without limitation, deviation from the reference parameter can be, for example, less than 1%, less than 3%, less than 5%, less than 10%, less than 15%, less than 20%, etc.

[0051]

[0070] Furthermore, when an element, such as a layer, region, or substrate, is referred to as being formed, deposited, or disposed on or on another element, those skilled in the art will understand that the element may be directly on the other element, or intervening elements may be present. In contrast, when an element is referred to as being "directly on" or "directly on" another element, there are no intervening elements present.

[0052]

[0071] The scope of the present disclosure is not limited by the specific embodiments described herein. Indeed, various other embodiments and modifications of the present disclosure, in addition to those described herein, will be apparent to those skilled in the art from the foregoing description and accompanying drawings. Accordingly, such other embodiments and modifications are intended to be included within the scope of the present disclosure. Moreover, the present disclosure has been described herein in the context of particular implementations in particular environments for particular purposes. Those skilled in the art will recognize that the utility is not limited in this respect, and that the present disclosure may be beneficially implemented in any number of environments for any number of purposes. Accordingly, the claims should be construed in light of the full scope and spirit of the present disclosure as described herein.

Claims

1. providing a film stack including a plurality of alternating first and second layers; forming a plurality of contact openings in the film stack, each contact opening of the plurality of contact openings formed at a different etch depth from a top surface of the film stack; depositing a liner over the film stack including inside each contact opening of the plurality of contact openings; removing the first layer to form a plurality of word line openings in the film stack; depositing a first conductive material within the word line openings to form word lines; removing the liner from the bottom of each contact opening of the plurality of contact openings; depositing a second conductive material within the plurality of contact openings to form a plurality of word line contacts; A method comprising:

2. forming the plurality of contact openings in the film stack; patterning a first set of openings through the first masking layer; etching a first set of contact openings of the plurality of contact openings through the first set of openings; patterning a second set of openings through a second masking layer, wherein one opening of the second set of openings is aligned with one contact opening of the first set of contact openings; etching a second set of contact openings of the plurality of contact openings through the second set of openings; patterning a third set of openings through a third masking layer, the third masking layer being formed over the first set of contact openings and the second set of contact openings; etching a third set of contact openings of the plurality of contact openings through the third set of openings; The method of claim 1 , comprising:

3. 3. The method of claim 2, wherein a first depth of the first set of contact openings is less than a second depth of the second set of contact openings, and wherein the second depth of the second set of contact openings is less than a third depth of the third set of contact openings.

4. 4. The method of claim 3, wherein the first layer of the plurality of alternating first and second layers is silicon oxide and the second layer of the plurality of alternating first and second layers is silicon nitride.

5. 10. The method of claim 1, wherein the first layer of the plurality of alternating first and second layers is a dielectric material and the second layer of the plurality of alternating first and second layers is a dielectric material or a conductive material.

6. 2. The method of claim 1, wherein removing the liner from the bottom of each contact opening of the plurality of contact openings exposes a top surface of one or more of the plurality of word lines.

7. 2. The method of claim 1, further comprising removing the liner from the bottom of each contact opening of the plurality of contact openings without removing the liner from sidewalls of each contact opening of the plurality of contact openings.

8. 10. The method of claim 1, further comprising forming a second plurality of contact openings in the film stack, wherein each contact opening of the second plurality of contact openings is formed at a different etch depth from a top surface of the film stack, wherein an average diameter of the second plurality of contact openings is greater than an average diameter of the plurality of contact openings, and wherein an average depth of the second plurality of contact openings is greater than an average depth of the plurality of contact openings.

9. a processor; a memory storing instructions executable by the processor, the instructions comprising: to form a film stack including a plurality of alternating first and second layers; forming a plurality of contact openings in the film stack, each opening formed at a different etch depth from a top surface of the film stack; depositing a liner over the film stack including inside each contact opening of the plurality of contact openings; removing the first layer to form a plurality of word line openings in the film stack; depositing a first conductive material within the plurality of word line openings to form a plurality of word lines; removing the liner from the bottom of each contact opening of the plurality of contact openings; and depositing a second conductive material within the contact openings to form word line contacts; The instruction is memory and A system comprising:

10. The instructions executable by the processor to form the plurality of contact openings in the film stack include: patterning a first set of openings through the first masking layer; etching a first set of contact openings of the plurality of contact openings through the first set of openings; patterning a second set of openings through a second masking layer, wherein one opening of the second set of openings is aligned with one contact opening of the first set of contact openings; etching a second set of contact openings of the plurality of contact openings through the second set of openings; patterning a third set of openings through a third masking layer, the third masking layer being formed over the first set of contact openings and the second set of contact openings; etching a third set of contact openings of the plurality of contact openings through the third set of openings; The system of claim 9 , comprising:

11. The instructions executable by the processor to form the plurality of contact openings in the film stack include: forming the first set of contact openings to a first depth; forming the second set of contact openings to a second depth, the second depth being greater than the first depth; forming the third set of contact openings to a third depth, the third depth being greater than the second depth; The system of claim 10 further comprising:

12. 10. The system of claim 9, wherein the instructions executable by the processor to form the film stack including multiple alternating first and second layers include forming the first layer using a dielectric material and forming the second layer using a dielectric material or a conductive material.

13. 10. The system of claim 9, wherein the instructions executable by the processor for removing the liner from the bottom of each contact opening of the plurality of contact openings further comprise exposing a top surface of one or more of the plurality of word lines.

14. 10. The system of claim 9, wherein the instructions executable by the processor for removing the liner from the bottom of each contact opening of the plurality of contact openings further comprise removing the liner from the bottom of each contact opening of the plurality of contact openings without removing the liner from sidewalls of each contact opening of the plurality of contact openings.

15. 10. The system of claim 9, further comprising instructions executable by the processor for forming a second plurality of contact openings in the film stack, wherein each contact opening of the second plurality of contact openings is formed at a different etch depth from a top surface of the film stack, an average diameter of the second plurality of contact openings is greater than an average diameter of the plurality of contact openings, and an average depth of the second plurality of contact openings is greater than an average depth of the plurality of contact openings.

16. a stack of layers including a plurality of alternating layers of first layers and horizontally oriented word lines; a plurality of contact openings formed vertically through the stack of layers, each contact opening of the plurality of contact openings extending to a top surface of the stack of layers and each contact opening of the plurality of contact openings formed at a different etch depth from the top surface of the film stack; and A word line contact formed within each of the plurality of contact openings. A memory device comprising:

17. 17. The memory device of claim 16, further comprising a liner formed along a sidewall of each contact opening of the plurality of contact openings.

18. 17. The memory device of claim 16, wherein a first depth of a first set of contact openings of the plurality of contact openings is less than a second depth of a second set of contact openings of the plurality of contact openings, and the second depth of the second set of contact openings is less than a third depth of a third set of contact openings of the plurality of contact openings.

19. 17. The memory device of claim 16, wherein the first layer of the stack of layers is a dielectric material, the word lines are a first conductive material, and the word line contacts are a third conductive material.

20. 17. The memory device of claim 16, wherein each word line is tungsten or molybdenum and each word line contact is tungsten.

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