System and method for identifying fault types and faulty phases in a power grid - Patents.com
The system uses sequence voltage and current analysis to accurately identify fault types and phases in power grids, addressing detection challenges in renewable energy environments, ensuring robust and precise protective actions.
Patent Information
- Application Number
- JP2025525582
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2022-11-07
- Filing Date
- 2023-11-03
- Publication Date
- 2025-12-23
AI Technical Summary
Existing power grid systems struggle to accurately identify fault types and phases, particularly in the presence of renewable energy sources, due to fault current limiting and control strategies used in inverter-based resources, which can lead to inaccurate fault detection and stability issues.
A system and method using a relay and controller to determine sequence voltages and currents, identifying fault types and phases by analyzing first and second plane sequence signatures, allowing for dynamic switching between sequence delta voltage and current based on grid conditions, without requiring additional hardware or communications, and providing robust detection even in weak infeed scenarios.
Enables accurate identification of fault types and phases in power grids, enhancing stability margins and enabling precise protective actions, while being independent of time-limited information and directional requirements, suitable for long-distance zones and diverse power grid configurations.
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Figure 2025541651000001_ABST
Abstract
Description
[Technical Field]
[0001] FIELD OF THE DISCLOSURE The present disclosure relates to power grids, and more particularly to systems and methods for identifying fault types and fault phases in a power grid. [Background technology]
[0002] An electric power grid includes a network of stations and lines connecting these stations that are used to transmit power from one or more energy sources for consumption at various locations. Electric power grids typically use a three-phase system to transmit power compared to single-phase or direct current systems. Changing external or internal conditions within components of the electric power grid can cause faults. For example, faults can include short circuits, ground faults, arcing, surges, etc., and can involve one or more phases.
[0003] For example, relays can be used to protect against faults by performing protective action in response to the fault. For example, a relay can open all three phases of a line or a single phase of a line for a predetermined period of time and then reclose all phases of the line or just a single phase. [Prior art documents] [Patent documents]
[0004] [Patent Document 1] US Patent Application Publication No. 2022 / 308103 Summary of the Invention
[0005] The present disclosure relates to identifying fault types in power grids, and more particularly to systems and methods for identifying fault types and fault phases in power grids that include renewable energy sources. Relays can then perform protective action based on the fault type and fault phase.
[0006] In an embodiment, the present disclosure describes a system for detecting a fault type and a fault phase in an electric power grid including a relay. The relay is configured to monitor a line of the electric power grid and generate a monitoring signal indicating the presence of a line fault. The relay may include a controller. The controller may be configured to determine a sequence voltage and a sequence current in the line in response to the monitoring signal received from the relay. The controller may be further configured to determine the presence or absence of a weak infeed condition in the line in response to the sequence voltage and the sequence current. The controller may be further configured to determine a first planar sequence signature and a second planar sequence signature in response to the monitoring signal and the presence or absence of the weak infeed condition. The controller may be further configured to determine a fault type and a fault phase in the electric power grid in response to the first planar sequence signature and the second planar sequence signature.
[0007] In an embodiment, the present disclosure describes a method for detecting a fault in an electric power grid including a relay. The method may include determining, by a controller, a sequence voltage and a sequence current in a line in response to a monitoring signal received from the relay. The method may further include determining, by the controller, a presence or absence of a weak infeed condition in the line in response to the sequence voltage and the sequence current. The method may further include determining, by the controller, a first planar sequence signature and a second planar sequence signature in response to the monitoring signal and the presence or absence of the weak infeed condition. The method may further include determining, by the controller, a fault type and a fault phase in the electric power grid in response to the first planar sequence signature and the second planar sequence signature.
[0008] Additional systems, methods, devices, features, and aspects may be realized through the techniques of various embodiments of the present disclosure. Other embodiments and aspects of the present disclosure are described in detail herein and are considered a part of the claimed subject matter. Other features can be understood and will become apparent with reference to the description and drawings.
[0009] Having described the disclosure in general terms, reference will now be made to the accompanying drawings, which are not necessarily drawn to scale. [Brief explanation of the drawings]
[0010] [Figure 1] FIG. 1 is a block diagram illustrating a system including a relay and a controller for detecting faults in an electrical power grid. [Figure 2] 1 is a schematic diagram of an exemplary system, in accordance with one or more exemplary embodiments of the present disclosure. [Figure 3] FIG. 1 is a block diagram illustrating sequence quantities used to detect fault types and fault phases. [Figure 4A] 10 is a chart showing fault patterns of different fault phases in a first plane based on positive and negative sequences. [Figure 4B] 10 is a chart showing fault patterns of different fault phases in the second plane based on zero sequence and negative sequence. DETAILED DESCRIPTION OF THE INVENTION
[0011] Embodiments of the present disclosure are described more fully below with reference to the accompanying drawings, in which exemplary embodiments of the present disclosure are shown. However, the present disclosure may be embodied in many different forms and should not be construed as limited to the exemplary embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art. Like numbers refer to the same or identical elements throughout, but are not necessarily the same or identical.
[0012] The following embodiments are described in sufficient detail to at least enable one skilled in the art to understand and use the present disclosure. It is understood that other embodiments will be apparent based on the present disclosure, and that process, mechanical, material, dimensional, process equipment, and parametric changes can be made without departing from the scope of the present disclosure.
[0013] In the following description, numerous specific details are given to provide a thorough understanding of various embodiments of the present disclosure. However, it will be apparent that the present disclosure may be practiced without these specific details. To avoid obscuring the present disclosure, some well-known system configurations and process steps may not be fully disclosed. Similarly, the drawings illustrating embodiments of the present disclosure are semi-drawings and not to scale; in particular, some of the dimensions may be exaggerated in the drawings for clarity of presentation. In addition, when multiple embodiments are disclosed and described as having certain features in common, like and similar features will generally be described with like reference numerals, even if the features are not identical, for clarity and ease of description and understanding thereof.
[0014] The present disclosure relates to power grids, and in particular to systems and methods for identifying faults in power grids, particularly fault types and fault phases. An power grid can include a network of stations and lines connecting these stations, where nodes represent sources or loads and lines represent connections between stations.
[0015] In an embodiment, the present disclosure describes a system for detecting fault types and fault phases in an electric power grid, including a controller and a relay. The relay is configured to monitor lines of the electric power grid and generate a monitoring signal. The controller is configured, in response to the monitoring signal, to determine first and second plane sequence signatures (based on positive, negative, or zero sequence quantities) that are ultimately used to detect the fault types and fault phases.
[0016] Identifying fault types and fault phases in a power grid plays an important role not only in the supervision of fault locators or distance function phase loops, but also in single-pole tripping to accurately identify fault phases, thereby improving stability margins. This fault type and fault phase identification may be performed by a phase selector element. With the increasing use of renewable energy as part of the power grid, existing phase selectors may not be able to accurately identify fault types and fault phases due to fault current limiting and control strategies used in inverter-based resources. The system and method according to the present disclosure can accurately identify fault types and fault phases using sequence voltages and sequence currents.
[0017] For example, the controller may determine a sequence voltage and a sequence current in the line based on the monitoring signal received from the relay. The controller may be further configured to determine the presence or absence of a weak in-feed condition in the line in response to the obtained voltage and sequence current. The controller may be further configured to determine a first planar sequence signature and a second planar sequence signature in response to the monitoring signal and the presence or absence of the weak in-feed condition. The controller may be further configured to determine a fault type in the power grid in response to the first planar sequence signature and the second planar sequence signature.
[0018] The systems and methods disclosed herein may not require additional hardware beyond that already present in the power grid infrastructure. Furthermore, additional communications may not be required. The systems and methods disclosed herein may not require directional information to identify fault types and fault phases. Furthermore, relying on information from two planes may provide greater security in detecting single line-to-ground faults. Furthermore, the systems and methods are not time-limited, such as traveling waves, or based on incremental amounts where information is only available for a specific period of time. Such independence may be useful across long-distance zones or pilot schemes. The systems and methods may provide dynamic switching between sequence delta voltage and sequence delta current in determining fault types and fault phases depending on the state of the power grid.
[0019] In a three-phase power grid, faults can be detected using symmetrical component analysis. For example, a three-phase voltage phasor can be decomposed into positive, negative, and zero sequence components, typically denoted by the subscripts 1, 2, and 0. Thus, a three-phase voltage phasor V A , V B , and V C , each phasor has positive, negative, and zero sequence components (e.g., V A1 , V A2 , V A0 , V B1 , V B2 , V B0 , V C1 , V C2 , and V C0 ) can be decomposed into the current phasor I A , I B , and I C is a sequence of positive, negative, and zero components (e.g., I A1 , I A2 , I A0 , I B1 , I B2 , I B0 , I C1 , I C2 , and I C0) This disclosure describes using a combination of these components in determining fault type and phase.
[0020] For example, fault detection using specific symmetrical components can be used to operate or trigger protective relay functions, but certain faults during certain conditions can result in uncharacteristic changes in specific sequence components, making detection difficult. For example, weak infeed conditions resulting from a fault may not provide enough current-based components to trigger relay functions that rely primarily on current detection. Systems and methods according to the present disclosure use different combinations of sequence combinations under different infeed conditions.
[0021] In an embodiment, if the controller does not detect a weak infeed condition in the power grid, the phase selector decision (e.g., to identify a faulty phase or fault type) can be based on the first plane decision (delta positive-sequence current and delta negative-sequence current) and the second plane decision (delta zero-sequence current and delta negative-sequence current). If the decision cannot be made using such sequence information, the first plane decision may instead be based on the delta positive-sequence voltage and delta negative-sequence voltage, and the second plane decision may be based on the delta zero-sequence voltage and delta negative-sequence voltage.
[0022] In an embodiment, when the controller detects a weak infeed condition, a phase selector decision (e.g., to identify a faulty phase or fault type) can be based on the first plane decision (delta positive-sequence voltage and delta negative-sequence voltage) and the second plane decision (delta zero-sequence voltage and delta negative-sequence voltage). If a decision cannot be made using such sequence information, the first plane decision is retained and the second plane decision can be based on the delta zero-sequence current and delta negative-sequence current.
[0023] Thus, depending on whether a weak infeed is detected, a first decision attempt is made based on a particular combination of sequence components (to identify the fault), and if that decision cannot be made, an alternative combination of sequence components can be used.
[0024] Faults can typically include single line-to-ground faults (only one of the three phases is shorted to ground), line-to-line faults (two of the three phases are shorted to each other), line-to-line-to-ground faults (two of the three phases are shorted to each other and to ground), and three-phase faults (all phases are shorted to each other or to ground).
[0025] 1 is a block diagram illustrating a system 10 including a relay 12 including a controller 14 for detecting faults in an electrical power grid 20. The electrical power grid 20 may include one, two, or more power sources interconnected by lines. Thus, the electrical power grid 20 may include a network of lines 22 connecting nodes 24. In an embodiment, the electrical power grid 20 may include at least one renewable source 26, for example, at the node 24. The electrical power grid 20 may also include at least a non-renewable source 28, or at least one load 30 (e.g., a customer or user of electricity drawn from the electrical power grid). A fault may be associated with one or more nodes or lines.
[0026] Relay 12 can be configured to mitigate a fault, for example, to initially break or open a line or phase when a fault is detected and close the line or phase after the fault is no longer present. Although relay 12 and controller 14 are described and illustrated as separate components, in some embodiments, the functions described with reference to controller 14 may be performed by relay 12, and one or more components described with reference to controller 14 may be present within relay 12.
[0027] The relay 12 is configured to monitor at least the lines 22 of the power grid 20 and generate a monitoring signal. The relay 12 can transmit the monitoring signal to the controller 14 via a wired or wireless connection. The controller 14 can be configured to determine a sequence voltage and a sequence current in the lines 22 in response to the monitoring signal received from the relay 12. For example, the controller 14 can determine one or more sequence components (positive, negative, or zero sequence) of the voltage and / or current. The controller 14 can be further configured to determine the presence or absence of a weak infeed condition in the lines in response to the sequence voltage and sequence current.
[0028] The controller 14 may be further configured to determine a first planar sequence signature and a second planar sequence signature in response to the monitoring signal and the presence or absence of a weak infeed condition. The controller may be further configured to determine a fault type and a fault phase in the power grid 20 (e.g., in the line 22 or in a node 26 or 28 connected by the line 22) in response to the first planar sequence signature and the second planar sequence signature.
[0029] In an embodiment, the first plane sequence signature may include a positive sequence and a negative sequence. The second plane sequence signature may include a zero sequence and a negative sequence. The sequences may be voltage sequences or current sequences. The fault type and fault phase may be determined based on the phase diagram angles associated with pairs of sequence components in each of the two planes.
[0030] In an embodiment, the controller 14 is further configured to determine a first plane sequence signature, including a first plane current sequence signature, based on the delta positive-sequence current and the delta negative-sequence current (ΔI1 and ΔI2) in response to the absence of a weak infeed condition. Additionally, the controller 14 may determine a second plane sequence signature, including a second plane current signature, based on the delta zero-sequence current and the delta negative-sequence current (ΔI0 and ΔI2). Thus, the controller 14 may initially and finally determine the fault type and fault phase based on the I1-I2 plane and the I0-I2 plane. In some situations, it may be impossible for the controller to determine the fault based on these planes of sequence components. For example, the magnitude associated with one of these planes may be weak, inaccurate, or unavailable, or the detected fault may not match other conditions detected on the power grid.
[0031] In response to being unable to determine a fault based on the first plane current signature (ΔI1 and ΔI2) and the second plane current signature (ΔI0 and ΔI2), the controller 14 may be further configured to determine a fault type and a fault phase based on a first plane voltage sequence signature based on the delta positive-sequence voltage and the delta negative-sequence voltage (ΔV1 and ΔV2) and a second plane voltage sequence signature based on the delta zero-sequence voltage and the delta negative-sequence voltage (ΔV0 and ΔV2). Thus, even if the initial fault detection is not successful, the controller 14 can use these alternative plane sequence signatures to determine a fault condition.
[0032] When a weak infeed condition is detected, the controller 14 may use a slightly different combination of sequence components. For example, the controller 14 may determine a first plane signature including a first plane voltage signature based on a delta positive sequence voltage and a delta negative sequence voltage (ΔV1 and ΔV2). The controller 14 may further determine a second plane signature including a second plane voltage signature based on a delta zero sequence voltage and a delta negative sequence voltage (ΔV0 and ΔV2). Using a voltage sequence instead of a current sequence may overcome the drawbacks resulting from the inability to detect weak currents.
[0033] Again, if this combination of sequence components is unsuccessful, the controller 14 can use an alternative combination of sequences. For example, in response to being unable to determine the fault type and fault phase based on the first plane voltage signature (ΔV1 and ΔV2) and the second plane voltage signature (ΔV0 and ΔV2), the controller 14 can be further configured to determine the fault based on the first plane voltage sequence signature (ΔV1 and ΔV2) and a second plane current sequence signature based on the delta zero sequence current and the delta negative sequence current (ΔI0 and ΔI2). Thus, the first plane voltage sequence signature remains used, only the second plane signature is based on the current sequence rather than the voltage sequence.
[0034] The fault may include one or more of a single line-to-ground fault, a line-to-line fault, a line-to-line-to-ground fault, or a three-phase fault.
[0035] The controller 14 can be configured to control the relay 12 to perform a protective function based on the fault. The protective function can include controlling, for example, switching circuit breakers or other power transmission equipment associated with the power transmission line. In an embodiment, the relay 12 can only temporarily open a single phase in response to a single line-to-ground fault associated with an arcing event that may self-extinguish. Alternatively, the relay 12 can open one or more phases indefinitely in response to a large fault, preventing the relay 12 from closing those phases unless a "reset" signal is sent to the relay 12 by the controller 14. The reset signal can be initiated by maintenance personnel after maintenance or inspection is completed or based on specific criteria, such as time, current, voltage, or other criteria.
[0036] 2 illustrates an exemplary system 100 according to one embodiment of the present disclosure. In some embodiments, the system 100 may include one or more renewable power generation sources 102, one or more current transformers 106, one or more voltage transformers 108, one or more step-up transformers 104, one or more circuit breakers 110, and one or more bulk electrical systems 116. Additionally, the system 100 may have one or more line faults 114 that may be associated with one or more fault resistors 112. In some cases, the system 100 may also include an intelligent electronic device (IED) 117. The IED may include one or more processors 118 that may be used to calculate the phase distance 120 and the ground distance 122. The IED 117 may also include a memory 124 and / or a human-machine interface (HMI) 126. The IED 117 (as well as any other elements included in the system 100) may also include any elements described with respect to the relay 12 or the controller 14 of FIG. 1.
[0037] FIG. 3 is a block diagram illustrating a fault detection scheme 200. The first block 202 relates to the presence of a weak infeed. If a weak infeed is present, the controller 14 can first determine a first plane (plane 1) signature based on changes in the negative and positive sequence voltages (ΔV2 vs. ΔV1) and a second plane (plane 2) signature based on changes in the negative and zero sequence voltages (ΔV2 vs. ΔV0). If that determination fails, for example, due to unavailability, low magnitude, or noise associated with those components, the controller can determine alternative first and second plane signatures. For example, the controller 14 can retain the first plane (plane 1) signature based on changes in the negative and positive sequence voltages (ΔV2 vs. ΔV1), but use an alternative second plane (plane 2) signature based on changes in the negative and zero sequence currents (ΔI2 vs. ΔI0). In both cases, the first plane is based on a combination of negative-positive sequences and the second plane is based on a combination of negative-zero sequences.
[0038] The second block 204 relates to the absence of a weak infeed. In the absence of a weak infeed, the controller 14 may first determine a first plane (plane 1) signature based on changes in negative and positive sequence current (ΔI2 vs. ΔI1) and a second plane (plane 2) signature based on changes in negative and zero sequence current (ΔI2 vs. ΔI0). If that determination fails, for example, due to unavailability, low magnitude, or noise associated with those components, the controller may determine alternative first and second plane signatures. For example, the controller 14 may use an alternative first plane (plane 1) signature based on changes in negative and positive sequence voltage (ΔV2 vs. ΔV1) and an alternative second plane (plane 2) signature based on changes in negative and zero sequence voltage (ΔV2 vs. ΔV0). In both cases, the first plane is based on a negative-positive sequence combination and the second plane is based on a negative-zero sequence combination, but unlike the weak infeed case (block 102), it is the current sequence component that is used first before switching to the voltage sequence component.
[0039] Based on the logic shown in FIG. 3, the controller 14 can control the relay 12 to select a particular phase.
[0040] FIG. 4A is a chart showing fault patterns for different fault phases in the first plane based on positive and negative sequences. In FIG. 4A, different zones (ΔV2-ΔV1) in the first plane phase diagram are associated with different faults. Therefore, depending on the angle of the detected signal, a possible fault can be identified as a fault related to that zone. However, if the angle is between zones rather than within a particular zone, the fault type cannot be detected. This is another example where the controller may need to use an alternative combination of sequence signatures if the initial combination of sequence signatures is not useful.
[0041] FIG. 4B is a chart showing fault patterns for different fault phases in a second plane based on the zero sequence and negative sequence. Similar to the first plane phase diagram of FIG. 4A, different regions (ΔV2-ΔV0) in the second plane phase diagram are associated with different faults. Here, rather than relying solely on the first plane phase diagram, information from both of these diagrams is combined to identify the likely faulty phase. Thus, if one of the phase diagrams of FIG. 4A and FIG. 4B allows for two different types of faults, the other phase diagram can be used to further select for a specific type of fault.
[0042] In an embodiment, the present disclosure describes a method for detecting a fault in an electrical power grid including a relay. The electrical power grid may include a renewable power source. The method may include determining, by a controller, a sequence voltage and a sequence current in a line in response to a monitoring signal received from the relay. The controller may be the controller 14 or any other suitable controller. The relay may be the relay 12, the IED 117, or any other suitable relay. Alternatively, the relay may perform the functions described with reference to the controller 14. The method may further include determining, by the controller, the presence or absence of a weak infeed condition in the line in response to the sequence voltage and the sequence current. The method may further include determining, by the controller, a first planar sequence signature and a second planar sequence signature in response to the monitoring signal and the presence or absence of the weak infeed condition. The method may further include determining, by the controller, a fault in the electrical power grid in response to the first planar sequence signature and the second planar sequence signature. In an embodiment, the first planar sequence signature may include a positive sequence and a negative sequence, and the second planar sequence signature may include a zero sequence and a negative sequence.
[0043] In an embodiment, the method may further include, by the controller, in response to the absence of a weak in-feed condition, determining a first plane sequence signature comprising a first plane current sequence signature based on the delta positive sequence current and the delta negative sequence current (ΔI1 and ΔI2), and determining a second plane sequence signature comprising a second plane current signature based on the delta zero sequence current and the delta negative sequence current (ΔI0 and ΔI2).
[0044] In an embodiment, the method may further include, in response to the controller being unable to determine a fault based on the first plane current signature (ΔI1 and ΔI2) and the second plane current signature (ΔI0 and ΔI2), determining a fault based on a first plane voltage sequence signature based on a delta positive sequence voltage and a delta negative sequence voltage (ΔV1 and ΔV2) and a second plane voltage sequence signature based on a delta zero sequence voltage and a delta negative sequence voltage (ΔV0 and ΔV2).
[0045] In an embodiment, the method may further include, by the controller, determining, in response to the weak in-feed condition being present, a first plane signature comprising a first plane voltage signature based on the delta positive-sequence voltage and the delta negative-sequence voltage (ΔV1 and ΔV2), and determining a second plane signature comprising a second plane voltage signature based on the delta zero-sequence voltage and the delta negative-sequence voltage (ΔV0 and ΔV2).
[0046] The method may further include, in response to the controller being unable to determine a fault based on the first plane voltage signature (ΔV1 and ΔV2) and the second plane voltage signature (ΔV0 and ΔV2), determining a fault based on the first plane voltage sequence signature (ΔV1 and ΔV2) and a second plane current sequence signature based on the delta zero sequence current and the delta negative sequence current (ΔI0 and ΔI2).
[0047] The fault may include one or more of a single line-to-ground fault, a line-to-line fault, a line-to-line-to-ground fault, or a three-phase fault. The method may further include controlling, by the controller, the relay to perform a protective function based on the fault.
[0048] Returning to FIG. 1 , the controller 14 may be implemented by any suitable computer system. The controller 14 may include one or more processors 40 that execute instructions stored in one or more memory devices (referred to as memory 42). The instructions may be, for example, instructions for implementing functions described as being performed by one or more of the modules and systems disclosed above, or instructions for implementing one or more of the methods disclosed above. The one or more processors 40 may be embodied, for example, as a CPU, multiple CPUs, a GPU, multiple GPUs, a TPU, multiple TPUs, a multi-core processor, a combination thereof, or the like. In some embodiments, the one or more processors 40 may be located in a single processing device. In other embodiments, the one or more processors 40 may be distributed across two or more processing units (e.g., multiple CPUs, multiple GPUs, or a combination thereof, etc.). The processor may be implemented as a combination of processing circuitry or computational processing units (e.g., a CPU, a GPU, or a combination of both, etc.). Thus, by way of example, a processor may refer to a single-core processor, a single processor with software multithreading execution capabilities, a multi-core processor, a multi-core processor with software multithreading execution capabilities, a multi-core processor with hardware multithreading techniques, a parallel processing (or parallel computing) platform, and a parallel computing platform with distributed shared memory. Additionally, or as another example, a processor may refer to an integrated circuit (IC), an ASIC, a digital signal processor (DSP), an FPGA, a PLC, a complex programmable logic device (CPLD), discrete gate or transistor logic, discrete hardware components, or any combination thereof designed or configured (e.g., manufactured) to perform the functions described herein.
[0049] The one or more processors 40 can access the memory 42 by way of a communications architecture 44 (e.g., a system bus). The communications architecture 44 may be suited to the particular arrangement (localized or distributed) and type of the one or more processors 40. In some embodiments, the communications architecture 44 may include one or many bus architectures, such as a memory bus or memory controller, a peripheral bus, an accelerated graphics port, a processor or local bus, or a combination thereof. By way of example, such architectures may include an Industry Standard Architecture (ISA) bus, a Micro Channel Architecture (MCA) bus, an Enhanced ISA (EISA) bus, a Video Electronics Standards Association (VESA) local bus, an Accelerated Graphics Port (AGP) bus, a Peripheral Component Interconnect (PCI) bus, a PCI-Express bus, a Personal Computer Memory Card International Association (PCMCIA) bus, and / or a Universal Serial Bus (USB), etc.
[0050] The memory components or memory devices disclosed herein can be embodied with either volatile or nonvolatile memory, or can include both volatile and nonvolatile memory. Furthermore, the memory components or devices can be removable or non-removable and / or internal or external to a computing device or component. Examples of various types of non-transitory storage media include hard disk drives, zip drives, CD-ROMs, digital versatile disks (DVDs) or other optical storage devices, magnetic cassettes, magnetic tapes, magnetic disk storage devices or other magnetic storage devices, flash memory cards or other types of memory cards, cartridges, or any other non-transitory medium suitable for holding desired information and that can be accessed by a computing device.
[0051] By way of example, non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory may include random access memory (RAM), which acts as external cache memory. By way of example, and not limitation, RAM is available in many forms, such as synchronous RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), SyncLink DRAM (SLDRAM), and direct Rambus RAM (DRRAM). The disclosed memory devices or memories of the operating or computing environments described herein are intended to include one or more of these and / or any other suitable types of memory. In addition to storing executable instructions, memory 42 may also hold data.
[0052] The controller 14 may include mass storage 48 accessible by the one or more processors 40 via the communications architecture 44. The mass storage 48 may include machine-accessible instructions (e.g., computer-readable instructions and / or computer-executable instructions). In some embodiments, the machine-accessible instructions may be encoded within the mass storage 48 and located in components that may be constructed (e.g., linked, compiled) and maintained in computer-executable form on the mass storage 48 or one or more other machine-accessible non-transitory storage media included in the controller 14. Such components may embody or constitute one or many of the various modules disclosed herein. Additionally, protocols such as Modbus, DNP, IEC 60870, IEC 61850, Profibus, Fieldbus, and the like may be used with the systems and methods described herein.
[0053] The modules, individually or in combination, may be executed by one or more processors 40 to cause the controller 14 to perform any of the operations described herein (e.g., the operations described with reference to Figures 1-4B, as well as any other operations).
[0054] The controller 14 may also include one or more interface devices 50, which may include one or both of an input / output interface or a network interface that may enable or facilitate external devices to communicate with the controller 14. For example, the interface 50 may be used to send and receive data and / or instructions to and from external computing devices.
[0055] The network interface device may enable or facilitate functional coupling of the controller 14 with one or more external devices. Functionally coupling the controller 14 to an external device may include establishing a wired or wireless connection between the controller 14 and the external device. The network interface device may include one or more antennas and a communication processing device that may enable wireless communication between the controller 14 and another external device, such as between a vehicle and a smart infrastructure system, between two smart infrastructure systems, etc. Such communication processing devices may process data according to defined protocols of one or several wireless technologies. Wireless technologies may include, for example, 3G, Long Term Evolution (LTE), LTE Advanced, 4G, 5G, IEEE 802.11, IEEE 802.16, Bluetooth, ZigBee, Near Field Communication (NFC), etc. The communication processing devices may also process data according to other protocols, such as vehicle-to-infrastructure (V2I) communication, vehicle-to-vehicle (V2V) communication, etc. The network interface may also be used to facilitate peer-to-peer ad hoc network connections as described herein.
[0056] As used herein, terms such as “environment,” “system,” “unit,” “module,” “architecture,” “interface,” and “component” refer to a computer-related entity or entity associated with an operating device having one or more defined functions. The terms “environment,” “system,” “module,” “component,” “architecture,” “interface,” and “unit” can be used interchangeably and collectively refer to functional elements. Such entities may be hardware, a combination of hardware and software, software, or software in execution. As one example, a module may be embodied in a processor, a processor, an object, an executable portion of software, a thread of execution, a program, and / or a process running on a computing device. As another example, both a software application running on a computing device and the computing device may embody a module. As yet another example, one or more modules may reside within a process and / or thread of execution. A module may be localized on one computing device or distributed among two or more computing devices. As disclosed herein, a module may execute from various computer-readable non-transitory storage media having various data structures stored thereon. Modules may communicate via local and / or remote processes by signals (either analog or digital) comprising, for example, one or more data packets (e.g., data from one component interacting with another component over a network, such as a local system, a distributed system, and / or a wide area network with other systems, via signals).
[0057] As yet another example, a module may be embodied within or may include a device having a defined functionality provided by mechanical components operated by electrical or electronic circuitry controlled by software or firmware applications executed by a processor. Such a processor may be internal or external to the device and may execute at least a portion of the software or firmware application. Furthermore, in another example, a module may be embodied within or may include a device that provides a defined functionality through electronic components without mechanical components. An electronic component may include a processor that executes software or firmware that at least partially enables or facilitates the functionality of the electronic component.
[0058] In some embodiments, modules may communicate via local and / or remote processes using signals (either analog or digital), e.g., having one or more data packets (e.g., data from one component interacting with another component via a network, such as a wide area network with local, distributed, and / or other systems, via signals). Additionally, or in other embodiments, modules may communicate or otherwise be coupled via thermal, mechanical, electrical, and / or electromechanical coupling mechanisms (e.g., conduits, connectors, combinations thereof, etc.). Interfaces may include input / output (I / O) components as well as associated processors, applications, and / or other programming components.
[0059] Additionally, in this specification and the accompanying drawings, terms such as “storage,” “storage,” “data storage,” “data storage,” “memory,” “repository,” and substantially any other information storage component associated with the operation and functionality of components of the present disclosure refer to memory components, entities embodied in one or more memory devices, or components forming a memory device. It should be noted that the memory components or memory devices described herein embody or include non-transitory computer storage media that may be readable or accessible by a computing device. Such media may be implemented in any method or technology for storing information, such as machine-accessible instructions (e.g., computer-readable instructions), information structures, program modules, or other information objects. [Explanation of symbols]
[0060] 10 Systems 12 Relay 14 Controller 20 Power grid 22 lines 24 nodes 26 Renewable sources 28 Non-renewable sources 30 Load 40 processors 42 memory 44 Communication Architecture 48 Mass storage 50 Interface Device 100 systems 102 Renewable power generation sources 104 Step-up transformer 106 Current transformer 108 Transformer 110 Circuit Breaker 112 Obstacle Resistance 114 Line Failure 116 Bulk Electrical Systems 118 processors 120 phase distance 122 Ground distance 124 memory 200 Fault Detection Scheme
Claims
1. A system (10) for detecting fault types and faulty phases in an electric power transmission network (20), comprising: a relay (12) for monitoring a line (22) of the power grid (20) and generating a monitoring signal; and a controller (14), wherein the controller (14) determining a sequence voltage and a sequence current in the line (22) in response to the monitoring signal received from the relay (12); determining the presence or absence of a weak infeed condition in the line (22) in response to the sequence voltage and sequence current; determining a first planar sequence signature and a second planar sequence signature in response to the monitor signal and the presence or absence of the weak in-feed condition; determining the fault type and the fault phase in the power grid (20) in response to the first planar sequence signature and the second planar sequence signature; The system (10) is configured as follows.
2. The system (10) of claim 1, wherein the first planar sequence signature includes a positive sequence and a negative sequence, and the second planar sequence signature includes a zero sequence and a negative sequence.
3. The controller (14), in response to the weak infeed condition not being present, Delta positive and delta negative sequence currents (ΔI 1 and ΔI 2 determining a first plane sequence signature including a first plane current sequence signature based on the The delta zero current sequence and the delta negative current sequence (ΔI 0 and ΔI 2 determining a second plane sequence signature including a second plane current signature based on The system (10) of claim 2, further configured to:
4. The controller (14) detects the first plane current signature (ΔI 1 and ΔI 2 ) and the second plane current signature (ΔI 0 and ΔI 2 ) in response to being unable to determine the fault based on the delta positive sequence voltage and the delta negative sequence voltage (ΔV 1 and ΔV 2 ) and a first plane voltage sequence signature based on the delta zero sequence voltage and the delta negative sequence voltage (ΔV 0 and ΔV 2 4. The system of claim 3, further configured to determine the fault based on a second plane voltage sequence signature based on:
5. The controller (14), in response to the weak infeed condition existing, Delta positive sequence voltage and delta negative sequence voltage (ΔV 1 and ΔV 2 determining a first plane signature including a first plane voltage signature based on The delta zero sequence voltage and the delta negative sequence voltage (ΔV 0 and ΔV 2 determining a second plane signature including a second plane voltage signature based on The system (10) of claim 2, configured to:
6. The controller (14) calculates the first plane voltage signature (ΔV 1 and ΔV 2 ) and the second plane voltage signature (ΔV 0 and ΔV 2 responsive to being unable to determine the fault based on The first plane voltage sequence signature (ΔV 1 and ΔV 2 ), and the delta zero sequence current and the delta negative sequence current (ΔI 0 and ΔI 2 and determining the fault based on a second plane current sequence signature based on the first plane current sequence signature. The system (10) of claim 5, further configured to:
7. 2. The system of claim 1, wherein the fault comprises one or more of a single line-to-ground fault, a line-to-line fault, a line-to-line fault, a line-to-line fault, or a three-phase fault.
8. The system (10) of claim 1, wherein the controller (14) is configured to control the relay (12) to perform a protective function based on the fault.
9. The system (10) of claim 1, wherein the relay (12) includes the controller (14).
10. The system (10) of claim 1, wherein the power grid (20) includes a renewable energy source.
11. 1. A method for detecting fault types and fault phases in an electric power grid (20) including a relay (12) configured to monitor a line (22) of the electric power grid (20) and generate a monitoring signal, comprising: determining, by a controller (14), a sequence voltage and a sequence current in the line (22) in response to the monitoring signal received from the relay (12); determining, by the controller (14), the presence or absence of a weak infeed condition in the line (22) in response to the sequence voltage and the sequence current; determining, by the controller (14), a first planar sequence signature and a second planar sequence signature in response to the monitor signal and the presence or absence of the weak in-feed condition; determining, by the controller (14), the fault type and the fault phase in the power grid (20) in response to the first planar sequence signature and the second planar sequence signature; A method comprising:
12. The method of claim 11 , wherein the first planar sequence signature includes a positive sequence and a negative sequence, and the second planar sequence signature includes a zero sequence and a negative sequence.
13. In response to the weak infeed condition not being present, the controller (14) Delta positive sequence current and delta negative sequence current (ΔI 1 and ΔI 2 determining a first plane sequence signature including a first plane current sequence signature based on the first plane sequence signature; The delta zero sequence current and the delta negative sequence current (ΔI 0 and ΔI 2 determining a second plane sequence signature including a second plane current signature based on the second plane sequence signature; The method of claim 12 further comprising:
14. The controller (14) detects the first plane current signature (ΔI 1 and ΔI 2 ) and the second plane current signature (ΔI 0 and ΔI 2 responsive to being unable to determine the fault based on Delta positive sequence voltage and delta negative sequence voltage (ΔV 1 and ΔV 2 ) and a first plane voltage sequence signature based on the delta zero sequence voltage and the delta negative sequence voltage (ΔV 0 and ΔV 2 and determining the fault based on a second plane voltage sequence signature based on 14. The method of claim 13, further comprising:
15. In response to the weak infeed condition existing, the controller (14) Delta positive sequence voltage and delta negative sequence voltage (ΔV 1 and ΔV 2 determining a first plane signature including a first plane voltage signature based on The delta zero sequence voltage and the delta negative sequence voltage (ΔV 0 and ΔV 2 determining a second plane signature including a second plane voltage signature based on The method of claim 12 further comprising:
16. The controller (14) determines the first plane voltage signature (ΔV 1 and ΔV 2 ) and the second plane voltage signature (ΔV 0 and ΔV 2 responsive to being unable to determine the fault based on The first plane voltage sequence signature (ΔV 1 and ΔV 2 ), and the delta zero sequence current and the delta negative sequence current (ΔI 0 and ΔI 2 and determining the fault based on a second plane current sequence signature based on the 16. The method of claim 15, further comprising:
17. 12. The method of claim 11, wherein the fault comprises one or more of a single line-to-ground fault, a line-to-line fault, a line-to-line fault, a line-to-line fault, or a three-phase fault.
18. The method of claim 11, further comprising controlling, by the controller, the relay to perform a protective function based on the fault.
19. The method of claim 11 , wherein the power grid (20) includes renewable energy sources.
Citation Information
Patent Citations
Distance elements for line protection near unconventional sources
US20220308103A1