Power amplifier

Abstract

To improve the power efficiency of a power amplifier.SOLUTION: The power amplifier 100,101 includes a balanced amplifier BA and a control amplifier 5. The balanced amplifier BA includes a first amplifier 1 and a second amplifier 2 that amplify input power. A load modulation balanced amplifier is formed by a control amplifier 5 and a balanced amplifier BA and a control signal including a harmonic component of input power is fed to the balanced amplifier BA. The control amplifier 5 is a class AB amplifier or a class B amplifier. Each of the first amplifier 1 and the second amplifier 2 is a class C amplifier.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present disclosure relates to power amplifiers. [Background technology]

[0002] U.S. Patent Application Publication No. 2018 / 0205348 (Patent Document 1), JP-A-2022-506367 (Patent Document 2), and U.S. Patent Application Publication No. 2022 / 0255506 (Patent Document 3) all disclose a load modulated balanced amplifier (LMBA). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] US Patent Application Publication No. 2018 / 0205348 [Patent Document 2] Special Publication No. 2022-506367 [Patent Document 3] US Patent Application Publication No. 2022 / 0255506 [Non-patent literature]

[0004] [Non-Patent Document 1] Jingzhou Pang, Yue Li, Meng Li, Yikang Zhang, Xin Yu Zhou, Zhijiang Dai and Anding Zhu, Analysis and Design of Highly Efficient Wideband RF-Input Sequential Load Modulated Balanced Power Amplifier, IEEE Transactions on Microwave Theory and Techniques, Vol. 68, No. 5, May 2020. Summary of the Invention [Problem to be solved by the invention]

[0005] There is a constant demand for improving the power efficiency of power amplifiers to reduce their power consumption, especially in applications such as base stations where many power amplifiers are used.

[0006] One of the objectives of the present disclosure is to improve the power efficiency of power amplifiers. [Means for solving the problem]

[0007] The power amplifier of the present disclosure includes a balanced amplifier and a control amplifier. The balanced amplifier includes a first amplifier and a second amplifier that amplify input power. The control amplifier forms a load-modulated balanced amplifier together with the balanced amplifier and supplies a control signal including harmonic components of the input power to a combiner. The control amplifier is a class AB amplifier or a class B amplifier. Each of the first amplifier and the second amplifier is a class C amplifier. [Effects of the Invention]

[0008] According to the present disclosure, the power efficiency of a power amplifier can be improved. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 1 is a block diagram showing an application example of the power amplifier according to the first embodiment. [Figure 2] FIG. 2 is a circuit block diagram showing the basic configuration of the power amplifier according to the first embodiment. [Figure 3] FIG. 3 is a circuit block diagram showing an example of implementation of the power amplifier according to the first embodiment. [Figure 4] FIG. 4 is a diagram showing voltage waveforms and current waveforms for explaining the power consumption of a transistor. [Figure 5] FIG. 5 is a diagram showing voltage waveforms and current waveforms in an ideal class-F amplifier. [Figure 6]FIG. 6 is a circuit block diagram showing the configuration of a power amplifier according to a first comparative example. [Figure 7] FIG. 7 is a circuit block diagram showing the configuration of a power amplifier according to the second comparative example. [Figure 8] FIG. 8 is a diagram for comparing the power efficiency of the power amplifier between this embodiment and Comparative Example 2. In FIG. [Figure 9] FIG. 9 is a Smith chart showing an example of a simulation result regarding the impedance of a balanced amplifier when no harmonic injection is performed. [Figure 10] FIG. 10 is a Smith chart showing an example of a simulation result regarding the impedance of a balanced amplifier when harmonic injection is performed. [Figure 11] FIG. 11 is a diagram showing an example of a simulation result regarding the power efficiency of each amplifier forming the balanced amplifier according to the first embodiment. [Figure 12] FIG. 12 is a diagram showing an example of a simulation result regarding the power efficiency of the entire balanced amplifier according to the first embodiment. [Figure 13] FIG. 13 is a circuit block diagram illustrating an example of the configuration of the power amplifier according to the second embodiment. [Figure 14] FIG. 14 is a Smith chart showing an example of a simulation result regarding the impedance of a balanced amplifier when a harmonic processing circuit is installed and then harmonic injection is performed. [Figure 15] FIG. 15 is a diagram showing an example of a simulation result regarding the power efficiency of each amplifier forming the balanced amplifier according to the second embodiment. [Figure 16] FIG. 16 is a diagram summarizing the simulation results regarding the power efficiency of the balanced power amplifiers according to the first and second embodiments. DETAILED DESCRIPTION OF THE INVENTION

[0010] [Description of the embodiments of the present disclosure] First, embodiments of the present disclosure will be listed and described.

[0011] (1) A power amplifier according to the present disclosure includes: a balanced amplifier including a first amplifier and a second amplifier for amplifying input power; a control amplifier which forms a load modulation balanced amplifier together with the balanced amplifier and supplies a control signal including a harmonic component of the input power to the balanced amplifier; the control amplifier is a class AB amplifier or a class B amplifier; Each of the first amplifier and the second amplifier is a class C amplifier.

[0012] In the above configuration, the control amplifier, which is a class AB amplifier or a class B amplifier, starts operating first, followed by the first and second amplifiers (balanced amplifiers), each of which is a class C amplifier. When the control amplifier reaches saturation, the harmonic components contained in the control signal increase. Therefore, sufficient harmonic components are always injected into the balanced amplifier when it is operating. Therefore, with the above configuration, the power efficiency of the power amplifier can be improved.

[0013] (2) In (1) above, a transmission line for the control signal from the control amplifier to the balanced amplifier may be configured without including a harmonic processing circuit; The balanced amplifier may be configured without including a harmonic processing circuit.

[0014] In the above configuration, a harmonic processing circuit capable of removing harmonic components is not provided in the control signal transmission line and the balanced amplifier, so that a control signal containing sufficient harmonic components can be supplied from the control amplifier to the balanced amplifier.

[0015] (3) In (1) or (2) above, The power amplifier may further include a harmonic processing circuit configured to reflect harmonic components contained in the output power of the balanced amplifier back to the balanced amplifier.

[0016] In the above configuration, harmonic components contained in the output power of the balanced amplifier are reflected back to the balanced amplifier. This aligns the phase of the reflected waves of the harmonic components and increases the amount of reflected harmonic components, thereby enhancing the effect of improving the power efficiency of the power amplifier. Therefore, with the above configuration, the power efficiency of the power amplifier can be further improved.

[0017] (4) In any of (1) to (3) above, The power amplifier may further include a matching circuit that matches the impedance of the control amplifier with the impedance of the balanced amplifier.

[0018] According to the above configuration, by matching the impedance of the control amplifier with the impedance of the balanced amplifier, it is possible to further improve the power efficiency of the power amplifier.

[0019] (5) In (1) above, The balanced amplifier comprises: a divider that divides the input power between the first amplifier and the second amplifier; The power amplifier may further include a combiner that combines the power amplified by the first amplifier and the power amplified by the second amplifier, The splitter may be a directional coupler with a phase difference of 90°, a first port for receiving the input power; a second port coupled to the terminator; a third port coupled to the input node of the first amplifier; a fourth port coupled to the input node of the second amplifier; The combiner may be a directional coupler with a phase difference of 90°; a fifth port coupled to the output node of the first amplifier; a sixth port coupled to the output node of the second amplifier; a seventh port for receiving the control signal; and an eighth port for outputting the combined power.

[0020] According to the above configuration, a balanced amplifier capable of improving power efficiency can be appropriately configured.

[0021] (6) In (5) above, The transmission line between the control amplifier and the seventh port may be configured without including a harmonic processing circuit; The balanced amplifier may be configured so as not to include a harmonic processing circuit between the output of the first amplifier and the fifth port, and so as not to include a harmonic processing circuit between the output of the second amplifier and the sixth port.

[0022] In the above configuration, a harmonic processing circuit capable of removing harmonic components is not provided in the control signal transmission line and the balanced amplifier, so that a control signal containing sufficient harmonic components can be supplied from the control amplifier to the balanced amplifier.

[0023] (7) In (5) or (6) above, The power amplifier may further comprise a harmonic processing circuit coupled to the eighth port.

[0024] In the above configuration, harmonic components contained in the output power of the balanced amplifier are reflected back to the balanced amplifier. This aligns the phase of the reflected waves of the harmonic components and increases the amount of reflected harmonic components, thereby enhancing the effect of improving the power efficiency of the power amplifier. Therefore, with the above configuration, the power efficiency of the power amplifier can be further improved.

[0025] (8) In any of (5) to (7) above, The power amplifier may further comprise a matching circuit coupled between the control amplifier and the seventh port.

[0026] According to the above configuration, by matching the impedance of the control amplifier with the impedance of the balanced amplifier, it is possible to further improve the power efficiency of the power amplifier.

[0027] (9) In any of (1) to (8) above, The power amplifier may further comprise a divider that divides the original signal according to frequency, thereby providing a portion of the original signal to the balanced amplifier as the input power and providing another portion of the original signal to the control amplifier.

[0028] According to the above configuration, the balanced amplifier and the control amplifier are operated by a single signal, so that the control signal can be generated with a simple circuit configuration.

[0029] (10) A power amplifier according to the present disclosure includes: a first amplifier and a second amplifier forming part of a balanced amplifier for amplifying input power; a control amplifier which forms a load modulation balanced amplifier together with the balanced amplifier and supplies a control signal including a harmonic component of the input power to the balanced amplifier; the control amplifier is a class AB amplifier or a class B amplifier; Each of the first amplifier and the second amplifier is a class C amplifier.

[0030] In the above configuration, the control amplifier, which is a class AB or class B amplifier, is first started to operate, followed by the first and second amplifiers, which are each class C amplifiers. When the control amplifier reaches saturation, the harmonic components contained in the control signal increase. Therefore, sufficient harmonic components are always injected into the balanced amplifier when the first and second amplifiers are operating. Therefore, with the above configuration, the power efficiency of the power amplifier can be improved.

[0031] [Details of the embodiments of the present disclosure] Next, the details of the embodiments of the present disclosure will be described with reference to the drawings. Note that the same or corresponding parts in the drawings are designated by the same reference numerals, and their description will not be repeated. At least some of the embodiments described below may be combined in any manner.

[0032] <Terminology> In the present disclosure and its embodiments, "high frequency" refers to electromagnetic waves in the MHz band or GHz band (a frequency band of 1 MHz or more and less than 1 THz). High frequency includes microwaves. "Microwaves" are electromagnetic waves in a band of 300 MHz or more and less than 300 GHz.

[0033] In this disclosure and its embodiments, the "power efficiency" of a power amplifier means the ratio of the output power from the power amplifier to the power supplied from a DC power supply to the power amplifier (power efficiency = output power / supply power).

[0034] <Embodiment 1> <Overall structure> 1 is a block diagram showing an application example of a power amplifier according to a first embodiment. In this example, the power amplifier is applied to a base station. The base station 900 is, for example, a massive multiple input multiple output (MIMO) base station used in 5G (fifth generation mobile communication system). The base station 900 includes an arithmetic processing unit 91, a transmission unit 92, and an antenna unit 93.

[0035] The arithmetic processing unit 91 performs digital signal processing (such as baseband processing) of information transmitted from the base station 900 during communication between the base station 900 and a communication device (not shown).

[0036] The transmitter 92 includes a plurality of RF (Radio Frequency) chains 921. Each of the plurality of RF chains 921 includes a power amplifier 100 in addition to filters, switches, mixers, D / A converters, etc. (none of which are shown). The configuration of the power amplifier 100 will be described in detail with reference to FIG. 2 and subsequent figures.

[0037] The antenna unit 93 includes a plurality of antennas 931. The plurality of antennas 931 are connected to the plurality of RF chains 921, respectively.

[0038] Base station 900 is merely an example of an application of power amplifier 100, and the application of the power amplifier according to the present disclosure is not limited thereto. The power amplifier according to the present disclosure may be applied to various devices (such as mobile terminals) used in mobile communication systems, for example.

[0039] <Power amplifier configuration> 2 is a circuit block diagram showing the basic configuration of a power amplifier according to embodiment 1. The power amplifier 100 is a load-modulated balanced amplifier. The power amplifier 100 includes a first amplifier 1, a second amplifier 2, a divider 3, a combiner 4, a control amplifier (CA) 5, and a matching network (MN) 6.

[0040] Each of the first amplifier 1 and the second amplifier 2 is a class C amplifier. The first amplifier 1 and the second amplifier 2 have the same size. The first amplifier 1 and the second amplifier 2 are implemented, for example, by gallium nitride (GaN) high electron mobility transistors (HEMTs). However, the implementation of each amplifier is not limited to this. The first amplifier 1 and the second amplifier 2 may be implemented by insulated gate bipolar transistors (IGBTs) or metal-oxide-semiconductor field-effect transistors (MOSFETs) (e.g., lateral MOSFETs (Laterally Diffused MOSFETs)). The material of the first amplifier 1 and the second amplifier 2 may be silicon (Si), silicon carbide (SiC), or the like.

[0041] The first amplifier 1 and the second amplifier 2, together with the divider 3 and the combiner 4, form a balanced amplifier BA. The balanced amplifier BA receives high-frequency (typically microwave) input power Pin from a node n1. The frequency of the input power Pin is denoted as f0. The balanced amplifier BA generates output power Pout by amplifying the input power Pin and supplies the output power Pout to a load (not shown) connected to a node n2.

[0042] The divider 3 divides the input power Pin between the first amplifier 1 and the second amplifier 2. The combiner 4 combines the power amplified by the first amplifier 1 and the power amplified by the second amplifier 2. More specifically, the divider 3 and the combiner 4 are each directional couplers with a phase difference of 90°. The degree of coupling between the divider 3 and the combiner 4 is, for example, 3 dB.

[0043] The divider 3 has a first port 31, a second port 32, a third port 33, and a fourth port 34. The first port 31 is an input port that receives input power Pin from a power source (not shown) via a node n1. The second port 32 is an isolated port that is terminated by a terminator 321. The third port 33 is an output port that outputs power that has half the amplitude of the input power Pin and a phase delay of 90° relative to the input power Pin. The third port 33 is connected to the input node of the first amplifier 1. The fourth port 34 is a coupled port that outputs power that has half the amplitude of the input power Pin and a phase delay of 180° relative to the input power Pin. The fourth port 34 is connected to the input node of the second amplifier 2.

[0044] The combiner 4 has a first port 41, a second port 42, a third port 43, and a fourth port 44. The first port 41 is connected to the output node of the first amplifier 1. The second port 42 is connected to the output node of the second amplifier 2. The third port 43 functions as an isolation port. The fourth port 44 functions as an output port.

[0045] More specifically, the first port 41 of the combiner 4 receives the power amplified by the first amplifier 1. This power has a phase delay of 90° when it is output from the third port 33 of the divider 3. A phase delay of 90° is added to the power component transmitted from the first port 41 to the third port 43 of the combiner 4. A phase delay of 180° is added to the power component transmitted from the first port 41 to the fourth port 44 of the combiner 4.

[0046] The second port 42 of the combiner 4 receives the power amplified by the second amplifier 2. This power has a phase delay of 180° when it is output from the fourth port 34 of the divider 3. A phase delay of 180° is added to the power component transmitted from the second port 42 to the third port 43 of the combiner 4. A phase delay of 90° is added to the power component transmitted from the second port 42 to the fourth port 44 of the combiner 4.

[0047] The power component transmitted from the first port 41 to the third port 43 of the combiner 4 and the power component transmitted from the second port 42 to the third port 43 have the same amplitude and opposite phase. These two power components cancel each other out, so no power is output from the third port 43.

[0048] The power component transmitted from the first port 41 to the fourth port 44 of the combiner 4 and the power component transmitted from the second port 42 to the fourth port 44 have the same amplitude and the same phase. Therefore, the power resulting from the reinforcement of these two power components is output from the fourth port 44 as output power Pout. The output power Pout is supplied to a load (not shown) via node n2.

[0049] The first port 31 to the fourth port 34 of the distributor 3 correspond to the "first port" to the "fourth port" according to the present disclosure, respectively. The first port 41 to the fourth port 44 of the combiner 4 correspond to the "fifth port" to the "eighth port" according to the present disclosure, respectively.

[0050] The control amplifier 5 is a class AB amplifier or a class B amplifier. Like the first amplifier 1 and the second amplifier 2, the control amplifier 5 is implemented by, for example, a GaN HEMT. However, the control amplifier 5 may also be implemented by a Si or SiC IGBT, or by a Si or SiC MOSFET.

[0051] In this example, an external signal Pex is provided to the control amplifier 5 from a signal source (not shown) via node n3. The control amplifier 5 generates a control signal Pctrl from the external signal Pex. In this embodiment, the control signal Pctrl includes harmonic components (harmonic components with a frequency of 2f0 or higher) of the input power Pin to the balanced amplifier BA. The control amplifier 5 load-modulates the balanced amplifier BA by supplying the control signal Pctrl to the third port 43 of the combiner 4 via the matching circuit 6. Hereinafter, this load modulation technique is also referred to as "harmonic injection." Harmonic injection improves the power efficiency of the balanced amplifier BA. The principles of harmonic injection will be described later.

[0052] The matching circuit 6 is coupled between the control amplifier 5 and the third port 43 of the combiner 4. The matching circuit 6 matches the impedance between the output of the control amplifier 5 and the third port 43 of the combiner 4. By providing the matching circuit 6, the power efficiency of the power amplifier 100 can be further improved.

[0053] 3 is a circuit block diagram showing an implementation example of the power amplifier according to the first embodiment. To avoid cluttering the page, the ports of the divider 3 and the combiner 4 are omitted from Fig. 3 onwards. Hereinafter, the third port 43 of the combiner 4 will also be referred to as the "isolation port", and the fourth port 44 of the combiner 4 will also be referred to as the "output port".

[0054] Power amplifier 101 shown in FIG. 3 differs from power amplifier 100 (see FIG. 2) in that power amplifier 101 further includes a divider 7 and a phase shifter 8.

[0055] The divider 7 receives the original signal from the node n1 and divides the original signal. One part of the original signal is supplied to the first port 31 of the divider 3 as input power Pin. The other part of the original signal is supplied to the controlled amplifier 5 via the phase shifter 8.

[0056] The phase shifter 8 delays the phase of the signal supplied from the divider 7 to the control amplifier 5. The amount of phase delay of the phase shifter 8 is adjusted so that the phase of the power passing through the combiner 4 and the phase of the control signal Pctrl supplied from the control amplifier 5 to the isolated port of the combiner 4 are aligned at the isolated port of the combiner 4.

[0057] Other configurations of power amplifier 101 than those described above are the same as the corresponding configurations of power amplifier 100, and therefore description thereof will not be repeated. Power amplifier 101 makes it possible to omit a signal source that supplies external signal Pex (see FIG. 2).

[0058] <Principle of harmonic injection> There is a constant demand for improving the power efficiency of power amplifiers, which is achieved by reducing the power consumption of the power amplifiers, as will be explained below.

[0059] According to distorted AC theory, the voltage of a transistor (typically the drain voltage of a transistor that constitutes a power amplifier) ​​V(t) is expressed by the following equation (1). The current (drain current) I(t) that flows through the transistor is expressed by the following equation (2). t represents the elapsed time. ω represents the angular frequency (center frequency). n is a natural number that represents the order of the frequency component. φn represents the phase difference of the nth order frequency component relative to the fundamental wave. θn represents the phase difference of the nth order voltage relative to the nth order current.

number

[0060] Equation (1) indicates that the transistor voltage V(t) includes a DC component (first term on the right-hand side), a fundamental component for n=1 (second term on the right-hand side), and a harmonic component for n≧2 (third term on the right-hand side). The same is true for the current expressed in equation (2).

[0061] The power consumption (time average value in a period T) Pave of a transistor is calculated from equations (1) and (2) as shown in the following equation (3).

number

[0062] From equation (3), it can be seen that the power consumption Pave of a transistor also includes a DC component (first term on the right-hand side), a fundamental component for n=1 (second term on the right-hand side), and a harmonic component for n≧2 (third term on the right-hand side).

[0063] 4 is a diagram showing voltage and current waveforms for explaining the power consumption of a transistor. The horizontal axis represents elapsed time, and the vertical axis represents the magnitude of the voltage or current supplied to the transistor.

[0064] As mentioned above, the power efficiency of a transistor can be improved by reducing its power consumption Pave. Power consumption Pave is expressed as the area of ​​the region where the voltage waveform and current waveform overlap (shown with diagonal lines) in the figure. The smaller the area of ​​this region, the smaller the power consumption Pave, and therefore the better the power efficiency. For example, in an ideal class-F amplifier, the voltage waveform and current waveform do not overlap at all, and 100% power efficiency can be achieved.

[0065] FIG. 5 shows the voltage and current waveforms in an ideal class-F amplifier. The voltage and current waveforms shown in FIG. 5 correspond to the situation in which the first and second terms on the right-hand side of Equation (3) are balanced and the third term on the right-hand side is zero. The first and second terms on the right-hand side being balanced means that the magnitudes of these two terms are equal and the signs are opposite. The third term on the right-hand side being zero means that for all orders n, the phases of the voltage waveform and the current waveform of the same order are shifted by 90° (θn=π / 2), or at least one of the voltage V(t) and the current I(t) is always zero.

[0066] The voltage waveform and current waveform shown in Fig. 5 can be expressed by Fourier series expansion as the following equations (4) and (5), respectively. The terms on the right-hand sides of equations (4) and (5) with an order n (coefficient of ω) of 2 or more represent harmonic components.

number

[0067] The distorted waveform contains harmonics, and equations (3), (4), and (5) show that harmonic components are necessary to reduce the power consumption Pave of the power amplifier. In this embodiment, the voltage and current waveforms are shaped by injecting harmonic components from the control amplifier 5 into the balanced amplifier BA (more specifically, the isolation port of the combiner 4). This reduces the harmonic components (the third term on the right-hand side) of equation (3), and the voltage and current waveforms shown in FIG. 4 approach the waveforms shown in FIG. 5. As a result, the power efficiency of the balanced amplifier BA can be improved.

[0068] Comparative Example 1 The configuration for injecting harmonic components from the control amplifier 5 into the balanced amplifier BA will be described in comparison with the power amplifier according to the first comparative example.

[0069] 6 is a circuit block diagram showing the configuration of a power amplifier according to Comparative Example 1. Power amplifier 108 according to Comparative Example 1 differs from power amplifier 101 (see FIG. 3) according to Embodiment 1 in the following two points. First, power amplifier 108 includes first amplifier 18, second amplifier 28, and control amplifier 58 instead of first amplifier 1, second amplifier 2, and control amplifier 5. The operating class of these amplifiers does not matter.

[0070] Second, power amplifier 108 further includes harmonic control (HC) circuit 11, harmonic control circuit 21, and harmonic control circuit 51.

[0071] The harmonic processing circuit 11 is coupled between the output node of the first amplifier 18 and the first port 41 of the combiner 4. The harmonic processing circuit 11 includes a harmonic filter and a phase adjustment circuit (neither of which are shown), and is configured to reflect harmonic components contained in the power amplified by the first amplifier 18 to the output node of the first amplifier 18. As a specific example, the harmonic processing circuit 11 is configured so that the output node of the first amplifier 18 is shorted or opened for even-order harmonic components and shorted or opened for odd-order harmonic components. Because the harmonic components are reflected by the harmonic processing circuit 11, almost no harmonic components propagate beyond the harmonic processing circuit 11.

[0072] The harmonic processing circuit 21 is coupled between the output node of the second amplifier 28 and the second port 42 of the combiner 4. Similar to the harmonic processing circuit 11, the harmonic processing circuit 21 is configured to reflect harmonic components contained in the power amplified by the second amplifier 28 to the output node of the second amplifier 28.

[0073] The harmonic processing circuit 51 is coupled between the output node of the control amplifier 58 and the matching circuit 6. The harmonic processing circuit 51 is configured to reflect harmonic components contained in the control signal Pctrl output from the control amplifier 58 to the output node of the control amplifier 58.

[0074] By installing harmonic processing circuit 11, the power consumption of first amplifier 18 is reduced, improving the power efficiency of first amplifier 18. The same applies to harmonic processing circuit 21. Furthermore, by installing harmonic processing circuit 51, the power consumption of control amplifier 58 is reduced, improving the power efficiency of control amplifier 58. As described above, in Comparative Example 1, the power efficiency of first amplifier 18, second amplifier 28, and control amplifier 58 is improved separately by the corresponding harmonic processing circuits. Harmonic components generated in each amplifier are removed by reflection. Harmonics output from one amplifier are not used to improve the power efficiency of another amplifier. In particular, harmonic components included in the control signal Pctrl from control amplifier 58 are removed by harmonic processing circuit 51 and are therefore not injected (supplied) to the balanced amplifier.

[0075] As described above, in the power amplifier 101 according to the first embodiment, unlike the power amplifier 108 according to the first comparative example, the transmission line of the control signal Pctrl from the control amplifier 5 to the balanced amplifier BA is configured without including a harmonic processing circuit. Moreover, the balanced amplifier BA of the power amplifier 101 is also configured without including a harmonic processing circuit.

[0076] In circuit block diagrams showing the circuit configuration of a power amplifier, the harmonic processing circuit is often omitted. For example, the circuit block diagram shown in Figure 1 of Non-Patent Document 1 does not show the harmonic processing circuit, but the harmonic processing circuit is provided at the position shown in Figure 6 of the present disclosure.

[0077] Comparative Example 2 The balanced amplifier BA (each of the first amplifier 1 and the second amplifier 2) in the first embodiment is a class C amplifier, and the control amplifier 5 is a class AB amplifier or a class B amplifier. The advantages of adopting such an amplifier operating class will be described in comparison with a power amplifier according to a second comparative example.

[0078] 7 is a circuit block diagram showing the configuration of a power amplifier according to Comparative Example 2. Power amplifier 109 according to Comparative Example 2 differs from power amplifier 101 according to Embodiment 1 (see FIG. 3) in that it includes a first amplifier 19, a second amplifier 29, and a control amplifier 59 instead of first amplifier 1, second amplifier 2, and control amplifier 5. In Comparative Example 2, each of first amplifier 19 and second amplifier 29 forming a balanced amplifier is a class AB amplifier, and control amplifier 59 is a class C amplifier. Such a power amplifier is described, for example, in FIG. 2 of Patent Document 1.

[0079] In Comparative Example 2, the harmonic processing circuit is not provided at the position shown in Comparative Example 1 (see FIG. 6). Therefore, harmonic components contained in the control signal Pctrl from the control amplifier 59 can be injected into the balanced amplifier without being removed. However, as will be explained below, there is room for improvement in the effect of improving the power efficiency of the balanced amplifier.

[0080] 8 is a diagram for comparing the power efficiency of the power amplifier between this embodiment and Comparative Example 2. The horizontal axis represents the input power to the power amplifier. The vertical axis represents the output power from the power amplifier. The input / output characteristics of the balanced amplifier (characteristics showing the increase in output power as the input power increases) are represented by the curve labeled BA. The input / output characteristics of the control amplifier are represented by the curve labeled CA.

[0081] When the input power to the control amplifier is less than the threshold TH, the linearity of the input / output characteristics of the control amplifier is good. When the input power to the control amplifier exceeds the threshold TH, the linearity of the control amplifier deteriorates. In other words, even if the input power to the control amplifier increases, the output power from the control amplifier becomes saturated and is difficult to increase.

[0082] When the control amplifier has good linearity, the control signal Pctrl output from the control amplifier does not contain many harmonic components. To increase the harmonic components sufficiently, the control amplifier must reach saturation, and the distortion of the voltage and current waveforms of the control signal Pctrl must be significant. This region is shown surrounded by a dashed line in the figure.

[0083] Generally, a load modulation balanced amplifier performs load modulation on a balanced amplifier. Considering the original purpose of this load modulation, it is a natural assumption that the balanced amplifier is operating during load modulation. For this reason, Comparative Example 2 employs a class AB balanced amplifier that starts operating earlier than the class C control amplifier 59. As a result, the balanced amplifier starts operating when the input power to the control amplifier 59 is lower than the threshold TH (before the control amplifier 59 starts operating). At this time, the control signal Pctrl from the control amplifier 59 does not contain the required amount of harmonic components. Therefore, Comparative Example 2 may not fully achieve the effect of improving the power efficiency of the balanced amplifier based on the principle of harmonic injection described above.

[0084] In contrast, in the first embodiment, the control amplifier 5 is a class AB amplifier or a class B amplifier, and the balanced amplifier BA is a class C amplifier. Therefore, the balanced amplifier BA remains stopped while the input power to the control amplifier 5 is lower than the threshold TH. The balanced amplifier BA starts operating when the input power to the control amplifier 5 reaches or exceeds the threshold TH. At this time, the control signal Pctrl from the control amplifier 5 contains large harmonic components. Therefore, according to the first embodiment, it is possible to achieve a sufficient improvement in power efficiency without delay from the start of operation of the balanced amplifier BA.

[0085] Simulation This section describes the results of a simulation of the power efficiency of the balanced amplifier BA. In this simulation, it was assumed that a second harmonic with a frequency of 2f0 was injected into the balanced amplifier BA, whose input power Pin had a frequency of f0. The power supplied to the first amplifier 1 and the power supplied to the second amplifier 2 were both set to 10 W. The divider 3 and combiner 4 were assumed to have ideal frequency characteristics that distribute or combine signals equally across the entire frequency band.

[0086] Fig. 9 is a Smith chart showing an example of a simulation result regarding the impedance of a balanced amplifier when no harmonic injection is performed, and Fig. 10 is a Smith chart showing an example of a simulation result regarding the impedance of a balanced amplifier when harmonic injection is performed.

[0087] In Figures 9 and 10, the circle representing the reflection coefficient (ratio of reflected wave to incident wave) Γ=1 of the balanced amplifier BA is shown by a dashed line. In Figure 10, the locus showing the change in impedance of the first amplifier 1 when harmonic injection is performed is shown by 2f0(1). The locus showing the change in impedance of the second amplifier 2 when harmonic injection is performed is shown by 2f0(2). Although these two loci show different behaviors, both have moved outside the circle of the reflection coefficient Γ=1, which indicates that the reflected wave has become larger than the incident wave. This suggests that the harmonic components contained in the control signal Pctrl from the control amplifier 5 have been successfully injected into the balanced amplifier BA.

[0088] Fig. 11 is a diagram showing an example of a simulation result regarding the power efficiency of each amplifier that forms the balanced amplifier according to the first embodiment. Fig. 12 is a diagram showing an example of a simulation result regarding the power efficiency of the entire balanced amplifier according to the first embodiment. The horizontal axis represents output power, and the vertical axis represents power efficiency. The same applies to Fig. 15, which will be described later. The simulation result with harmonics injected is shown by a thick solid line, and the simulation result without harmonics injection is shown by a thin dashed dotted line.

[0089] 11, the power efficiency was improved across the entire range of output power, including the low output power range, particularly in the second amplifier 2. The power efficiency was also improved in the high output power range in the first amplifier 1. As a result, as shown in FIG. 12, the power efficiency of the entire balanced amplifier BA was improved across the entire range of output power. While the maximum power efficiency without harmonic injection was 61%, the maximum power efficiency with harmonic injection was 65%.

[0090] 11, the effect of improving power efficiency in the second amplifier 2 was significant, whereas the effect of improving power efficiency in the first amplifier 1 was not so great. However, the effect of improving power efficiency in the second amplifier 2 is not necessarily greater than the effect of improving power efficiency in the first amplifier 1. The magnitude of the effect can vary depending on the simulation conditions (especially the impedance of the circuit downstream of the output port of the combiner 4, as will be described later).

[0091] <Summary> As described above, in the first embodiment, the control amplifier 5 is a class AB amplifier or a class B amplifier, and the balanced amplifier BA is a class C amplifier. Therefore, as the input power increases, the control amplifier 5 starts operating first, followed by the balanced amplifier BA. When the input power to the control amplifier 5 increases and the control amplifier 5 reaches a saturated state, the harmonic components included in the control signal Pctrl increase. Therefore, after the balanced amplifier BA starts operating, sufficient harmonic components are always injected from the control amplifier 5 into the balanced amplifier BA. This reduces the overlap between the voltage waveform and the current waveform of the balanced amplifier BA (i.e., power consumption) even when the input power to the balanced amplifier BA is low. Therefore, according to the first embodiment, the power efficiency of the balanced amplifier BA can be improved.

[0092] In the first embodiment, the control amplifier 5 is actively operated in a saturated state, which may accelerate deterioration of the control amplifier 5 in an actual usage environment and reduce the reliability of the power amplifiers 100 and 101. It can be said that the power amplifiers 100 and 101 according to the first embodiment achieve load modulation that prioritizes improving power efficiency over ensuring reliability.

[0093] <Embodiment 2> In the second embodiment, a configuration that can further improve the power efficiency of the balanced amplifier BA will be described.

[0094] <Power amplifier configuration> 13 is a circuit block diagram showing an example of the configuration of a power amplifier according to embodiment 2. Power amplifier 102 differs from power amplifier 101 (see FIG. 3) in that it further includes a harmonic processing circuit 9.

[0095] A part of the control signal Pctrl injected into the isolated port of the combiner 4 leaks out from the output port of the combiner 4 to the load (not shown) via node n2, which may weaken the effect of improving the power efficiency of the balanced amplifier BA by the harmonic injection.

[0096] Therefore, in the second embodiment, a harmonic processing circuit 9 is coupled to the output port of the combiner 4. The harmonic processing circuit 9 is configured to totally reflect the harmonic components contained in the output power Pout of the balanced amplifier BA to the output port of the combiner 4 (the harmonic components cause fixed-end reflection in the harmonic processing circuit 9). By appropriately setting the parameters of the circuit elements contained in the harmonic processing circuit 9 (such as the length of the transmission line forming the phase adjustment circuit and the inductance and capacitance of the capacitor of the coil forming the harmonic filter), it is possible to return the harmonic components contained in the output power Pout (including the control signal Pctrl leaking from the output port of the combiner 4) to the combiner 4 with an appropriate phase. In this way, by utilizing the reflection of the harmonic components (in other words, the reinjection of the leaked harmonic components), the power efficiency of the balanced amplifier BA can be further improved.

[0097] Simulation Two reasons why the power efficiency of the balanced amplifier BA is further improved by providing the harmonic processing circuit 9 will be explained in detail below with reference to the simulation results.

[0098] 14 is a Smith chart showing an example of a simulation result of the impedance of a balanced amplifier when a harmonic processing circuit is installed and harmonic injection is performed. This Smith chart is to be compared with the Smith chart (see FIG. 10) when harmonic injection is performed without the harmonic processing circuit 9 installed.

[0099] First, even in the first embodiment, some of the harmonics leaking from the output port of the combiner 4 are reflected by circuits connected downstream of the output port of the combiner 4 and return to the combiner 4. These harmonics may be affected by the downstream circuits. In the power amplifier 101 according to the first embodiment (see FIG. 3), the output port of the combiner 4 is directly connected to the downstream circuit. This means that the impedance of the circuits downstream of the output port of the combiner 4 is not specified. In this case, some of the harmonics leaking from the output port of the combiner 4 are reflected at a certain point in the downstream circuit and return to the combiner 4, while other harmonics are reflected at a different point in the downstream circuit and return to the combiner 4. This results in phase variations between the harmonics returning to the combiner 4. This can be seen from the fact that, in the Smith chart (see FIG. 10) according to the first embodiment, the locus showing the impedance change of the first amplifier 1 (see 2f0(1)) is different from the locus showing the impedance change of the second amplifier 2 (see 2f0(2)).

[0100] In the second embodiment, by coupling the harmonic processing circuit 9 to the output port of the combiner 4, the impedance of the circuits subsequent to the output port of the combiner 4 is uniquely defined, and the influence of the circuits subsequent to the harmonic processing circuit 9 on the harmonics is negligibly small. As a result, the phases of the harmonics returning from the harmonic processing circuit 9 to the output port of the combiner 4 are aligned, and a standing wave of the harmonic components of the control signal Pctrl is formed between the harmonic processing circuit 9 and the output port of the combiner 4. This is supported by the fact that the impedance changes of the first amplifier 1 and the second amplifier 2 follow the same locus in the Smith chart shown in FIG. 14 (see 2f0(1) and 2f0(2)).

[0101] As described above, in the first embodiment, although some of the harmonics leaking from the output port of the combiner 4 are reflected by circuits downstream of the output port of the combiner 4 and return to the combiner 4, the phases of the harmonics returning to the combiner 4 are not aligned. In contrast, in the second embodiment, the harmonic processing circuit 9 is installed, thereby aligning the phases of the harmonics returning to the combiner 4. As a result, even if the amount of harmonic reflection is the same between the first and second embodiments, the effect of improving power efficiency obtained by the reflection of harmonics is enhanced in the second embodiment compared to the first embodiment.

[0102] Secondly, in the Smith chart shown in Fig. 14, it can be seen that the locus showing the impedance change exceeds the circle showing the reflection coefficient Γ = 1 by a larger amount compared to the Smith chart in embodiment 1 (see Fig. 10). This indicates that the provision of the harmonic processing circuit 9 increases the reflection amount of harmonics itself.

[0103] 15 is a diagram showing an example of simulation results regarding the power efficiency of each amplifier constituting the balanced amplifier in embodiment 2. The thick dashed line shows the simulation results when harmonic injection is performed after providing the harmonic processing circuit 9. For comparison, the simulation results for embodiment 1 are also shown. The thick solid line shows the simulation results when harmonic injection is performed without providing the harmonic processing circuit 9. The thin dashed-dotted line shows the simulation results when harmonic injection is not performed.

[0104] As shown in FIG. 15, it has been confirmed that, according to the second embodiment, the power efficiency of the balanced amplifier BA (particularly the first amplifier 1 in this example) is improved over the entire range of the output power to the balanced amplifier BA compared to the first embodiment.

[0105] 16 is a diagram summarizing the simulation results regarding the power efficiency of the balanced power amplifiers according to the first and second embodiments. The maximum power efficiency without harmonic injection was 61%. While the maximum power efficiency when harmonic injection was performed without providing the harmonic processing circuit 9 was 65%, providing the harmonic processing circuit 9 improved the maximum power efficiency to 70%.

[0106] <Summary> As described above, in the second embodiment, as in the first embodiment, the control amplifier 5 is a class AB amplifier or a class B amplifier, and the balanced amplifier BA is a class C amplifier. Therefore, the control signal Pctrl provided from the control amplifier 5 to the balanced amplifier BA always contains sufficient harmonic components while the balanced amplifier BA is in operation. Therefore, according to the second embodiment, the power efficiency of the balanced amplifier BA can be improved in accordance with the principle of harmonic injection.

[0107] Additionally, in the second embodiment, a harmonic processing circuit 9 is coupled to the output port of the combiner 4. The harmonic processing circuit 9 is configured to totally reflect, to the combiner 4, the harmonic components contained in the output power Pout from the output port of the combiner 4 (the harmonic components of the leaked control signal Pctrl). This makes it possible to align the phase of the reflected harmonic waves and increase the amount of harmonic reflection. This therefore enhances the effect of improving the power efficiency of the balanced amplifier BA by injecting harmonics. Therefore, according to the second embodiment, the power efficiency of the balanced amplifier BA can be further improved.

[0108] The embodiments disclosed herein are illustrative in all respects and should not be considered limiting. The scope of the present invention is defined by the claims rather than the above-described embodiments, and it is intended to include any modifications within the scope of the claims and meanings equivalent to the claims. [Explanation of symbols]

[0109] 100,101,102,108,109 Power amplifier 1,18,19 First amplifier 11 Harmonic processing circuit 2,28,29 Second amplifier 21 Harmonic processing circuit 3 distributor 31 Port 1 32 Second Port 33 Third Port 34 Port 4 4 Synthesizer 41 Port 1 42 Second Port 43 Third Port 44 Port 4 5,58,59 Control Amplifier 51 Harmonic Processing Circuit 6 Matching circuit 7 divider 8 Phase Shifter 9 Harmonic Processing Circuit 900 base stations 91 Processing unit 92 Transmitter 921 RF Chain 93 Antenna section 931 Antenna

Claims

1. a balanced amplifier including a first amplifier and a second amplifier for amplifying input power; a control amplifier which forms a load modulation balanced amplifier together with the balanced amplifier and supplies a control signal including a harmonic component of the input power to the balanced amplifier; the control amplifier is a class AB amplifier or a class B amplifier; The power amplifier, wherein each of the first amplifier and the second amplifier is a class C amplifier.

2. a transmission line of the control signal from the control amplifier to the balanced amplifier is configured without including a harmonic processing circuit; The power amplifier according to claim 1 , wherein the balanced amplifier is configured without including a harmonic processing circuit.

3. 3. The power amplifier according to claim 1, further comprising a harmonic processing circuit configured to reflect harmonic components contained in the output power of the balanced amplifier back to the balanced amplifier.

4. 3. The power amplifier according to claim 1, further comprising a matching circuit that matches an impedance of the control amplifier with an impedance of the balanced amplifier.

5. The balanced amplifier comprises: a divider that divides the input power between the first amplifier and the second amplifier; a combiner that combines the power amplified by the first amplifier and the power amplified by the second amplifier, The splitter is a directional coupler with a phase difference of 90°, a first port for receiving the input power; a second port coupled to the terminator; a third port coupled to the input node of the first amplifier; a fourth port coupled to the input node of the second amplifier; The combiner is a directional coupler with a phase difference of 90°, a fifth port coupled to the output node of the first amplifier; a sixth port coupled to the output node of the second amplifier; a seventh port for receiving the control signal; and an eighth port for outputting the combined power.

6. the transmission line between the control amplifier and the seventh port is configured without including a harmonic processing circuit; 6. The power amplifier according to claim 5, wherein the balanced amplifier is configured so as not to include a harmonic processing circuit between the output node of the first amplifier and the fifth port, and so as not to include a harmonic processing circuit between the output node of the second amplifier and the sixth port.

7. 7. The power amplifier of claim 5, further comprising a harmonic processing circuit coupled to the eighth port.

8. 7. The power amplifier of claim 5, further comprising a matching circuit coupled between the control amplifier and the seventh port.

9. 2. The power amplifier of claim 1, further comprising a divider that divides an original signal to provide a portion of the original signal as the input power to the balanced amplifier and another portion of the original signal to the control amplifier.

10. a first amplifier and a second amplifier forming part of a balanced amplifier for amplifying input power; a control amplifier which forms a load modulation balanced amplifier together with the balanced amplifier and supplies a control signal including a harmonic component of the input power to the balanced amplifier; the control amplifier is a class AB amplifier or a class B amplifier; The power amplifier, wherein each of the first amplifier and the second amplifier is a class C amplifier.

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