Laminated substrate

Abstract

To reduce "BPD" in a buffer layer.SOLUTION: The stacked substrate 1A includes the silicon carbide substrate 10 having a first dopant concentration, the low-concentration buffer layer 21A formed on the silicon carbide substrate 10 and having a second dopant concentration lower than the first dopant concentration, the high-concentration buffer layer 21A formed on the low-concentration buffer layer 21B and having a third dopant concentration higher than the second dopant concentration and lower than the first dopant concentration, and the drift layer 22 formed on the high-concentration buffer layer 21B and having a fourth dopant concentration lower than the second dopant concentration.SELECTED DRAWING: Figure 5

Description

[Technical Field]

[0001] The present invention relates to a multilayer substrate, and for example, to a technique that is effective when applied to a multilayer substrate having a buffer layer formed on a silicon carbide substrate. [Background technology]

[0002] Japanese Patent Application Laid-Open Publication No. 2015-119056 (Patent Document 1) describes an inspection method for detecting crystal defects in an epitaxial layer based on a first image based on reflected light generated by irradiating the epitaxial layer with light, and a second image based on photoluminescence light generated by irradiating the epitaxial layer with excitation light.

[0003] Japanese Patent No. 7368041 (Patent Document 2) describes a method of irradiating high-intensity ultraviolet light onto an entire laminated substrate having a silicon carbide substrate, a buffer layer formed on the silicon carbide substrate, and a drift layer formed on the buffer layer, thereby expanding Shockley-Type Stacking Faults (hereinafter sometimes referred to as "SSFs") in any of the following: basal plane dislocations (hereinafter sometimes referred to as "BPDs") in the drift layer, BPDs in the buffer layer, and BPDs converted to threading edge dislocations (hereinafter sometimes referred to as "TEDs") at the interface between the buffer layer and the silicon carbide substrate, and detecting candidate regions where defect images of "SSFs" have occurred as regions where "BPDs" exist.

[0004] Non-Patent Document 1 describes the bipolar degradation phenomenon. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2015-119056 [Patent Document 2] Patent No. 7368041 [Non-patent literature]

[0006] [Non-Patent Document 1] Journal of the Japanese Society for Crystal Growth Vol.45, No.3(2018)45-3-01 "Current status of development of low resistivity SiC single crystals for power devices" Summary of the Invention [Problem to be solved by the invention]

[0007] For example, in power devices using silicon carbide, it is desirable to suppress forward current degradation and improve long-term reliability. To achieve this, it is important to reduce "BPD," which causes forward current degradation. In particular, it is important to reduce "BPD" not only in the drift layer but also in the buffer layer.

[0008] Regarding this point, there is currently no established technology for detecting BPDs in the buffer layer. Therefore, in order to realize power devices that can suppress forward current degradation and improve long-term reliability, a technology for detecting BPDs in the buffer layer is desired. [Means for solving the problem]

[0009] In one embodiment, the laminated substrate includes: a silicon carbide substrate having a first dopant concentration; a low-concentration buffer layer formed on the silicon carbide substrate and having a second dopant concentration lower than the first dopant concentration; a high-concentration buffer layer formed on the low-concentration buffer layer and having a third dopant concentration higher than the second dopant concentration and lower than the first dopant concentration; and a drift layer formed on the high-concentration buffer layer and having a fourth dopant concentration lower than the third dopant concentration. [Effects of the Invention]

[0010] According to one embodiment, the "BPD" in the buffer layer can be reduced. [Brief explanation of the drawings]

[0011] [Figure 1] This is a photograph showing that "BPD" is detected as a darkened, black line defect in the photoluminescence image of the NUV filter. [Figure 2] (a) is a photograph showing a photoluminescence image of the NUV filter, and (b) is a photograph showing a surface image after KOH etching. [Figure 3] FIG. 2 is a diagram illustrating a configuration of a laminated substrate. [Figure 4] 1 is a flowchart illustrating a manufacturing process flow for manufacturing a product substrate having a low "BPD" density in the buffer layer. [Figure 5] FIG. 1 is a diagram showing the configuration of a laminated substrate having a "two-stage buffer structure." [Figure 6] 10 is a graph showing the results of evaluating the "BPD" density in a high-concentration buffer layer. DETAILED DESCRIPTION OF THE INVENTION

[0012] In all the drawings for explaining the embodiments, the same components are generally designated by the same reference numerals, and repeated explanations thereof will be omitted. In addition, hatching may be used even in plan views to make the drawings easier to understand.

[0013] <Wide bandgap semiconductor materials> For example, inverter circuits are used as circuits to control motors included in automobiles, home appliances, etc. These inverter circuits use power semiconductor elements such as MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) and IGBTs (Insulated Gate Bipolar Transistors).

[0014] Such power semiconductor devices are required to have, for example, low on-resistance and low switching loss in addition to high breakdown voltage. Currently, the mainstream of power semiconductor devices is a field effect transistor formed on a semiconductor substrate whose main component is silicon, but these power semiconductor devices are approaching their theoretical performance limits.

[0015] In this regard, semiconductor elements including field effect transistors formed on a semiconductor substrate whose main component is a semiconductor material with a wider band gap than silicon (hereinafter referred to as wide band gap power semiconductor elements) have attracted attention.

[0016] This is because a large band gap means that the material has high dielectric breakdown strength, making it easier to achieve high breakdown voltage.

[0017] Furthermore, if the semiconductor material itself has high dielectric breakdown strength, the withstand voltage can be ensured even if the drift layer that maintains the withstand voltage is made thin. Therefore, for example, by making the drift layer thinner and increasing the impurity concentration, the on-resistance of the power semiconductor element can be reduced.

[0018] That is, wide bandgap power semiconductor devices are superior in that they can achieve both improved breakdown voltage and reduced on-resistance, which are in a trade-off relationship with each other. Therefore, wide bandgap power semiconductor devices are expected to be semiconductor devices that can achieve high performance.

[0019] Examples of semiconductor materials with a band gap larger than that of silicon include silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga2O3), diamond, etc. The following description focuses on silicon carbide.

[0020] <Background of the review> Silicon carbide is a wide-bandgap semiconductor material with a wider bandgap than silicon. Silicon carbide is a semiconductor material that has attracted attention in the field of power devices. For example, a laminated substrate made of silicon carbide used in a power device has an n-type buffer layer formed on an n-type silicon carbide substrate and an n-type drift layer formed on the buffer layer. Generally, the buffer layer and drift layer are formed by epitaxial growth.

[0021] However, in silicon carbide, the crystal stacking direction ( <0001> There are multiple polytypes with different arrangements of carbon and silicon atoms in the direction of the crystal. The difference in internal energy between these multiple polytypes is small. For this reason, different polytypes are easily generated in silicon carbide crystals. The generated different polytypes become crystal defects. As a result, multilayer substrates made of silicon carbide contain more crystal defects than multilayer substrates made of silicon. In particular, the presence of "BPD," a type of crystal defect, is known to cause forward current degradation, which affects device characteristics.

[0022] The cause of forward current degradation in power devices is thought to be as follows: Holes (positive holes) generated during forward current are trapped in "BPDs." When the trapped holes recombine, the recombination energy expands the "SSF," which is thought to be the cause of forward current degradation. This type of degradation in device characteristics is known as "bipolar degradation."

[0023] Therefore, technology to suppress the generation of "BPD" in the drift layer deposition process using epitaxial growth is being investigated. For example, by setting the off-angle to 4 degrees, it is possible to convert more than 95% of the "BPD" inherited from the silicon carbide substrate in the drift layer deposited by epitaxial growth into "TED". Unlike "BPD", "TED" does not cause forward current degradation. Therefore, technology to convert "BPD" into "TED" is useful from the perspective of suppressing forward current degradation.

[0024] In addition, to prevent hole carriers from reaching the BPDs in the silicon carbide substrate, the dopant concentration in the buffer layer is increased to shorten the hole carrier lifetime, thereby suppressing the expansion of the SSF due to the BPDs in the silicon carbide substrate.

[0025] However, if BPDs exist in the buffer layer, the hole carriers cannot be sufficiently prevented from reaching the BPDs in the buffer layer. This results in the expansion of the SSF due to the BPDs in the buffer layer, which is likely to cause bipolar degradation. Therefore, it is desirable to reduce the BPDs not only in the drift layer but also in the buffer layer.

[0026] Therefore, in order to suppress forward current degradation of power devices and improve their long-term reliability, technology is needed to detect not only BPDs in the drift layer but also BPDs in the buffer layer when inspecting laminated substrates made of silicon carbide.

[0027] <Consideration of improvements> One method for detecting crystal defects in a laminated substrate is to use a reflection image based on the reflected light generated by irradiating the drift layer with light, and a photoluminescence image based on the photoluminescence light generated by irradiating the drift layer with excitation light. With this inspection method, if a linear defect image is detected in the photoluminescence image but no defect image is detected in the reflection image, the detected defect can be classified as a "BPD."

[0028] However, with this inspection method, even if excitation light is irradiated onto the laminated substrate, photoluminescence light from BPDs present in the buffer layer, which has a short hole carrier lifetime, is not detected. For this reason, although this inspection method can detect BPDs in the drift layer, it has difficulty detecting BPDs in the buffer layer.

[0029] There is also an inspection method in which high-intensity ultraviolet light is irradiated onto the entire laminated substrate, thereby expanding the "SSF" for any of the "BPD" in the drift layer, the "BPD" in the buffer layer, and the "BPD" converted to "TED" at the interface between the buffer layer and the silicon carbide substrate, and detecting candidate areas where the "SSF" defect image has occurred as areas where "BPD" exists.

[0030] However, this inspection method requires high illumination (e.g., 10 W·cm) to irradiate the entire laminated board. -2 The ultraviolet light in the silicon carbide substrate has a wavelength and irradiance that reaches the interface between the silicon carbide substrate and the buffer layer. In this case, if the ultraviolet light reaches the BPD in the silicon carbide substrate, the SSF may expand from the BPD in the silicon carbide substrate. This means that it becomes difficult to distinguish between the BPD in the drift layer and the buffer layer. Furthermore, the SSF may expand from the BPD in the silicon carbide substrate, which is normally suppressed by the formation of the buffer layer. As a result, there is a risk of degrading the normal drift layer and buffer layer without BPD.

[0031] As described above, it is difficult to detect BPDs in the buffer layer without adversely affecting the laminated substrate using current inspection methods. Therefore, it is desirable to establish an inspection method that can detect BPDs in the buffer layer.

[0032] Therefore, in this embodiment, a device is devised to establish an inspection method that can detect "BPD" in the buffer layer. The technical concept of this embodiment will be described below.

[0033] <Inspection method in the embodiment> The inspection method in this embodiment is an inspection method for detecting crystal defects in a buffer layer using a first image (reflection image) based on reflected light generated by irradiating the buffer layer with light, and a second image (photoluminescence image) based on photoluminescence light generated by irradiating the buffer layer with excitation light. For example, the optical system that irradiates the buffer layer with light can be either a confocal optical system or a differential interference optical system, or a combination of a confocal optical system and a differential interference optical system.

[0034] As mentioned above, this inspection method can currently detect BPDs in the drift layer, but it has difficulty detecting BPDs in the buffer layer. In this regard, the inventors have newly discovered that this inspection method can detect BPDs in the buffer layer, which has a short hole carrier lifetime, by focusing on (1) the wavelength of the excitation light, (2) the integrated illuminance of the excitation light, and (3) the light-receiving filter. This point is explained below.

[0035] Assuming that only a buffer layer is formed on a silicon carbide substrate, an inspection method for detecting "BPDs" present in this buffer layer will be described.

[0036] (1) Wavelength of excitation light The wavelength of the excitation light may be, for example, 386 nm or less. However, the longer the wavelength of the excitation light, the longer the penetration depth. Therefore, when excitation light with a long wavelength is used, the excitation light penetrates not only into the buffer layer but also into the silicon carbide substrate below the buffer layer. In this case, photoluminescence light generated in the silicon carbide substrate is also received. That is, when excitation light with a long wavelength is used, the amount of received photoluminescence light generated in not only the buffer layer but also the silicon carbide substrate increases. This means that noise components other than the photoluminescence light generated in the buffer layer increase. In other words, when excitation light with a long wavelength is used, the photoluminescence light (noise component) generated in the silicon carbide substrate increases relative to the photoluminescence light (signal component) generated in the buffer layer. In other words, the S / N ratio decreases. For this reason, it is desirable to use a wavelength of excitation light having a penetration depth approximately equal to the thickness of the buffer layer. Therefore, the wavelength of the excitation light may be 386 nm or less, preferably 365 nm or less, and more preferably 313 nm or less.

[0037] (2) Integrated illuminance of excitation light It is believed that the intensity of the photoluminescence light generated in the buffer layer will be greater if the cumulative illuminance of the excitation light has a relatively large value. The greater the intensity of the photoluminescence light generated in the buffer layer, the easier it will be to detect the photoluminescence light. Therefore, in order to detect the photoluminescence light caused by "BPD" in the buffer layer, it is desirable that the cumulative illuminance of the excitation light has a relatively large value. For example, the cumulative illuminance of the excitation light is 1.6 W cm -2 ·sec or more. The upper limit of the cumulative illuminance of the excitation light is within a reasonable range (a range in which the performance of the inspection device can be demonstrated), and is not particularly limited. For example, the upper limit of the cumulative illuminance of the excitation light is 8.7 W·cm -2 ·sec or less. Furthermore, the upper limit of the cumulative illuminance of the excitation light is 2.9 W·cm -2 It is more desirable that the time is 1 / sec or less.

[0038] (3) Light receiving filter The photoluminescence light generated in the buffer layer has a specific wavelength range. Therefore, it is desirable to select a light-receiving filter having a wavelength range that transmits the wavelength of the photoluminescence light generated in the buffer layer. This is because if the transmission wavelength range of the light-receiving filter does not include the wavelength of the photoluminescence light generated in the buffer layer, the photoluminescence light will be blocked by the light-receiving filter, making it difficult to detect. Therefore, the selection of the light-receiving filter is important. For example, it is desirable to select a light-receiving filter so that the receiving wavelength is equal to or greater than the wavelength of the excitation light and equal to or less than 399 nm.

[0039] Based on the above design concept, we investigated the inspection conditions for detecting BPDs present in the buffer layer. Table 1 shows the results of the observation and investigation of BPDs in the buffer layer.

[0040] [Table 1]

[0041] As a sample, a laminated substrate was prepared in which only a 10 μm-thick buffer layer was formed on a silicon carbide substrate. The dopant concentration of the buffer layer was 1×10 16 cm -3 3x10 or more 18 cm -3 The following is the specification. We are examining whether or not "BPD" can be observed by changing the integrated illuminance of the excitation light and the transmission wavelength range of the light receiving filter. The inspection device used is the SICA88 manufactured by Lasertec Corporation. The wavelength of the excitation light is 313 nm.

[0042] In Examples 1 to 4, the dopant concentration of the buffer layer is 3×10 17 cm -3 3x10 or more 18 cm -3Therefore, the hole carrier lifetime in each of Examples 1 to 4 is short, and Examples 1 to 4 are suitable as buffer layers. In Examples 1 to 4, the integrated illuminance of the excitation light is 1.6 W cm -2 ·sec or more 2.9W·cm -2 ·sec or less. The light receiving filter is NUV (transmission wavelength 381 nm or more and 399 nm or less). As a result, in each of Examples 1 to 4, "BPD" in the buffer layer can be detected. As shown in Figure 1, "BPD" is detected as a darkened, line-shaped defect (indicated by an arrow) in the photoluminescence image of the NUV filter.

[0043] In Example 5, the cumulative irradiance of the excitation light is 0.63 W cm -2 As a result, in Example 5, the "BPD" in the buffer layer cannot be detected.

[0044] In Example 6, the light receiving filter is VIS (transmission wavelength 400 nm or more and 525 nm or less). As a result, in Example 6, "BPD" in the buffer layer cannot be detected.

[0045] In Example 7, the light receiving filter is set to NIR (transmission wavelength 660 nm or more). As a result, in Example 7, "BPD" in the buffer layer cannot be detected.

[0046] In Example 8, the cumulative irradiance of the excitation light is 0.63 W cm -2 ·sec. In addition, the light receiving filter is set to NIR (transmission wavelength 660 nm or more). As a result, it is possible to detect "BPD" in the buffer layer, but the dopant concentration of the sample is 1×10 16 cm -3 Therefore, Example 8 is not suitable for the buffer layer because the hole carrier lifetime becomes long.

[0047] The KOH etching method was used to verify whether the black line defects detected by the above-mentioned inspection method are "BPDs." Figure 2(a) shows a photoluminescence image of the NUV filter. Figure 2(b) shows a surface image after KOH etching. As shown in Figure 2(b), shell-shaped etch pits caused by KOH etching, which are characteristic of "BPDs," can be seen. This demonstrates that "BPDs" have been detected using the above-mentioned inspection method.

[0048] Based on the above, in an inspection method for detecting crystal defects in a buffer layer using a first image (reflection image) based on reflected light generated by irradiating the buffer layer with light and a second image (photoluminescence image) based on photoluminescence light generated by irradiating the buffer layer with excitation light, in order to detect "BPDs" in a buffer layer with a short hole carrier lifetime, (1) the wavelength of the excitation light is 313 nm, and (2) the integrated illuminance of the excitation light is 1.6 W cm. -2 ·sec or more and 2.9W·cm -2 ·sec or less, (3) the photoluminescence light is received through a light-receiving filter, and (4) the light-receiving filter is selected so that the received wavelength is equal to or greater than the wavelength of the excitation light and equal to or less than 399 nm.

[0049] As described above, according to this embodiment, an inspection method for detecting "BPDs" in a buffer layer with a short hole carrier lifetime can be established. As a result, by using the inspection method of this embodiment, it is possible to manufacture a laminated substrate capable of reducing the "BPD" density in the buffer layer.

[0050] Specifically, in this embodiment, a laminated substrate capable of reducing the "BPD" density in the buffer layer is realized by utilizing an established inspection method and an approach that devise a manufacturing process. Also, in this embodiment, a laminated substrate capable of reducing the "BPD" density in the buffer layer is realized by utilizing an established inspection method and an approach that adopts a new structure for the buffer layer. That is, in this embodiment, the establishment of an inspection method for detecting "BPD" in the buffer layer has led to the realization of a laminated substrate capable of reducing the "BPD" density in the buffer layer by two different approaches: an approach that devise a manufacturing process and an approach that adopts a new structure for the buffer layer.

[0051] Below, we will explain the approach of making improvements to the manufacturing process and the approach of adopting a new structure for the buffer layer.

[0052] <Approach that incorporates innovations into the manufacturing process> <<Laminated substrate configuration>> FIG. 3 is a diagram showing the configuration of the laminated substrate 1. As shown in FIG.

[0053] In FIG. 3, the laminated substrate 1 has a silicon carbide substrate 10 and a silicon carbide epitaxial layer 20. The silicon carbide epitaxial layer 20 has a buffer layer 21 and a drift layer 22. The silicon carbide substrate 10 has an upper surface (first surface) 10a and a lower surface (second surface) 10b located opposite the upper surface 10a. The silicon carbide epitaxial layer 20 is located on the upper surface 10a. The upper surface 10a is a (0001) Si surface. On the other hand, the lower surface 10b is a (000-1) C surface. The silicon carbide substrate 10 is made of silicon carbide single crystal. The polytype of the silicon carbide substrate 10 is preferably 4H. In this specification, the phrase "made of A" means that A is contained as a main component, and is also used to include A containing a dopant.

[0054] There is no particular limit to the size of silicon carbide substrate 10. However, from the viewpoint of mass productivity of semiconductor devices manufactured using laminated substrate 1, silicon carbide substrate 10 preferably has a diameter of 100 mm or more. Furthermore, silicon carbide substrate 10 more preferably has a diameter of 145 mm or more (for example, a diameter of 150 mm). Furthermore, silicon carbide substrate 10 more preferably has a diameter of 195 mm or more (for example, a diameter of approximately 200 mm).

[0055] Silicon carbide substrate 10 has a thickness determined according to the diameter according to the standard. For example, when the diameter is 100 mm or 150 mm, silicon carbide substrate 10 has a thickness of 350 μm±25 μm or 500 μm±25 μm.

[0056] Silicon carbide substrate 10 is preferably an off-substrate having an off-angle θ. The off-angle θ is preferably, for example, not less than 0.5 degrees and not more than 8 degrees. Furthermore, the off-angle θ is more preferably, for example, not less than 0.5 degrees and not more than 5 degrees.

[0057] The characteristics of upper surface 10a of silicon carbide substrate 10 will be described in detail.

[0058] The upper surface 10a is preferably polished by CMP (chemical mechanical polishing). Specifically, the upper surface 10a is preferably polished by CMP until the surface roughness Ra of the upper surface 10a is 1 nm or less. Furthermore, the upper surface 10a is preferably polished by CMP until the surface roughness Ra of the upper surface 10a is 0.2 nm or less. The surface roughness Ra can be measured, for example, using a white light interference microscope. For example, the surface roughness Ra of the upper surface 10a is a value obtained by measuring three points on the upper surface 10a over a length of 100 μm and averaging the values ​​from the three points. Ideally, the surface roughness Ra can be 0 nm, but in reality, the surface roughness Ra never becomes 0 nm. Therefore, the lower limit of the desirable range of the surface roughness Ra is greater than 0.

[0059] Buffer layer 21 is formed on upper surface 10a of silicon carbide substrate 10 by epitaxial growth. The thickness of buffer layer 21 is set arbitrarily depending on the performance required of a semiconductor device manufactured using laminated substrate 1. For example, the thickness of buffer layer 21 is approximately not less than 0.5 μm and not more than 10 μm.

[0060] Drift layer 22 is formed on buffer layer 21 by epitaxial growth. The thickness of drift layer 22 is set arbitrarily depending on the performance required of a semiconductor device manufactured using laminated substrate 1. For example, the thickness of drift layer 22 is approximately 3 μm or more and 100 μm or less.

[0061] <<Laminated substrate manufacturing method>> Next, a method for manufacturing the multilayer substrate 1 will be described.

[0062] First, a silicon carbide substrate 10 is prepared. The silicon carbide substrate 10 has the above-described plane orientation and off-angle. The upper surface 10a of the silicon carbide substrate 10 is polished by CMP to have a surface roughness Ra of 1 nm or less. A smaller surface roughness Ra is desirable. For this reason, for example, after obtaining a commercially available silicon carbide substrate, the upper surface 10a may be further polished by CMP. In addition to the polishing step by CMP, a step of wet-etching the upper surface 10a and a step of oxidizing the upper surface 10a with a gas may also be performed. Furthermore, the polishing step by CMP, the wet-etching step, and the oxidation step may be performed multiple times in an appropriate combination.

[0063] Next, the silicon carbide epitaxial layer 20 is formed. From the viewpoint of forming the silicon carbide epitaxial layer 20 with uniform characteristics on the silicon carbide substrate 10, it is desirable to form the silicon carbide epitaxial layer 20 by chemical vapor deposition (CVD).

[0064] For example, after introducing a silicon carbide substrate 10 into a growth chamber of a CVD apparatus, the silicon carbide substrate 10 is placed on a holder with the upper surface 10a, which is the (0001) Si plane, facing up. The silicon carbide substrate 10 is then heated to a temperature of 1500°C or higher and 1800°C or lower. Thereafter, a carrier gas, a carbon source gas, a silicon source gas, and a dopant gas are introduced into the growth chamber to grow a silicon carbide epitaxial layer 20 on the silicon carbide substrate 10. For example, the carrier gas is hydrogen gas (H). The carbon source gas in the source gas is, for example, propane (C3H8). The silicon source gas in the source gas is, for example, silane (SiH4). The dopant gas is, for example, nitrogen gas (N2).

[0065] Before growing silicon carbide epitaxial layer 20, upper surface 10a of silicon carbide substrate 10 may be cleaned by introducing only a carrier gas into the growth chamber.

[0066] When forming the buffer layer 21, the flow rate of nitrogen gas is adjusted to achieve a predetermined dopant concentration. Alternatively, the flow rate of the carrier gas or the source gas is changed to change the incorporation rate of nitrogen, which is the dopant introduced into the buffer layer 21, and thereby control the predetermined dopant concentration.

[0067] Similarly, when forming drift layer 22, the flow rate of nitrogen gas is adjusted to achieve a predetermined dopant concentration. Alternatively, the flow rate of the carrier gas or source gas is changed to change the incorporation rate of nitrogen, which is the dopant introduced into drift layer 22, and control the dopant concentration to a predetermined level.

[0068] The ratio of carbon to silicon in the introduced carbon source gas to silicon source gas (C / Si) is preferably 1 or more. Specifically, C / Si is preferably 1 or more and 1.6 or less. If C / Si exceeds 1.6, the defect density increases in each of buffer layer 21 and drift layer 22. On the other hand, if C / Si is less than 1 and silane gas is supplied in excess, Si droplets, which are agglomerations of Si, are formed on the surface of silicon carbide epitaxial layer 20 during the growth of silicon carbide epitaxial layer 20. This is undesirable because defects caused by the Si droplets occur.

[0069] It is desirable that the pressure in the growth chamber during growth of silicon carbide epitaxial layer 20 be, for example, 10 kPa or more and 50 kPa or less.

[0070] <<Ingenuity in the manufacturing process>> In this embodiment, the manufacturing method of the product substrate (laminated substrate 1) is devised to reduce the "BPD" density in the buffer layer 21. Specifically, the "BPD" density in the buffer layer is reduced by utilizing the inspection method established in this embodiment. The following describes the devised manufacturing process.

[0071] The product substrate is, for example, the laminated substrate 1 shown in FIG. 3. That is, the product substrate has a silicon carbide substrate, a buffer layer formed on the silicon carbide substrate, and a drift layer formed on the buffer layer. A semiconductor device is manufactured using the product substrate configured in this manner. In the product substrate, it is important to reduce the "BPD" density in the buffer layer. For this reason, the product substrate is manufactured according to the manufacturing flowchart shown in FIG. 4.

[0072] A method for manufacturing a product substrate capable of reducing the "BPD" density in the buffer layer will be described below with reference to Fig. 4. Fig. 4 is a flowchart showing the flow of the manufacturing process for manufacturing a product substrate with a low "BPD" density in the buffer layer.

[0073] First, a test substrate is prepared (S101). The test substrate is a laminated substrate having only a silicon carbide substrate and a buffer layer formed on the silicon carbide substrate. That is, in the test substrate, no drift layer is formed on the buffer layer. This test substrate is used to evaluate the "BPD" density in the buffer layer formed on the silicon carbide substrate. That is, after the test substrate is prepared, an inspection method for detecting crystal defects in the buffer layer is used to identify the "BPD" density in the buffer layer in this test substrate (S102).

[0074] Specifically, in an inspection method for detecting crystal defects in a buffer layer, crystal defects in the buffer layer are detected using a reflection image (first image) based on reflected light generated by irradiating light onto the buffer layer, and a photoluminescence image (second image) based on photoluminescence light generated by irradiating excitation light onto the buffer layer.

[0075] Here, in this inspection method, the following inspection conditions are used: (1) The wavelength of the excitation light is 313 nm. (2) The cumulative illuminance of the excitation light is 1.6 W cm -2 ·sec or more and 2.9W·cm -2 ·sec or less. (3) The photoluminescent light is received through a light-receiving filter. (4) The light receiving filter is selected so that the receiving wavelength is equal to or greater than the wavelength of the excitation light and equal to or less than 399 nm.

[0076] In this way, the "BPD" density in the buffer layer of the test substrate is specified. Then, when the "BPD" density in the specified buffer layer is 5 cm -2 If the density is equal to or greater than the specified value (S103), a new test substrate having a buffer layer formed under new film-forming conditions is prepared (S101). On the other hand, if the "BPD" density in the specified buffer layer is 0 cm -2 Above 5cm -2If it is less than this (S103), a buffer layer for the product substrate is formed under the same film-forming conditions as those used to form the buffer layer on the test substrate (S104).

[0077] Thereafter, in the product substrate, a drift layer is formed on the buffer layer (S105).

[0078] From the above, the "BPD" density in the buffer layer is 5cm -2 The buffer layer of the product substrate can be formed under the same film formation conditions as the buffer layer of the test substrate, which is less than 5 cm. As a result, it is possible to manufacture a high-quality product substrate with a low "BPD" density in the buffer layer of the product substrate. This allows, for example, -2 In other words, by utilizing an established inspection method and devising an approach to the manufacturing process (the approach that realizes the manufacturing flowchart shown in Figure 4), it is possible to realize a product substrate that can reduce the BPD density in the buffer layer.

[0079] In the following, an example of evaluating a plurality of test substrates having buffer layers formed under different deposition conditions will be described in detail in the manufacturing flowchart shown in Fig. 4. Table 2 shows the results of evaluating test substrates having buffer layers formed under different deposition conditions.

[0080] [Table 2]

[0081] A method for manufacturing a test substrate will now be described. First, a silicon carbide substrate is prepared.

[0082] The silicon carbide substrate is preferably an off-axis substrate. The silicon carbide substrate is preferably an off-axis substrate having an off-axis angle θ. Specifically, the first surface, or the normal to the first surface, is preferably tilted by θ from the

[0001] direction to the

[1120] direction. Here, a substrate with an off-axis angle of 4° is used. The off-axis angle θ is preferably 0.5° or more and 8° or less, and more preferably 0.5° or more and 5° or less.

[0083] The first surface of the silicon carbide substrate is prepared by CMP to have a surface roughness Ra of 1 nm or less. A smaller surface roughness Ra is preferable. In addition to the CMP process, the first surface may be wet-etched and oxidized with a gas, or these three processes may be combined and performed two or more times.

[0084] Next, a buffer layer is formed. Any method can be used as long as the buffer layer can be formed by epitaxial growth. From the viewpoint of being able to form a buffer layer with uniform properties by epitaxial growth on a silicon carbide substrate with a large diameter, it is preferable to form the buffer layer using a CVD apparatus that employs chemical vapor deposition.

[0085] For example, a silicon carbide substrate is introduced into the growth chamber of a CVD apparatus and placed on a holder with the first surface, which is the (0001) Si surface, facing up. The silicon carbide substrate is heated to a temperature of approximately 1600°C, and a carrier gas, a carbon source gas, a silicon source gas, and a dopant gas are introduced into the growth chamber to form a buffer layer by epitaxial growth. For example, hydrogen (H2) or the like can be used as the carrier gas. Propane (C3H8) or the like can be used as the carbon source gas in the source gas. Silane (SiH4) or the like can be used as the silicon source gas in the source gas. Nitrogen (N2) or the like can be used as the dopant gas. Before forming the buffer layer by epitaxial growth, only the carrier gas may be introduced into the growth chamber, and the first surface of the silicon carbide substrate may be cleaned. The flow rates of the carrier gas, carbon source gas, silicon source gas, and dopant gas were adjusted so that the dopant concentration in the buffer layer was uniform across the wafer surface at the values ​​shown in Table 1. The pressure in the growth chamber during epitaxial growth of the buffer layer was 30 kPa. However, the pressure is not limited to this as long as the dopant concentration in the buffer layer is uniform across the wafer surface at the values ​​shown in Table 1.

[0086] In Examples A to E, the thickness of the buffer layer is 10 μm. The test substrates shown in Examples A to E were evaluated for the "BPD" density in the buffer layer using the test method established in this embodiment. Here, in Table 2, the evaluated "BPD" density is 5 cm -2 On the other hand, in Table 2, the evaluated "BPD" density is 5 cm -2 Cases where this is the case or more are indicated by "x". That is, from the evaluation results shown in Table 2, the "BPD" density is good in the test boards shown in each of Examples A to C. In contrast, from the evaluation results shown in Table 2, the "BPD" density is not good in the test boards shown in each of Examples D to E.

[0087] In the manufacturing flowchart shown in FIG. 4, for example, assume that the test substrate shown in Example A is prepared as the test substrate (S101). In this case, the "BPD" density in the buffer layer is identified by the test method established in this embodiment (S102). As a result, as shown in Table 2, the "BPD" density in the buffer layer is determined to be 0.46 cm -2 In other words, in the test substrate shown in Example A, the "BPD" density in the buffer layer is 5 cm -2 Therefore, the buffer layer for the product substrate is formed under the same film formation conditions A as those used to form the buffer layer on the test substrate shown in Example A (S104). This makes it possible to manufacture high-quality product substrates with a low BPD density in the buffer layer of the product substrate.

[0088] In the manufacturing flowchart shown in FIG. 4, for example, assume that the test substrate shown in Example B is prepared as the test substrate (S101). In this case, the "BPD" density in the buffer layer is identified by the test method established in this embodiment (S102). As a result, as shown in Table 2, the "BPD" density in the buffer layer is determined to be 1.90 cm -2 In other words, in the test substrate shown in Example B, the "BPD" density in the buffer layer is 5 cm -2Therefore, the buffer layer of the product substrate is formed under the same conditions as the film formation conditions B when forming the buffer layer on the test substrate shown in Example B (S104). This makes it possible to manufacture a high-quality product substrate with a low "BPD" density in the buffer layer of the product substrate.

[0089] In the manufacturing flow chart shown in FIG. 4, for example, assume that the test substrate shown in Example C is prepared as the test substrate (S101). In this case, the "BPD" density in the buffer layer is identified by the test method established in this embodiment (S102). As a result, as shown in Table 2, the "BPD" density in the buffer layer is determined to be 0.02 cm -2 In other words, in the test substrate shown in Example C, the "BPD" density in the buffer layer is 5 cm -2 Therefore, the buffer layer for the product substrate is formed under the same film-forming conditions as those used in forming the buffer layer on the test substrate shown in Example C (S104). This makes it possible to manufacture a high-quality product substrate with a low "BPD" density in the buffer layer of the product substrate.

[0090] In the manufacturing flow chart shown in FIG. 4, for example, assume that the test substrate shown in Example D is prepared as the test substrate (S101). In this case, the "BPD" density in the buffer layer is identified by the test method established in this embodiment (S102). As a result, as shown in Table 2, the "BPD" density in the buffer layer is determined to be 5.82 cm -2 In other words, in the test substrate shown in Example D, the "BPD" density in the buffer layer is 5 cm -2 This is the end (S103). Therefore, if the buffer layer of the product substrate is formed under the same conditions as the film-forming conditions D used when forming the buffer layer on the test substrate shown in Example D, there is a risk that the product substrate will have a high "BPD" density in the buffer layer. For this reason, in this case, the buffer layer of the product substrate is not formed under the film-forming conditions D. Then, a new test substrate is prepared having a buffer layer formed under new film-forming conditions different from the film-forming conditions D (S101). Thereafter, the steps of the manufacturing flowchart shown in FIG. 4 are repeated.

[0091] In the manufacturing flow chart shown in FIG. 4, for example, assume that the test substrate shown in Example E is prepared as the test substrate (S101). In this case, the "BPD" density in the buffer layer is identified by the test method established in this embodiment (S102). As a result, as shown in Table 2, the "BPD" density in the buffer layer is determined to be 9.74 cm -2 In other words, in the test substrate shown in Example E, the "BPD" density in the buffer layer is 5 cm -2 This is the end (S103). Therefore, if the buffer layer of the product substrate is formed under the same conditions as the deposition condition E used when forming the buffer layer on the test substrate shown in Example E, there is a risk that the product substrate will have a high "BPD" density in the buffer layer. For this reason, in this case, the buffer layer of the product substrate is not formed under the deposition condition E. Then, a new test substrate is prepared having a buffer layer formed under new deposition conditions different from the deposition condition E (S101). Thereafter, the steps of the manufacturing flowchart shown in FIG. 4 are repeated.

[0092] In this way, when the test substrates shown in Examples A to C are used, the buffer layer of the product substrate is formed under the same conditions as any of Film Forming Conditions A to C. This makes it possible to manufacture high-quality product substrates with a low "BPD" density in the buffer layer of the product substrate. In contrast, when the test substrates shown in Examples D to E are used, the buffer layer of the product substrate is not formed under Film Forming Conditions D and E. This makes it possible to prevent the manufacture of low-quality product substrates with a high "BPD" density.

[0093] From the above, a product substrate having the following configuration can be manufactured. (1) A product substrate comprising a silicon carbide substrate, a buffer layer formed on the silicon carbide substrate, and a drift layer formed on the buffer layer, wherein the basal plane dislocation density in the buffer layer is 0 cm -2 Above 5cm -2 is less than. (2) The dopant concentration of the buffer layer is 3×1017 cm -3 Above and 1 x 10 19 cm -3 The following is the result. (3) The density of "BPD" in the buffer layer is determined by the inspection method of this embodiment. (4) The dopant concentration of the buffer layer is higher than the dopant concentration of the drift layer.

[0094] <<Technical significance of the manufacturing flowchart shown in Figure 4>> Next, the technical significance of the manufacturing flowchart shown in FIG. 4 will be explained.

[0095] For example, it is conceivable to directly inspect the "BPD" density of the buffer layer in a product substrate using the inspection method established in this embodiment, without using a substrate for inspection.

[0096] In this regard, the inspection method established in this embodiment can exhibit excellent detection accuracy when the buffer layer thickness is approximately 10 μm. That is, the inspection method established in this embodiment uses excitation light having a wavelength of 313 nm. The penetration depth of this excitation light is approximately 10 μm. In other words, when the buffer layer thickness is approximately 10 μm, the excitation light can be irradiated only within the buffer layer. In other words, when the buffer layer thickness is approximately 10 μm, the excitation light does not reach the silicon carbide substrate below the buffer layer. Therefore, according to the inspection method established in this embodiment, when the buffer layer thickness is approximately 10 μm, the influence of photoluminescence light caused by "BPDs" in the silicon carbide substrate can be reduced (reduction of noise components). That is, it is believed that the inspection method established in this embodiment can detect the "BPD" density in the buffer layer with high accuracy when the buffer layer thickness is approximately 10 μm.

[0097] The design value of the buffer layer thickness in a product substrate varies depending on the performance required for the semiconductor device. For example, the buffer layer thickness is designed to a different value depending on the breakdown voltage required for the semiconductor device. For example, the buffer layer thickness of a product substrate is approximately 0.5 μm or more and 10 μm or less. Therefore, when directly inspecting the "BPD" density of a buffer layer in a product substrate using the inspection method established in this embodiment, a buffer layer thinner than approximately 10 μm may be inspected. In this case, the excitation light having a wavelength of 313 nm reaches the silicon carbide substrate disposed below the buffer layer. As a result, the influence of photoluminescence light caused by "BPD" in the silicon carbide substrate increases, making it difficult to detect the "BPD" density in the buffer layer with high accuracy.

[0098] Therefore, as an approach to devising the manufacturing process in this embodiment, the manufacturing flowchart shown in FIG. 4 is adopted. Specifically, a method is adopted in which the "BPD" density of the buffer layer in a product substrate is indirectly inspected by inspecting a test substrate using the inspection method established in this embodiment. Specifically, a buffer layer formed on a silicon carbide substrate as the test substrate has a thickness of approximately 10 μm, and the "BPD" density of the buffer layer in this test substrate is inspected. In this case, since the buffer layer has a thickness of approximately 10 μm, the "BPD" density in the buffer layer can be inspected with high accuracy using the inspection method established in this embodiment. If the inspection results show that the "BPD" density in the buffer layer in the test substrate is low, a product substrate having a buffer layer of a predetermined thickness is manufactured using the same film-forming conditions as those used to form the buffer layer of this test substrate. This allows the manufacture of high-quality product substrates having a buffer layer with a low "BPD" density. Thus, the technical significance of adopting the manufacturing flowchart shown in Fig. 4 is that it makes it possible to manufacture high-quality product substrates having a buffer layer with a stable low "BPD" density, regardless of the thickness of the buffer layer in the product substrate. In other words, by indirectly inspecting the product substrate through inspection of the test substrate, it provides a technical idea that can maximize the performance of the inspection method established in this embodiment, regardless of the thickness of the buffer layer formed on the product substrate, and therefore the technical significance of adopting the manufacturing flowchart shown in Fig. 4 is great.

[0099] For the above reasons, it is important to use a test substrate when adopting the manufacturing flowchart shown in Fig. 4. This test substrate is characterized by having, for example, either the following configuration (1) or (2). (1) A test substrate used to identify the film formation conditions when forming a buffer layer of a product substrate, in which the thickness of the buffer layer of the test substrate is thicker than the thickness of the buffer layer of the product substrate. (2) A test substrate used to identify the film formation conditions when forming a buffer layer on a product substrate, in which the thickness of the buffer layer on the test substrate is greater than 0.5 μm.

[0100] <Approach using a new buffer layer structure> The inspection method established in this embodiment allows evaluation of the "BPD" density of the buffer layer. Therefore, for a novel buffer layer structure, the "BPD" density of the buffer layer in this novel structure can be evaluated. Therefore, by using the inspection method established in this embodiment, it is possible to evaluate whether a novel buffer layer structure is useful for realizing a high-quality laminated substrate having a buffer layer with a low "BPD" density. In other words, the inspection method established in this embodiment is useful in that it allows evaluation of a novel buffer layer structure.

[0101] In this embodiment, a laminated substrate capable of reducing the "BPD" density in the buffer layer is realized by an approach that utilizes an established inspection method and adopts a new structure for the buffer layer. Below, it will be described how a laminated substrate capable of reducing the "BPD" density in the buffer layer can be realized by an approach that adopts a new structure for the buffer layer.

[0102] <<Background of the study>> The laminated substrate has a silicon carbide substrate, a buffer layer, and a drift layer. The buffer layer is formed on the silicon carbide substrate. The drift layer is formed on the buffer layer. The dopant concentration (nitrogen concentration) of the silicon carbide substrate is, for example, 5×10 18 cm -3 Above and 1 x 10 19 cm -3 The dopant concentration (nitrogen concentration) of the buffer layer is, for example, 1×10 18 cm -3 The dopant concentration (nitrogen concentration) of the drift layer is, for example, 1×10 15 cm -3 That's it, and 3 x 10 16 cm-3 It is about the following.

[0103] Here, the buffer layer has the function of suppressing defect growth from the silicon carbide substrate to the drift layer. The buffer layer also has the function of capturing holes (positive holes) flowing in from the drift layer when a current is applied to the semiconductor device, thereby preventing the holes from reaching the silicon carbide substrate. That is, the buffer layer has the function of suppressing the expansion of "SSF" due to "BPD" present in the silicon carbide substrate. In other words, the buffer layer has the function of suppressing "bipolar degradation phenomenon." To fully utilize this function, it is desirable to reduce "BPD" in the buffer layer.

[0104] As mentioned above, the dopant concentration of the buffer layer is typically 1×10 18 cm -3 The dopant concentration (nitrogen concentration) of the silicon carbide substrate is, for example, 5×10 18 cm -3 Above and 1 x 10 19 cm -3or less. As such, the difference between the dopant concentration of the buffer layer and the dopant concentration of the silicon carbide substrate is small. This means that the difference in lattice constant at the interface between the buffer layer and the silicon carbide substrate is small. Therefore, the amount of strain at the interface between the buffer layer and the silicon carbide substrate is small. As a result, the inventors speculate that the conversion efficiency of "BPD" in the silicon carbide substrate to harmless "TED" in the buffer layer decreases. Therefore, in order to reduce "BPD" in the buffer layer, it is important to improve the conversion efficiency from "BPD" to "TED." In this regard, considering the inventors' speculation (knowledge) described above, it is speculated that the "BPD" density in the buffer layer is closely related to the difference between the dopant concentration of the buffer layer and the dopant concentration of the silicon carbide substrate. Therefore, the inspection method established in this embodiment was used to evaluate the relationship between the dopant concentration of the buffer layer and the "BPD" density in the buffer layer. Specifically, the inspection method established in this embodiment is suitable for inspection of a configuration in which the buffer layer has a thickness of about 10 μm. For this reason, we evaluated the relationship between the dopant concentration of the buffer layer and the BPD density in the buffer layer using a sample in which a 10 μm-thick buffer layer was formed on a silicon carbide substrate. In particular, we evaluated the relationship between the dopant concentration of the buffer layer and the BPD density in the buffer layer by changing the dopant concentration of the buffer layer.

[0105] As a result, the dopant concentration in the buffer layer was 3×10 16 cm -3It has been found that when the dopant concentration in the buffer layer is below 0.5, the "BPDs" in the buffer layer almost disappear. According to the present inventors' speculation, this is due to the fact that the difference in lattice constant at the interface between the buffer layer and the silicon carbide substrate increases as the difference between the dopant concentration in the buffer layer and the dopant concentration in the silicon carbide substrate increases. In other words, the amount of strain at the interface between the buffer layer and the silicon carbide substrate increases due to the increase in the difference in lattice constant. The present inventors speculate that this improves the conversion efficiency of the "BPDs" in the silicon carbide substrate to harmless "TEDs" in the buffer layer. Therefore, in order to reduce the "BPD" density in the buffer layer, it is desirable to lower the dopant concentration in the buffer layer. However, according to the inventors' investigations, lowering the dopant concentration in the buffer layer reveals room for improvement. Below, we will explain the room for improvement that becomes apparent when the dopant concentration in the buffer layer is lowered.

[0106] <<Consideration for improvement>> As mentioned above, lowering the dopant concentration in the buffer layer can reduce the "BPD" density within the buffer layer. Meanwhile, increasing the dopant concentration of the buffer layer shortens the hole carrier lifetime within the buffer layer, thereby suppressing forward current degradation. Therefore, lowering the dopant concentration of the buffer layer increases the hole carrier lifetime within the buffer layer, thereby reducing the function of suppressing forward current degradation. Furthermore, lowering the dopant concentration of the buffer layer increases the on-resistance of the semiconductor device, which leads to a decrease in semiconductor device performance. Furthermore, the increased on-resistance increases Joule heat, raising concerns about a decrease in semiconductor device reliability.

[0107] As described above, with regard to the dopant concentration in the buffer layer, there is a trade-off between reducing the "BPD" density in the buffer layer and suppressing forward current degradation and on-resistance increase. Therefore, a new structure that achieves both the trade-off between reducing the "BPD" density in the buffer layer and suppressing forward current degradation and on-resistance increase is desired. Therefore, below, we will describe a new structure that achieves both the reduction of the "BPD" density in the buffer layer and suppressing forward current degradation and on-resistance increase.

[0108] <<New structure for buffer layer>> FIG. 5 is a diagram showing the configuration of a multilayer substrate 1A having a buffer layer with a novel structure.

[0109] 5, the laminated substrate 1A has a silicon carbide substrate 10, a buffer layer 21, and a drift layer 22. The buffer layer 21 is composed of a low-concentration buffer layer 21A and a high-concentration buffer layer 21B. The low-concentration buffer layer is formed on the silicon carbide substrate 10. The high-concentration buffer layer 21B is formed on the low-concentration buffer layer 21A. The drift layer 22 is formed on the high-concentration buffer layer 21B. Nitrogen is introduced as an n-type dopant into each of the silicon carbide substrate 10, the buffer layer 21, and the drift layer 22.

[0110] The second dopant concentration of the low-concentration buffer layer 21A is lower than the first dopant concentration of the silicon carbide substrate 10. The third dopant concentration of the high-concentration buffer layer 21B is higher than the second dopant concentration of the low-concentration buffer layer 21A and lower than the first dopant concentration of the silicon carbide substrate 10. The fourth dopant concentration of the drift layer 22 is lower than the third dopant concentration of the high-concentration buffer layer 21B. For example, the first dopant concentration of the silicon carbide substrate 10 is 5×10 18 cm -3 Above and 1 x 10 19 cm -3 The second dopant concentration of the low-concentration buffer layer 21A is, for example, 1×10 14 cm -3 Above and 1 x 1016 cm -3 Furthermore, the second dopant concentration of the low-concentration buffer layer 21A may be, for example, 1×10 15 cm -3 Above and 1 x 10 16 cm -3 The second dopant concentration of the low-concentration buffer layer 21A may be less than 1×10. Note that a lower second dopant concentration results in a higher resistance value. Therefore, when it is important to suppress an increase in the resistance value, the second dopant concentration of the low-concentration buffer layer 21A is set to be lower than the first dopant concentration of the silicon carbide substrate 10, and is set to be less than 1×10. 16 cm -3 The third dopant concentration of the high-concentration buffer layer 21B is preferably 1×10 17 cm -3 For example, the third dopant concentration of the high-concentration buffer layer 21B is 1×10 17 cm -3 Above and 5 x 10 18 cm -3 The third dopant concentration of the high-concentration buffer layer 21B is preferably 3×10 17 cm -3 That's it, and 3 x 10 18 cm -3 The third dopant concentration of the high-concentration buffer layer 21B is more preferably 5×10 17 cm -3 That's it, and 2 x 10 18 cm -3 The fourth dopant concentration of the drift layer 22 is more preferably 1×10 15 cm -3 That's it, and 3 x 10 16 cm -3 is less than.

[0111] The laminated substrate 1A configured in this manner has a buffer layer 21 consisting of a low-concentration buffer layer 21A and a high-concentration buffer layer 21B. In this specification, the buffer layer 21 consisting of the low-concentration buffer layer 21A and the high-concentration buffer layer 21B may be referred to as a "two-stage buffer structure." This "two-stage buffer structure" is a buffer layer with a novel structure.

[0112] In the "two-stage buffer structure," a low-concentration buffer layer 21A having a low dopant concentration is formed on the silicon carbide substrate 10. This increases the difference between the dopant concentration of the low-concentration buffer layer 21A and the dopant concentration of the silicon carbide substrate 10. This increases the difference in lattice constant at the interface between the low-concentration buffer layer 21A and the silicon carbide substrate 10. As a result, the amount of strain at the interface between the low-concentration buffer layer 21A and the silicon carbide substrate 10 increases due to the increased difference in lattice constant. This is thought to improve the conversion efficiency of BPDs in the silicon carbide substrate 10 into harmless TEDs in the buffer layer 21. From the above, it can be seen that the "two-stage buffer structure" allows the BPD density in the buffer layer 21 to be reduced due to the presence of the low-concentration buffer layer 21A.

[0113] Furthermore, in the "two-stage buffer structure," a high-concentration buffer layer 21B is formed on a low-concentration buffer layer 21A. This shortens the hole carrier lifetime in the high-concentration buffer layer 21B, thereby suppressing forward current degradation. Furthermore, by providing the low-resistance high-concentration buffer layer 21B, an increase in the resistance of the buffer layer 21, which is made up of the low-concentration buffer layer 21A and the high-concentration buffer layer 21B, can be suppressed. This makes it possible to suppress an increase in the on-resistance of the semiconductor device. In other words, with the "two-stage buffer structure," the presence of the high-concentration buffer layer 21B can suppress forward current degradation and reduce the on-resistance.

[0114] Note that if the low-concentration buffer layer 21A is too thick, it may lead to forward current degradation and an increase in on-resistance. For this reason, in order to suppress forward current degradation and reduce on-resistance, it is desirable that the high-concentration buffer layer 21B be thicker than the low-concentration buffer layer 21A. In other words, it is desirable that the low-concentration buffer layer 21A be thinner than the high-concentration buffer layer 21B.

[0115] From the above, the "two-stage buffer structure" has a low-concentration buffer layer 21A formed on silicon carbide substrate 10 and a high-concentration buffer layer 21B formed on low-concentration buffer layer 21A, and thereby can achieve both a reduction in the "BPD" density in buffer layer 21 and suppression of forward current degradation and suppression of an increase in on-resistance, which are in a trade-off relationship with each other.

[0116] <<Verification results>> Below, we will explain the verification results that show that the "two-stage buffer structure" can reduce the "BPD" density in the buffer layer.

[0117] As described above, the inspection method established in this embodiment is suitable for a buffer layer with a thickness of about 10 μm. This allows the BPD density in the buffer layer to be detected with high accuracy. The sample was used to evaluate the "BPD" density in the high-concentration buffer layer. Based on the inspection method established in the embodiment, the dopant concentration and thickness of the low concentration buffer layer are measured. Instead, the "BPD" density in the high-concentration buffer layer was evaluated.

[0118] The sample includes a silicon carbide substrate, a low-concentration buffer layer formed on the silicon carbide substrate, and a high-concentration buffer layer formed on the low-concentration buffer layer. The dopant concentration (nitrogen concentration) of the silicon carbide substrate is 5×10 18 cm -3 Above and 1 x 10 19 cm -3 The dopant concentration (nitrogen concentration) of the low concentration buffer layer is 1×10 16 cm -3 or 3×10 16 cm -3 The dopant concentration (nitrogen concentration) of the high-concentration buffer layer is 1×10 18 cm -3The thickness of the low-concentration buffer layer was varied within the range of 0 to 1.16 μm. In this way, the "BPD" density in the high-concentration buffer layer was evaluated using multiple samples in which the dopant concentration and thickness of the low-concentration buffer layer were varied.

[0119] FIG. 6 is a graph showing the evaluation results of the "BPD" density in the high-concentration buffer layer.

[0120] In FIG. 6, the dopant concentration of the low-concentration buffer layer is 1×10 16 cm -3 or 3×10 16 cm -3 In both cases, it was confirmed that the BPD density in the high-concentration buffer layer could be reduced. In particular, when the dopant concentration in the low-concentration buffer layer was 1×10 16 cm -3 or 3×10 16 cm -3 In either case, by making the thickness of the low-concentration buffer layer 0.46 μm or more, the "BPD" density in the high-concentration buffer layer can be reduced to 1 cm -2 Furthermore, it was confirmed that the dopant concentration of the low-concentration buffer layer can be reduced to less than 1×10 16 cm -3 or 3×10 16 cm -3 In either case, by making the thickness of the low-concentration buffer layer 0.46 μm or more, the "BPD" density in the high-concentration buffer layer can be reduced to 0.1 cm -2 From the above, it was confirmed that the dopant concentration in the low-concentration buffer layer can be reduced to less than 1×10 16 cm -3 That's it, and 3 x 10 16 cm -3 (2) It is desirable that the thickness of the low concentration buffer layer is 0.46 μm or more. This reduces the basal plane dislocation density of the high concentration buffer layer to 0 cm -2 Above 1cm -2A laminated substrate with a thickness of less than 1 μm can be realized. However, if the thickness of the low-concentration buffer layer is too thick, the hole carrier lifetime will be longer, which may lead to deterioration of forward current conduction and an increase in on-resistance. Therefore, it is desirable that the thickness of the low-concentration buffer layer be 0.46 μm or more and less than 1 μm.

[0121] The invention made by the inventor has been specifically described above based on the embodiments thereof, but it goes without saying that the present invention is not limited to the above-described embodiments and can be modified in various ways without departing from the spirit of the invention. [Explanation of symbols]

[0122] 1. Laminated substrate 10 Silicon carbide substrate 10a Top 10b Bottom side 20 Silicon carbide epitaxial layer 21 Buffer layer 21A Low concentration buffer layer 21B High concentration buffer layer 22 Drift Layer

Claims

1. a silicon carbide substrate having a first dopant concentration; a low-concentration buffer layer formed on the silicon carbide substrate and having a second dopant concentration lower than the first dopant concentration; a high-concentration buffer layer formed on the low-concentration buffer layer and having a third dopant concentration higher than the second dopant concentration and lower than the first dopant concentration; a drift layer formed on the high-concentration buffer layer and having a fourth dopant concentration lower than the third dopant concentration; A laminated substrate comprising:

2. The laminated substrate according to claim 1 , The thickness of the low concentration buffer layer is thinner than the thickness of the high concentration buffer layer.

3. The laminated substrate according to claim 2, The thickness of the low concentration buffer layer is 0.46 μm or more and less than 1 μm.

4. The laminated substrate according to claim 1 , The first dopant concentration is 5×10 １８ cm －３ That's it, and 1 x 10 １９ cm －３ is as follows: The second dopant concentration is 1×10 １４ cm －３ That's all, The third dopant concentration is 1×10 １７ cm －３ That's all, The fourth dopant concentration is 1×10 １５ cm －３ That's it, and 3 x 10 １６ cm －３ is less than.

5. The laminated substrate according to claim 1 , The basal plane dislocation density of the high concentration buffer layer is 0 cm －２ Above and 1 cm －２ is less than.

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