Method for controlling high-frequency power supply system

Abstract

The power value of the reflected wave power on the first power supply side is reduced in both the second power supply ON period and the second power supply OFF period.SOLUTION: A high-frequency power supply system according to the present disclosure includes a first power supply, a second power supply, and a first matching device. The first power source 1 performs frequency-modulation control during the second power-on period, and performs frequency-offset control for outputting a traveling-wave voltage F1 having a fundamental frequency F3 obtained by adding an offset frequency to the fundamental frequency VF3 during the second power-off period. The fundamental frequency Z11 in the second power-off period is set by searching for the optimum value of the initial phase angle α of the modulated signal and searching for the offset frequency Fos at which the difference between the reflectance coefficient ρ 11 or the load-side impedance Z12 and the reflectance coefficient ρ 12 or the load-side impedance F3 corresponding to the center 81 of the locus 80 is minimized.SELECTED DRAWING: Figure 14

Description

[Technical Field]

[0001] The present disclosure relates to a method for controlling a high frequency power supply system. [Background technology]

[0002] For example, a high-frequency power supply system used in a plasma processing apparatus has two high-frequency power supplies (a first power supply and a second power supply), each of which outputs a high-frequency voltage (traveling wave voltage) with a different fundamental frequency (the frequency of the fundamental wave) to a load. For example, the first power supply supplies high-frequency power (first traveling wave power) to the load by outputting a high-frequency voltage (traveling wave voltage VF1) having a fundamental frequency F1 suitable for generating plasma. The second power supply supplies high-frequency power (second traveling wave power) to the load by outputting a high-frequency voltage (traveling wave voltage VF2) having a fundamental frequency F2 (fundamental frequency F1 > fundamental frequency F2) suitable for ion acceleration (see Patent Documents 1 to 3).

[0003] A first matching box is provided between the first power supply and the load, and impedance matching on the first power supply side is performed by adjusting the value of an internal variable element (e.g., the capacitance value of a variable capacitor) so that the power value of the reflected wave power at the output end of the first power supply (the input end of the first matching box) is reduced.A second matching box is provided between the second power supply and the load, and impedance matching on the second power supply side is performed by adjusting the value of an internal variable element (e.g., the capacitance value of a variable capacitor) so that the power value of the reflected wave power at the output end of the second power supply (the input end of the second matching box) is reduced. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Special Publication No. 2018-536295 [Patent Document 2] Japanese Patent Application Laid-Open No. 2017-188434 [Patent Document 3] U.S. Patent No. 10,304,669 [Patent Document 4] Japanese Patent Publication No. 2022-102688 [Patent Document 5] Patent No. 6312405 Summary of the Invention [Problem to be solved by the invention]

[0005] In the above configuration, intermodulation distortion (hereinafter referred to as IMD) occurs. As a result, a phenomenon occurs in which the reflected wave power fluctuates according to the period of the fundamental frequency F2 on the first power supply side. To reduce the power value of the reflected wave power caused by this IMD, a technique is known in which the first power supply performs frequency modulation control.

[0006] However, this technology is a technology for reducing the power value of the reflected power when IMD occurs, and therefore, when the first power supply outputs the forward wave voltage VF1 and the second power supply performs pulse modulation in which it repeats an ON operation in which it outputs the forward wave voltage VF2 and an OFF operation in which it does not output the forward wave voltage VF2, it is not possible to sufficiently reduce the power value of the reflected power. That is, during the second power supply ON period when the second power supply is ON, IMD occurs, so the power value of the reflected wave power can be reduced by performing frequency modulation control. However, during the second power supply OFF period when the second power supply is OFF, the forward wave voltage VF2 is not output, so IMD does not occur. Therefore, if the output of the first power supply is frequency modulated even during the second power supply OFF period, the power value of the reflected wave power will actually increase.

[0007] Furthermore, since the output state of the second power supply is significantly different between the second power supply ON period and the second power supply OFF period, the matching operation of the first matching box alone cannot reduce the power value of the reflected wave power on the first power supply side during both the second power supply ON period and the second power supply OFF period, because the time required for the matching operation of the first matching box is longer than the cycle time of the pulse modulation.

[0008] Furthermore, when the first power supply performs frequency modulation control, it is necessary to determine in advance the optimal values ​​of the initial phase and frequency deviation used for the modulated signal (values ​​that minimize the power value of the reflected wave power), but the matching operation of the first matching box may have an adverse effect, making it impossible to appropriately determine the initial phase and frequency deviation used for the modulated signal.As a result, even if frequency modulation control is performed during the second power supply ON period, the power value of the reflected wave power may not be reduced sufficiently.

[0009] The present invention has been made in consideration of the above, and aims to provide a control method for a high-frequency power supply system that reduces the power value of the reflected wave power on the first power supply side during both the second power supply ON period and the second power supply OFF period when, while the first power supply outputs a forward wave voltage VF1, the second power supply performs pulse modulation that repeats an ON operation in which it outputs a forward wave voltage VF2 and an OFF operation in which it does not output the forward wave voltage VF2. [Means for solving the problem]

[0010] A method for controlling a high frequency power supply system according to the present disclosure includes: The high frequency power supply system comprises: a second power source capable of outputting a second traveling wave voltage having a second fundamental frequency lower than a predetermined first fundamental frequency, and performing pulse modulation by repeating an ON operation in which the second traveling wave voltage is output and an OFF operation in which the second traveling wave voltage is not output; a first power supply capable of outputting a first traveling wave voltage having the first fundamental frequency, performing frequency modulation control to frequency-modulate the first traveling wave voltage with a modulation signal having the same frequency as the second fundamental frequency during a second power supply ON period in which the ON operation is performed, and performing frequency offset control to output a third traveling wave voltage having a third fundamental frequency obtained by adding an offset frequency to the first fundamental frequency during a second power supply OFF period in which the OFF operation is performed; a first matching box connected between the first power supply and a load, the first matching box performing a first matching operation to match an impedance on the first power supply side with an impedance on the load side; It has a step of causing the first matching device to perform a first matching operation after power supply from the first power source and the second power source to a load is started, and stopping the first matching operation when the first matching operation is completed; searching for an initial phase of the modulated signal at which a reflection coefficient or a load side impedance at an output end of the first power supply, which is calculated during the second power supply ON period, is optimal within a search range while the first matching operation of the first matching device is stopped; searching for a frequency shift or a frequency shift gain that optimizes a reflection coefficient or a load side impedance at an output end of the first power supply, the reflection coefficient or the load side impedance being calculated during a second power supply ON period, within a search range, while the first matching operation of the first matching device is stopped; and searching for an offset frequency at which a reflection coefficient or a load side impedance at an output end of the first power supply, which is calculated during the second power supply OFF period, is optimal within a search range while the first matching operation of the first matching device is stopped, The initial phase of the modulated signal that is optimal within the search range is the initial phase at which the average value of the absolute value of the difference between the average value of the reflection coefficient or the load side impedance at the output terminal of the first power supply acquired for each initial phase to be searched and the instantaneous value of the reflection coefficient or the load side impedance at the output terminal of the first power supply acquired for each initial phase to be searched is the smallest, or the initial phase at which the absolute value of the reflection coefficient or the power value of the reflected wave power at the output terminal of the first power supply calculated during the second power supply ON period is the smallest within the search range, The frequency shift or frequency shift gain that is optimal within the search range is the frequency shift or frequency shift gain at which the average value of the difference between the average value of the reflection coefficient or the load side impedance at the output end of the first power supply obtained for each frequency shift to be searched and the instantaneous value of the reflection coefficient or the load side impedance at the output end of the first power supply obtained for each frequency shift to be searched is the smallest, or the frequency shift or frequency shift gain at which the absolute value of the reflection coefficient or the power value of the reflected wave power at the output end of the first power supply calculated during the second power supply ON period is the smallest within the search range, The optimum offset frequency value within the search range is The offset frequency is the frequency at which the difference between the average value of the reflection coefficient or the load side impedance at the output terminal of the first power supply calculated during the second power supply ON period and the average value of the reflection coefficient or the load side impedance at the output terminal of the first power supply calculated during the second power supply OFF period is minimized when the initial phase is set to the optimal initial phase and the frequency deviation or frequency deviation gain is set to the optimal initial phase. [Effects of the Invention]

[0011] According to the high frequency power supply system of the present invention, the power value of the reflected power on the first power supply side can be reduced during both the second power supply ON period and the second power supply OFF period, i.e., the absolute value of the reflection coefficient on the first power supply side can be reduced. [Brief explanation of the drawings]

[0012] [Figure 1] FIG. 1 is a diagram showing the configuration of a high-frequency power supply system 90. As shown in FIG. [Figure 2] FIG. 2 is a diagram showing the relationship between the forward wave voltage VF2 and the forward wave voltage VF1 with respect to the synchronization pulse signal. [Figure 3] FIG. 3 is a diagram showing an example of the configuration of the phase reset signal generating unit 46. As shown in FIG. [Figure 4] FIG. 4 is a diagram for explaining a method for generating a phase reset signal. [Figure 5] FIG. 5 is an image diagram of a basic modulated signal that is the source of a modulated signal. [Figure 6] FIG. 6 is an image diagram of a modulated signal. [Figure 7] FIG. 7 is a diagram showing the relationship between the modulated signal and the traveling wave voltage VF1. [Figure 8] FIG. 8 is a diagram showing an example of the configuration of the modulation signal generating unit 10. As shown in FIG. [Figure 9] FIG. 9 is a diagram showing an example (part 1) of a flowchart when frequency modulation control and frequency offset control are performed. [Figure 10] FIG. 10 is a diagram showing an example (part 2) of a flowchart when frequency modulation control and frequency offset control are performed. [Figure 11] FIG. 11 is a diagram showing an example (part 1) of the reflection coefficient ρ1 or the load side impedance Z1. [Figure 12] FIG. 12 is a diagram showing an example (part 2) of the reflection coefficient ρ1 or the load side impedance Z1. [Figure 13] FIG. 13 is a diagram showing an example (part 3) of the reflection coefficient ρ1 or the load side impedance Z1. [Figure 14] FIG. 14 is a diagram for explaining the offset frequency search process. [Figure 15] FIG. 15 is a diagram showing an example of the reflection coefficient or the load-side impedance when the first matching operation is performed after the offset frequency search step is completed. DETAILED DESCRIPTION OF THE INVENTION

[0013] Hereinafter, an embodiment of a high-frequency power supply system 90 according to the present disclosure will be described with reference to the drawings.

[0014] FIG. 1 is a diagram showing the configuration of a high-frequency power supply system 90. As shown in FIG. The high frequency power supply system 90 is a device that supplies high frequency power to a load (for example, a plasma processing apparatus PA) by outputting a high frequency voltage in the RF (Radio Frequency) band.

[0015] Such a high-frequency power supply system 90 includes, for example, a first power source 1, a second power source 2, and a superposition matching box 5. The superposition matching box 5 also includes a first matching box 3, a second matching box 4, and an output unit 51. The first power source 1 and the second power source 2 each output high-frequency voltages with different fundamental frequencies (frequencies of fundamental waves) to a load.

[0016] In this specification, the fundamental frequency of the first power source 1 is referred to as fundamental frequency F1 (an example of a first fundamental frequency), the fundamental frequency of the second power source 2 is referred to as fundamental frequency F2 (an example of a second fundamental frequency), and the frequency obtained by adding the offset frequency Fos to the fundamental frequency F1 is referred to as fundamental frequency F3 (an example of a third fundamental frequency).

[0017] Furthermore, the high-frequency voltage output from the first power supply 1 and directed toward the load is referred to as the forward wave voltage VF1 (an example of the first forward wave voltage), the high-frequency voltage reflected from the load side and returning to the first power supply 1 is referred to as the reflected wave voltage VR1, the high-frequency power output from the first power supply 1 and directed toward the load is referred to as the forward wave power PF1, and the high-frequency power reflected from the load side and returning to the first power supply 1 is referred to as the reflected wave power PR1.

[0018] Furthermore, the high-frequency voltage output from the second power supply 2 and directed toward the load is referred to as the forward wave voltage VF2 (an example of a second forward wave voltage), the high-frequency voltage reflected from the load side and returning to the second power supply 2 is referred to as the reflected wave voltage VR2, the high-frequency power output from the second power supply 2 and directed toward the load is referred to as the forward wave power PF2, and the high-frequency power reflected from the load side and returning to the second power supply 2 is referred to as the reflected wave power PR2.

[0019] In addition, the power value of the forward power PF1 is the forward power value pf1, the power value of the reflected power PR1 is the reflected power value pr1, the power value obtained by subtracting the reflected power value pr1 from the forward power value pf1 is the load side power value pl1 (not shown), the power value of the forward power PF2 is the forward power value pf2, the power value of the reflected power PR2 is the reflected power value pr2, and the power value obtained by subtracting the reflected power value pr2 from the forward power value pf2 is the load side power value pl2 (not shown).

[0020] In this specification, the reflection coefficient expressed as the ratio of the reflected wave voltage to the forward wave voltage (reflected wave voltage / forward wave voltage) is defined as ρ, and the absolute value (magnitude) of the reflection coefficient ρ is defined as Γ. Also, subscripts are used as necessary to indicate corresponding parts. For example, "1" is used for the system of first power supply 1 and first matching box 3, "2" for the system of second power supply 2 and second matching box 4, "g" for the system relating to first power supply 1, and "m" for the system relating to first matching box 3.

[0021] The first power supply 1 supplies a forward power PF1 to the load by outputting a forward voltage VF1 having a fundamental frequency F1. At this time, feedback control is performed so that the forward power value pf1 becomes the target power value p0. Note that feedback control can also be performed so that the load side power value p11 becomes the target power value p0, but this will not be explained below.

[0022] The traveling wave voltage VF1 has a relatively high fundamental frequency F1 suitable for generating plasma. The fundamental frequency F1 is, for example, 40.68 MHz. Of course, the fundamental frequency F1 is not limited to 40.68 MHz and may be, for example, a frequency in the industrial RF band, such as 13.56 MHz or 27.12 MHz. Furthermore, as will be described later, the first power supply 1 is configured to perform frequency modulation control and frequency offset control.

[0023] The second power supply 2 supplies the load with second forward power by outputting a forward voltage VF2 having a fundamental frequency F2 lower than the fundamental frequency F1. At this time, feedback control is performed so that the forward power value pf2 becomes the target power value. Note that there is also a case where feedback control is performed so that the load side power value p12 becomes the target power value, but this will not be explained below. The traveling wave voltage VF2 has a relatively low fundamental frequency F2 suitable for accelerating ions. The fundamental frequency F2 is, for example, 400 kHz. Of course, the fundamental frequency F2 is not limited to 400 kHz and may be another frequency. The second power supply 2 is configured to perform pulse modulation that repeats, at a predetermined cycle, an ON operation in which the second power supply 2 outputs the forward wave voltage VF2 and an OFF operation in which the second power supply 2 does not output the forward wave voltage VF2. Here, the period in which the second power supply 2 performs the ON operation is referred to as a second power supply ON period, and the period in which the second power supply 2 performs the OFF operation is referred to as a second power supply OFF period.

[0024] During the second power supply ON period, IMD occurs because the first power supply 1 outputs the traveling wave voltage VF1 and the second power supply 2 outputs the traveling wave voltage VF2. However, during the second power supply OFF period, the first power supply 1 outputs the traveling wave voltage VF1 but the second power supply 2 does not output the traveling wave voltage VF2, so IMD does not occur. The second power supply 2 is switched between ON and OFF based on, for example, a synchronization signal. The synchronization signal is used to perform control corresponding to the second power supply ON period and the second power supply OFF period. The second power supply 2 may perform pulse modulation by repeating ON and OFF operations without inputting a synchronization signal. In this case, the second power supply 2 may generate a synchronization signal equivalent to the synchronization pulse signal and output it to the first power supply 1 and the superimposed matching device 5. Alternatively, the synchronization signal may be generated in the second matching device 4 of the superimposed matching device 5. In this case, the second matching device 4 may generate a synchronization signal equivalent to the synchronization pulse signal and output it to the first power supply 1.

[0025] The superposition matching box 5 is electrically connected between the first power supply 1, the second power supply 2, and the lower electrode EL1 of the plasma processing apparatus PA (an example of a load), for example. The superposition matching box 5 also includes a first matching box 3, a second matching box 4, and an output unit 51.

[0026] The plasma processing apparatus PA, which is an example of a load, is, for example, a parallel plate type, and a lower electrode EL1 and an upper electrode EL2 face each other in a chamber CH. A substrate SB to be processed can be placed on the lower electrode EL1. The first power supply 1 and the second power supply 2 are electrically connected to the lower electrode EL1 via a superposition matching box 5. The upper electrode EL2 is electrically connected to ground potential. The chamber CH is connected to a gas supply device (not shown) via an air supply pipe and to a vacuum device (not shown) via an exhaust pipe.

[0027] The external control device 61 is a device that issues various commands (such as power ON) and conditions such as a target power value to the high-frequency power supply system 90. It also has a function of acquiring and monitoring data such as the forward power value pf1 calculated by the first power source 1. The synchronization pulse generating unit 62 generates a synchronization pulse signal as an example of a synchronization signal and supplies it to the first power supply 1, the second power supply 2, and the superposition matching unit 5. The synchronization pulse signal is a two-level rectangular wave pulse signal that corresponds to the pulse modulation period of the second power supply 2, as shown in FIG. 2, which will be described later. For example, the time when the synchronization pulse signal is at the first level may be defined as the second power supply ON period, and the time when the synchronization pulse signal is at the second level may be defined as the second power supply OFF period. Typically, the first level is greater than the second level. For example, the first level is "1" and the second level is "0."

[0028] Although the above example shows the use of the synchronization pulse signal output by the synchronization pulse generator 62 as an example of the synchronization signal, other synchronization signals may also be used. For example, a synchronization signal generated by the second power supply 2 or the second matching box 4 may be used. This is because the second power supply 2 knows its own pulse modulation period and can generate a synchronization signal. Also, the second matching box 4 can obtain the pulse modulation period of the second power supply 2 based on information about the traveling wave voltage VF2 detected by the second matching box 4.

[0029] Furthermore, the synchronization signal does not have to be a signal corresponding to each of the second power-on period and the second power-off period. For example, it may be a pulse signal corresponding to the start of the second power-on period. In this case, although there is no signal corresponding to the second power-off period, the duration of the second power-on period and the second power-off period is known, so the start timing of the second power-off period can be recognized.

[0030] <Outline of Operation of High-Frequency Power Supply System 90> The traveling wave voltage VF1 output from the first power supply 1 is supplied to the lower electrode EL1 of the plasma processing apparatus PA via the first matching box 3 and the output unit 51. The traveling wave voltage VF2 output from the second power supply 2 is supplied to the lower electrode EL1 of the plasma processing apparatus PA via the second matching box 4 and the output unit 51. That is, in this embodiment, the traveling wave voltages VF1 and VF2 are superimposed in the output unit 51 inside the superimposed matching box 5 and supplied to the lower electrode EL1. As a result, the plasma processing apparatus PA generates a plasma PL between the lower electrode EL1 and the upper electrode EL2. Furthermore, the superimposed matching box 5 performs a first matching operation in the first matching box 3 to match the impedance on the first power supply 1 side with the impedance on the load side, and also performs a second matching operation in the second matching box 4 to match the impedance on the second power supply 2 side with the impedance on the load side.

[0031] The high-frequency power supply system 90 and the plasma processing apparatus PA are not limited to the configuration shown in Fig. 1. For example, there are various configurations, such as a configuration in which the superposition matching box 5 does not have the output unit 51 for superposing the traveling wave voltage VF1 and the traveling wave voltage VF2, and the traveling wave voltage VF1 output from the first power supply 1 is supplied to the upper electrode EL2 (which is not electrically connected to the ground potential in this case, unlike in Fig. 1) via the first matching box 3, and the traveling wave voltage VF2 output from the second power supply 2 is supplied to the lower electrode EL1 via the second matching box 4. The high-frequency power supply system 90 of this embodiment can also be used in such other configurations.

[0032] As described above, when multiple traveling wave voltages with different levels of fundamental frequency are supplied to a load from the first power source 1 and the second power source 2, the effect of IMD occurs, causing the reflected wave power value pr1 detected on the first power source 1 side to fluctuate according to the fundamental period (period of the fundamental wave) on the second power source 2 side. In this case, the reflected wave power value pr1 is relatively large. Therefore, in order to reduce the absolute value of the reflection coefficient Γ1 on the first power source 1 side, the first power source 1 performs frequency modulation control and frequency offset control, and the first matching box 3 performs a matching operation to match the impedance on the first power source 1 side with the impedance on the load side.

[0033] FIG. 2 is a diagram showing the relationship between the forward wave voltage VF2 and the forward wave voltage VF1 with respect to the synchronization pulse signal. FIG. 2(a) is an example of a synchronization pulse signal, FIG. 2(b) is an example of a traveling wave voltage VF2, and FIG. 2(c) is an example of a traveling wave voltage VF1.

[0034] As shown in Fig. 2(a), the synchronization pulse signal is a rectangular pulse signal that alternates between a first level and a second level. As shown in Fig. 2(b), the second power supply 2 performs an ON operation when the synchronization pulse signal is at the first level, and therefore outputs a traveling wave voltage VF2. On the other hand, the second power supply 2 performs an OFF operation when the synchronization pulse signal is at the second level, and therefore does not output the traveling wave voltage VF2.

[0035] As described above, the second power supply 2 performs its ON operation during the second power supply ON period and its OFF operation during the second power supply OFF period. Therefore, IMD occurs during the second power supply ON period but not during the second power supply OFF period. Therefore, the first power supply 1 performs frequency modulation control during the second power supply ON period and frequency offset control during the second power supply OFF period. Therefore, the fundamental frequency of the traveling wave voltage VF1 of the first power supply 1 differs between the second power supply ON period and the second power supply OFF period, as shown in FIG. 2(c). However, the amplitude of the traveling wave voltage VF1 of the first power supply 1 is the same between the second power supply ON period and the second power supply OFF period, as shown in FIG. 2(c).

[0036] 2(c) is an example of the traveling wave voltage VF1 after the modulation parameter search process of frequency modulation control and the offset frequency search process of frequency offset control, which will be described later, are completed. In addition, in FIG. 2(c), as can be seen from the fact that frequency modulation is performed, the frequency is increased at the beginning and end of the second power-on period and decreased at the center, but this is not limiting.

[0037] <Details of the first power supply 1> During the second power-on period, the first power supply 1 performs frequency modulation control, in which the traveling wave voltage VF1 is frequency-modulated with a modulation signal having a frequency F2 that is the same as the second fundamental frequency. Also, during the second power-off period, the first power supply 1 performs frequency offset control, in which the first power supply 1 outputs a traveling wave voltage VF3 having a fundamental frequency F3 obtained by adding an offset frequency Fos to the fundamental frequency F1. As an example of frequency offset control, the offset frequency Fos may be 0 Hz. In other words, frequency offset control may not be performed. Even in this case, there is an effect because there is no adverse effect caused by performing frequency modulation control during the second power-off period. For example, if it is known that the offset frequency Fos is sufficient at 0 Hz, there is no need to perform the offset frequency search process.

[0038] The configuration of the first power source 1 will be described below with reference to FIG. The first power supply 1 has a first power supply communication unit 11, a modulating signal generation unit 10, a modulated signal generation unit 12, an amplitude adjustment unit 13, an amplifier unit 14, a first power supply sensor 15, a power information calculation unit 16, a target power setting unit 18, a subtraction unit 19, and a power control unit 20. In the first power supply 1, the parts that perform calculation processing and signal processing can be configured with, for example, a CPU (Central Processing Unit), an FPGA (Field Programmable Gate Array), a storage medium such as a memory, etc. Furthermore, the operation of each part can be controlled according to a control program pre-stored in a ROM (Read Only Memory), etc., and processing such as input / output, calculation, and time measurement can be performed. The first power supply 1 also includes a base clock generating part (not shown), and processing is performed at each control cycle based on a clock signal output from the base clock generating part.

[0039] The first power supply communication unit 11 receives the synchronization pulse signal output by the synchronization pulse generation unit 62 as a synchronization signal, and outputs it to the modulation signal generation unit 10, the power information calculation unit 16, and the target power setting unit 18. It can also communicate with the first matching box 3 and the second matching box 4. For example, it can receive an initial phase search command from the first matching box 3.

[0040] The first power supply communication unit 11 is also capable of communicating with an external control device 61. For example, it can input information such as a target power value p0 from the external control device 61 and output it to the target power setting unit 18. It can also output, for example, the forward wave power value pf1 and the reflected wave power value pr1 calculated by the power information calculation unit 16 to the external control device 61. The external control device 61 can utilize the input information for monitoring, etc. Additionally, it is possible to transmit and receive information to and from the first matching device 3 and the second matching device 4, but a description thereof will be omitted.

[0041] The modulating signal generating unit 10 generates a modulating signal having the same frequency as the fundamental frequency F2 and outputs it to the modulated signal generating unit 12. The modulating signal is a signal for determining the frequency of the traveling wave voltage VF1 output from the first power supply 1, and has waveform information corresponding to the ON operation and OFF operation of the second power supply 2. This modulating signal will be described later. The modulating signal generating unit 10 can recognize the second power supply ON period and the second power supply OFF period based on the synchronization signal output from the first power supply communication unit 11.

[0042] The modulated signal generator 12 outputs a modulated signal in which the initial phase α, frequency deviation Fd, and offset frequency Fos have been adjusted based on the frequency information indicated by the modulating signal. The modulated signal generator 12 can use, for example, a DDS (Direct Digital Synthesizer).

[0043] The modulated signal has a waveform similar to that shown in Figure 2(c), and is a waveform that alternates between periods of frequency modulation and periods of constant frequency. That is, the modulated signal has a constant amplitude, but is frequency modulated by the modulating signal during the second power-on period, and is a waveform signal whose frequency is offset by the modulating signal during the second power-off period. Note that the modulated signal has a waveform similar to that of the traveling wave voltage VF1 in Figure 2(c), so is represented as an analog waveform signal, but is actually digital data, and data is generated and output for each control cycle.

[0044] The amplitude adjustment unit 13 receives the modulated signal output from the modulated signal generation unit 12 and the amplitude adjustment signal output from the power control unit 20. Then, it adjusts the amplitude of the modulated signal based on the amplitude adjustment signal and outputs it as a forward wave voltage initial signal VF1ini to the amplification unit 14. As a result, the amplitude of the forward wave voltage VF1 is changed so that the forward wave power value pf1, which is the power value of the first forward wave power PF output from the first power supply 1 (amplification unit 14), becomes the target power value p0 set in the target power setting unit 18, which will be described later. The forward wave voltage initial signal VF1ini output from the amplitude adjustment unit 13 is actually digital data, and the data is generated and output for each control period. In addition, a D / A converter (not shown) is provided between the amplitude adjustment unit 13 and the amplification unit 14.

[0045] The amplifier 14 amplifies the forward wave voltage initial signal VF1ini output from the amplitude adjuster 13 and outputs it as the forward wave voltage VF1. The waveform of this forward wave voltage VF1 has the same waveform as the modulated signal output from the modulated signal generator 12. Of course, the modulated signal and the forward wave voltage VF1 have different amplitudes, but the same frequency.

[0046] That is, during the second power ON period, the first power supply 1 performs frequency modulation control to modulate the traveling wave voltage VF1 with a modulation signal having the same frequency as the fundamental frequency F2 (400 kHz in this embodiment), and during the second power OFF period, performs frequency offset control to output the traveling wave voltage VF3 having a fundamental frequency F3 obtained by adding an offset frequency Fos to the fundamental frequency F1. Also, a filter that removes harmonic components and the like may be provided upstream of the amplifier 14. Also, a filter that removes harmonic components and the like may be provided downstream of the amplifier 14.

[0047] The first power supply sensor 15 is provided at the output end of the first power supply 1, and passes the forward wave voltage VF1 output from the amplifier 14 and outputs it to the first matching box 3 of the superposition matching box 5. The first power supply sensor 15 also detects the forward wave voltage VF1 output from the amplifier 14, and outputs the detected signal as a forward wave voltage detection signal vf1g to the power information calculation unit 16. The first power supply sensor 15 also detects a reflected wave voltage VR1 reflected from the load side and returning to the first power supply 1, and outputs the detected signal as a reflected wave voltage detection signal vr1g to the power information calculation unit 16.

[0048] An A / D converter (not shown) is provided between the first power supply sensor 15 and the power information calculation unit 16.

[0049] The power information calculation unit 16 inputs the forward wave voltage detection signal vf1g and the reflected wave voltage detection signal vr1g output from the first power supply sensor 15, and calculates the forward wave power value pf1 and the reflected wave power value pr1 based on the input signals. Furthermore, the reflection coefficient absolute value Γ1 can be calculated based on the calculated forward wave power value pf1 and reflected wave power value pr1. Furthermore, the reflection coefficient ρ1 can be calculated based on the forward wave voltage detection signal vf1g and the reflected wave voltage detection signal vr1g.

[0050] (1) Forward wave power value pf1 The power information calculation unit 16 calculates the forward power value pf1 based on the input forward voltage detection signal vf1g. For example, the power information calculation unit 16 squares the input forward voltage detection signal vf1g, then uses a low-pass filter (e.g., an IIR filter) that extracts desired components to remove information about unnecessary frequency components, and further multiplies the signal by a constant for conversion to the forward power value pf1 to calculate the forward power value pf1. The forward power value pf1 can be calculated, for example, from the forward voltage detection signal vf1g^2 / R (R: gain corresponding to the resistance value). The calculated forward power value pf1 is output to the modulation signal generation unit 10 and the subtraction unit 19.

[0051] Of course, the calculation method is not limited to the above. For example, a moving average value over a predetermined period may be used. Alternatively, an average value over a predetermined period may be used. In short, it is sufficient to calculate information related to the forward power value pf1. In the following explanation, the forward power value pf1 will be simply referred to as the forward power value pf1, including cases where processing such as calculating a moving average value or an average value is performed.

[0052] In addition, the forward wave power value pf1 calculated based on the forward wave voltage detection signal vf1g detected during the second power ON period is set to the forward wave power value pf11, the forward wave power value pf1 calculated based on the forward wave voltage detection signal vf1g detected during the second power OFF period is set to the forward wave power value pf12, and the forward wave power value pf1 calculated based on the forward wave voltage detection signal vf1g detected during both the second power ON period and the second power OFF period is set to the forward wave power value pf13.

[0053] Furthermore, the forward wave power value pf1 is output to the modulation signal generating unit 10 and the subtracting unit 19, which will be described later, but these may be different from each other. For example, the conditions of the low-pass filters may be different.

[0054] (2) Reflected wave power value pr1 The power information calculation unit 16 calculates the reflected wave power value pr1 based on the input reflected wave voltage detection signal vr1g. For example, the power information calculation unit 16 squares the input reflected wave voltage detection signal vr1g, then uses a low-pass filter (e.g., an IIR filter) that extracts desired components to remove information about unnecessary frequency components, and then multiplies the signal by a constant for conversion to the reflected wave power value pr1 to calculate the reflected wave power value pr1. The reflected wave power value pr1 can be calculated, for example, using the reflected wave voltage detection signal vr1g^2 / R (R: gain equivalent to the resistance value). The calculated reflected wave power value pr1 is output to the modulation signal generation unit 10.

[0055] Of course, the calculation method is not limited to the above. For example, a moving average value over a predetermined period may be used. Alternatively, an average value over a predetermined period may be used. In short, it is sufficient to calculate information related to the reflected wave power value pr1. In the following explanation, the reflected wave power value pr1 will be simply referred to as the reflected wave power value pr1, including cases where processing such as calculating a moving average value or an average value is performed.

[0056] In addition, the reflected wave power value pr1 calculated based on the reflected wave voltage detection signal vr1g detected during the second power ON period is set to the reflected wave power value pr11, the reflected wave power value pr1 calculated based on the reflected wave voltage detection signal vr1g detected during the second power OFF period is set to the reflected wave power value pr12, and the reflected wave power value pr1 calculated based on the reflected wave voltage detection signal vr1g detected during both the second power ON period and the second power OFF period is set to the reflected wave power value pr13.

[0057] (3) Absolute reflection coefficient Γ1 The power information calculation unit 16 calculates the reflection coefficient absolute value Γ1 based on the forward wave power value pf1 and the reflected wave power value pr1. The reflection coefficient absolute value Γ1 can be calculated, for example, by √(reflected wave power value pr1 / forward wave power value pf1). The calculated reflection coefficient absolute value Γ1 is output to the modulation signal generation unit 10.

[0058] Of course, the calculation method is not limited to the above. For example, a moving average value over a predetermined period may be used. Alternatively, an average value over a predetermined period may be used. In short, it is sufficient to calculate information related to the reflection coefficient absolute value Γ1. In the following explanation, the term "reflection coefficient absolute value Γ1" will be used simply, including cases where processing such as calculating a moving average value or an average value is performed.

[0059] In addition, the absolute reflection coefficient value Γ1 calculated based on the forward power value pf1 and reflected power value pr1 detected during the second power ON period is defined as the absolute reflection coefficient value Γ11, the absolute reflection coefficient value Γ1 calculated based on the forward power value pf1 and reflected power value pr1 detected during the second power OFF period is defined as the absolute reflection coefficient value Γ12, and the absolute reflection coefficient value Γ1 calculated based on the forward power value pf1 and reflected power value pr1 detected during both the second power ON period and the second power OFF period is defined as the absolute reflection coefficient value Γ13.

[0060] (4) Reflection coefficient ρ1, load impedance Z1 The power information calculation unit 16 calculates a reflection coefficient ρ1 based on the forward wave voltage detection signal vf1g and the reflected wave voltage detection signal vr1g. The reflection coefficient ρ1 can be calculated, for example, from the reflected wave voltage detection signal vr1m / forward wave voltage detection signal vf1m. The power information calculation unit 16 can also calculate a load side impedance Z1 that can be converted to or from the reflection coefficient ρ1. The calculated reflection coefficient ρ1 and load side impedance Z1 are output to the modulation signal generation unit 10.

[0061] Moreover, the reflection coefficient ρ1 calculated during the second power-on period is set as the reflection coefficient ρ11, and the load side impedance Z1 calculated during the second power-on period is set as the load side impedance Z11. Moreover, the reflection coefficient ρ1 calculated during the second power-off period is set as the reflection coefficient ρ12, and the load-side impedance Z1 calculated during the second power-off period is set as the load-side impedance Z12.

[0062] Furthermore, the reflection coefficient ρ1 calculated during both the second power ON period and the second power OFF period is defined as the reflection coefficient ρ13, and the load side impedance Z1 calculated during both the second power ON period and the second power OFF period is defined as the load side impedance Z13.

[0063] Among the output values ​​calculated by the power information calculation unit 16, such as the forward power value pf1, those that are not used in the subsequent process may not be calculated.

[0064] The target power setting unit 18 presets a target power value p0 as a target value for the forward power value pf1. The target power setting unit 18 outputs the target power value p0 to the subtraction unit 19.

[0065] The subtractor 19 subtracts the forward power value pf1 from the target power value p0, and outputs the subtraction result to the power controller 20 as error information Δpf.

[0066] The power control unit 20 generates an amplitude adjustment signal for controlling the amplitude of the forward voltage initial signal VF1ini in accordance with the error information Δpf and outputs the signal to the amplitude adjustment unit 13. This makes it possible to determine the amplitude of the forward voltage initial signal VF1ini. That is, by adjusting the magnitude of the amplitude adjustment signal, it is possible to adjust the amplitude of the forward voltage VF1, and therefore the forward power value pf1.

[0067] For example, if the target power value p0 is 1,000 [W] and the forward power value pf1 is 950 [W], which is 50 [W] short of the target power value p0, the power control unit 20 determines and outputs the magnitude of the amplitude adjustment signal so as to increase the forward power value pf1 supplied to the load by 50 [W]. For controlling the amplitude of the forward voltage initial signal VF1ini in this way, known methods such as PI control and PID control can be used.

[0068] In addition, since the target power setting unit 18 can output a target power value p01 for the second power ON period and a target power value p02 for the second power OFF period, it is also possible to control the power value by distinguishing between the second power ON period and the second power OFF period.

[0069] <Details of the superposition matcher 5> The superposition matching box 5 has a first matching box 3, a second matching box 4, and an output section 51. The first matching box 3 is electrically connected, for example, between the first power supply 1 and the lower electrode EL1. The second matching box 4 is electrically connected, for example, between the second power supply 2 and the lower electrode EL1. The first matching box 3 performs a first matching operation, and the second matching box 4 performs a second matching operation.

[0070] <1st matching box 3> The first matching device 3 includes a first-side communication unit 31, a first-side sensor 32, a first-side matching circuit 33, a first-side calculation unit 34, and a first-side control unit 35. In the first matching device 3, the parts that perform calculation processing and signal processing can be configured with, for example, a CPU (Central Processing Unit), an FPGA (Field Programmable Gate Array), a storage medium such as a memory, etc. Furthermore, the operation of each part can be controlled according to a control program pre-stored in a ROM (Read Only Memory), etc., and processing such as input / output, calculation, and time measurement can be performed. The first matching device 3 also includes a base clock generating unit (not shown), and processing is performed at each control period based on a clock signal output from the base clock generating unit.

[0071] The first-side communication unit 31 receives the synchronization pulse signal output by the synchronization pulse generation unit 62 as a synchronization signal, and outputs it to the first-side calculation unit 34 and the first-side control unit 35. The first-side communication unit 31 can also communicate with the first power source 1 and the second matching box 4. For example, the first-side communication unit 31 can output the reflection coefficient ρ1 calculated by the first matching box 3 to the first power source 1.

[0072] The first-side sensor 32 is provided at the input end of the first matching box 3, and detects information for calculating a load-side impedance Z1 when looking at the load side from the input end (equivalent to the output end of the first power supply 1) of the first matching box 3, or information for calculating a reflection coefficient ρ1 at the input end of the first matching box 3. The load-side impedance Z1 and the reflection coefficient ρ1 can be converted into each other, so either may be detected.

[0073] When calculating the load-side impedance Z1, for example, a voltage detector and a current detector are used as the first-side sensor 32. In this case, the voltage detector detects the voltage at the input end of the first matching box 3 and outputs a voltage detection signal v1 as its detection signal. Also, the current detector detects the current at the input end of the first matching box 3 and outputs a current detection signal i1 as its detection signal. The voltage detection signal v1 and the current detection signal i1 are output to the first-side calculation unit 34.

[0074] When calculating the reflection coefficient ρ1 at the input end of the first matching network 3, for example, a directional coupler is used as the first-side sensor 32. In this case, the first-side sensor 32 detects the forward wave voltage VF1 output from the first power supply 1 and outputs a forward wave voltage detection signal vf1m as its detection signal, and also detects the reflected wave voltage VR1 reflected back from the load side and outputs a reflected wave voltage detection signal vr1m as its detection signal. The forward wave voltage detection signal vf1m and the reflected wave voltage detection signal vr1m are output to the first-side calculator 34. An A / D converter (not shown) is provided between the first-side sensor 32 and the first-side calculation unit .

[0075] The first-side matching circuit 33 is provided between the first-side sensor 32 and the output unit 51. The first-side matching circuit 33 includes a variable element such as a variable capacitor (also called a variable condenser) whose capacitance can be changed, and changes the variable value of the variable element (capacitance in the case of a variable capacitor, inductance in the case of a variable inductor) in response to a command from the first-side control unit 35 (described later), thereby adjusting the load-side impedance Z1 as seen from the input end of the first matching device 3 to the load side. A variable inductor may be provided as the variable element. The first-side matching circuit 33 also includes a drive circuit (not shown) to change the capacitance of the variable element in response to a command from the first-side control unit 35.

[0076] In addition to the variable elements, there are many cases where an inductor with a fixed inductance is also provided, and there are also cases where a capacitor with a fixed capacitance is provided.

[0077] Such a first-side matching circuit 33 often uses a matching circuit such as a so-called inverted L type (also called L type) or π type.

[0078] There are various types of variable capacitors. For example, there is a type of variable capacitor that changes its capacitance by changing the distance between electrodes. There is also a type of variable capacitor that connects multiple capacitors in series with switches in parallel and changes the overall capacitance by changing the state (ON / OFF) of the switches. In this way, the type of variable capacitor is not limited.

[0079] The first-side calculation unit 34 calculates the reflection coefficient ρ1 or the load-side impedance Z1 based on the information output from the first-side sensor 32, and outputs it as first-side load information to the first-side control unit 35. The reflection coefficient ρ1 and the load-side impedance Z1 are information that represent the state of the load. The first-side calculation unit 34 may be provided with a filter on the input side to remove unnecessary signal components (e.g., harmonic components). In this case, the type of filter may be selected appropriately.

[0080] The reflection coefficient ρ1 can be calculated, for example, from the reflected wave voltage detection signal vr1m / forward wave voltage detection signal vf1m. The load side impedance Z1 can be calculated, for example, from the voltage detection signal v1 / current detection signal i1. The load side impedance Z1 can be calculated, for example, based on the magnitude of the voltage detection signal v1, the magnitude of the current detection signal i1, and the phase difference θ between the voltage detection signal v1 and the current detection signal i1. Since the methods for calculating the reflection coefficient ρ1 and the load side impedance Z1 are well known, a description thereof will be omitted.

[0081] Furthermore, since the reflection coefficient ρ1 and the load side impedance Z1 can be converted into each other, in order to simplify the explanation, in the following, the first side calculation unit 34 may only explain either the reflection coefficient ρ1 or the load side impedance Z1.

[0082] Furthermore, the reflection coefficient ρ1 calculated based on the information detected by the first side sensor 32 during the second power ON period is set to the reflection coefficient ρ11, and the load side impedance Z1 calculated based on the information detected by the first side sensor 32 during the second power ON period is set to the load side impedance Z11.

[0083] Furthermore, the reflection coefficient ρ1 calculated based on the information detected by the first side sensor 32 during the second power OFF period is set to the reflection coefficient ρ12, and the load side impedance Z1 calculated based on the information detected by the first side sensor 32 during the second power OFF period is set to the load side impedance Z12.

[0084] In addition, the reflection coefficient ρ1 calculated based on the information detected by the first side sensor 32 during both the second power ON period and the second power OFF period is set to the reflection coefficient ρ13, and the load side impedance Z1 calculated based on the information detected by the first side sensor 32 during both the second power ON period and the second power OFF period is set to the load side impedance Z13.

[0085] The first-side control unit 35 uses the first-side load information output from the first-side calculation unit 34 to output a command signal for controlling the variable value of the variable element in the first-side matching circuit 33 so that the absolute value Γ1 of the reflection coefficient ρ1 approaches the target reflection coefficient absolute value Γ0 (normally 0). In other words, it outputs a command signal for controlling the variable value of the variable element in the first-side matching circuit 33 so that the load-side impedance Z1 becomes the complex conjugate of the output impedance Z0 of the first power supply 1. For example, if the variable element provided in the first-side matching circuit 33 is a variable capacitor, it outputs a command signal for controlling the capacitance. More specifically, for example, it calculates the capacitance of the variable capacitor that is predicted to make the absolute value Γ1 of the reflection coefficient ρ1 closest to the target reflection coefficient absolute value Γ0, and outputs a command signal to a drive circuit that drives the variable capacitor so that the capacitance becomes that value.

[0086] The first-side control unit 35 repeatedly performs such control. As a result, when the absolute value Γ1 of the reflection coefficient ρ1 becomes equal to or less than a predetermined threshold, the first matching operation is deemed to be completed, and a completion notification indicating the completion of the first matching operation can be output to the first power source 1 via the first-side communication unit 31. There are many methods for such matching operation, as disclosed in, for example, Japanese Patent No. 3183914, Japanese Patent No. 4975291, Japanese Patent No. 6084417, Japanese Patent No. 6177012, Japanese Patent No. 6312405, Japanese Patent No. 7105185, Japanese Patent No. 7105184, Japanese Patent No. 7112952, Japanese Patent No. 6898338, Japanese Patent No. 6773283, etc., so it is only necessary to select an appropriate control method.

[0087] The first matching operation in the first matching device 3 is not limited to the above. For example, instead of automatic matching, the variable value of the variable element inside the first-side matching circuit 33 may be set to a predetermined variable value. The predetermined variable value may be determined, for example, by experiment or the like.

[0088] The second matching device 4 has a second-side communication unit 41, a second-side sensor 42, a second-side matching circuit 43, a second-side calculation unit 44, a second-side control unit 45, and a phase reset signal generation unit 46. Except for the phase reset signal generation unit 46, the components have different applicable frequencies and the like, but have the same functions as the first-side communication unit 31, the first-side sensor 32, the first-side matching circuit 33, the first-side calculation unit 34, and the first-side control unit 35 of the first matching device 3, and therefore their description will be omitted.

[0089] In addition, similar to the first side calculation unit 34, the second side calculation unit 44 calculates the reflection coefficient ρ2 or the load side impedance Z2 based on the information output from the second side sensor 42 (the reflected wave voltage detection signal vr2m and the forward wave voltage detection signal vf2m or the voltage detection signal v2 and the current detection signal i2), and outputs it to the second side control unit 45 as second side load information.

[0090] FIG. 3 is a diagram showing an example of the configuration of the phase reset signal generating unit 46. As shown in FIG. FIG. 4 is a diagram for explaining a method for generating a phase reset signal. The phase reset signal generating unit 46 includes a pulse converting unit 461 and a frequency dividing unit 462 .

[0091] The pulse converter 461 has a comparator and converts the sinusoidal traveling-wave voltage detection signal vf2m during the second power-on period into a rectangular signal using the comparator. For example, as shown in Fig. 4(a), by setting the amplitude of the traveling-wave voltage detection signal vf2m to High level when it exceeds the amplitude center and to Low level when it falls below the amplitude center, it is possible to generate a pulse signal corresponding to the traveling-wave voltage detection signal vf2m as shown in Fig. 4(b).

[0092] Note that, for example, the periods from timing t0 to t1, from timing t1 to t2, ..., and from timing t7 to t8 of the forward wave voltage detection signal vf2m each correspond to one cycle of the fundamental cycle of the second power supply 2. Furthermore, the periods from timing t0 to t8 and from timing t16 to t24 are second power supply ON periods, so the forward wave voltage detection signal vf2m can be detected, but the periods from timing t8 to t16 and from timing t24 to t32 are second power supply OFF periods, so the forward wave voltage detection signal vf2m cannot be detected.

[0093] The frequency division processing unit 462 divides the pulse signal having the fundamental frequency F2 by N (N is an integer equal to or greater than 2) to generate a phase reset signal having a pulse frequency of F2 / N. The phase reset signal generation unit 46 outputs the generated phase reset signal to the first power supply 1 via the second-side communication unit 41.

[0094] In this embodiment, since the fundamental frequency F2 is 400 kHz, when N=8, the pulse frequency F2 / N=400 kHz / 8=50 kHz, as shown in FIG. 4(c). This phase reset signal is a signal generated based on the actual forward wave voltage VF2, and is therefore a signal synchronized with the forward wave voltage VF2.

[0095] <About modulated signals> FIG. 5 is an image diagram of a basic modulated signal that is the source of a modulated signal. In Figure 5, the horizontal axis represents time and the vertical axis represents frequency. As shown in Figure 5, the modulated signal generating unit 10 first generates a sinusoidal signal having the same frequency as the fundamental frequency F2 as a fundamental modulated signal. At this time, as will be described later, an initial phase α is taken into consideration, and the waveform is shifted in the time axis direction by the initial phase α. The amplitude indicating the frequency shift Fd is, for example, ±1. This is because the amplitude is set and the waveform is adjusted in a subsequent process. Such a fundamental modulated signal can be generated, for example, by a DDS (Direct Digital Synthesizer).

[0096] FIG. 6 is an image diagram of a modulated signal. 6, the horizontal axis represents time and the vertical axis represents frequency, showing the change in the fundamental frequency of the first power supply 1 during the second power ON period and the second power OFF period. Note that although the modulated signal is shown as an analog waveform signal in FIG. 6, it is actually digital data, and data indicating frequency information is generated and output for each control period.

[0097] FIG. 7 is a diagram showing the relationship between the modulated signal and the traveling wave voltage VF1. FIG. 7(a) shows the waveform of one cycle of the modulated signal during the second power supply ON period, and FIG. 7(b) shows the waveform of the traveling wave voltage VF1 output from the first power supply 1 during the period corresponding to the modulated signal.

[0098] In the example of Fig. 6, the duty ratio of the pulse modulation is 50% (the duration of the second power ON period is the same as the duration of the second power OFF period), and the duration of the second power ON period and the duration of the second power OFF period are both 20µs. That is, the frequency of the pulse modulation is 1 / 40µs = 25kHz. The frequency of the modulated signal on the time axis is the same as the fundamental frequency F2 (400kHz in this embodiment).

[0099] 6 illustrates a case in which the fundamental frequency F1 of the first power supply 1 during the second power-on period is 40.68 MHz and the frequency deviation Fd is ±1.2 MHz. Therefore, during the second power-on period, the fundamental frequency F1 fluctuates within a range of ±1.2 MHz, centered around 40.68 MHz. Note that, although the frequency deviation Fd is ±1.2 MHz in the example of FIG. 6, it is not limited to this and can be adjusted within the specification range of the first power supply 1.

[0100] By adjusting this frequency shift Fd, the absolute value of the reflection coefficient Γ1 can be reduced. In other words, the reflected wave power value pr1 can be reduced. In this way, if the absolute value of the reflection coefficient Γ1 is reduced, the reflected wave power value pr1 also becomes smaller. Therefore, control can be performed based on either the absolute value of the reflection coefficient Γ1 or the reflected wave power value pr1.

[0101] In the example of FIG. 6, instead of maintaining the frequency deviation Fd at ±1.2 MHz throughout the entire second power-on period, the frequency deviation Fd is reduced at the start of the second power-on period, gradually increased over time, and finally set to ±1.2 MHz. Conversely, the frequency deviation Fd is gradually reduced at the end of the second power-on period. However, this is not a limitation, and for example, the frequency deviation Fd may be set to ±1.2 MHz throughout the entire second power-on period. In this way, the frequency deviation Fd can be set according to the situation.

[0102] 7 shows the waveform of the traveling wave voltage VF1 output from the first power supply 1 in a period corresponding to the modulation signal when the phase at the start of one cycle of the modulation signal (hereinafter referred to as the initial phase α) is 0 degrees. When there is a correspondence as shown in FIG. 7, the frequency of the traveling wave voltage VF1 at 0 degrees in one cycle of the modulation signal is high, the frequency of the traveling wave voltage VF1 at 180 degrees in one cycle of the modulation signal is low, and the frequency of the traveling wave voltage VF1 at 360 degrees in one cycle of the modulation signal is high.

[0103] However, by changing the value of the initial phase α, the waveform can be shifted in the time axis direction, and the correspondence can be changed. For example, if the initial phase α is set to 180 degrees, the correspondence can be changed so that the frequency of the traveling wave voltage VF1 at 0 degrees in one cycle of the modulated signal is low, the frequency of the traveling wave voltage VF1 at 180 degrees in one cycle of the modulated signal is high, and the frequency of the traveling wave voltage VF1 at 360 degrees in one cycle of the modulated signal is low. In practice, the initial phase α is used in the stage of generating the basic modulated signal described in FIG. 5, and the waveform is shifted in the time axis direction. The absolute value of the reflection coefficient Γ1 can also be reduced by adjusting this initial phase α.

[0104] That is, during the second power-on period, the reflection coefficient absolute value Γ1 (reflected wave power value pr1) can be reduced by adjusting the initial phase α and frequency shift Fd. Therefore, a modulation parameter search process is provided to search for optimal values ​​for the initial phase α and frequency shift Fd based on the reflection coefficient absolute value Γ1 or the reflected wave power value pr1. Then, frequency modulation control is performed during the second power-on period using the optimal values ​​for the initial phase α and frequency shift Fd obtained in this modulation parameter search process.

[0105] The above describes an example of adjusting the initial phase α and frequency shift Fd to reduce the reflection coefficient absolute value Γ1 (reflected wave power value pr1). However, as will be described later, the initial phase α and frequency shift Fd may also be adjusted to reduce the fluctuation range of the reflection coefficient ρ1 or the load side impedance Z1.

[0106] In the modulation parameter search process described above, for example, as shown in Patent Document 4 (JP 2022-102688 A), when the initial phase α (referred to as the "modulation start phase θ" in Patent Document 4) is changed in the range of 0 to 360 degrees, the initial phase α at which the reflection coefficient absolute value Γ1 or the reflected wave power value pr1 is smallest is searched for. In other words, the optimal value of the initial phase α is searched for. Hereinafter, this process will be referred to as the initial phase search process. Furthermore, when the frequency shift Fd (referred to as "modulation amount gain A" in Patent Document 4) is changed, the frequency shift Fd at which the reflection coefficient absolute value Γ1 or the reflected wave power value pr1 is smallest may be searched for. In other words, the optimum value of the frequency shift Fd may be searched for. Hereinafter, this process will be referred to as the frequency shift search process.

[0107] On the other hand, during the second power-off period, the fundamental frequency of the first power supply 1 is constant at 40.18 MHz. This 40.18 MHz is the fundamental frequency F1 (40.68 MHz) plus an offset frequency of −0.5 MHz (an example of the fundamental frequency F3). As described above, since IMD does not occur during the second power-off period, frequency modulation control, as in the second power-on period, is not performed. Instead, frequency offset control is performed to reduce the reflection coefficient absolute value Γ1 or the reflected wave power value pr1. In the example of FIG. 6, the offset frequency Fos is set to −0.5 MHz. However, because the optimal offset frequency Fos varies depending on the situation, an offset frequency search process is provided to search for the optimal value of the offset frequency Fos based on the reflection coefficient absolute value Γ1 or the reflected wave power value pr1. The optimal value of the offset frequency Fos obtained in this offset frequency search process is used to perform frequency offset control.

[0108] Next, the configuration of the modulated signal generating unit 10 will be described with reference to FIG. FIG. 8 is a diagram showing an example of the configuration of the modulation signal generating unit 10. As shown in FIG. 8, the modulation signal generation unit 10 includes a basic modulation signal generation unit 102, a frequency information output unit 103, an initial phase output unit 104, a frequency shift gain output unit 105, a multiplication unit 106, an offset frequency output unit 110, and a second power-off period waveform adjustment unit 120. A clock signal is also input to the modulation signal generation unit 10, and processing is performed for each control cycle based on the clock signal.

[0109] The fundamental modulation signal generation unit 102 is an electronic circuit that generates a fundamental modulation signal, which is the fundamental wave of the modulation signal. This fundamental modulation signal generation unit 102 can use, for example, a DDS (Direct Digital Synthesizer), and receives as input a clock signal, a phase reset signal, frequency information, and an initial phase α. As a result, the fundamental modulation signal generation unit 102 outputs a desired sine wave signal as a fundamental modulation signal for each control period.

[0110] The frequency information is information indicating the frequency of the fundamental modulation signal. The frequency of the fundamental modulation signal is the same as the fundamental frequency F2 of the traveling wave voltage VF2. In this embodiment, the frequency of the fundamental modulation signal is 400 kHz. In addition, the phase reset signal is output from the second matching box 4. When the phase reset signal is input, the basic modulation signal generation unit 102 resets the initial phase of the basic modulation signal to the initial phase α output from the initial phase output unit 104, and outputs a sine wave signal of the frequency (400 kHz) indicated by the frequency information as the basic modulation signal (see FIG. 5).

[0111] The phase interval of the basic modulation signal output from the basic modulation signal generation unit 102 differs depending on the control period of the first power supply 1. For example, if the first power supply 1 operates at a control period of 100 MHz, it is divided by 250 (100 MHz / 400 kHz), so frequency information for each phase interval of 1.44 degrees (360 degrees / 250) is output for each control period. If the first power supply 1 operates at a control period of 500 MHz, it is divided by 1250 (500 MHz / 400 kHz), so frequency information for each phase interval of 0.288 degrees (360 degrees / 1250) is output for each control period. The control period is set based on a clock signal output from a system clock (not shown).

[0112] <Purpose of the phase reset signal> Because the first power source 1 and the second power source 2 are separate devices, their control periods are determined based on separate clock signals. Because the separate clock signals have slightly different clock signal cycle times, a discrepancy occurs between the time recognized by the first power source 1 and the time recognized by the second power source 2. Therefore, each time a process is executed, the discrepancy between the time recognized by the first power source 1 and the time recognized by the second power source 2 accumulates and grows. It is desirable to eliminate this discrepancy before it becomes too large.

[0113] Specifically, due to the difference in clock signals, a discrepancy occurs between the time elapsed from the start timing of the second power-on period recognized by the first power supply 1 and the time elapsed from the start timing of the second power-on period recognized by the second power supply 2. When this happens, precise control becomes impossible.

[0114] Therefore, the phase reset signal is input to the basic modulation signal generating unit 102 of the first power supply 1 at a predetermined timing to eliminate the above-mentioned discrepancy.

[0115] As described above, the phase reset signal is generated based on the detection signal of the forward wave voltage VF2 detected by the second matching box 4, and therefore the accumulation of deviations as described above does not occur. Therefore, by using a phase reset signal generated based on the detection signal of the forward wave voltage VF2 detected by the second matching box 4, precise control can be performed, and the effect of reducing reflected wave power when frequency modulation control is performed can be improved.

[0116] It is preferable that the basic modulation signal generating unit 102 inputs a phase reset signal at least at the start timing of the second power-on period to eliminate the discrepancy.

[0117] The initial phase output unit 104 is set with an initial phase α at which modulation of the basic modulated signal should start, and outputs this initial phase α to the basic modulated signal generation unit 102. Note that the initial phase α is a phase difference from a reference phase (for example, 0 degrees). Furthermore, when an initial phase search command is input, the initial phase output unit 104 executes an initial phase search step, and sets the optimal value of the initial phase α searched for in this initial phase search step as a new initial phase α. To execute the initial phase search step, the initial phase output unit 104 receives information about the reflection coefficient absolute value Γ1 or information about the reflected wave power value pr1, and then sequentially changes the initial phase α to select the initial phase α that provides the smallest reflection coefficient absolute value Γ1 or reflected wave power value pr1. Alternatively, the initial phase α may be changed sequentially to obtain the reflection coefficient ρ1 or the load side impedance Z1, and the optimum value of the initial phase α may be selected based on the obtained reflection coefficient ρ1 or the load side impedance Z1.

[0118] A frequency deviation gain Gfd for increasing or decreasing the frequency deviation Fd of the fundamental modulated signal is set in the frequency deviation gain output unit 105, and the set frequency deviation gain Gfd is output to the multiplication unit . The frequency deviation Fd is the width of the frequency change in the frequency modulation of the fundamental frequency F1 of the first power supply 1, and the setting range is determined based on the specifications of the first power supply 1.

[0119] For example, if the specification for the frequency deviation Fd of the first power supply 1 is a maximum of ±1.2 MHz relative to the fundamental frequency F1, the frequency deviation gain Gfd is set so that the processing result in the multiplication unit 106 (described later) falls within the above range. In this embodiment, as shown in FIG. 5, the frequency deviation Fd of the fundamental modulation signal is set to ±1 MHz, so the frequency deviation gain Gfd is set by multiplying this ±1 MHz by a factor of 1. For example, if the frequency modulation range of the fundamental frequency F1 of the first power supply 1 is set to ±1.2 MHz, the frequency deviation gain Gfd should be set to 1.2.

[0120] Furthermore, when a frequency shift gain search command is input, the frequency shift gain output unit 105 executes a frequency shift search process, and sets the optimal value of the frequency shift gain Gfd found in the frequency shift search process as a new frequency shift gain Gfd. To execute the frequency shift search process, the frequency shift gain output unit 105 inputs the reflection coefficient absolute value Γ1 or the reflected wave power value pr1, and then sequentially changes the initial phase α to select the frequency shift gain Gfd that provides the smallest reflection coefficient absolute value Γ1 or the smallest reflected wave power value pr1. Alternatively, the frequency shift gain Gfd may be changed sequentially to obtain the reflection coefficient ρ1 or the load side impedance Z1, and the frequency shift Fd or the frequency shift gain Gfd may be selected based on the obtained reflection coefficient ρ1 or the load side impedance Z1.

[0121] Although the above example shows the search for the frequency shift gain Gfd, it is also possible to search for the frequency shift Fd. However, in this embodiment, as shown in FIG. 5, the frequency shift Fd of the fundamental modulation signal is set to ±1 MHz, so when the frequency shift Fd is searched for, the value converted into the frequency shift gain Gfd can be output to the multiplication unit 106, which will be described later. For example, if the optimal value of the frequency shift Fd is 1.2 MHz, the optimal value of the frequency shift gain Gfd is set to 1.2, and the frequency shift gain Gfd=1.2 can be output to the multiplication unit 106.

[0122] Multiplication unit 106 multiplies the frequency information indicated by the fundamental modulation signal by frequency shift gain Gfd for each control period, and outputs the multiplication result as an adjusted modulation signal for each control period to second power ON period waveform adjustment unit 120. The processing in this multiplication unit 106 determines the frequency shift Fd of the fundamental frequency F1 of first power supply 1.

[0123] The offset frequency output unit 110 is set with information about an offset frequency for offsetting the frequency information during the second power-off period. This information about the offset frequency Fos is output to the second power-off period waveform adjustment unit 120. In this embodiment, the offset frequency Fos is set to −0.5 MHz, as shown in FIG.

[0124] Furthermore, when an offset frequency search command is input, the offset frequency output unit 110 executes an offset frequency search step, and sets the optimal value of the offset frequency Fos searched for in this offset frequency search step as a new offset frequency Fos. To execute the offset frequency search process, the offset frequency output unit 110 inputs the reflection coefficient absolute value Γ1 or the reflected wave power value pr1, and then sequentially changes the offset frequency Fos to select the offset frequency Fos that provides the smallest reflection coefficient absolute value Γ1 or the smallest reflected wave power value pr1.

[0125] Alternatively, in order to execute the offset frequency search process, the offset frequency output unit 110 inputs the average value of the reflection coefficient ρ11 or the load side impedance Z11 at the output end of the first power supply 1 calculated during the second power ON period and the average value of the reflection coefficient ρ12 or the load side impedance Z12 at the output end of the first power supply 1 calculated during the second power OFF period, and selects the offset frequency Fos with the smallest difference between the two.

[0126] The second power-off period waveform adjustment unit 120 inputs, for each control cycle, frequency information indicated by the adjusted modulation signal, the synchronization pulse signal, and information on the offset frequency Fos output from the offset frequency output unit 110. The adjusted modulation signal is a signal obtained by applying an initial phase α and a frequency shift Fd to the basic modulation signal shown in FIG. 5, but does not distinguish between the second power-on period and the second power-off period, and does not apply the offset frequency Fos. Therefore, using the synchronization pulse signal and information on the offset frequency Fos, the second power-on period and the second power-off period are distinguished and the offset frequency Fos is applied. This allows the modulation signal shown in FIG. 6 to be generated.

[0127] <Flowchart> The frequency modulation control and frequency offset control of the first power supply 1 will be further explained below with reference to a flowchart.

[0128] 9 and 10 are diagrams showing an example of a flowchart when frequency modulation control and frequency offset control are performed. In addition, in FIGS. 9 and 10, a series of steps are divided into four steps. In each diagram, the steps are shown from top to bottom in the order of second power supply 2, second matching box 4, first matching box 3, and first power supply 1, starting from the left. It is also assumed that the second power supply ON period and the second power supply OFF period are the same length of time.

[0129] In step S1, the first power supply 1, the second power supply 2, the first matching box 3, and the second matching box 4 are on standby at their respective initial values.

[0130] In step S2, the first power supply 1 starts supplying forward power PF1 to the load, and the second power supply 2 starts supplying forward power PF2 to the load. This power supply continues thereafter. As a result, the first matching operation starts in the first matching device 3, and the second matching operation starts in the second matching device 4. At this time, the first matching device 3 performs the first matching operation based on the reflection coefficient ρ13 or the load-side impedance Z13 during both the second power-on period and the second power-off period. In other words, a matching operation based on a weighted average is performed.

[0131] The first matching box 3 and the second matching box 4 each perform a matching operation to reduce the reflected wave power to the maximum extent possible, and as a result, as shown in step S3, each matching operation is completed.

[0132] 11 is a diagram showing an example of a locus 80 of the reflection coefficient ρ1 or the load-side impedance Z1 at the time of completion of step S3 and its center 81 on a Smith chart. As shown in this example, the reflection coefficient ρ1 or the load-side impedance Z1 fluctuates within a certain range. Therefore, the center 81 of the locus 80 of the reflection coefficient ρ1 or the load-side impedance Z1 is considered to be a representative value, and the center 81 is controlled to approach the center of the Smith chart.

[0133] Also, as shown in FIG. 11, at this stage, the fluctuation range of the reflection coefficient ρ13 or the load side impedance Z13 is wide, and the center 81 of the locus 80 is far from the center of the Smith chart.

[0134] The second power supply 2 is configured to perform pulse modulation that repeats an ON operation in which the forward wave voltage VF2 is output and an OFF operation in which the forward wave voltage VF2 is not output at a predetermined period, so that IMD occurs during the ON period of the second power supply, and the reflected wave power PR1 on the first power supply 1 side increases.

[0135] At this point, frequency modulation control is not performed, and the initial phase α, frequency deviation Fd (set by the frequency deviation gain Gfd), and offset frequency Fos are not appropriate. Therefore, in order to find the optimal values ​​of these parameters, a modulation parameter search step and an offset frequency search step are executed. The modulation parameter search step includes an initial phase search step and a frequency deviation search step.

[0136] As shown in step S4, the first matching operation in the first matching device 3 is stopped. As a result, the first matching device 3 maintains the variable value of the variable element without changing it. Furthermore, as shown in step S5, it is determined to start frequency modulation. Thereafter, as shown in step S6, the first matching box 3 commands the first power supply 1 to start a modulation parameter search process and an offset frequency search process.

[0137] After receiving this command as shown in step S7, the first power supply 1 performs an operation to search for an optimal value for the initial phase α as shown in step S8. At this time, the first power supply 1 performs the initial phase search step based on the reflection coefficient absolute value Γ11 or the reflected wave power value pr11 during the second power-on period. Alternatively, the first power supply 1 may perform the initial phase search step based on the reflection coefficient ρ11 or the load side impedance Z11 during the second power-on period.

[0138] As shown in step S9, when the search for the optimum value of the initial phase α is completed, the first power supply 1 sets the optimum value of the initial phase α as a new initial phase α.

[0139] 12 is a diagram showing an example of a locus 80 of the reflection coefficient ρ1 or the load-side impedance Z1 at the completion of step S9 and its center 81 on a Smith chart. As shown in this example, by changing the initial phase α to an optimal value, the position of the center 81 of the locus 80 changes and the range of variation of the locus 80 becomes smaller. Of course, the change from FIG. 11 to FIG. 12 is an example to easily explain this embodiment, and the actual locus 80 will change into various shapes depending on the load conditions, etc.

[0140] Thereafter, the first power supply 1 performs an operation of searching for an optimal value of the frequency shift gain Gfd as shown in step S10. At this time, the first power supply 1 performs the frequency shift search step based on the reflection coefficient absolute value Γ11 or the reflected wave power value pr11 during the second power-on period. As described above, the first power supply 1 may perform the initial phase search step based on the reflection coefficient ρ11 or the load side impedance Z11 during the second power-on period.

[0141] As shown in step S11, when the search for the optimum value of the frequency deviation gain Gfd is completed, the first power supply 1 sets the optimum value of the frequency deviation gain Gfd as a new frequency deviation gain Gfd.

[0142] 13 is a Smith chart showing an example of a locus 80 of the reflection coefficient ρ1 or the load-side impedance Z1 at the completion of step S11 and its center 81. As shown in this example, the range of variation of the locus 80 is narrowed by changing the frequency shift gain Gfd to an optimal value. Of course, the change from FIG. 12 to FIG. 13 is an example to easily explain this embodiment, and the actual locus 80 will take various shapes depending on the load conditions, etc.

[0143] <Relationship between the initial phase search process, frequency deviation search process, and frequency modulation control> Here, the relationship between the initial phase search process, the frequency deviation search process, and the frequency modulation control will be described. As described above, when searching for the initial phase α in the initial phase search step, frequency modulation control is performed. In addition, in this embodiment, the first power supply 1 performs frequency modulation control during the second power supply ON period, modulating the traveling wave voltage VF1 with a modulation signal having the same frequency as the fundamental frequency F2 (400 kHz in this embodiment). Therefore, when changing the initial phase α, it is sufficient to change the value every cycle time of the fundamental frequency F2 (2.5 μs in this embodiment).

[0144] For example, the initial phase α is set to 0 degrees, and the absolute reflection coefficient value Γ1 or the reflected power value pr1 is acquired over a period of 2.5 μs. Then, the initial phase α is set to 1 degree, and the absolute reflection coefficient value Γ1 or the reflected power value pr1 is acquired over a period of 2.5 μs. This process can be performed each time the initial phase α is changed (e.g., every 1 degree) within the range of change of the initial phase α (e.g., 0 to 360 degrees). In this way, the absolute reflection coefficient value Γ1 or the reflected power value pr1 can be acquired for each initial phase α, taking into account fluctuations over one period of frequency modulation. Of course, this is not limited to the above, and the initial phase α may be changed every integer multiple of the period of the fundamental frequency F2 (every integer multiple of 2.5 μs in this embodiment). Furthermore, the acquired absolute reflection coefficient value Γ1 or the reflected power value pr1 may be averaged, and the calculated average value may be used as the absolute reflection coefficient value Γ1 or the reflected power value pr1 for each initial phase α.

[0145] By calculating the average value, it is possible to obtain the average value of the reflection coefficient absolute value Γ1 or the reflected wave power value pr1 during one cycle of frequency modulation. That is, it is possible to obtain the reflection coefficient absolute value Γ1 or the reflected wave power value pr1 corresponding to the center 81 of the locus 80 of the reflection coefficient ρ1 or the load side impedance Z1 described later in FIG. 11 and the like.

[0146] Of course, when changing the initial phase α, it is not necessary to change the initial phase α every integer multiple of the cycle time of the fundamental frequency F2. For example, the initial phase α may be changed every time sufficiently longer than the cycle time of the fundamental frequency F2 (e.g., approximately 100 times the cycle time of the fundamental frequency F2). Although an error occurs because the initial phase α is not an integer multiple of the cycle time of the fundamental frequency F2, since the time is sufficiently longer than the cycle time of the fundamental frequency F2, the error is small and practically acceptable. Furthermore, setting the initial phase α for a time sufficiently longer than the cycle time of the fundamental frequency F2 has the advantage of improving stability when acquiring the reflection coefficient ρ1 or the reflection coefficient absolute value Γ1 or the reflected wave power value pr1 corresponding to the center 81 of the locus 80 of the load-side impedance Z1. Conversely, if the time is longer than the cycle time of the fundamental frequency F2, the time required to search for the initial phase α becomes longer. Therefore, an appropriate time can be set depending on the usage situation.

[0147] The average value may be a moving average value, which may be calculated and output at predetermined time intervals (for example, at each control period).

[0148] Furthermore, when searching for the frequency shift Fd or frequency shift gain in the frequency shift search step, similarly to the initial phase search step, the frequency shift Fd or frequency shift gain Gfd may be changed every integer multiple of the cycle time of the fundamental frequency F2 (every integer multiple of 2.5 μs in this embodiment). Furthermore, for the acquired reflection coefficient absolute value Γ1 or reflected wave power value pr1, for example, an average value (e.g., moving average value) may be calculated, and the calculated average value (e.g., moving average value) may be used as the reflection coefficient absolute value Γ1 or reflected wave power value pr1 for each frequency shift Fd or frequency shift gain Gfd.

[0149] Furthermore, similarly to the initial phase search step described above, when changing the frequency shift Fd or the frequency shift gain Gfd, it is not essential to change the initial phase α every integral multiple of the period of the fundamental frequency F2.

[0150] <Information acquired in the initial phase search process and frequency shift search process> In the above, an example is shown in which the reflection coefficient absolute value Γ1 or the reflected wave power value pr1 is acquired in the initial phase search process and the frequency shift search process, and the initial phase α and the frequency shift Fd or the frequency shift gain Gfd are searched for based on the acquired reflection coefficient absolute value Γ1 or the reflected wave power value pr1, but this is not limiting.

[0151] For example, the reflection coefficient ρ1 or the load side impedance Z1 may be acquired, and the initial phase α and the frequency shift Fd or the frequency shift gain Gfd may be searched for based on the acquired reflection coefficient ρ1 or the load side impedance Z1.

[0152] In this case, the initial phase α searched for in the initial phase search process is the initial phase α at which the average value of the absolute value of the difference between the average value of the reflection coefficient ρ1 or the load side impedance Z1 at the output end of the first power source 1 obtained for each initial phase α searched for and the instantaneous value of the reflection coefficient ρ1 or the load side impedance Z1 at the output end of the first power source 1 obtained for each initial phase α searched for is the smallest.

[0153] Here, the average value of the reflection coefficient ρ1 or the load-side impedance Z1 at the output terminal of the first power supply 1, acquired for each initial phase α to be searched, corresponds to the center 81 of the locus 80 of the reflection coefficient ρ1 or the load-side impedance Z1. Therefore, the average value of the absolute values ​​of the differences between this average value and the instantaneous values ​​of the reflection coefficient ρ1 or the load-side impedance Z1 at the output terminal of the first power supply 1, acquired for each initial phase α to be searched, represents the magnitude of the fluctuation range of the reflection coefficient ρ1 or the load-side impedance Z1. Therefore, searching for the initial phase α at which the average value of the difference is small means that the fluctuation range of the locus 80 of the reflection coefficient ρ1 or the load-side impedance Z1 is small. Therefore, when the first matching operation is subsequently performed by the first matching device and the center 81 of the locus 80 is moved to or near the center of the Smith chart, the reflection coefficient ρ1 becomes small. Therefore, searching for the initial phase α using the above method is effective.

[0154] Furthermore, the frequency shift Fd or frequency shift gain Gfd searched for in the frequency shift searching step may be a frequency shift Fd or frequency shift gain Gfd that minimizes an average value of the absolute value of the difference between an average value of the reflection coefficient or load-side impedance at the output end of the first power source obtained for each frequency shift Fd or frequency shift gain Gfd searched for and an instantaneous value of the reflection coefficient or load-side impedance at the output end of the first power source obtained for each frequency shift Fd searched for.

[0155] In this case, as in the initial phase search step, searching for the frequency shift Fd or frequency shift gain Gfd that minimizes the average value of the difference means that the fluctuation range of the locus 80 of the reflection coefficient ρ1 or the load side impedance Z1 is small, which means that the reflection coefficient ρ1 will be small when the first matching operation is subsequently performed by the first matching device and the center 81 of the locus 80 is moved to the center or near the center of the Smith chart. Therefore, searching for the frequency shift Fd or the frequency shift gain Gfd using the above method is effective.

[0156] In addition, in the initial phase search step, the reflection coefficient absolute value Γ1 or the reflected wave power value pr1 may be acquired, and the initial phase α may be searched for based on the acquired reflection coefficient absolute value Γ1 or the reflected wave power value pr1, and in the frequency shift search step, the reflection coefficient ρ1 or the load side impedance Z1 may be acquired, and the frequency shift Fd or the frequency shift gain Gfd may be searched for based on the acquired reflection coefficient ρ1 or the load side impedance Z1.

[0157] In addition, in the initial phase search step, the reflection coefficient ρ1 or the load side impedance Z1 may be acquired, and the initial phase α may be searched for based on the acquired reflection coefficient ρ1 or the load side impedance Z1, and in the frequency shift search step, the reflection coefficient absolute value Γ1 or the reflected wave power value pr1 may be acquired, and the frequency shift Fd or the frequency shift gain Gfd may be searched for based on the acquired reflection coefficient absolute value Γ1 or the reflected wave power value pr1.

[0158] Thereafter, the first power supply 1 performs an operation to search for an optimal value of the offset frequency Fos as shown in step S12. At this time, the first power supply 1 executes the offset frequency search step based on the reflection coefficient ρ12 or the load side impedance Z12 during the second power-off period.

[0159] As shown in step S13, when the search for the optimal value of the offset frequency Fos is completed, the first power source 1 sets the optimal value of the offset frequency Fos as a new offset frequency Fos. At the same time, the first power source 1 notifies the first matching box 3 that the offset frequency search process is completed. The first power source 1 continues to supply the forward power PF1 to the load.

[0160] As shown in step S14, when the first matching box 3 receives the completion notification, the first matching box 3 starts the first matching operation as shown in step S15. At this time, the first matching box 3 performs the first matching operation based on the reflection coefficient ρ13 or the load side impedance Z13 in both the second power-on period and the second power-off period. That is, the first matching box 3 performs the matching operation by weighted averaging.

[0161] The first matching box 3 attempts to reduce the reflected wave power to the maximum extent possible. As a result, the matching operation is completed as shown in step S16. The first matching box 3 continues the first matching operation, and when the reflection coefficient ρ13 or the absolute value of the reflection coefficient that can be calculated from the load side impedance Z13 becomes larger than a predetermined threshold, the first matching box 3 performs an operation to reduce the reflected wave power.

[0162] Furthermore, during the second power-off period, the first matching box 3 preferably maintains the variable value of the variable element adjusted by the first matching operation during the second power-on period without changing it, thereby enabling stable frequency offset control.

[0163] Here, the offset frequency search process will be further explained. FIG. 14 is a diagram for explaining the offset frequency search process. When the offset frequency search process is started, if the first power supply 1 outputs a traveling wave voltage VF1 during the second power-off period, the reflection coefficient ρ12 or the load side impedance Z12 will be, for example, as shown by "F1" in Figure 14.

[0164] In Fig. 14, f1, f2, f3, f4, and f5 are examples of candidates for the offset frequency Fos. Also, F1, F1+f1, F1+f2, F1+f3, F1+f4, and F1+f5 indicate the fundamental frequency F3 obtained by adding the candidates for the offset frequency Fos to the fundamental frequency F1. Note that F1 in Fig. 14 is the fundamental frequency F3 when there is no offset frequency Fos (0 MHz).

[0165] Under these conditions, during the second power-off period, the fundamental frequency F3 is sequentially set to F1, F1+f1, F1+f2, F1+f3, F1+f4, and F1+f5. When a traveling-wave voltage VF3 having the fundamental frequency F3 is output from the first power supply 1, the reflection coefficient ρ12 or the load-side impedance Z12 (both indicated by black squares) during the second power-off period changes as the fundamental frequency F3 changes, for example, as shown in FIG.

[0166] 14, when the fundamental frequency F3 is F1+f5, that is, when the offset frequency Fos is f5, the reflection coefficient ρ12 or the load-side impedance Z12 is closest to the center 81 (shown by a black circle) of the locus 80 of the reflection coefficient ρ11 or the load-side impedance Z11. Therefore, f5 should be used as the offset frequency Fos.

[0167] Here, the purpose of the offset frequency search step will be explained. The purpose of the offset frequency search process is to search for an offset frequency Fos that reduces the reflected wave power during the second power-off period, but it is necessary to consider not only the second power-off period but also its relationship with the second power-on period. Specifically, after the frequency modulation parameter search process and the offset frequency search process are completed, processing is performed using the initial phase α, frequency shift Fd (frequency shift gain Gfd), and offset frequency Fos determined in these processes. At this time, as shown in step S15, the first matching box 3 performs a matching operation using a weighted average. Therefore, it is desirable that the difference between the reflection coefficient ρ11 or the load side impedance Z11 during the second power-on period and the reflection coefficient ρ12 or the load side impedance Z12 during the second power-off period is small.

[0168] Therefore, when the fundamental frequency F3 is expressed as the fundamental frequency F1+the offset frequency Fos, it is only necessary to search for the offset frequency Fos that provides the smallest difference between the reflection coefficient ρ11 corresponding to the center 81 of the locus 80 in the second power-on period and the reflection coefficient ρ12 in the second power-off period, or to search for the offset frequency Fos that provides the smallest difference between the load-side impedance Z11 corresponding to the center 81 of the locus 80 in the second power-on period and the load-side impedance Z12 in the second power-off period. Then, the fundamental frequency F3 in the second power-off period is set.

[0169] In the present embodiment, the difference between the reflection coefficient ρ11 or the load-side impedance Z11 corresponding to the center 81 of the locus 80 shown in FIG. 14 and the reflection coefficient ρ12 or the load-side impedance Z12 when the fundamental frequency F3 is F1+f5 is smallest, so f5 can be used as the offset frequency Fos.

[0170] FIG. 15 is a diagram showing an example of the load side impedance when the first matching operation is performed after the offset frequency search step is completed. In FIG. 15, the black circles represent the centers 81 of the locus 80 of the reflection coefficient ρ11 or the load side impedance Z11, the black squares represent the reflection coefficient ρ12 or the load side impedance Z12, and the black triangles represent the reflection coefficient ρ13 or the load side impedance Z13.

[0171] At this point, the optimal values ​​of the initial phase α, frequency shift Fd (frequency shift gain Gfd), and offset frequency Fos are applied, so that frequency modulation control is performed with high precision during the second power ON period, and frequency offset control is performed with high precision during the second power OFF period.

[0172] In this stage, a matching operation is performed using a weighted average. In this embodiment, since the second power-on period and the second power-off period are the same length of time, the black triangle mark indicating the load side impedance Z13 shown in Fig. 15 is controlled to be at the center position of the Smith chart.

[0173] As described above, the optimal values ​​of the initial phase α and frequency shift Fd (frequency shift gain Gfd) required for frequency modulation control, and the offset frequency Fos required for offset frequency control can be obtained, and by applying these parameters, the reflected wave power can be reduced to the maximum extent possible.

[0174] In this case, the difference between the load side impedance Z11 in the second power ON period and the load side impedance Z12 in the second power OFF period can be reduced. The same idea can be applied to the reflection coefficient ρ1, and the difference between the reflection coefficient ρ11 in the second power-on period and the reflection coefficient ρ12 in the second power-off period can be reduced. That is, according to the high-frequency power supply system 90 of the present embodiment, the power value of the reflected power on the first power supply side can be reduced during both the second power supply ON period and the second power supply OFF period, i.e., the absolute value of the reflection coefficient on the first power supply side can be reduced.

[0175] At the completion of steps S9 and S11, the first matching device 3 can also perform the first matching operation based on the reflection coefficient ρ11 or the load side impedance Z11 during the second power-on period. In this way, after the completion of the first matching operation, the center 81 of the locus 80 can be set to the center (or near the center) of the Smith chart.

[0176] In this embodiment, after the first matching device 3 performs the first matching operation in step S2, it only needs to perform the second first matching operation in step S15, so that the optimal values ​​of the initial phase α, frequency shift Fd (frequency shift gain Gfd), and offset frequency Fos can be obtained in a shorter time.

[0177] If the reflection coefficient ρ13 or the absolute value of the reflection coefficient calculated from the load-side impedance Z13 is greater than a predetermined threshold value despite the execution of step S16, the initial phase search step, frequency shift search step, and offset frequency search step may be performed again to reduce the absolute value of the reflection coefficient. Alternatively, any one of the initial phase search step, frequency shift search step, and offset frequency search step may be performed to reduce the absolute value of the reflection coefficient.

[0178] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, as well as within the scope of the invention described in the claims and their equivalents.

[0179] [Note] The present invention can also be embodied in other ways as follows. [First Alternative Aspect] A first alternative aspect is a control method for a high frequency power supply system, The high frequency power supply system includes: a second power source capable of outputting a second traveling wave voltage having a second fundamental frequency lower than a predetermined first fundamental frequency, and performing pulse modulation by repeating an ON operation in which the second traveling wave voltage is output and an OFF operation in which the second traveling wave voltage is not output; a first power supply capable of outputting a first traveling wave voltage having the first fundamental frequency, performing frequency modulation control to frequency-modulate the first traveling wave voltage with a modulation signal having the same frequency as the second fundamental frequency during a second power supply ON period in which the ON operation is performed, and performing frequency offset control to output a third traveling wave voltage having a third fundamental frequency obtained by adding an offset frequency to the first fundamental frequency during a second power supply OFF period in which the OFF operation is performed; a first matching box connected between the first power supply and a load, the first matching box performing a first matching operation to match an impedance on the first power supply side with an impedance on the load side; It has a step of causing the first matching device to perform a first matching operation after power supply from the first power source and the second power source to a load is started, and stopping the first matching operation when the first matching operation is completed; searching for an initial phase of the modulated signal at which a reflection coefficient or a load side impedance at an output end of the first power supply, which is calculated during the second power supply ON period, is optimal within a search range while the first matching operation of the first matching device is stopped; searching for a frequency shift or a frequency shift gain that optimizes a reflection coefficient or a load side impedance at an output end of the first power supply, the reflection coefficient or the load side impedance being calculated during a second power supply ON period, within a search range, while the first matching operation of the first matching device is stopped; and searching for an offset frequency at which a reflection coefficient or a load side impedance at an output end of the first power supply, which is calculated during the second power supply OFF period, is optimal within a search range while the first matching operation of the first matching device is stopped, The initial phase of the modulated signal that is optimal within the search range is the initial phase at which the average value of the absolute value of the difference between the average value of the reflection coefficient or the load side impedance at the output terminal of the first power supply acquired for each initial phase to be searched and the instantaneous value of the reflection coefficient or the load side impedance at the output terminal of the first power supply acquired for each initial phase to be searched is the smallest, or the initial phase at which the absolute value of the reflection coefficient or the power value of the reflected wave power at the output terminal of the first power supply calculated during the second power supply ON period is the smallest within the search range, The frequency shift or frequency shift gain that is optimal within the search range is the frequency shift or frequency shift gain at which the average value of the difference between the average value of the reflection coefficient or the load side impedance at the output end of the first power supply obtained for each frequency shift to be searched and the instantaneous value of the reflection coefficient or the load side impedance at the output end of the first power supply obtained for each frequency shift to be searched is the smallest, or the frequency shift or frequency shift gain at which the absolute value of the reflection coefficient or the power value of the reflected wave power at the output end of the first power supply calculated during the second power supply ON period is the smallest within the search range, The optimum offset frequency value within the search range is This is the offset frequency at which the difference between the average value of the reflection coefficient or the load side impedance at the output terminal of the first power supply calculated during the second power supply ON period and the average value of the reflection coefficient or the load side impedance at the output terminal of the first power supply calculated during the second power supply OFF period is minimized when the initial phase is set to the optimal initial phase and the frequency deviation or frequency deviation gain is set to the optimal initial phase. [Second Alternative Aspect] A second alternative embodiment is the first alternative embodiment, The high frequency power supply system includes: The power supply further includes a second matching box connected between the second power supply and the load, for performing a second matching operation of matching an impedance on the second power supply side with an impedance on the load side. [Third Alternative Aspect] A third alternative embodiment is the first alternative embodiment or the second alternative embodiment, The method further includes a step of causing the first matcher to perform a matching operation after the step of searching for the offset frequency. [Fourth Alternative Aspect] A fourth alternative aspect is a control method for a high frequency power supply system, The high frequency power supply system comprises: a second power source capable of outputting a second traveling wave voltage having a second fundamental frequency lower than a predetermined first fundamental frequency, and performing pulse modulation by repeating an ON operation in which the second traveling wave voltage is output and an OFF operation in which the second traveling wave voltage is not output; a first power supply capable of outputting a first traveling wave voltage having the first fundamental frequency, performing frequency modulation control to frequency-modulate the first traveling wave voltage with a modulation signal having the same frequency as the second fundamental frequency during a second power supply ON period in which the ON operation is performed, and performing frequency offset control to output a third traveling wave voltage having a third fundamental frequency obtained by adding an offset frequency to the first fundamental frequency during a second power supply OFF period in which the OFF operation is performed; a first matching box connected between the first power supply and a load, the first matching box performing a first matching operation to match an impedance on the first power supply side with an impedance on the load side; It has a step of causing the first matching device to perform a first matching operation after power supply from the first power source and the second power source to a load is started, and stopping the first matching operation when the first matching operation is completed; searching for an initial phase of the modulated signal at which a reflection coefficient or a load side impedance at an output end of the first power supply, which is calculated during the second power supply ON period, is optimal within a search range while the first matching operation of the first matching device is stopped; searching for a frequency shift or a frequency shift gain that optimizes a reflection coefficient or a load side impedance at an output end of the first power supply, the reflection coefficient or the load side impedance being calculated during a second power supply ON period, within a search range, while the first matching operation of the first matching device is stopped; and searching for an offset frequency at which a reflection coefficient or a load side impedance at an output end of the first power supply, which is calculated during the second power supply OFF period, is optimal within a search range while the first matching operation of the first matching device is stopped, The initial phase of the modulated signal that is optimal within the search range is the initial phase at which an average value of the absolute value of the difference between an average value of the reflection coefficient or the load side impedance at the output end of the first power source acquired for each initial phase to be searched and an instantaneous value of the reflection coefficient or the load side impedance at the output end of the first power source acquired for each initial phase to be searched is minimum; The frequency shift or frequency shift gain that is optimal within the search range is the frequency deviation or frequency deviation gain at which an average value of the absolute value of the difference between an average value of the reflection coefficient or the load side impedance at the output end of the first power source obtained for each frequency deviation to be searched and an instantaneous value of the reflection coefficient or the load side impedance at the output end of the first power source obtained for each frequency deviation to be searched is minimized; The optimum offset frequency value within the search range is This is the offset frequency at which the difference between the average value of the reflection coefficient or the load side impedance at the output terminal of the first power supply calculated during the second power supply ON period and the average value of the reflection coefficient or the load side impedance at the output terminal of the first power supply calculated during the second power supply OFF period is minimized when the initial phase is set to the optimal initial phase and the frequency deviation or frequency deviation gain is set to the optimal initial phase. [Fifth Alternative Aspect] A fifth alternative embodiment is the fourth alternative embodiment, The high frequency power supply system includes: The power supply further includes a second matching box connected between the second power supply and the load, for performing a second matching operation of matching an impedance on the second power supply side with an impedance on the load side. [Sixth Alternative Aspect] A sixth alternative embodiment is the fourth alternative embodiment or the fifth alternative embodiment, The method further includes a step of causing the first matcher to perform a matching operation after the step of searching for the offset frequency. [Seventh Alternative Aspect] A seventh aspect is a control method for a high frequency power supply system, The high frequency power supply system comprises: a second power source capable of outputting a second traveling wave voltage having a second fundamental frequency lower than a predetermined first fundamental frequency, and performing pulse modulation by repeating an ON operation in which the second traveling wave voltage is output and an OFF operation in which the second traveling wave voltage is not output; a first power supply capable of outputting a first traveling wave voltage having the first fundamental frequency, performing frequency modulation control to frequency-modulate the first traveling wave voltage with a modulation signal having the same frequency as the second fundamental frequency during a second power supply ON period in which the ON operation is performed, and performing frequency offset control to output a third traveling wave voltage having a third fundamental frequency obtained by adding an offset frequency to the first fundamental frequency during a second power supply OFF period in which the OFF operation is performed; a first matching box connected between the first power supply and a load, the first matching box performing a first matching operation to match an impedance on the first power supply side with an impedance on the load side; It has a step of causing the first matching device to perform a first matching operation after power supply from the first power source and the second power source to a load is started, and stopping the first matching operation when the first matching operation is completed; searching for an initial phase of the modulated signal at which the absolute value of the reflection coefficient or the power value of the reflected wave power at the output terminal of the first power supply, which is calculated during the second power supply ON period, is minimum within a search range while the first matching operation of the first matching device is stopped; searching for a frequency shift or a frequency shift gain that optimizes a reflection coefficient or a load side impedance at an output end of the first power supply, the reflection coefficient or the load side impedance being calculated during a second power supply ON period, within a search range, while the first matching operation of the first matching device is stopped; and searching for an offset frequency at which a reflection coefficient or a load side impedance at an output end of the first power supply, which is calculated during the second power supply OFF period, is optimal within a search range while the first matching operation of the first matching device is stopped, The frequency shift or frequency shift gain that is optimal within the search range is the frequency deviation or frequency deviation gain at which an average value of the absolute value of the difference between an average value of the reflection coefficient or the load side impedance at the output end of the first power source obtained for each frequency deviation to be searched and an instantaneous value of the reflection coefficient or the load side impedance at the output end of the first power source obtained for each frequency deviation to be searched is minimized; The optimum offset frequency value within the search range is This is the offset frequency at which the difference between the average value of the reflection coefficient or the load side impedance at the output terminal of the first power supply calculated during the second power supply ON period and the average value of the reflection coefficient or the load side impedance at the output terminal of the first power supply calculated during the second power supply OFF period is minimized when the initial phase is set to the minimum initial phase and the frequency deviation or frequency deviation gain is set to the optimum. [Eighth Alternative Aspect] Another eighth aspect of the present invention is the seventh aspect of the present invention, The high frequency power supply system includes: The power supply further includes a second matching box connected between the second power supply and the load, for performing a second matching operation of matching an impedance on the second power supply side with an impedance on the load side. [Ninth Other Aspect] In a ninth aspect, in the seventh or eighth aspect, The method further includes a step of causing the first matcher to perform a matching operation after the step of searching for the offset frequency. [Tenth Other Aspect] Another tenth aspect is a method for controlling a high frequency power supply system. The high frequency power supply system comprises: a second power source capable of outputting a second traveling wave voltage having a second fundamental frequency lower than a predetermined first fundamental frequency, and performing pulse modulation by repeating an ON operation in which the second traveling wave voltage is output and an OFF operation in which the second traveling wave voltage is not output; a first power supply capable of outputting a first traveling wave voltage having the first fundamental frequency, performing frequency modulation control to frequency-modulate the first traveling wave voltage with a modulation signal having the same frequency as the second fundamental frequency during a second power supply ON period in which the ON operation is performed, and performing frequency offset control to output a third traveling wave voltage having a third fundamental frequency obtained by adding an offset frequency to the first fundamental frequency during a second power supply OFF period in which the OFF operation is performed; a first matching box connected between the first power supply and a load, the first matching box performing a first matching operation to match an impedance on the first power supply side with an impedance on the load side; It has a step of causing the first matching device to perform a first matching operation after power supply from the first power source and the second power source to a load is started, and stopping the first matching operation when the first matching operation is completed; searching for an initial phase of the modulated signal at which a reflection coefficient or a load side impedance at an output end of the first power supply, which is calculated during the second power supply ON period, is optimal within a search range while the first matching operation of the first matching device is stopped; searching for a frequency shift or a frequency shift gain that minimizes within a search range the absolute value of the reflection coefficient or the power value of the reflected wave power at the output end of the first power supply, which is calculated during the second power supply ON period, while the first matching operation of the first matching device is stopped; and searching for an offset frequency at which a reflection coefficient or a load side impedance at an output end of the first power supply, which is calculated during the second power supply OFF period, is optimal within a search range while the first matching operation of the first matching device is stopped, The initial phase of the modulated signal that is optimal within the search range is the initial phase at which an average value of the absolute value of the difference between an average value of the reflection coefficient or the load side impedance at the output end of the first power source acquired for each initial phase to be searched and an instantaneous value of the reflection coefficient or the load side impedance at the output end of the first power source acquired for each initial phase to be searched is minimum; The optimum offset frequency value within the search range is This is the offset frequency at which the difference between the average value of the reflection coefficient or the load side impedance at the output terminal of the first power supply calculated during the second power supply ON period and the average value of the reflection coefficient or the load side impedance at the output terminal of the first power supply calculated during the second power supply OFF period is minimized when the initial phase is set to the optimal initial phase and the frequency deviation or frequency deviation gain is set to the minimum. [Eleventh Alternative Aspect] In another eleventh aspect, the method according to the tenth aspect, The high frequency power supply system includes: The power supply further includes a second matching box connected between the second power supply and the load, for performing a second matching operation of matching an impedance on the second power supply side with an impedance on the load side. [12th Alternative Aspect] A twelfth aspect of the present invention is the same as the tenth or eleventh aspect of the present invention, The method further includes a step of causing the first matcher to perform a matching operation after the step of searching for the offset frequency. [13th Other Aspect] A thirteenth aspect of the present invention is a method for controlling a high frequency power supply system. The high frequency power supply system comprises: a second power source capable of outputting a second traveling wave voltage having a second fundamental frequency lower than a predetermined first fundamental frequency, and performing pulse modulation by repeating an ON operation in which the second traveling wave voltage is output and an OFF operation in which the second traveling wave voltage is not output; a first power supply capable of outputting a first traveling wave voltage having the first fundamental frequency, performing frequency modulation control to frequency-modulate the first traveling wave voltage with a modulation signal having the same frequency as the second fundamental frequency during a second power supply ON period in which the ON operation is performed, and performing frequency offset control to output a third traveling wave voltage having a third fundamental frequency obtained by adding an offset frequency to the first fundamental frequency during a second power supply OFF period in which the OFF operation is performed; a first matching box connected between the first power supply and a load, the first matching box performing a first matching operation to match an impedance on the first power supply side with an impedance on the load side; It has a step of causing the first matching device to perform a first matching operation after power supply from the first power source and the second power source to a load is started, and stopping the first matching operation when the first matching operation is completed; searching for an initial phase of the modulated signal at which the absolute value of the reflection coefficient or the power value of the reflected wave power at the output terminal of the first power supply, which is calculated during the second power supply ON period, is minimum within a search range while the first matching operation of the first matching device is stopped; searching for a frequency shift or a frequency shift gain that minimizes within a search range the absolute value of the reflection coefficient or the power value of the reflected wave power at the output end of the first power supply, which is calculated during the second power supply ON period, while the first matching operation of the first matching device is stopped; and searching for an offset frequency at which a reflection coefficient or a load side impedance at an output end of the first power supply, which is calculated during the second power supply OFF period, is optimal within a search range while the first matching operation of the first matching device is stopped, The optimum offset frequency value within the search range is This is the offset frequency at which the difference between the average value of the reflection coefficient or the load side impedance at the output terminal of the first power supply calculated during the second power supply ON period and the average value of the reflection coefficient or the load side impedance at the output terminal of the first power supply calculated during the second power supply OFF period is minimized when the initial phase is set to the minimum initial phase and the frequency deviation or frequency deviation gain is set to the minimum. [14th Alternative Aspect] In a fourteenth aspect, the method according to the thirteenth aspect, The high frequency power supply system includes: The power supply further includes a second matching box connected between the second power supply and the load, for performing a second matching operation of matching an impedance on the second power supply side with an impedance on the load side. [15th Alternative Aspect] In a fifteenth aspect, the method according to the thirteenth or fourteenth aspect is The method further includes a step of causing the first matcher to perform a matching operation after the step of searching for the offset frequency. According to any of the other aspects of the high-frequency power supply system described above, the power value of the reflected power on the first power supply side can be reduced during both the second power supply ON period and the second power supply OFF period, i.e., the absolute value of the reflection coefficient on the first power supply side can be reduced. [Explanation of symbols]

[0180] 1 1st power supply 10 Modulation signal generator 11 Communication section for 1st power supply 12 Modulated signal generator 13 Amplitude adjustment section 14 Amplification section 15 First power supply sensor 16 Power Information Calculation Unit 18 Target power setting unit 19 Subtraction section 20 Power Control Unit 2 2nd power supply 3 1st matching box 31 First-side communication unit 32 First side sensor 33 1st side matching circuit 34 1st side calculation section 35 First side control section 4 Second matching box 41 Second communication unit 42 Second side sensor 43 Second side matching circuit 44 2nd side calculation section 45 Second side control section 46 Phase reset signal generator

Claims

1. A method for controlling a high frequency power supply system The high frequency power supply system includes: a second power source capable of outputting a second forward wave voltage having a second fundamental frequency lower than a predetermined first fundamental frequency, and performing pulse modulation by repeating an ON operation for outputting the second forward wave voltage and an OFF operation for not outputting the second forward wave voltage; a first power supply capable of outputting a first traveling wave voltage having the first fundamental frequency, performing frequency modulation control to frequency-modulate the first traveling wave voltage with a modulation signal having the same frequency as the second fundamental frequency during a second power supply ON period in which the ON operation is performed, and performing frequency offset control to output a third traveling wave voltage having a third fundamental frequency obtained by adding an offset frequency to the first fundamental frequency during a second power supply OFF period in which the OFF operation is performed; a first matching device connected between the first power supply and a load, performing a first matching operation to match an impedance on the first power supply side with an impedance on the load side, a step of causing the first matching device to perform a first matching operation after power supply from the first power source and the second power source to a load is started, and stopping the first matching operation when the first matching operation is completed; searching for an initial phase of the modulated signal at which a reflection coefficient or a load side impedance at an output end of the first power supply, which is calculated during an ON period of the second power supply, is optimal within a search range while the first matching operation of the first matching device is stopped; searching for a frequency shift or a frequency shift gain that optimizes a reflection coefficient or a load side impedance at an output end of the first power supply, the reflection coefficient or the load side impedance being calculated during the second power supply ON period, within a search range, while stopping the first matching operation of the first matching device; and searching for an offset frequency at which a reflection coefficient or a load side impedance at an output end of the first power supply, which is calculated during a second power supply OFF period, is optimal within a search range while the first matching operation of the first matching device is stopped, The initial phase of the modulated signal that is optimal within the search range is the initial phase at which an average value of the absolute value of the difference between the average value of the reflection coefficient or the load side impedance at the output terminal of the first power source acquired for each initial phase to be searched and the instantaneous value of the reflection coefficient or the load side impedance at the output terminal of the first power source acquired for each initial phase to be searched is minimum, or the initial phase at which the absolute value of the reflection coefficient or the power value of the reflected wave power at the output terminal of the first power source calculated during the second power source ON period is minimum within a search range, The frequency shift or frequency shift gain that is optimal within the search range is the frequency shift or frequency shift gain at which the average value of the difference between the average value of the reflection coefficient or the load side impedance at the output end of the first power supply obtained for each frequency shift to be searched and the instantaneous value of the reflection coefficient or the load side impedance at the output end of the first power supply obtained for each frequency shift to be searched is minimum, or the frequency shift or frequency shift gain at which the absolute value of the reflection coefficient or the power value of the reflected wave power at the output end of the first power supply calculated during the second power supply ON period is minimum within the search range, The optimum offset frequency value within the search range is an offset frequency at which a difference between an average value of a reflection coefficient or a load side impedance at the output terminal of the first power supply calculated during the second power supply ON period and an average value of a reflection coefficient or a load side impedance at the output terminal of the first power supply calculated during the second power supply OFF period is minimized when the initial phase is set to the optimal initial phase and the frequency deviation or frequency deviation gain is set to the optimal initial phase; A method for controlling a high frequency power supply system.

2. The high frequency power supply system includes:

2. The control method for a high frequency power supply system according to claim 1, further comprising a second matching device connected between the second power supply and the load, the second matching device performing a second matching operation to match an impedance on the second power supply side with an impedance on the load side.

3. 3. The method for controlling a high frequency power supply system according to claim 1, further comprising the step of causing the first matching device to perform a matching operation after the step of searching for an offset frequency.

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