Semiconductor device and method of manufacturing the same

Abstract

To provide a semiconductor device capable of simplifying a manufacturing process, and to provide a method of manufacturing the same.SOLUTION: The method includes preparing a substrate 10 including a region where a plurality of semiconductors are to be formed, removing a part of the substrate 10, and dividing the plurality of semiconductors along a division line, wherein, in the removing of the part of the substrate 10, the part of the substrate 10 is removed to form a recess 14, the part of the substrate 10 is thinned, and the part of the substrate 10 is removed along a part of the division line. 10b 10a, the through hole 60 penetrating the substrate 10 in the thickness direction is formed.SELECTED DRAWING: Figure 4B

Description

[Technical Field]

[0001] The present disclosure relates to a semiconductor device and a method for manufacturing the same. [Background technology]

[0002] In the manufacturing process of a semiconductor device, a plurality of semiconductor devices are formed on a wafer-shaped substrate, and the substrate is divided along division lines to separate the semiconductor devices into chip units.

[0003] For example, Patent Document 1 proposes the following method for manufacturing semiconductor chips. First, a pattern is formed on the surface of a wafer, and a protective tape is attached to the patterned surface of the wafer. This protective tape is composed of a surface protective tape and a masking material layer formed on the surface protective tape. Then, the back surface of the wafer is ground, and a wafer fixing tape is attached to the ground back surface and supported and fixed by a ring frame. Next, the surface protective tape is peeled off to expose the masking material layer, and portions of the masking material layer corresponding to the wafer streets are cut with a laser to open the wafer streets. Finally, the wafer is divided along the streets by plasma irradiation to separate into semiconductor chips, and a release tape is attached to the masking material layer, which is then peeled off together with the masking material layer to remove the masking material layer. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Publication No. 2019-87681 Summary of the Invention [Problem to be solved by the invention]

[0005] In the method described in Patent Document 1, the processing of the back surface and the processing for dividing the semiconductor chips into individual chips are performed in separate steps, and therefore the manufacturing process is complicated and there is room for simplification of the manufacturing process.

[0006] In view of the above, an object of the present disclosure is to provide a semiconductor device and a method for manufacturing the same that can simplify the manufacturing process. [Means for solving the problem]

[0007] In order to achieve the above object, according to one aspect of the present disclosure, a method for manufacturing a semiconductor device having a recess (14) formed on a surface (10b) opposite to one surface (10a) includes preparing a substrate (10) including regions where multiple semiconductor devices are to be formed, removing a portion of the substrate, and dividing the multiple semiconductor devices along parting lines (40), wherein removing a portion of the substrate includes removing a portion of the substrate to form a recess and thinning the portion of the substrate, and removing a portion of the substrate along a portion of the parting line to form a through hole (60) that penetrates the substrate in a thickness direction.

[0008] By forming the through holes in this way, any semiconductor device can be divided by applying force to the substrate. Furthermore, by forming the through holes together with the recesses, an additional step for forming the through holes is not required, thereby simplifying the manufacturing process of the semiconductor device.

[0009] From another perspective, the semiconductor device comprises a substrate (10) having a recess (14) formed on a surface (10b) opposite to one surface (10a), and a protrusion (30) formed on side surfaces (10c, 10d, 10e, 10f) of the substrate connecting the one surface and the other surface.

[0010] In the manufacturing process of a semiconductor device, a portion of the substrate is removed along a part of the dividing line of the semiconductor device to form through-holes that penetrate the substrate in the thickness direction, and then a force is applied to the substrate to separate the semiconductor device into multiple semiconductor devices. On the side surfaces of the semiconductor devices thus separated, a convex portion is formed by the portion of the substrate that remains along the dividing line and is not removed. Furthermore, by forming the through-holes at the same time as forming the recesses, an additional step for forming the through-holes is not required, thereby simplifying the manufacturing process of the semiconductor device.

[0011] The reference symbols in parentheses attached to each component indicate an example of the correspondence between the component and the specific components described in the embodiments described below. [Brief explanation of the drawings]

[0012] [Figure 1] FIG. 1 is a top view of a semiconductor device according to a first embodiment. [Figure 2] FIG. 2 is a cross-sectional view taken along line II-II of FIG. [Figure 3] FIG. 2 is an enlarged view of part III in FIG. [Figure 4A] 1A to 1C are cross-sectional views showing a manufacturing process of a semiconductor device. [Figure 4B] 4B is a cross-sectional view showing the manufacturing process of the semiconductor device subsequent to FIG. 4A. [Figure 4C] FIG. 4C is a cross-sectional view showing the manufacturing process of the semiconductor device subsequent to FIG. 4B. [Figure 4D] 4D is a cross-sectional view showing the manufacturing process of the semiconductor device subsequent to FIG. 4C. [Figure 4E] FIG. 4E is a cross-sectional view showing the manufacturing process of the semiconductor device subsequent to FIG. 4D. [Figure 5] 1A to 1C are top views showing a manufacturing process of a semiconductor device. [Figure 6A] 1A to 1C are top views showing a manufacturing process of a semiconductor device. [Figure 6B] 6B is a top view showing the manufacturing process of the semiconductor device subsequent to FIG. 6A. FIG. [Figure 6C] 6C is a top view showing the manufacturing process of the semiconductor device subsequent to FIG. 6B. [Figure 7] FIG. 7 is an enlarged view of part VII of FIG. 6B. [Figure 8] FIG. 10 is a diagram showing the relationship between the width of a connecting portion and the strength of the connecting portion. [Figure 9] FIG. 10 is a diagram showing the relationship between the angle formed by the side surfaces constituting the recess of the connecting portion and the incidence of surface chipping and the incidence of processing defects. [Figure 10] FIG. 10 is a top view showing a state in which the connecting portion is separated at the center. [Figure 11]FIG. 10 is a top view showing a state in which a surface chip has occurred at the base of a connecting portion of a substrate. [Figure 12] FIG. 10 is a cross-sectional view showing a state where a processing defect occurs in a joint portion. [Figure 13] FIG. 10 is a top view showing a state where a processing defect occurs in a joint portion. [Figure 14] 10A to 10C are top views illustrating a manufacturing process of a semiconductor device according to a second embodiment. [Figure 15] 10A to 10C are top views illustrating a manufacturing process of a semiconductor device according to a third embodiment. [Figure 16] 10A to 10C are top views illustrating a manufacturing process of a semiconductor device according to a fourth embodiment. [Figure 17] 10A to 10C are top views illustrating a manufacturing process of a semiconductor device according to a fifth embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0013] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. In the following embodiments, identical or equivalent parts will be denoted by the same reference numerals.

[0014] (First embodiment) A first embodiment will be described. As shown in FIGS. 1 and 2, a semiconductor device 1 of this embodiment includes a substrate 10. The substrate 10 is an SOI (Silicon on Insulator) substrate in which a support layer 11, a sacrificial layer 12, and an active layer 13 are stacked in this order, and the semiconductor device 1 is a MEMS (Micro Electro Mechanical Systems) device formed by processing the substrate 10. The support layer 11 and the active layer 13 are made of Si, and the sacrificial layer 12 is made of SiO2. Note that, although a case where the substrate 10 is an SOI substrate will be described in this embodiment, the substrate 10 does not have to be an SOI substrate.

[0015] The substrate 10 has a rectangular plate shape. The front surface of the substrate 10 is designated as one surface 10a, and the back surface opposite to the first surface 10a is designated as the other surface 10b. Two directions parallel to the first surface 10a and perpendicular to each other are designated as the x direction and the y direction, respectively. The four side surfaces connecting the first surface 10a and the other surface 10b are designated as side surfaces 10c, 10d, 10e, and 10f. Side surface 10c is a side surface parallel to the y direction and located on one side of the center of the substrate 10 in the x direction. Side surface 10d is a side surface parallel to the x direction and located on one side of the y direction with respect to the center of the substrate 10. Side surface 10e is a side surface parallel to the y direction and located on the other side of the x direction with respect to the center of the substrate 10. Side surface 10f is a side surface parallel to the x direction and located on the other side of the y direction with respect to the center of the substrate 10.

[0016] As shown in FIG. 2, a portion of the substrate 10 is thinned. Specifically, a recess 14 that opens to the other surface 10b is formed in the substrate 10 by removing a portion of the support layer 11 and the sacrificial layer 12. The back surface of the active layer 13 is exposed from the support layer 11 and the sacrificial layer 12 at the bottom of the recess 14. The opening shape of the recess 14 is a rectangle having two sides parallel to the side surfaces 10c and 10e and two sides parallel to the side surfaces 10d and 10f. The portion of the semiconductor device 1 where the substrate 10 has been thinned by forming the recess 14 is referred to as a thin-film portion 20.

[0017] As shown in FIG. 1, protrusions 30 are formed on the side surfaces 10c to 10f. The protrusions 30 are formed as part of the substrate 10. Specifically, the support layer 11 protrudes in the normal direction of the side surfaces 10c to 10f at the center of the side surfaces 10c to 10f, and these protruding portions form the protrusions 30. In the protrusions 30, the sacrificial layer 12 and the active layer 13 are removed, exposing the surface of the support layer 11. As shown in FIG. 3, the shape of the surface of the protrusions 30 parallel to the face 10a is a trapezoid whose width narrows toward the tip. As shown in FIG. 1, in this embodiment, one protrusion 30 is formed at the center of each of the side surfaces 10c to 10f.

[0018] A method for manufacturing the semiconductor device 1 will be described with reference to Figures 4A to 7. In the step shown in Figure 4A, a wafer-shaped substrate 10 is prepared. As shown in Figure 5, the substrate 10 includes a region R1 where multiple semiconductor devices 1 are to be formed, and a region R2 which is a peripheral region outside region R1, and in region R1, division lines 40 are set to divide the multiple semiconductor devices 1.

[0019] After preparing the substrate 10, a pattern is formed on the first surface 10a by photolithography and etching. Portions of the sacrificial layer 12 and the active layer 13 are removed along the parting lines 40 to expose the surface of the support layer 11. This divides the substrate 10 into a grid pattern, as shown in FIG. 6A. Furthermore, photolithography and etching are used to form a resist 50 on the second surface 10b. The resist 50 is formed so as to open in the regions where the recesses 14 are to be formed and in parts of the regions along the parting lines 40. After the step shown in FIG. 4A, a resist (not shown) is applied to the first surface 10a to protect the pattern formed on the first surface 10a; however, the next step may be proceeded to without applying this resist.

[0020] In the step shown in FIG. 4B , a portion of the substrate 10 is removed. Specifically, the portion of the substrate 10 is removed to form a recess 14, thereby thinning the portion of the substrate 10 and forming a thin-film portion 20. Furthermore, a portion of the substrate 10 is removed along a part of the parting line 40 to form a through-hole 60 penetrating the substrate 10 in the thickness direction. The recess 14 and the through-hole 60 are formed by the same processing method. In this embodiment, the recess 14 and the through-hole 60 are formed by removing a portion of the support layer 11 by dry etching using a resist 50 as a mask. The step shown in FIG. 4B exposes the back surface of the sacrificial layer 12 at the bottom of the recess 14. The through-hole 60 is formed so that the portions of the substrate 10 that constitute each of the multiple semiconductor devices 1 have a rectangular plate shape having four side surfaces 10c to 10f, and so that connecting portions 70 that partially connect the multiple semiconductor devices 1 remain on the parting line 40.

[0021] 6B, the connecting portion 70 is formed to connect two adjacent semiconductor devices 1. A side surface of one of the two semiconductor devices 1 and a side surface of the other semiconductor device 1 facing the side surface are connected at the center by the connecting portion 70. The semiconductor device 1 located at the outermost side of the region R1 is connected by the connecting portion 70 to the adjacent semiconductor device 1 and to the side surface of the region R2 formed by the through-hole 60.

[0022] As shown in FIG. 7 , the connecting portion 70 extends from one side surface of two adjacent semiconductor devices 1 to the other side surface. The connecting portion 70 connecting the side surface 10c of one semiconductor device 1 to the side surface 10e of the semiconductor device 1 adjacent to this semiconductor device 1 from one side in the x direction extends in the x direction. The connecting portion 70 connecting the side surface 10d of one semiconductor device 1 to the side surface 10f of the semiconductor device 1 adjacent to this semiconductor device 1 from one side in the y direction extends in the y direction. A V-shaped recess 71 is formed in the center of the connecting portion 70. Specifically, the surface of the connecting portion 70 has a shape that combines two trapezoids so that the center is narrower than both end portions.

[0023] The width of the through hole 60 in a direction perpendicular to both the parting line 40 and the thickness direction of the substrate 10 is defined as w1. The width of the central portion of the connecting portion 70 in a direction perpendicular to both the extension direction of the connecting portion 70 and the thickness direction of the substrate 10 is defined as w2. In this embodiment, recesses 71 are formed on both sides of the connecting portion 70 in a direction perpendicular to both the extension direction and the thickness direction, and the width w2 is the distance between the two recesses 71. The angle formed by the side surfaces constituting the recess 71 of the connecting portion 70 is defined as θ.

[0024] The width w1 is set to 50 μm or more to match the width of a typical dicing line. For example, the width w1 is set to 150 μm. Furthermore, for example, the width w2 is set to 20 μm, and the angle θ is set to 130 degrees. Furthermore, for example, the length of each of the four sides of the substrate 10 is set to 2 mm, and the thickness is set to 625 μm. The ranges of the width w2 and the angle θ will be described later.

[0025] 4C, a portion of the sacrificial layer 12 is removed. Specifically, the portion of the sacrificial layer 12 exposed at the bottom of the recess 14 is removed by etching using the resist 50 as a mask, thereby exposing the back surface of the active layer 13 at the bottom of the recess 14.

[0026] 4D, the resist 50 and the resist (not shown) applied to the one surface 10a in the step shown in Fig. 4A are peeled off, thereby exposing the back surface of the support layer 11 and the pattern formed on the one surface 10a.

[0027] In the step shown in Fig. 4E, the multiple semiconductor devices 1 are divided along the division lines 40. Specifically, by applying force to the corners of one surface 10a of each semiconductor device 1, the connecting portions 70 are cut, and the semiconductor device 1 is divided into chip units as shown in Fig. 6C. As a result, the cut connecting portions 70 remain on the side surfaces 10c to 10f as protrusions 30, and the semiconductor device 1 shown in Figs. 1 to 3 is manufactured.

[0028] The force may be applied to the center of the surface 10a or to a portion between two adjacent corners. However, applying the force to a corner of the surface 10a that is far from the connecting portion 70 can evenly divide the connecting portion 70, resulting in a convex portion 30 with a shape closer to the design. Furthermore, damage to the pattern formed on the surface 10a can be suppressed. As shown in FIG. 7 , the region of the corner of the surface 10a to which the force is applied is designated as region R3, and the distances in the x and y directions between the tip of this corner and the center of region R3 are designated as d1 and d2, respectively. For example, the distances d1 and d2 are each 200 μm. In this embodiment, region R3 is included in the corner of the surface 10a formed by side surface 10c and side surface 10f. However, region R3 may also be included in other corners.

[0029] 4E, it is possible to divide the semiconductor devices 1 at any position, and all of the semiconductor devices 1 formed on the substrate 10 may be divided, or only the semiconductor devices 1 at desired positions may be divided. For example, only some of the semiconductor devices 1 selected from the outer periphery of the region R1 may be divided, or only some of the semiconductor devices 1 selected from the inner periphery of the region R1 may be divided. Furthermore, multiple semiconductor devices 1 formed on the substrate 10 may be divided at once, or may be divided multiple times in a desired order.

[0030] The protrusions 30 formed in the step shown in FIG. 4E can also be used for aligning the semiconductor device 1 when fixing the semiconductor device 1 in a subsequent step.

[0031] The range of width w2 will now be described. FIG. 8 is a graph showing the results of a simulation conducted by the inventors on the relationship between width w2 and the strength of connecting portion 70. Specifically, the strength of connecting portion 70 is the amount of force applied to one surface 10a required to break connecting portion 70 in the step shown in FIG. 4E. As shown in FIG. 8, the greater the width w2, the greater the force required to break connecting portion 70.

[0032] To easily break the connecting portion 70, the strength of the connecting portion 70 can be reduced; for example, it is desirable to make the connecting portion 70 breakable with a force of 2.5 N or less. On the other hand, if the strength of the connecting portion 70 is too low, there is a risk that the connecting portion 70 will break before the step shown in FIG. 4E, so it is desirable for the strength of the connecting portion 70 to be somewhat high. For example, it is desirable for the force required to break the connecting portion 70 to be 1.2 N or more. As shown in FIG. 8, by setting the width w2 to be 10 μm or more and 20 μm or less, the force required to break the connecting portion 70 can be set to be 1.2 N or more and 2.5 N or less.

[0033] The range of angle θ will be described. FIG. 9 is a graph showing the results of a simulation conducted by the present inventors on the relationship between angle θ and the incidence of surface chipping of substrate 10 and the incidence of processing defects in connecting portion 70. If angle θ is small to a certain extent, connecting portion 70 is divided at its center as shown in FIG. 10 in the process shown in FIG. 4E, and trapezoidal convex portions 30 are formed on the side surfaces of the two semiconductor devices 1 that were connected by connecting portion 70. On the other hand, if angle θ is too large, the center portions of connecting portion 70 remain connected without being divided as shown in FIG. 11 in the process shown in FIG. 4E, and there is a risk of surface chipping of substrate 10 occurring at the base of connecting portion 70.

[0034] Furthermore, if the design value of angle θ is large to a certain extent, the etching gas can reach the center of connecting portion 70 well in the process shown in FIG. 4B, allowing connecting portion 70 to be formed into the desired shape. On the other hand, if the design value of angle θ is too small, the etching gas cannot reach the surface portion of support layer 11 located around the center of connecting portion 70 in the process shown in FIG. 4B, preventing the desired shape of connecting portion 70 from being obtained, resulting in processing defects. Specifically, as shown in FIGS. 12 and 13, the recess 71 of connecting portion 70 in the surface portion of support layer 11 is not V-shaped but rather rounded and U-shaped. Note that the dashed line in FIG. 13 indicates the designed shape of connecting portion 70.

[0035] As shown in Fig. 9, when the angle θ was 135 degrees or less, the rate of occurrence of surface chipping was 5% or less. When the angle θ was 30 degrees or more, the rate of occurrence of processing defects was 10% or less, and when the angle θ was 35 degrees or more, the rate of occurrence of processing defects was 5% or less. In an experiment conducted by the present inventors, a convex portion 30 with a particularly good shape was obtained when the angle θ was 125 degrees or more and 135 degrees or less.

[0036] As described above, in this embodiment, in the step shown in FIG. 4B , a portion of the substrate 10 is removed to form the recess 14, a portion of the substrate 10 is thinned, and a portion of the substrate 10 is removed along a part of the dividing line 40 to form the through hole 60 that penetrates the substrate 10 in the thickness direction. By forming the through hole 60 in this manner, any semiconductor device 1 can be divided by applying force to the substrate 10. Furthermore, by forming the through hole 60 at the same time as forming the recess 14, which is an existing step, an additional step for forming the through hole 60 is not required, thereby simplifying the manufacturing process of the semiconductor device 1. Furthermore, application of a protective tape for surface protection is not required, which can prevent structural damage due to application or peeling of the protective tape.

[0037] Furthermore, if a resist is formed on the surface 10a of the substrate 10 by photolithography for protection, there is a risk of structural damage if the resist is peeled off in a later process. Also, the individual chips will scatter in the liquid, making it difficult to reassemble the chips.

[0038] In contrast, in this embodiment, the resist formed on the one surface 10a is removed before the step shown in FIG. 4E, so that damage to the structure and scattering of chips can be suppressed.

[0039] Furthermore, according to the above embodiment, the following effects can be obtained.

[0040] (1) Through holes 60 are formed so as to leave connecting portions 70 that connect multiple semiconductor devices 1. Then, protrusions 30 are formed on side surfaces 10c to 10f. By connecting multiple semiconductor devices 1 with connecting portions 70 in this manner, the amount of force required during singulation can be adjusted depending on the shape and number of connecting portions 70, and structural damage and singulation of semiconductor devices 1 before the step shown in FIG. 4E can be suppressed.

[0041] (2) The width w1 is set to 50 μm or more, the width w2 is set to 10 μm or more and 20 μm or less, and the angle θ is set to 30 degrees or more and 135 degrees or less. By setting the width w2 in this manner, it becomes possible to separate multiple semiconductor devices 1 by applying a force of 1.2 N or more and 2.5 N or less to one surface 10a. This makes it possible to easily break the connecting portion 70 in the step shown in FIG. 4E and also makes it possible to prevent the connecting portion 70 from breaking before the step shown in FIG. 4E.

[0042] (3) One connecting portion 70 is formed on each of the side surfaces 10c to 10f. By providing the connecting portion 70 in the center of each of the side surfaces 10c to 10f, the semiconductor device 1 can be held in a well-balanced manner. This makes it possible to easily break the connecting portion 70 in the step shown in FIG. 4E, and also makes it possible to prevent the connecting portion 70 from breaking before the step shown in FIG. 4E.

[0043] (Second embodiment) The second embodiment will be described. This embodiment is different from the first embodiment in the number of connecting portions 70, but is otherwise similar to the first embodiment, so only the differences from the first embodiment will be described.

[0044] 14, in this embodiment, when forming the through hole 60, the connecting portion 70 is formed on two parallel side surfaces among the side surfaces 10c to 10f. As a result, in the semiconductor device 1 divided into chip units, the protrusions 30 remain on two parallel side surfaces among the side surfaces 10c to 10f.

[0045] 14, the connecting portions 70 are not formed on the side surfaces 10c and 10e, but are formed only on the side surfaces 10d and 10f. However, the connecting portions 70 may not be formed on the side surfaces 10d and 10f, but may be formed only on the side surfaces 10c and 10e. By forming the connecting portions 70 only on the side surfaces 10d and 10f, the semiconductor device 1 divided into chip units will have the protrusions 30 remaining only on the side surfaces 10d and 10f among the side surfaces 10c to 10f. Furthermore, by forming the connecting portions 70 only on the side surfaces 10c and 10e, the semiconductor device 1 divided into chip units will have the protrusions 30 remaining only on the side surfaces 10c and 10e among the side surfaces 10c to 10f.

[0046] This embodiment has the same configuration and operation as the first embodiment, and can therefore obtain the same effects as the first embodiment.

[0047] Furthermore, according to the above embodiment, the following effects can be obtained.

[0048] (1) The connecting portions 70 are formed on two of the side surfaces 10c to 10f that are parallel to each other. The protrusions 30 are formed on two of the side surfaces 10c to 10f that are parallel to each other. By forming the connecting portions 70 so as to support each of the plurality of semiconductor devices 1 at two points in this manner, the force required to break all of the connecting portions 70 formed on one semiconductor device 1 is smaller than in the first embodiment. Therefore, even if the support layer 11 is thick, the semiconductor devices 1 can be easily separated into individual pieces.

[0049] (Third embodiment) The third embodiment will be described. This embodiment is different from the first embodiment in that the number of connecting portions 70 is changed, but the rest is the same as the first embodiment, so only the parts that are different from the first embodiment will be described.

[0050] 15, in this embodiment, when forming the through holes 60, two connecting portions 70 are formed on each of the side surfaces 10c to 10f. As a result, in the semiconductor device 1 divided into chip units, two protrusions 30 remain on each of the side surfaces 10c to 10f. The spacing between the two connecting portions 70 formed on each side surface is equal to each other. As a result, the spacing between the two protrusions 30 on each side surface of the semiconductor device 1 divided into chip units is equal to each other.

[0051] This embodiment has the same configuration and operation as the first embodiment, and can therefore obtain the same effects as the first embodiment.

[0052] Furthermore, according to the above embodiment, the following effects can be obtained.

[0053] (1) Two connecting portions 70 are formed on each of the side surfaces 10c to 10f. Two protrusions 30 are formed on each of the side surfaces 10c to 10f. In this manner, by forming the connecting portions 70 so as to support each of the plurality of semiconductor devices 1 at eight points, the force required to break all of the connecting portions 70 formed on one semiconductor device 1 is greater than that in the first embodiment. Therefore, even if the thickness of the support layer 11 is small, it is possible to prevent the connecting portions 70 from breaking and the semiconductor device 1 from being divided before the step shown in FIG. 4E. Furthermore, by appropriately setting the width w2 of the connecting portions 70, the connecting portions 70 can be easily broken in the step shown in FIG. 4E.

[0054] (Fourth embodiment) The fourth embodiment will be described. This embodiment is the same as the first embodiment except that the position of the connecting portion 70 is changed, and therefore only the differences from the first embodiment will be described.

[0055] Two adjacent side surfaces of the side surfaces 10c to 10f are referred to as the first side surface and the second side surface, respectively, and the other two side surfaces are referred to as the third side surface and the fourth side surface. Furthermore, as shown in FIG. 16, of the four corners of the surface 10a, the corner located on one side in the x direction and one side in the y direction with respect to the center of the surface 10a is referred to as the corner 10g. The corner located on the other side in the x direction and one side in the y direction with respect to the center of the surface 10a is referred to as the corner 10h. The corner located on the other side in the x direction and the other side in the y direction with respect to the center of the surface 10a is referred to as the corner 10i. The corner located on one side in the x direction and the other side in the y direction with respect to the center of the surface 10a is referred to as the corner 10j. Furthermore, of the corners 10g to 10j, the corner formed by the first and second side surfaces is referred to as the first corner, and the corner formed by the third and fourth side surfaces is referred to as the second corner.

[0056] In this embodiment, in the step shown in Fig. 4B, the connecting portions 70 are formed on the first and second side surfaces at positions closer to the first corners than to the centers of the first and second side surfaces. Also, in the step shown in Fig. 4B, the connecting portions 70 are formed on the third and fourth side surfaces at positions closer to the second corners than to the centers of the third and fourth side surfaces. Then, in the step shown in Fig. 4E, a force is applied to the first corners or the second corners to divide the multiple semiconductor devices 1 into chip units. As a result, the protrusions 30 are formed on the first and second sides at positions closer to the first corners than the centers of the first and second sides, and on the third and fourth sides at positions closer to the second corners than the centers of the third and fourth sides.

[0057] 16, the semiconductor device 1 located in the center is designated as semiconductor device 1a. In semiconductor device 1a, corner 10g corresponds to the first corner, corner 10i corresponds to the second corner, and side surfaces 10c to 10f correspond to the first to fourth side surfaces, respectively.

[0058] 4B, for semiconductor device 1a, connecting portions 70 are formed on side surfaces 10c and 10d at positions closer to corner 10g than to the centers of side surfaces 10c and 10d. Also, connecting portions 70 are formed on side surfaces 10e and 10f at positions closer to corner 10i than to the centers of side surfaces 10e and 10f. Then, in the step shown in FIG. 4E, force is applied to corner 10g or corner 10i to separate semiconductor device 1a from the adjacent semiconductor device 1.

[0059] As a result, in the semiconductor device 1a, the protrusions 30 are formed on the side surfaces 10c and 10d at positions closer to the corners 10g than to the centers of the side surfaces 10c and 10d, and on the side surfaces 10e and 10f at positions closer to the corners 10i than to the centers of the side surfaces 10e and 10f.

[0060] In the semiconductor devices 1 adjacent to the semiconductor device 1a on one side in the x direction, the other side in the x direction, one side in the y direction, and the other side in the y direction, the corner 10h corresponds to the first corner, and the corner 10j corresponds to the second corner. Also, the side surfaces 10d, 10e, 10f, and 10c correspond to the first to fourth side surfaces, respectively, and similarly, the connecting portions 70 and the protrusions 30 are formed.

[0061] As shown in Figure 16, semiconductor devices 1 having corners 10g and 10i as the first and second corners and semiconductor devices 1 having corners 10h and 10j as the first and second corners are arranged alternately in both the x and y directions.

[0062] This embodiment has the same configuration and operation as the first embodiment, and can therefore obtain the same effects as the first embodiment.

[0063] Furthermore, according to the above embodiment, the following effects can be obtained.

[0064] (1) On the first and second side surfaces, the connecting portions 70 are formed at positions closer to the first corners than the centers of the first and second side surfaces, and on the third and fourth side surfaces, the connecting portions 70 are formed at positions closer to the second corners than the centers of the third and fourth side surfaces. Then, a force is applied to the first corners or the second corners to separate the multiple semiconductor devices 1. The protrusions 30 are formed on the first and second side surfaces closer to the first corners than the centers of the first and second side surfaces, and on the third and fourth side surfaces closer to the second corners than the centers of the third and fourth side surfaces. By forming the connecting portions 70 near the corners of the surface 10a in this way, it becomes easier to apply force to each semiconductor device 1 in the process shown in FIG. 4E, and the multiple semiconductor devices 1 can be easily separated.

[0065] (Fifth embodiment) The fifth embodiment will be described. This embodiment is the same as the first embodiment except for the dimensions of the connecting portion 70, and therefore only the differences from the first embodiment will be described.

[0066] 17, in this embodiment, when forming the through hole 60, the width of the connecting portions 70 formed on two adjacent side surfaces of the side surfaces 10c to 10f is made larger than the width of the connecting portions 70 formed on the other two side surfaces. As a result, in the semiconductor device 1 divided into chip units, the protrusions 30 formed on two adjacent side surfaces of the side surfaces 10c to 10f have a larger width than the protrusions 30 formed on the other two side surfaces.

[0067] 17, the width w3 of the connecting portion 70 formed on the side surfaces 10d and 10e is larger than the width w4 of the connecting portion 70 formed on the side surfaces 10c and 10f. For example, the width w3 is 40 μm, and the width w4 is 20 μm. The region R3 to which the force is applied in the step shown in FIG. 4E is included in the corner formed by the side surfaces 10c and 10f.

[0068] This embodiment has the same configuration and operation as the first embodiment, and can therefore obtain the same effects as the first embodiment.

[0069] Also, according to the above embodiment, the following effects can be obtained.

[0070] (1) Make the width of the connecting portion 70 formed on two adjacent side surfaces among the side surfaces 10c to 10f larger than the width of the connecting portion 70 formed on the other two side surfaces. And the convex portions 30 formed on two adjacent side surfaces among the side surfaces 10c to 10f are wider than the convex portions 30 formed on the other two side surfaces. When dividing the plurality of semiconductor devices 1, the magnitude of the stress generated in each connecting portion 70 changes depending on the position where the force is applied, and a difference occurs in the dimensions of the connecting portion 70 left as the convex portion 30. In contrast, by adjusting the width of the connecting portion 70 according to the stress distribution, the difference in the dimensions of the connecting portion 70 left as the convex portion 30 can be reduced. For example, when dividing the plurality of semiconductor devices 1 by applying a force to the corner portion composed of the side surface 10c and the side surface 10f on one surface 10a, by setting w3 < w4, the difference in the dimensions of the four convex portions 30 can be reduced.

[0071] (Other embodiments) Note that the present disclosure is not limited to the above-described embodiments and can be appropriately changed. Also, the above embodiments are not independent of each other, and can be appropriately combined except when the combination is clearly impossible. Also, in the above embodiments, the elements constituting the embodiments are not necessarily essential except in cases where it is clearly specified as essential and cases where it is considered to be clearly essential in principle. Also, in the above embodiments, when numerical values such as the number, numerical value, amount, range, etc. of the components of the embodiments are mentioned, they are not limited to that specific number except in cases where it is clearly specified as essential and cases where it is clearly limited to a specific number in principle. Also, in the above embodiments, when referring to the shape, positional relationship, etc. of the components, etc., they are not limited to that shape, positional relationship, etc. except in cases where it is clearly specified and cases where it is clearly limited to a specific shape, positional relationship, etc. in principle.

[0072] For example, in the third to fifth embodiments, the connecting portions 70 may be formed on two parallel side surfaces among the side surfaces 10c to 10f, as in the second embodiment. Also, in the fourth and fifth embodiments, two connecting portions 70 may be formed on each of the side surfaces 10c to 10f, as in the third embodiment. Also, in the fifth embodiment, the connecting portions 70 may be formed near corners of one surface 10a, as in the fourth embodiment, and a force may be applied to these corners to separate the semiconductor devices 1 into multiple pieces.

[0073] Furthermore, the width w1 may be less than 50 μm. The width w2 may be less than 10 μm or greater than 20 μm. The angle θ may be less than 30 degrees or greater than 135 degrees. For example, the angle θ may be 180 degrees. That is, the recess 71 may not be formed in the connecting portion 70, and the side surface of the connecting portion 70 may be a flat surface.

[0074] Furthermore, three or more connecting portions 70 may be formed on each of the side surfaces 10c to 10f. Furthermore, when one or more connecting portions 70 are formed on each of the side surfaces 10c to 10f, the number of connecting portions 70 formed on the side surfaces 10c to 10f may differ. For example, one connecting portion 70 may be formed on each of the side surfaces 10c and 10e, and two connecting portions 70 may be formed on each of the side surfaces 10d and 10f. [Explanation of symbols]

[0075] 10 Substrate 10a one side 10b Other side 14 Recess 40 Dividing Line 60 through holes

Claims

1. A method for manufacturing a semiconductor device in which a recess (14) is formed on a surface (10b) opposite to the one surface (10a), comprising: Providing a substrate (10) including regions where a plurality of semiconductor devices are to be formed; removing a portion of the substrate; dividing the plurality of semiconductor devices along dividing lines (40); Removing a portion of the substrate Removing a portion of the substrate to form the recess, thinning the portion of the substrate, and A method for manufacturing a semiconductor device, comprising removing a portion of the substrate along a part of the dividing line to form a through hole (60) that penetrates the substrate in a thickness direction.

2. 2. The method for manufacturing a semiconductor device according to claim 1, wherein the through holes are formed by removing a portion of the substrate so as to leave connecting portions (70) that connect the plurality of semiconductor devices.

3. Removing a portion of the substrate the through-hole has a width of 50 μm or more in a direction perpendicular to the dividing line and the thickness direction of the substrate; 3. The method for manufacturing a semiconductor device according to claim 2, wherein the width of the connecting portion in the direction perpendicular to the extension direction and the thickness direction of the substrate is 10 μm or more and 20 μm or less, a V-shaped recess (71) is formed so that the central portion is narrower than both ends, and an angle formed by the side surfaces constituting the recess is 30 degrees or more and 135 degrees or less.

4. The method for manufacturing a semiconductor device according to claim 3 , wherein the angle of the connecting portion is set to be equal to or greater than 125 degrees and equal to or less than 135 degrees by removing the portion of the substrate.

5. 3. The method for manufacturing a semiconductor device according to claim 2, wherein the joining portion is formed so that the plurality of semiconductor devices are separated by applying a force of 1.2 N or more and 2.5 N or less to the one surface during the separating step by removing a portion of the substrate.

6. Removing a portion of the substrate The through holes are formed so that portions of the substrate constituting each of the plurality of semiconductor devices have a rectangular plate shape having four side surfaces (10c, 10d, 10e, 10f), The method for manufacturing a semiconductor device according to claim 2 , wherein one or more of the connecting portions are formed on each of the four side surfaces.

7. Removing a portion of the substrate The method for manufacturing a semiconductor device according to claim 6 , wherein two or more of the connecting portions are formed on each of the four side surfaces.

8. Two adjacent sides of the four sides are designated as a first side and a second side, and the other two sides are designated as a third side and a fourth side, Of the four corners (10g, 10h, 10i, 10j) of the rectangular surface, the corner formed by the first side surface and the second side surface is defined as a first corner, and the corner formed by the third side surface and the fourth side surface is defined as a second corner, Removing a portion of the substrate The connecting portion is formed at a position on the first side surface and the second side surface closer to the first corner portion than to a center portion of the first side surface and the second side surface, The connecting portion is formed at a position on the third side surface and the fourth side surface closer to the second corner portion than a center portion of the third side surface and the fourth side surface, The method for manufacturing a semiconductor device according to claim 6 , wherein the dividing step applies a force to the first corner portion or the second corner portion.

9. Removing a portion of the substrate 7. The method for manufacturing a semiconductor device according to claim 6, wherein the width of the connecting portions formed on two adjacent side surfaces of the four side surfaces is made larger than the width of the connecting portions formed on the other two side surfaces.

10. The method for manufacturing a semiconductor device according to claim 9 , wherein the dividing step divides the plurality of semiconductor devices by applying force to a corner of the one surface formed by the other two side surfaces.

11. Removing a portion of the substrate The through holes are formed so that portions of the substrate constituting each of the plurality of semiconductor devices have a rectangular plate shape having four side surfaces (10c, 10d, 10e, 10f), The method for manufacturing a semiconductor device according to claim 2 , wherein the connecting portions are formed on two of the four side surfaces that are parallel to each other.

12. The method for manufacturing a semiconductor device according to claim 1 , wherein the recess and the through hole are formed by removing the portion of the substrate using the same processing method.

13. A semiconductor device, A substrate (10) having a recess (14) formed on a surface (10b) opposite to one surface (10a), The semiconductor device has a protrusion (30) formed on a side surface (10c, 10d, 10e, 10f) of the substrate that connects the one surface and the other surface.

14. The semiconductor device according to claim 13 , wherein the convex portion has a trapezoidal shape along the one surface.

15. The substrate is a rectangular plate, The semiconductor device according to claim 13 , wherein one or more of the protrusions are formed on each of the four side surfaces of the substrate.

16. The semiconductor device according to claim 15 , wherein two or more of the protrusions are formed on each of the four side surfaces of the substrate.

17. Two adjacent sides of the four side surfaces are designated as a first side surface and a second side surface, and the other two side surfaces are designated as a third side surface and a fourth side surface, Of the four corners (10g, 10h, 10i, 10j) of the rectangular surface, the corner formed by the first side surface and the second side surface is defined as a first corner, and the corner formed by the third side surface and the fourth side surface is defined as a second corner, the protrusions are formed on the first side surface and the second side surface at positions closer to the first corners than to central portions of the first side surface and the second side surface, The semiconductor device according to claim 15 , wherein the third side surface and the fourth side surface are formed at positions closer to the second corner portion than to central portions of the third side surface and the fourth side surface.

18. 16. The semiconductor device according to claim 15, wherein the protrusions formed on two adjacent side surfaces of the four side surfaces of the substrate have a width greater than that of the protrusions formed on the other two side surfaces.

19. The substrate is a rectangular plate, The semiconductor device according to claim 13 , wherein the protrusions are formed on two of the four side surfaces of the substrate that are parallel to each other.

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