Glasses-type or goggle-type electronic device

Abstract

To provide a semiconductor device having excellent display quality.SOLUTION: A semiconductor device includes a display portion, a sight line sensing portion, a control portion, and an arithmetic portion, in which the sight line sensing portion is configured to obtain first data showing a direction of a sight line of a user, and the arithmetic portion is configured to determine a first region on the display portion including a gaze point of the user using the first data and increase resolution of an image displayed in the first region. The light emitted from the displayer may be used to acquire the first information indicating the orientation of the gaze.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] One aspect of the present invention relates to an electronic device.

[0002] Note that one embodiment of the present invention is not limited to the above technical field. The technical field of one embodiment of the invention disclosed in this specification relates to an object, a method, or a manufacturing method. Alternatively, one embodiment of the present invention relates to a process, a machine, a manufacture, or a composition of matter. Therefore, more specifically, examples of the technical field of one embodiment of the present invention disclosed in this specification include a semiconductor device, a display device, a light-emitting device, a power storage device, a memory device, a driving method thereof, or a manufacturing method thereof. [Background technology]

[0003] Wearable electronic devices and stationary electronic devices are becoming popular as electronic devices equipped with display devices for Augmented Reality (AR) or Virtual Reality (VR). Examples of wearable electronic devices include head-mounted displays (HMDs) and eyeglass-type electronic devices. Examples of stationary electronic devices include head-up displays (HUDs).

[0004] In electronic devices such as HMDs, where the display unit is close to the user, the user can easily see the pixels, which can cause a strong sense of graininess, which can diminish the immersive and realistic feel of AR or VR. For this reason, it is preferable to provide an HMD with a display device that has fine pixels so that the pixels are not visible to the user. Patent Document 1 discloses a method for realizing an HMD with fine pixels by using transistors that can be driven at high speed. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2000-2856 Summary of the Invention [Problem to be solved by the invention]

[0006] HMDs can enhance the sense of immersion and realism by providing separate displays for the right and left eyes, but reducing power consumption and production costs is difficult. Also, because HMDs are worn by the user on the head, they are required to be lightweight so that they do not cause fatigue even when used for long periods of time.

[0007] An object of one embodiment of the present invention is to provide a display device, semiconductor device, electronic device, or the like with high display quality. Another object is to provide a display device, semiconductor device, electronic device, or the like with high reliability. Another object is to provide a display device, semiconductor device, electronic device, or the like with low power consumption. Another object is to provide a lightweight display device, semiconductor device, electronic device, or the like. Another object is to provide a display device, semiconductor device, electronic device, or the like with high productivity. Another object is to provide a novel display device, semiconductor device, electronic device, or the like.

[0008] Note that the description of these problems does not preclude the existence of other problems. Note that one embodiment of the present invention does not necessarily solve all of these problems. Note that problems other than these will become apparent from the description of the specification, drawings, claims, etc., and it is possible to extract other problems from the description of the specification, drawings, claims, etc. [Means for solving the problem]

[0009] One embodiment of the present invention is a semiconductor device having a display unit, a gaze detection unit, and a calculation unit, where the gaze detection unit has a function of acquiring first information indicating the direction of a user's gaze, and the calculation unit has a function of using the first information to determine a first area on the display unit that includes the user's gaze point, and a function of increasing the resolution of an image displayed in the first area.

[0010] The calculation unit may have a function of determining a second area adjacent to the outside of the first area. Preferably, the resolution of the image displayed in the first area is higher than the resolution of the image displayed in the second area.

[0011] The first information may be acquired using light emitted from the display unit. The calculation unit preferably has a function of increasing the resolution of the image displayed in the first area using a neural network. The resolution of the image displayed in the first area may be determined depending on the video scene.

[0012] The semiconductor device can be used together with an optical member in an eyeglass-type or goggle-type electronic device.

[0013] Another aspect of the present invention is an electronic device including a display device having a plurality of pixels in a display area, a first lens, a second lens, and first to fourth mirrors. The display area includes a first display area and a second display area. The first lens is disposed between the first display area and the first mirror. A first image displayed in the first display area is projected onto the first mirror through the first lens. The first mirror reflects the first image projected toward the third mirror. The third mirror transmits the first external light and reflects the first image. The second lens is disposed between the second display area and the second mirror. A second image displayed in the second display area is projected onto the second mirror through the second lens. The second mirror reflects the second image projected toward the fourth mirror. The fourth mirror transmits the second external light and reflects the second image. A user of the electronic device according to this aspect of the present invention can simultaneously view the first external light, the second external light, the first image, and the second image.

[0014] Another aspect of the present invention is an electronic device comprising: a display device having a plurality of pixels in a display area; a first lens, a second lens, a first mirror, a second mirror, a third mirror, and a fourth mirror; the display area comprises a first display area and a second display area; the first lens is disposed between the first display area and the first mirror; the first mirror has a function of reflecting a first image displayed in the first display area to the third mirror; the third mirror has a function of reflecting the first image and a function of transmitting first external light; the second lens is disposed between the second display area and the second mirror; the second mirror has a function of reflecting a second image displayed in the second display area to the fourth mirror; and the fourth mirror has a function of reflecting the second image and a function of transmitting second external light.

[0015] The first and second mirrors may be convex mirrors, and the third and fourth mirrors may be concave mirrors.

[0016] The user can simultaneously view the first external light, the second external light, the first image, and the second image. The resolution of the display area is preferably 4K or higher, and more preferably 8K or higher. The resolution of the display area may be 1000 ppi or higher and 10000 ppi or lower. For example, it may be 2000 ppi or higher and 6000 ppi or lower, or 3000 ppi or higher and 5000 ppi or lower. The aspect ratio of the display area may be, for example, 16:9. [Effects of the Invention]

[0017] According to one embodiment of the present invention, a display device, a semiconductor device, an electronic device, or the like with high display quality can be provided. Alternatively, a highly reliable display device, a semiconductor device, an electronic device, or the like can be provided. Alternatively, a display device, a semiconductor device, an electronic device, or the like with low power consumption can be provided. Alternatively, a lightweight display device, a semiconductor device, an electronic device, or the like can be provided. Alternatively, a highly productive display device, a semiconductor device, an electronic device, or the like can be provided. Alternatively, a novel display device, a semiconductor device, an electronic device, or the like can be provided.

[0018] Note that the description of these effects does not preclude the existence of other effects. Note that one embodiment of the present invention does not necessarily have all of these effects. Note that effects other than these will become apparent from the description in the specification, drawings, claims, etc., and it is possible to extract other effects from the description in the specification, drawings, claims, etc. [Brief explanation of the drawings]

[0019] [Figure 1] 1A and 1B are diagrams illustrating an example of the configuration of an electronic device. [Figure 2] 2A and 2B are diagrams illustrating an example of the configuration of an electronic device. [Figure 3] FIG. 3A and FIGS. 3B1 to 3B5 are diagrams illustrating an example of the configuration of a display device. [Figure 4] 4A to 4C are diagrams illustrating examples of the configuration of a pixel circuit. [Figure 5] 5A and 5B are diagrams illustrating an example of the configuration of a display device. [Figure 6] 6A to 6C are diagrams illustrating an example of the operation of the electronic device. [Figure 7] 7A and 7B are diagrams illustrating an example of the operation of the electronic device. [Figure 8] FIG. 8 is a diagram illustrating an example of the algorithm. [Figure 9] 9A to 9D are diagrams illustrating configuration examples of light-emitting elements. [Figure 10] 10A to 10D are diagrams showing configuration examples of a display device. [Figure 11] 11A to 11D are diagrams showing configuration examples of a display device. [Figure 12] FIG. 12 is a cross-sectional view showing an example of the configuration of a display device. [Figure 13] FIG. 13 is a cross-sectional view showing an example of the configuration of a display device. [Figure 14] FIG. 14 is a cross-sectional view showing an example of the configuration of a display device. [Figure 15]FIG. 15 is a cross-sectional view showing an example of the configuration of a display device. [Figure 16] FIG. 16 is a cross-sectional view showing an example of the configuration of a display device. [Figure 17] FIG. 17 is a cross-sectional view showing an example of the configuration of a display device. [Figure 18] 18A is a top view illustrating an example of the structure of a transistor, and FIGS. 18B and 18C are cross-sectional views illustrating an example of the structure of a transistor. [Figure 19] Fig. 19A is a diagram illustrating the classification of crystal structures, Fig. 19B is a diagram illustrating the XRD spectrum of a CAAC-IGZO film, and Fig. 19C is a diagram illustrating the electron microbeam diffraction pattern of a CAAC-IGZO film. DETAILED DESCRIPTION OF THE INVENTION

[0020] In this specification, a semiconductor device is a device that utilizes semiconductor characteristics, and refers to a circuit including a semiconductor element (transistor, diode, photodiode, etc.), a device having such a circuit, etc. It also refers to any device that can function by utilizing semiconductor characteristics. For example, an integrated circuit, a chip including an integrated circuit, or an electronic component that houses a chip in a package are examples of semiconductor devices. Furthermore, memory devices, display devices, light-emitting devices, lighting devices, electronic devices, etc. are themselves semiconductor devices and may include semiconductor devices.

[0021] Furthermore, when it is stated in this specification that X and Y are connected, it is understood that the following cases are disclosed in this specification: when X and Y are electrically connected, when X and Y are functionally connected, and when X and Y are directly connected. Therefore, it is not limited to a predetermined connection relationship, for example, a connection relationship shown in a figure or text, and it is understood that connections other than those shown in a figure or text are also disclosed in a figure or text. X and Y are understood to be objects (e.g., devices, elements, circuits, wiring, electrodes, terminals, conductive films, layers, etc.).

[0022] As an example of a case where X and Y are electrically connected, one or more elements (e.g., switches, transistors, capacitance elements, inductors, resistance elements, diodes, display devices, light-emitting devices, loads, etc.) that enable the electrical connection between X and Y can be connected between X and Y. The on and off states of the switches are controlled. In other words, the switches have the function of being in a conductive state (on state) or a non-conductive state (off state), and controlling whether or not a current flows.

[0023] As an example of a case where X and Y are functionally connected, one or more circuits that enable the functional connection between X and Y (for example, logic circuits (inverters, NAND circuits, NOR circuits, etc.), signal conversion circuits (digital-analog conversion circuits, analog-digital conversion circuits, gamma correction circuits, etc.), potential level conversion circuits (power supply circuits (boost circuits, step-down circuits, etc.), level shifter circuits that change the potential level of signals, etc.), voltage sources, current sources, switching circuits, amplifier circuits (circuits that can increase the signal amplitude or current amount, operational amplifiers, differential amplifier circuits, source follower circuits, buffer circuits, etc.), signal generation circuits, memory circuits, control circuits, etc.) can be connected between X and Y. As an example, even if another circuit is sandwiched between X and Y, X and Y are considered to be functionally connected if a signal output from X is transmitted to Y.

[0024] When it is explicitly stated that X and Y are electrically connected, this includes the case where X and Y are electrically connected (i.e., the case where X and Y are connected with another element or circuit between them) and the case where X and Y are directly connected (i.e., the case where X and Y are connected without another element or circuit between them).

[0025] Furthermore, for example, it can be expressed as follows: "X, Y, and the source (or first terminal, etc.) and drain (or second terminal, etc.) of the transistor are electrically connected to each other, and are electrically connected in the order of X, the source (or first terminal, etc.) of the transistor, the drain (or second terminal, etc.) of the transistor, and Y." Or, it can be expressed as follows: "The source (or first terminal, etc.) of the transistor is electrically connected to X, and the drain (or second terminal, etc.) of the transistor is electrically connected to Y, and X, the source (or first terminal, etc.) of the transistor, the drain (or second terminal, etc.) of the transistor, and Y are electrically connected in this order." Or, it can be expressed as follows: "X is electrically connected to Y via the source (or first terminal, etc.) and drain (or second terminal, etc.) of the transistor, and X, the source (or first terminal, etc.) of the transistor, the drain (or second terminal, etc.) of the transistor, and Y are provided in this connection order." By using expressions similar to these examples to define the order of connections in a circuit configuration, the source (or first terminal, etc.) and drain (or second terminal, etc.) of a transistor can be distinguished and the technical scope can be determined. Note that these expressions are merely examples and are not limiting. Here, X and Y are assumed to be objects (e.g., devices, elements, circuits, wiring, electrodes, terminals, conductive films, layers, etc.).

[0026] Note that even when independent components are shown electrically connected in a circuit diagram, one component may have the functions of multiple components. For example, if part of a wiring also functions as an electrode, one conductive film has the functions of both a wiring and an electrode. Therefore, in this specification, the term "electrically connected" also includes such cases where one conductive film has the functions of multiple components.

[0027] Furthermore, in this specification and the like, the term "resistance element" can refer to, for example, a circuit element, wiring, or the like having a resistance value higher than 0 Ω. Therefore, in this specification and the like, the term "resistance element" includes wiring having a resistance value, a transistor in which a current flows between the source and drain, a diode, a coil, and the like. Therefore, the term "resistance element" can be replaced with terms such as "resistance," "load," or "region having a resistance value," and conversely, the terms "resistance," "load," or "region having a resistance value" can be replaced with terms such as "resistance element." The resistance value can be, for example, preferably 1 mΩ or more and 10 Ω or less, more preferably 5 mΩ or more and 5 Ω or less, and even more preferably 10 mΩ or more and 1 Ω or less. Furthermore, for example, the resistance value can be, for example, 1 Ω or more and 1×10 9 It may be set to Ω or less.

[0028] When a wiring is used as a resistor, the resistance value may be determined by the length of the wiring, or a conductor having a different resistivity from that of the wiring may be used as the resistor, or the resistance value may be determined by doping impurities into a semiconductor.

[0029] Furthermore, in this specification, the term "capacitive element" can refer to, for example, a circuit element having a capacitance value greater than 0 F, a region of wiring having a capacitance value greater than 0 F, parasitic capacitance, or the gate capacitance of a transistor. Therefore, in this specification, the term "capacitive element" includes not only a circuit element including a pair of electrodes and a dielectric between the electrodes, but also parasitic capacitance occurring between wiring and one of the source or drain of a transistor and the gate, and the like. Furthermore, terms such as "capacitive element," "parasitic capacitance," and "gate capacitance" can be replaced with terms such as "capacitance," and conversely, the term "capacitance" can be replaced with terms such as "capacitive element," "parasitic capacitance," and "gate capacitance." Furthermore, the term "pair of electrodes" in "capacitance" can be replaced with "pair of conductors," "pair of conductive regions," or "pair of regions." The capacitance value can be, for example, 0.05 fF or more and 10 pF or less. It can also be, for example, 1 pF or more and 10 μF or less.

[0030] In this specification, a transistor has three terminals called a gate, a source, and a drain. The gate is a control terminal that controls the conduction state of the transistor. The two terminals that function as a source or a drain are the input / output terminals of the transistor. One of the two input / output terminals becomes a source and the other becomes a drain depending on the transistor's conductivity type (n-channel or p-channel) and the level of the potential applied to the three terminals of the transistor. Therefore, in this specification, the terms source and drain are interchangeable. In addition, in this specification, when describing the connection relationship of a transistor, the terms "one of the source or drain" (or first electrode or first terminal) and "the other of the source or drain" (or second electrode or second terminal) are used. Note that, depending on the transistor structure, a backgate may be included in addition to the three terminals described above. In this case, in this specification, one of the gate or backgate of the transistor may be referred to as the first gate, and the other of the gate or backgate of the transistor may be referred to as the second gate. Furthermore, for the same transistor, the terms "gate" and "backgate" may be interchangeable. Furthermore, when a transistor has three or more gates, the gates may be referred to as a first gate, a second gate, a third gate, and so on in this specification and the like.

[0031] Furthermore, in this specification and the like, the term "node" can be rephrased as a terminal, wiring, electrode, conductive layer, conductor, impurity region, etc., depending on the circuit configuration, device structure, etc. Furthermore, the term "node" can be rephrased as a terminal, wiring, etc.

[0032] Furthermore, in this specification and the like, the terms "voltage" and "potential" can be interchanged as appropriate. "Voltage" refers to the potential difference from a reference potential. For example, if the reference potential is the ground potential (earth potential), then "voltage" can be interchanged with "potential." Note that ground potential does not necessarily mean 0 V. Furthermore, potential is relative, and as the reference potential changes, the potential applied to wiring, the potential applied to a circuit, etc., the potential output from a circuit, etc. also changes.

[0033] Furthermore, in this specification and the like, the terms "high-level potential (also referred to as "high-level potential," "H potential," or "H")" and "low-level potential (also referred to as "low-level potential," "L potential," or "L")" do not refer to specific potentials. For example, when two wirings are both described as "functioning as wirings that supply high-level potentials," the high-level potentials provided by both wirings do not have to be equal to each other. Similarly, when two wirings are both described as "functioning as wirings that supply low-level potentials," the low-level potentials provided by both wirings do not have to be equal to each other.

[0034] "Current" refers to the phenomenon of charge transfer (electrical conduction). For example, a statement that "electrical conduction of a positively charged body is occurring" can be rephrased as "electrical conduction of a negatively charged body is occurring in the opposite direction." Therefore, in this specification, unless otherwise specified, "current" refers to the phenomenon of charge transfer (electrical conduction) associated with the movement of carriers. The carriers referred to here include electrons, holes, anions, cations, complex ions, etc., and the carriers differ depending on the system through which the current flows (e.g., semiconductor, metal, electrolyte, vacuum, etc.). Furthermore, the "direction of current" in wiring, etc., refers to the direction in which positive carriers move and is expressed as a positive current amount. In other words, the direction in which negative carriers move is opposite to the direction of current and is expressed as a negative current amount. Therefore, in this specification, etc., unless otherwise specified regarding the positive / negative sign of the current (or the direction of current), a statement such as "current flows from element A to element B" can be rephrased as "current flows from element B to element A," etc. Furthermore, statements such as "current is input to element A" can be rephrased as "current is output from element A" or the like.

[0035] Furthermore, in this specification, the ordinal numbers "first," "second," and "third" are used to avoid confusion between components. Therefore, they do not limit the number of components. Furthermore, they do not limit the order of the components. For example, a component referred to as "first" in one embodiment of this specification may be a component referred to as "second" in another embodiment, in the claims, etc. Furthermore, for example, a component referred to as "first" in one embodiment of this specification, etc. may be omitted in another embodiment, in the claims, etc.

[0036] Furthermore, in this specification, terms indicating position, such as "above," "below," "upward," or "belowward," may be used for convenience in describing the positional relationship between components with reference to the drawings. Furthermore, the positional relationship between components changes as appropriate depending on the orientation of each configuration. Therefore, the terms are not limited to those used in the specification, but may be rephrased appropriately depending on the situation. For example, the expression "insulator located on the upper surface of a conductor" can be rephrased as "insulator located on the lower surface of a conductor" by rotating the orientation of the drawing by 180 degrees. Furthermore, the expression "insulator located on the upper surface of a conductor" can be rephrased as "insulator located on the left (or right) surface of a conductor" by rotating the orientation of the drawing by 90 degrees.

[0037] Furthermore, in this specification, the terms "above" and "below" do not limit the positional relationship of components to being directly above or below, and being in direct contact with each other. For example, the expression "electrode B on insulating layer A" does not require that electrode B be formed in direct contact with insulating layer A, and does not exclude the inclusion of other components between insulating layer A and electrode B.

[0038] Furthermore, in this specification, the terms "adjacent" and "close to" do not necessarily mean that components are in direct contact with each other. For example, the expression "electrode B adjacent to insulating layer A" does not require that insulating layer A and electrode B are in direct contact with each other, and does not exclude the inclusion of other components between insulating layer A and electrode B.

[0039] Furthermore, in this specification, terms such as "overlap" do not limit the state of the stacking order of components, etc. For example, the expression "electrode B overlapping insulating layer A" is not limited to the state "electrode B is formed on insulating layer A," but does not exclude states such as "electrode B is formed below insulating layer A" or "electrode B is formed on the right (or left) side of insulating layer A."

[0040] Furthermore, in this specification and the like, terms such as "film" and "layer" can be interchanged depending on the situation. For example, the term "conductive layer" may be interchanged with the term "conductive film." Or, for example, the term "insulating film" may be interchanged with the term "insulating layer." Or, in some cases or depending on the situation, terms such as "film" and "layer" may not be used and may be interchanged with other terms. For example, the terms "conductive layer" or "conductive film" may be interchanged with the term "conductor." Or, for example, the terms "insulating layer" and "insulating film" may be interchanged with the term "insulator."

[0041] Furthermore, in this specification and the like, terms such as "electrode," "wiring," and "terminal" do not functionally limit these components. For example, an "electrode" may be used as part of a "wiring," and vice versa. Furthermore, the terms "electrode" and "wiring" include cases where multiple "electrodes" or "wirings" are integrally formed. Furthermore, for example, a "terminal" may be used as part of a "wiring" or "electrode," and vice versa. Furthermore, the term "terminal" includes cases where multiple "electrodes," "wirings," "terminals," etc. are integrally formed. Therefore, for example, an "electrode" can be part of a "wiring" or "terminal," and a "terminal" can be part of a "wiring" or "electrode." Furthermore, terms such as "electrode," "wiring," and "terminal" may be replaced with terms such as "region" in some cases.

[0042] Furthermore, in this specification and the like, terms such as "wiring," "signal line," and "power line" may be interchangeable depending on the circumstances. For example, the term "wiring" may be changed to the term "signal line." For example, the term "wiring" may be changed to the term "power line." Vice versa, terms such as "signal line" and "power line" may be changed to the term "wiring." A term such as "power line" may be changed to the term "signal line." Vice versa, terms such as "signal line" may be changed to the term "power line." Furthermore, the term "potential" applied to a wiring may be changed to the term "signal" depending on the circumstances. Vice versa, terms such as "signal" may be changed to the term "potential."

[0043] In this specification and the like, the term "impurities" in semiconductors refers to, for example, elements other than the main components constituting the semiconductor layer. For example, an element with a concentration of less than 0.1 atomic % is an impurity. The presence of impurities can cause, for example, an increase in the defect level density of the semiconductor, a decrease in carrier mobility, and a decrease in crystallinity. When the semiconductor is an oxide semiconductor, impurities that change the semiconductor characteristics include, for example, Group 1 elements, Group 2 elements, Group 13 elements, Group 14 elements, Group 15 elements, and transition metals other than the main components, particularly, for example, hydrogen (also contained in water), lithium, sodium, silicon, boron, phosphorus, carbon, and nitrogen. Specifically, when the semiconductor is a silicon layer, impurities that change the semiconductor characteristics include, for example, oxygen, Group 1 elements excluding hydrogen, Group 2 elements, Group 13 elements, and Group 15 elements.

[0044] In this specification, a switch refers to a device that can be in a conductive state (on state) or a non-conductive state (off state) and has the function of controlling whether or not a current flows. Alternatively, a switch refers to a device that has the function of selecting and switching a path through which a current flows. Examples include electrical switches and mechanical switches. In other words, the switch is not limited to a specific type as long as it can control a current.

[0045] Examples of electrical switches include transistors (e.g., bipolar transistors, MOS transistors, etc.), diodes (e.g., PN diodes, PIN diodes, Schottky diodes, MIM (Metal Insulator Metal) diodes, MIS (Metal Insulator Semiconductor) diodes, diode-connected transistors, etc.), and logic circuits combining these. When a transistor is used as a switch, the "conductive state" of the transistor refers to a state in which the source electrode and drain electrode of the transistor can be considered to be electrically short-circuited. The "non-conductive state" of the transistor refers to a state in which the source electrode and drain electrode of the transistor can be considered to be electrically disconnected. When a transistor is operated simply as a switch, the polarity (conductivity type) of the transistor is not particularly limited.

[0046] An example of a mechanical switch is a switch that uses MEMS (Micro Electro Mechanical Systems) technology. This switch has a mechanically movable electrode, and the movement of the electrode controls conduction and non-conduction.

[0047] As used herein, "parallel" refers to a state in which two straight lines are arranged at an angle of -10° or more and 10° or less. This therefore includes cases in which the angle is -5° or more and 5° or less. "Substantially parallel" or "roughly parallel" refers to a state in which two straight lines are arranged at an angle of -30° or more and 30° or less. "Perpendicular" refers to a state in which two straight lines are arranged at an angle of 80° or more and 100° or less. This therefore includes cases in which the angle is 85° or more and 95° or less. "Substantially perpendicular" or "approximately perpendicular" refers to a state in which two straight lines are arranged at an angle of 60° or more and 120° or less.

[0048] In this specification and elsewhere, when referring to counting values ​​and measurement values, or to objects, methods, and events that can be converted into counting values ​​or measurement values, terms such as "identical," "same," "equal," or "uniform" are intended to include an error of plus or minus 20%, unless otherwise specified.

[0049] In this specification and the like, a metal oxide refers to an oxide of a metal in a broad sense. Metal oxides are classified into oxide insulators, oxide conductors (including transparent oxide conductors), oxide semiconductors (also referred to as oxide semiconductors or simply as OSs), and the like. For example, when a metal oxide is used in a semiconductor layer of a transistor, the metal oxide may be referred to as an oxide semiconductor or a metal oxide semiconductor. In other words, when a channel of a transistor having at least one of an amplifying function, a rectifying function, and a switching function is formed in a metal oxide, the metal oxide can be referred to as an oxide semiconductor or a metal oxide semiconductor. Furthermore, the term "OS transistor" can be rephrased as a transistor having a metal oxide or an oxide semiconductor.

[0050] In this specification and the like, nitrogen-containing metal oxides may also be collectively referred to as metal oxides. Nitrogen-containing metal oxides may also be referred to as metal oxynitrides.

[0051] In this specification and the like, the configurations shown in each embodiment can be combined as appropriate with the configurations shown in other embodiments to form one aspect of the present invention. When multiple configuration examples are shown in one embodiment, the configuration examples can be combined as appropriate with each other.

[0052] The embodiments described in this specification will be described with reference to the drawings. However, it will be readily understood by those skilled in the art that the embodiments can be implemented in many different ways, and that various changes in form and details can be made without departing from the spirit and scope of the invention. Therefore, the present invention should not be interpreted as being limited to the description of the embodiments. Note that in the configuration of the invention of the embodiments, the same reference numerals are used in different drawings for the same parts or parts having similar functions, and repeated description thereof may be omitted. Also, to make the drawings easier to understand, some components may be omitted in perspective views, top views, etc. Also, to make the drawings easier to understand, notations such as hatching may be omitted.

[0053] In addition, in the drawings of this specification, the size, layer thickness, or region may be exaggerated for clarity. Therefore, the size or aspect ratio is not necessarily limited. Note that the drawings are schematic illustrations of ideal examples and are not limited to the shapes or values ​​shown in the drawings. For example, variations in signal, voltage, or current due to noise, or variations in signal, voltage, or current due to timing deviations may be included.

[0054] In this specification, when the same reference numeral is used for multiple elements, and particularly when it is necessary to distinguish between them, the reference numeral may be suffixed with a distinguishing character such as "A," "a," "_1," "[i]," or "[m,n]." For example, multiple light-emitting elements 70 may be referred to as light-emitting element 70R, light-emitting element 70G, or light-emitting element 70B. In other words, when describing matters common to light-emitting element 70R, light-emitting element 70G, and light-emitting element 70B, or when there is no need to distinguish between them, they may be simply referred to as "light-emitting element 70."

[0055] (Embodiment 1) An electronic device 100A and an electronic device 100B according to one embodiment of the present invention will be described with reference to the drawings.

[0056] <Electronic equipment 100A> FIG. 1 is a diagram illustrating an example of the configuration of an electronic device 100A according to an embodiment of the present invention. FIG. 1A is a perspective external view of the electronic device 100A according to an embodiment of the present invention. The electronic device 100A is an eyeglass-type electronic device. The electronic device 100A includes a housing 101 and a mounting unit 103 (mounting units 103R and 103L). The electronic device 100A is a wearable electronic device intended for augmented reality (AR) applications.

[0057] The electronic device 100A also includes a sensor unit 50, a sensor unit 51 (sensor unit 51R and sensor unit 51L), a power supply unit (battery 104 and voltage generation unit 105), a control unit 106, a communication unit 107, and an antenna 108 (antenna 108R and antenna 108L). For example, the electronic device 100A includes the battery 104, the voltage generation unit 105, and the antenna 108R in the wearing unit 103R, and the control unit 106, the communication unit 107, and the antenna 108L in the wearing unit 103L.

[0058] The electronic device 100A also includes earphones 121 (earphones 121R and 121L). Instead of the earphones 121, bone conduction acoustic devices 122 (acoustic devices 122R and 122L) may be included. Either one or both of the earphones 121 and the bone conduction acoustic devices 122 may be included. For example, the electronic device 100A includes the bone conduction acoustic device 122R in the attachment unit 103R and the bone conduction acoustic device 122L in the attachment unit 103L. Using the bone conduction acoustic device 122 allows the user to hear the acoustic signal transmitted from the electronic device 100A and the surrounding sounds simultaneously.

[0059] [Sensor section] The sensor units 50 and 51 have the function of acquiring one or more pieces of information from the user's vision, hearing, touch, taste, and smell. More specifically, the sensor units 50 and 51 have the function of detecting or measuring force, displacement, position, speed, acceleration, angular velocity, rotation speed, distance, light, magnetism, temperature, sound, time, electric field, current, voltage, power, radiation, humidity, gradient, vibration, odor, and infrared light. The electronic device 100A may include one or more sensor units 50. The electronic device 100A may include one or more sensor units 51.

[0060] For example, the sensor unit 50 can be used to capture a picture of the surrounding scenery and display it on the display device 10, which is a type of semiconductor device. The sensor unit 50 can also be used to measure the surrounding temperature, humidity, illuminance, odor, etc.

[0061] In addition, the sensor unit 51 can measure, for example, the number of blinks of the user, eyelid movement, pupil size, body temperature, pulse rate, blood oxygen saturation, etc., and detect the user's fatigue level, health condition, etc. The electronic device 100A can detect the user's fatigue level, health condition, etc., and display a warning or the like on the display device 10.

[0062] Furthermore, the user's line of sight may be detected by capturing an image of the user's pupils using the sensor unit 51. By taking into account the behavior of the user's line of sight, the accuracy of detecting the fatigue level can be improved.

[0063] Furthermore, by detecting the user's line of sight, it is possible to know the user's focus point. For example, by combining the detection of the focus point and the number of blinks per unit time, it is possible to select an icon displayed in the display area of ​​the display device 10. That is, by detecting the user's line of sight and eyelid movements, it is possible to realize the operation of clicking an icon with a mouse. That is, by detecting the user's line of sight and eyelid movements, it is possible to control the operation of the electronic device 100. Because the user does not need to use both hands to operate the electronic device 100A, they can perform input operations and the like with their hands free (with both hands free).

[0064] Furthermore, in addition to the above functions, sensor unit 50 and / or sensor unit 51 preferably have a function to measure brain waves. For example, sensor unit 50 or sensor unit 51 may have a mechanism to have multiple electrodes that contact the head and measure brain waves from a weak current flowing through the electrodes. By providing sensor unit 50 or sensor unit 51 with a function to measure brain waves, it is possible to realize an operation such as displaying an image or a portion of an image at a location on the display area where the user is thinking. Even in this case, the user does not need to use both hands to operate electronic device 100A, and can therefore perform input operations and the like without holding anything in their hands.

[0065] [Power supply section] Battery 104 has a function of storing power required for operation of electronic device 100A and a function of supplying the power required for operation. Voltage generation unit 105 has a function of generating a voltage required for operation of electronic device 100A and a function of keeping the voltage constant. A primary battery or a secondary battery can be used as battery 104. Note that, for example, a lithium ion secondary battery can be used as the secondary battery. Battery 104 and voltage generation unit 105 can be collectively referred to as a power supply unit.

[0066] 1A illustrates a configuration including battery 104, but is not limited to this. Electronic device 100A may not be provided with battery 104 and may be configured to receive power directly from an external power source. Electronic device 100A may also include battery 104 and have a function to receive power from an external source.

[0067] [Control Unit] Control unit 106 has a function of controlling the operation of electronic device 100A. Control unit 106 can include a CPU, memory, etc. The memory has a function of storing various programs used by electronic device 100A, as well as data necessary for the operation of electronic device 100A.

[0068] The control unit 106 also has a function of supplying an image signal to the display device 10. The control unit 106 can also perform processing to increase the resolution (up-convert) or decrease the resolution (down-convert) of the image signal. This allows low-resolution image data to be up-converted to match the resolution of the display area (also referred to as the "display unit"). Alternatively, it can down-convert high-resolution image data. This allows the display device 10 to display high-quality images.

[0069] Furthermore, the control unit 106 may include a GPU etc. as necessary. The control unit 106 can function as an application processor that has the functions necessary for the operation of the electronic device 100A.

[0070] [Communications Department] The communication unit 107 has a function of performing wireless or wired communication. In particular, a function of performing wireless communication is preferable because it can reduce the number of components such as cables for connection.

[0071] If communication unit 107 has a function of wireless communication, communication unit 107 can communicate via antenna 108. Furthermore, as a communication protocol or communication technology, communication standards such as LTE (Long Term Evolution), GSM (Global System for Mobile Communication: registered trademark), EDGE (Enhanced Data Rates for GSM Evolution), CDMA2000 (Code Division Multiple Access 2000), and W-CDMA (registered trademark), or specifications standardized by IEEE such as Wi-Fi (registered trademark), Bluetooth (registered trademark), and ZigBee (registered trademark), can be used. Furthermore, the third generation mobile communication system (3G), fourth generation mobile communication system (4G), or fifth generation mobile communication system (5G) defined by the International Telecommunication Union (ITU) can also be used.

[0072] The communication unit 107 can connect the electronic device 100A to other devices via computer networks such as the Internet, which is the foundation of the World Wide Web (WWW), an intranet, an extranet, a PAN (Personal Area Network), a LAN (Local Area Network), a CAN (Campus Area Network), a MAN (Metropolitan Area Network), a WAN (Wide Area Network), and a GAN (Global Area Network), thereby inputting and outputting information.

[0073] Furthermore, by providing multiple antennas 108, the stability of wireless communication can be improved.

[0074] The communication unit 107 may also be electrically connected to an external port (not shown) provided in the electronic device 100. The external port may be configured to be connectable to an external device such as a computer or a printer via a cable. A typical example is a USB terminal. The external port may also have a terminal for connecting to a LAN, a terminal for receiving digital broadcasts, a terminal for connecting an AC adapter, or the like. The external port may also be configured to include a transceiver for optical communication using infrared light, visible light, ultraviolet light, or the like, in addition to a wired communication. The communication unit 107 may also be electrically connected to, for example, one or more buttons or switches (also called "casing switches"; not shown) provided in the electronic device 100.

[0075] FIG. 1B is a top view of the interior of a housing 101 included in electronic device 100A. Electronic device 100A includes a sensor unit 50 and a pair of display areas 102 (display area 102R and display area 102L) at the front of housing 101. Display area 102 functions as a half mirror. Electronic device 100A also includes a display device 10, a lens 11 (lens 11R and lens 11L), a mirror 12 (mirror 12R and mirror 12L), and a separator 13 inside housing 101. Mirror 12 is a curved mirror that functions as a total-reflection convex mirror. Note that, depending on the purpose, mirror 12 may be a concave mirror or a plane mirror. Display area 102, which functions as a half mirror, is similar to mirror 12.

[0076] FIG. 3A shows a block diagram illustrating the configuration of display device 10. Display device 10 includes a display area 235, a peripheral circuit area 232, and a peripheral circuit area 233. Display area 235 includes a plurality of pixels 230 arranged in a matrix. An image can be displayed in display area 235 by controlling the amount of light emitted by each pixel 230. Display area 235 also includes display area 235R and display area 235L. The configuration of display device 10 will be described later.

[0077] Lens 11R has the function of projecting an image (also referred to as "light 21R") displayed in display area 235R onto mirror 12R (see FIG. 1B). Light 21R projected onto mirror 12R is reflected by mirror 12R, which is a convex mirror, and is enlarged and projected onto display area 102R. Display area 102R is a half mirror and functions as, for example, a concave mirror. Display area 102R transmits external light 22R incident from outside housing 101 and further reflects light 21R reflected by mirror 12R. Light 21R and external light 22R are emitted rearward (toward the user) from housing 101.

[0078] The lens 11L has a function of projecting an image (also referred to as "light 21L") displayed in the display area 235L onto the mirror 12L. The light 21L projected onto the mirror 12L is reflected by the mirror 12L, which is a convex mirror, and is enlarged and projected onto the display area 102L. The display area 102L is a half mirror and functions as, for example, a concave mirror. The display area 102L transmits external light 22L incident from outside the housing 101 and further reflects the light 21L reflected by the mirror 12L. The light 21L and external light 22L are emitted to the rear of the housing 101 (towards the user).

[0079] The positions and angles of the lens 11 and the mirror 12 can be adjusted as desired. The emission position of the light 21R can be controlled by adjusting the positions and angles of the lens 11R and the mirror 12R. The emission position of the light 21L can be controlled by adjusting the positions and angles of the lens 11L and the mirror 12L.

[0080] Components that have functions such as refracting, reflecting, coloring, polarizing, or dimming light, such as the lens 11, the mirror 12, and the display area 102 that functions as a half mirror, are sometimes referred to as optical components. The optical components used in the electronic device 100A are not limited to the lens 11, the mirror 12, and the display area 102. The electronic device 100A may include optical components other than the lens 11, the mirror 12, and the display area 102. Furthermore, at least a portion of the lens 11, the mirror 12, and the display area 102 may be replaced with other optical components. For example, the lens 11 may be configured by combining a plurality of lenses.

[0081] Furthermore, the lenses used in the electronic device 100A are preferably aspherical lenses, which can reduce aberration more than spherical lenses, thereby improving the display quality of the electronic device 100A.

[0082] Separator 13 overlaps the boundary between display area 235R and display area 235L and is provided extending to the rear of housing 101. Separator 13 has a function of preventing an image displayed in display area 235R from being reflected in mirror 12L. Separator 13 also has a function of preventing an image displayed in display area 235L from being reflected in mirror 12R.

[0083] A user of the electronic device 100A can see the light 21R and the external light 22R with his right eye, and the light 21L and the external light 22L with his left eye. The display area 102, which functions as a half mirror, allows the user to see the image displayed by the display device 10 superimposed on the scenery.

[0084] In an electronic device 100A according to one embodiment of the present invention, the display device 10 is disposed between the user's eyes. Therefore, the user of the electronic device 100A can view the scenery and the image displayed in the display area 102 without the display device 10 blocking the user's line of sight. Furthermore, the user can view the scenery even when the operation of the electronic device 100A is stopped. Furthermore, the electronic device 100A can generate images for the right and left eyes using a single display device, without providing separate display devices for the right and left eyes. This can reduce power consumption and production costs. Additionally, the weight of the electronic device 100A can be easily reduced, improving the wearing comfort of the electronic device 100A.

[0085] <Electronic equipment 100B> FIG. 2 is a diagram illustrating an example of the configuration of electronic device 100B according to one embodiment of the present invention. FIG. 2A is a perspective external view of electronic device 100B according to one embodiment of the present invention. FIG. 2B is a view of the inside of housing 101 provided in electronic device 100B as seen from above. Electronic device 100B is a modified example of electronic device 100A. Therefore, to reduce repetition in the explanation, differences between electronic device 100B and electronic device 100A will be mainly described.

[0086] The electronic device 100B is a goggle-type electronic device for virtual reality (VR) applications. The electronic device 100B has mirrors 14 (mirror 14R, mirror 14L) instead of the display area 102 that the electronic device 100A has. The mirrors 14 are provided inside the housing 101. The electronic device 100B also has a belt-like attachment part 103 that is worn around the head and on the top of the head. The length of the attachment part 103 is adjustable as needed.

[0087] The mirror 14 is a curved mirror that functions as a total reflection concave mirror. However, depending on the purpose, the mirror 14 may be a convex mirror or a plane mirror.

[0088] The electronic device 100B also includes a battery 104, a voltage generating unit 105, a control unit 106, and a communication unit 107 inside the housing 101. An antenna 108 is provided in a part of the wearing unit 103.

[0089] Furthermore, a lens 111L may be provided between the mirror 14L and the user. A lens 111R may be provided between the mirror 14R and the user. The positions of the lenses 111 (lens 111L, lens 111R) can be adjusted as appropriate. The user can view the image displayed on the mirror 14 through the lens 111.

[0090] The electronic device 100B is configured to block external light from entering the housing 101, providing a user with a highly immersive experience. The sensor unit 50 may also include an imaging element to capture images of the surrounding scenery and display them on the display device 10. The electronic device 100B can also display other information superimposed on the image of the surrounding scenery. Therefore, the electronic device 100B can also function as a wearable electronic device for augmented reality (AR) applications.

[0091] Similarly to the electronic device 100A, the electronic device 100B according to one embodiment of the present invention also has a display device 10 placed between the user's eyes. Therefore, the user of the electronic device 100B can view an image displayed on the mirror 14 using the display device 10. Furthermore, the electronic device 100B can generate images for the right and left eyes using a single display device, without providing separate display devices for the right and left eyes. This reduces power consumption and production costs. Additionally, the weight of the electronic device 100B can be easily reduced, improving the wearing comfort of the electronic device 100B.

[0092] <Example of display device configuration> An example of the configuration of display device 10 will be described. Fig. 3A is a block diagram illustrating display device 10. As described above, display device 10 includes display area 235, peripheral circuit area 232, and peripheral circuit area 233. Display area 235 also includes display area 235R and display area 235L.

[0093] The circuits included in the peripheral circuit region 232 function as, for example, a scanning line driving circuit. The circuits included in the peripheral circuit region 232 function as, for example, a signal line driving circuit. Note that some kind of circuit may be provided at a position facing the peripheral circuit region 232 across the display region 235. Note that, as mentioned above, the circuits included in the peripheral circuit region 232 and the peripheral circuit region 233 may be collectively referred to as a "peripheral driving circuit."

[0094] The peripheral driver circuit can include various circuits such as a shift register, a level shifter, an inverter, a latch, an analog switch, and a logic circuit. The peripheral driver circuit can include a transistor, a capacitor, and the like. The transistors included in the peripheral driver circuit can be formed in the same process as the transistors included in the pixel 230.

[0095] The display device 10 also has m wires 236 that are arranged approximately in parallel and whose potential is controlled by a circuit included in the peripheral circuit region 232, and n wires 237 that are arranged approximately in parallel and whose potential is controlled by a circuit included in the peripheral circuit region 233.

[0096] The display area 235 has a plurality of pixels 230 arranged in a matrix. A pixel 230 that controls red light, a pixel 230 that controls green light, and a pixel 230 that controls blue light are collectively configured to function as a single pixel 240, and full-color display can be achieved by controlling the light emission amount (light emission brightness) of each pixel 230. Thus, each of the three pixels 230 functions as a sub-pixel. That is, each of the three sub-pixels controls the light emission amount of red light, green light, or blue light (see FIG. 3B1). The color of light controlled by each of the three sub-pixels is not limited to a combination of red (R), green (G), and blue (B), but may also be cyan (C), magenta (M), or yellow (Y) (see FIG. 3B2).

[0097] Alternatively, four subpixels may be combined to function as one pixel 240. For example, a subpixel that controls white light may be added to three subpixels that control red, green, and blue light, respectively (see FIG. 3B3). Adding a subpixel that controls white light can increase the brightness of the display area. Alternatively, a subpixel that controls yellow light may be added to three subpixels that control red, green, and blue light, respectively (see FIG. 3B4). Alternatively, a subpixel that controls white light may be added to three subpixels that control cyan, magenta, and yellow light, respectively (see FIG. 3B5).

[0098] By increasing the number of sub-pixels that function as one pixel and by appropriately combining sub-pixels that control red, green, blue, cyan, magenta, and yellow light, it is possible to improve the reproducibility of intermediate tones, thereby improving display quality.

[0099] The display device of one embodiment of the present invention can reproduce color gamuts of various standards, such as the PAL (Phase Alternating Line) standard and the NTSC (National Television System Committee) standard used in television broadcasting, the sRGB (standard RGB) standard and the Adobe RGB standard widely used in display devices used in electronic devices such as personal computers, digital cameras, and printers, the ITU-R BT.709 (International Telecommunication Union Radiocommunication Sector Broadcasting Service (Television) 709) standard used in HDTV (High Definition Television, also called Hi-Vision), the DCI-P3 (Digital Cinema Initiatives P3) standard used in digital cinema projection, and the ITU-R BT.2020 (REC.2020 (Recommendation 2020)) standard used in UHDTV (Ultra High Definition Television, also called Super Hi-Vision).

[0100] The resolution of the display area 235 can be HD (1280 x 720 pixels), FHD (1920 x 1080 pixels), WQHD (2560 x 1440 pixels), etc. Furthermore, it is preferable to have an extremely high resolution such as WQXGA (2560 x 1600 pixels), 4K2K (3840 x 2160 pixels, also called "4K"), or 8K4K (7680 x 4320 pixels, also called "8K"). In particular, a resolution of 4K2K, 8K4K, or higher is preferable.

[0101] The pixel density (resolution) of the display area 235 is preferably 1000 ppi or more and 10000 ppi or less, but may be, for example, 2000 ppi or more and 6000 ppi or less, or 3000 ppi or more and 5000 ppi or less.

[0102] There is no particular limitation on the screen ratio (aspect ratio) of the display area 235. The display area 235 of the display device 10 can accommodate various screen ratios, such as 1:1 (square), 4:3, 16:9, and 16:10.

[0103] Furthermore, a display device according to an embodiment of the present invention can vary its refresh rate. For example, the refresh rate can be adjusted (for example, within a range of 0.01 Hz to 240 Hz) depending on the content displayed on the display device to reduce power consumption. Driving the display device at a reduced refresh rate to reduce power consumption may be referred to as idling stop (IDS) driving.

[0104] <Pixel circuit configuration example> 4A is a diagram showing an example of the circuit configuration of the pixel 230. The pixel 230 includes a pixel circuit 431 and a display element 432.

[0105] Each wiring 236 is electrically connected to n pixel circuits 431 arranged in any row among the pixel circuits 431 arranged in m rows and n columns in the display region 235. Furthermore, each wiring 237 is electrically connected to m pixel circuits 431 arranged in any column among the pixel circuits 431 arranged in m rows and n columns. Both m and n are integers of 1 or greater.

[0106] The pixel circuit 431 includes a transistor 436, a capacitor 433, a transistor 438, and a transistor 434. The pixel circuit 431 is electrically connected to a display element 432.

[0107] In this specification and the like, the term “element” may be replaced with “device.” For example, a display element, a light-emitting element, and a liquid crystal element may be replaced with a display device, a light-emitting device, and a liquid crystal device.

[0108] One of the source electrode and the drain electrode of the transistor 436 is electrically connected to a wiring (hereinafter referred to as a signal line DL_n) to which a data signal (also referred to as a "video signal") is applied. Furthermore, a gate electrode of the transistor 436 is electrically connected to a wiring (hereinafter referred to as a scanning line GL_m) to which a gate signal is applied. The signal line DL_n and the scanning line GL_m correspond to the wiring 237 and the wiring 236, respectively.

[0109] The transistor 436 has a function of controlling writing of a data signal to the node 435 .

[0110] One of a pair of electrodes of the capacitor 433 is electrically connected to a node 435, and the other electrode is electrically connected to a node 437. The other of the source electrode and the drain electrode of the transistor 436 is electrically connected to the node 435.

[0111] The capacitor 433 functions as a storage capacitor for holding data written to the node 435 .

[0112] One of the source electrode and the drain electrode of the transistor 438 is electrically connected to the potential supply line VL_a, and the other is electrically connected to a node 437. Furthermore, a gate electrode of the transistor 438 is electrically connected to a node 435.

[0113] One of the source electrode and the drain electrode of the transistor 434 is electrically connected to the potential supply line V0, and the other is electrically connected to a node 437. Furthermore, the gate electrode of the transistor 434 is electrically connected to the scan line GL_m.

[0114] One of the anode or cathode of the display element 432 is electrically connected to the potential supply line VL_b, and the other is electrically connected to a node 437 .

[0115] For example, an organic electroluminescence element (also called an organic EL element) can be used as the display element 432. However, the display element 432 is not limited to this, and for example, an inorganic EL element made of an inorganic material may also be used. Note that "organic EL element" and "inorganic EL element" may be collectively referred to as "EL element."

[0116] The emitted color of the EL element can be white, red, green, blue, cyan, magenta, yellow, or the like, depending on the material that constitutes the EL element.

[0117] There are two methods for achieving color display: combining a display element 432 that emits white light with a colored layer, and providing a display element 432 that emits a different color for each pixel. The former method is more productive than the latter. On the other hand, the latter method requires a separate display element 432 for each pixel, making it less productive than the former method. However, the latter method can produce an emitted color with higher color purity than the former method. In addition to the latter method, the color purity can be further improved by adding a microcavity structure to the display element 432.

[0118] Both low molecular weight compounds and high molecular weight compounds, and inorganic compounds may be used for the display element 432. The layers constituting the display element 432 can be formed by a deposition method (including a vacuum deposition method), a transfer method, a printing method, an inkjet method, a coating method, or the like.

[0119] The display element 432 may include an inorganic compound such as quantum dots. For example, the quantum dots may be used in the display element 432 to function as a light-emitting material.

[0120] The power supply potential can be, for example, a relatively high potential or a relatively low potential. The high potential is called a high power supply potential (also called "VDD"), and the low potential is called a low power supply potential (also called "VSS"). Ground potential can also be used as the high power supply potential or the low power supply potential. For example, if the high power supply potential is ground potential, the low power supply potential is a potential lower than the ground potential, and if the low power supply potential is ground potential, the high power supply potential is a potential higher than the ground potential.

[0121] For example, a high power supply potential VDD is applied to one of the potential supply line VL_a or VL_b, and a low power supply potential VSS is applied to the other.

[0122] In a display device having the pixel circuits 431 , the pixel circuits 431 in each row are sequentially selected by a circuit included in a peripheral driver circuit, and the transistors 436 and 434 are turned on to write a data signal to the node 435 .

[0123] The pixel circuit 431, in which data is written to the node 435, is put into a holding state by turning off the transistor 436 and the transistor 434. Furthermore, the amount of current flowing between the source electrode and the drain electrode of the transistor 438 is controlled in accordance with the potential of the data written to the node 435, and the display element 432 emits light with a luminance corresponding to the amount of current flowing. By performing this process sequentially for each row, an image can be displayed.

[0124] 4B shows a modified example of the circuit configuration of the pixel 230 shown in FIG. 4A. The circuit configuration shown in FIG. 4B has a configuration in which the transistor 434 and the potential supply line V0 are removed from the circuit configuration shown in FIG. 4A. The other components can be understood by referring to the description of the circuit configuration shown in FIG. 4A. Therefore, to avoid repetition, a detailed description of the circuit configuration shown in FIG. 4B will be omitted.

[0125] Some or all of the transistors included in the pixel circuit 431 may be transistors having back gates. For example, as shown in FIG. 4C , a transistor having a back gate may be used as the transistor 436, and the back gate and the gate may be electrically connected. Alternatively, the back gate may be electrically connected to either the source or the drain of the transistor, as in the case of the transistor 438 shown in FIG. 4C .

[0126] 5A, the display device 10 may have a laminated structure of a layer 30 and a layer 40. An interlayer insulator or a conductor for electrical connection between different layers may be provided between the layer 30 and the layer 40.

[0127] By providing a peripheral driving circuit on the layer 30 and providing a display region 235 including the pixels 230 on the layer 40, the area of ​​the display region 235 can be maximized. This allows for an increase in the resolution of the display device 10. Furthermore, for a given resolution, the area occupied by each pixel can be increased. Furthermore, the aperture ratio of the pixel 230 can be increased. Furthermore, by increasing the area occupied by each pixel, the current density supplied to the pixel can be reduced. Therefore, the load on the pixel is reduced, and the reliability of the display device 10 can be improved.

[0128] The transistor provided in the layer 30 can be, for example, a transistor having silicon in a channel formation region (also referred to as a "Si transistor"). Alternatively, for example, a transistor having single crystal silicon in a channel formation region (also referred to as a "c-Si transistor"). In particular, when a c-Si transistor is used as the transistor provided in the layer 30, the on-state current of the transistor can be increased. Therefore, the circuit included in the layer 30 can be driven at high speed.

[0129] Furthermore, since Si transistors can be formed by microfabrication to have a channel length of 3 nm to 10 nm, the layer 30 can be provided with a functional circuit region 234 including a CPU, GPU, and / or memory circuit, etc. Therefore, the display device 10 can be a display device equipped with an application processor, etc. The CPU, GPU, memory circuit, etc. may also be referred to as a "functional circuit."

[0130] The transistor provided in the layer 40 can be, for example, an OS transistor. In particular, it is preferable to use a transistor having an oxide containing at least one of indium, an element M (the element M is aluminum, gallium, yttrium, or tin), and zinc in a channel formation region as the OS transistor. Such an OS transistor has a characteristic of having a very low off-state current. Therefore, it is preferable to use an OS transistor as the transistor used in the pixel circuit 431 because data written to the pixel circuit 431 can be held for a long period of time. In particular, when an OS transistor is used as the transistor 436, data written to the node 435 can be held for a long period of time.

[0131] Furthermore, since an OS transistor has a high withstand voltage between the source and the drain, it is preferable to use an OS transistor as the transistor 438. The transistor 438 is a transistor (also referred to as a "driving transistor") that controls a current flowing through the display element 432, and a relatively high voltage is applied between the source and the drain. Using an OS transistor as the transistor 438 can improve the reliability of the display device 10.

[0132] The transistors provided in the layer 30 and the layer 40 may be both Si transistors and OS transistors. Examples of materials used for Si transistors include single crystal silicon, polycrystalline silicon, and amorphous silicon. In particular, a transistor having low-temperature polysilicon (LTPS) in its semiconductor layer (also referred to as an "LTPS transistor") can be used. LTPS transistors have high field-effect mobility and favorable frequency characteristics.

[0133] By using Si transistors such as LTPS transistors, circuits that need to be driven at high frequencies (such as source driver circuits) can be built on the same substrate as the display unit, which simplifies the external circuits mounted on the display device and reduces component and mounting costs.

[0134] OS transistors have significantly higher field-effect mobility than amorphous silicon transistors. Furthermore, OS transistors have significantly lower source-drain leakage current (hereinafter also referred to as off-state current) in an off state, allowing them to retain charge accumulated in a capacitor connected in series with the transistor for a long period of time. Furthermore, the use of OS transistors can reduce the power consumption of display devices.

[0135] The off-state current of the OS transistor per 1 μm of channel width at room temperature is 1 aA (1 × 10 -18 A) Below, 1zA(1×10 -21 A) or less, or 1yA (1 x 10-24 A) or less. Note that the off-state current of a Si transistor per 1 μm of channel width at room temperature is 1 fA (1×10 -15 A) More than 1pA (1×10 -12 Therefore, it can be said that the off-state current of an OS transistor is about 10 orders of magnitude lower than that of a Si transistor.

[0136] For example, LTPS transistors may be used as the transistors included in the peripheral circuit regions 232 and 233, and OS transistors may be used as the transistors included in the display region 235.

[0137] Furthermore, to increase the emission luminance of a light-emitting device included in a pixel circuit, it is necessary to increase the amount of current flowing through the light-emitting device. To achieve this, it is necessary to increase the source-drain voltage of the drive transistor included in the pixel circuit. Because OS transistors have a higher source-drain breakdown voltage than Si transistors, a high voltage can be applied between the source and drain of an OS transistor. Therefore, by using an OS transistor as the drive transistor included in a pixel circuit, it is possible to increase the amount of current flowing through the light-emitting device and increase the emission luminance of the light-emitting device.

[0138] Furthermore, when the transistor operates in the saturation region, OS transistors can reduce the change in source-drain current caused by changes in gate-source voltage compared to Si transistors. Therefore, by using OS transistors as the drive transistors in pixel circuits, the current flowing between the source and drain can be precisely controlled by changing the gate-source voltage, thereby controlling the amount of current flowing through the light-emitting device. This allows for greater gradation in the pixel circuit.

[0139] Furthermore, in terms of the saturation characteristics of the current that flows when the transistor operates in the saturation region, OS transistors can pass a more stable current (saturation current) than Si transistors, even when the source-drain voltage gradually increases. Therefore, by using an OS transistor as a drive transistor, a stable current can be passed through a light-emitting device, for example, even when the current-voltage characteristics of a light-emitting device containing an EL material vary. In other words, when operating in the saturation region, the source-drain current of an OS transistor remains almost unchanged even when the source-drain voltage increases, thereby stabilizing the light-emitting brightness of the light-emitting device.

[0140] As described above, by using an OS transistor for the drive transistor included in the pixel circuit, it is possible to achieve "suppression of black floating," "increase in light emission brightness," "multiple gradations," and "suppression of variation in light-emitting devices."

[0141] 5B is a block diagram showing an example of the configuration of display device 10, which is a type of semiconductor device. In FIG. 5B, functional circuits provided in functional circuit region 234 include control unit 130, calculation unit 140, memory unit 150, input / output unit 160, and line-of-sight detection unit 170. Control unit 130, calculation unit 140, memory unit 150, input / output unit 160, and line-of-sight detection unit 170 are electrically connected via bus line 131.

[0142] [Control unit 130] The control unit 130 has a function of controlling the overall operation of the display device 10. The control unit 130 controls the operations of the display area 235, the peripheral circuit area 232, the peripheral circuit area 233, the calculation unit 140, the memory unit 150, the input / output unit 160, and the line-of-sight detection unit 170.

[0143] [Calculation unit 140] The calculation unit 140 has a function of performing calculations related to the overall operation of the display device 10, and may be, for example, a central processing unit (CPU). The calculation unit 140 has a function of generating an image to be displayed in the display area 235.

[0144] In addition to a CPU, other microprocessors such as a DSP (Digital Signal Processor) and a GPU (Graphics Processing Unit) can be used alone or in combination as the calculation unit 140. These microprocessors may also be configured to be realized by a PLD (Programmable Logic Device) such as an FPGA (Field Programmable Gate Array) or an FPAA (Field Programmable Analog Array).

[0145] The calculation unit 140 also includes a neural network 141. The neural network 141 may be configured using software. The neural network 141 may be one or more of a deep neural network, a convolutional neural network, a recurrent neural network, an autoencoder, a deep Boltzmann machine, and a deep belief network.

[0146] The calculation unit 140 performs various data processing and program control by interpreting and executing instructions from various programs using a processor. The programs that can be executed by the processor may be stored in a memory area of ​​the processor or may be stored in the storage unit 150.

[0147] The calculation unit 140 may have a main memory, which may include a volatile memory such as a random access memory (RAM) or a non-volatile memory such as a read only memory (ROM).

[0148] The RAM provided in the main memory may be, for example, a DRAM (Dynamic Random Access Memory), and a virtual memory space is allocated and used as a working space for the calculation unit 140. The operating system, application programs, program modules, program data, etc. stored in the storage unit 150 are loaded into the RAM for execution. The data, programs, and program modules loaded into the RAM are directly accessed and operated by the calculation unit 140.

[0149] On the other hand, ROM can store BIOS (Basic Input / Output System) and firmware, which do not require rewriting. ROM can be mask ROM, OTPROM (One-Time Programmable Read-Only Memory), or EPROM (Erasable Programmable Read-Only Memory). EPROMs include UV-EPROM (Ultra-Violet Erasable Programmable Read-Only Memory), which allows stored data to be erased by exposure to ultraviolet light, EEPROM (Electrically Erasable Programmable Read-Only Memory), and flash memory.

[0150] [Storage section 150] The storage unit 150 may be, for example, a storage device using a nonvolatile storage element such as a flash memory, MRAM (Magnetoresistive Random Access Memory), PRAM (Phase change RAM), ReRAM (Resistive RAM), or FeRAM (Ferroelectric RAM), or a storage device using a volatile storage element such as DRAM (Dynamic RAM) or SRAM (Static RAM).

[0151] It should be noted that the storage unit 150 may not be built into the display device 10, but may be a storage device placed outside the display device 10. In this case, the storage unit 150 is electrically connected to the calculation unit 140 and the like via the input / output unit 160. Alternatively, a communication means may be provided to exchange data wirelessly.

[0152] The storage unit 150 stores, for example, a plurality of algorithms for performing upconversion (also called "super-resolution"), weighting coefficients for each algorithm, etc. The storage unit 150 may also store image sources to be displayed in the display area 235.

[0153] [Input / output section 160] The input / output unit 160 is electrically connected to the control unit 106 of the electronic device 100. The input / output unit 160 may be electrically connected to the communication unit 107 of the electronic device 100. Information necessary for the operation of the display device 10 is supplied to the display device 10 via the input / output unit 160. The input / output unit 160 may also be electrically connected to, for example, one or more buttons or switches (also referred to as "casing switches") provided on the electronic device 100. The input / output unit 160 may also be electrically connected to an external port to which other input components can be connected.

[0154] [Gaze detection unit 170] The gaze detection unit 170 has a function of detecting the gaze of the user in cooperation with the sensor unit 51. The gaze of the user can be detected by a known gaze measurement (eye tracking) method, such as the Pupil Centre Corneal Reflection (PCCR) method or the Bright / Dark Pupil Effect method.

[0155] For example, the PCCR method is a method for detecting a user's gaze from the relative position of the center of the user's pupil and the corneal reflection image (Purkinje image) that occurs when light is irradiated onto the eyeball. When detecting a user's gaze using the PCCR method, the sensor unit 51 is used to capture images of the user's pupil and Purkinje image, and the gaze of the user can be detected by the gaze detection unit 170. Note that the gaze detection method using the gaze detection unit 170 is not limited to the above detection method. For example, the gaze detection unit 170 may have a function to detect one or more selected from the user's cornea, iris, crystalline lens, and retina.

[0156] The light emitted from the display area 235 of the display device 10 can be used as the light to be irradiated onto the eyeball in order to obtain the Purkinje image. By using the light emitted from the display device 10, it is not necessary to provide a separate light source for obtaining the Purkinje image. This makes it possible to reduce the weight and cost of the electronic device 100.

[0157] When infrared light is used as a light source for acquiring Purkinje images, a separate light source may be provided, but the display device 10 capable of emitting infrared light may also be used.

[0158] This embodiment mode can be combined with the descriptions of other embodiment modes as appropriate.

[0159] (Embodiment 2) In this embodiment, an example of up-conversion will be described as an example of image processing operation in electronic device 100 (electronic device 100A and electronic device 100B).

[0160] Here, an image processing operation that enables a user to view a high-resolution, high-quality image regardless of the image source will be described. First, the characteristics of the human visual field will be described.

[0161] [Human visual field characteristics] Generally, the human visual field is divided into five main areas: discrimination field, useful field, stable fixation field, guided field, and auxiliary field.

[0162] The discriminative visual field is the area within approximately 5° of the center of the visual field, and is the area where visual functions such as visual acuity and color discrimination are most excellent.

[0163] The effective visual field is the area adjacent to the outside of the discriminative visual field, within approximately 30° horizontally and 20° vertically from the center of the visual field, and is the area in which specific information can be instantly identified by eye movement alone.

[0164] The stable visual field is an area adjacent to the outside of the effective visual field, within approximately 90° horizontally and 70° vertically from the center of the visual field, in which specific information can be identified effortlessly with head movement.

[0165] The induced visual field is an area adjacent to the outside of the stable fixation field, within approximately 100° horizontally and 85° vertically from the center of the visual field, in which the presence of a specific object can be detected but the ability to discriminate is low.

[0166] The auxiliary visual field is an area adjacent to the outside of the induced visual field, within approximately 100 to 200 degrees horizontally and approximately 85 to 130 degrees vertically from the center of the visual field.This area has a significantly low ability to distinguish specific objects, and is only capable of detecting the presence of stimuli.

[0167] From the above, it can be seen that the image quality from the discriminative visual field to the effective visual field is important in image upconversion. In particular, it is essential to improve the image quality of the discriminative visual field.

[0168] 6A is a schematic diagram showing a state in which a user 112 is observing an image 114 displayed in the display area of ​​the display device 10 from the front (image display surface) via the display area 102 or the mirror 14. Note that the image 114 shown in FIG. 6A corresponds to the display area 235R or the display area 235L. Also shown on the image 114 is a fixation point G at the end of the line of sight 113 of the user 112. In this specification, the area on the image 114 that includes the discriminative visual field is referred to as the "first area S1," and the area that includes the effective visual field is referred to as the "second area S2." Furthermore, the area that includes the stable fixation visual field, the induced visual field, and the auxiliary visual field is referred to as the "third area S3."

[0169] In FIG. 6A, the boundary (outline) between the first region S1 and the second region S2 is shown as a curve, but is not limited thereto. As shown in FIG. 6B, the boundary (outline) between the first region S1 and the second region S2 may be rectangular or polygonal. It may also be a shape that combines straight lines and curves. As shown in FIG. 6C, the display region of the display device 10 may be divided into two regions, with the region that includes the discriminative visual field and the effective visual field designated as the first region S1 and the other region designated as the second region S2. In this case, the third region S3 is not formed.

[0170] 7A is a top view of image 114 displayed in the display area of ​​display device 10 of electronic device 100, and FIG. 7B is a side view of image 114 displayed in the display area of ​​display device 10 of electronic device 100. In this specification, the horizontal angle of first region S1 is referred to as "angle θx1," and the horizontal angle of second region S2 is referred to as "angle θx2" (see FIG. 7A). In addition, in this specification, the vertical angle of first region S1 is referred to as "angle θy1," and the vertical angle of second region S2 is referred to as "angle θy2" (see FIG. 7B).

[0171] For example, by setting the angle θx1 to 10° and the angle θy1 to 10°, the area of ​​the first region S1 can be increased. In this case, part of the effective visual field is included in the first region S1. Furthermore, by setting the angle θx2 to 45° and the angle θy2 to 35°, the area of ​​the second region S2 can be increased. In this case, part of the stable fixation field is included in the second region S2.

[0172] The position of the gaze point G fluctuates slightly due to fluctuations in the line of sight 113. For this reason, it is preferable that the angles θx1 and θy1 are each equal to or greater than 5° and less than 20°. Setting the area of ​​the first region S1 to be larger than the discriminative field of view stabilizes the operation of the display device 10 and improves the visibility of the image.

[0173] When the line of sight 113 of the user 112 moves, the first area S1 and the second area S2 also move. For example, when the amount of change in the line of sight 113 exceeds a certain amount, it is determined that the line of sight 113 is moving. When the amount of change in the line of sight 113 becomes equal to or less than the certain amount, it is determined that the movement of the line of sight 113 has stopped, and the first area S1 to the third area S3 are determined.

[0174] [Various algorithms for upconversion] Figure 8 shows an example of an algorithm for upconversion. In Figure 8, the algorithms are classified into groups A, B, and C. Group A is an algorithm that performs upconversion using simple calculations. Groups B and C are algorithms that use artificial intelligence (AI) for upconversion. Group B is an algorithm that performs upconversion using machine learning, and Group C is an algorithm that performs upconversion using deep learning using a neural network.

[0175] In Figure 8, Group A shows the Nearest Neighbor method, Bilinear method, and Bicubic method. Group B shows the Rapid and Accurate Image Super-Resolution (RAISR) method, Anchored Neighborhood Regression (ANR) method, and A+ method. Group C shows the Super-Resolution Convolutional Neural Network (SRCNN) method.

[0176] Of these, the nearest neighbor method has the poorest image quality after upconversion, while the SRCNN method has the best. Figure 8 shows the permutation of image quality and processing speed obtained by each algorithm, with the image quality obtained by the nearest neighbor method being the "lowest" and the image quality obtained by the SRCNN method being the "highest." In general, the better the image quality after upconversion an algorithm provides, the slower the processing speed. In particular, upconversion methods that use multi-layered neural networks, such as the SRCNN method, can obtain high-quality images, but they also take longer to process.

[0177] By changing the algorithm used for upconversion for each of the first area S1, the second area S2, and the third area S3, the upconversion processing time can be shortened. At the same time, the user can view a high-quality image with increased resolution. Furthermore, reducing unnecessary upconversion processing reduces the power consumption of electronic devices.

[0178] For example, the first region S1 is upconverted using the method of group B or C, and the second region S2 is upconverted using the method of group A. In addition, the third region S3 can contain low-quality images, so upconversion can be performed using the nearest neighbor method, which has the fastest processing speed.

[0179] For example, in an image in which a background and a structure of the same color overlap, such as when a white-based background overlaps with a white-based structure, if the structure is in the first region S1, it can be determined that the user is gazing at the structure, and high-quality upconversion processing can be performed on the first region S1.

[0180] The up-conversion is performed by the calculation unit 140. The algorithms and weighting factors set in the calculation unit 140 for the up-conversion are read from the storage unit 150 and stored in the calculation unit 140. These algorithms and weighting factors may be stored in advance in a memory area within the calculation unit 140. The up-conversion may also be performed by the control unit 106 shown in the above embodiment. The up-conversion may also be performed by both the calculation unit 140 and the control unit 106.

[0181] Furthermore, these algorithms and weighting factors may be determined by an external device. For example, the electronic device 100 and the external device may be connected via the communication unit 107, and the algorithms and weighting factors determined by the external device may be stored in the storage unit 150 via the input / output unit 160.

[0182] The weighting coefficients determined after learning by the external device may be stored in the storage unit 150 before shipping from the factory. Learning by the external device may be continued, and updated weighting coefficients and new algorithms may be stored in the storage unit 150. Weighting coefficients for updates may be generated using multiple external devices. Weighting coefficients may be transferred via a recording medium such as an SD card or various communication means. New weighting coefficients may be determined using weighting coefficients stored in the storage unit 150 and weighting coefficients updated by the external device. Using new weighting coefficients and new algorithms obtained through learning by the external device enables more accurate interpolation processing.

[0183] The new images generated for each of the first to third regions S1 to S3 by up-conversion are integrated into one image and displayed in the display region 235.

[0184] It should be noted that the determination of the position of the fixation point G, the shapes of the first region S1 to the third region S3, and the algorithm to be used does not necessarily have to be performed for each frame. The determination of the position of the fixation point G, the shapes of the first region S1 to the third region S3, and the algorithm to be used may be performed for each arbitrary frame. Alternatively, the determination may be performed when the line of sight 113 changes by a certain amount or more.

[0185] The algorithm and weighting factor to be used may also be determined depending on the video scene to be displayed. For example, the algorithm and weighting factor to be used may be switched depending on whether the image (video) to be displayed is a relatively still scene such as a landscape, or a fast-moving scene such as a sports scene.

[0186] When the user is watching a television program, the video scene may be estimated from the program guide. Alternatively, the video scene may be estimated by the neural network 141 using training data stored in the storage unit 150.

[0187] Furthermore, the display image may be analyzed using AI, and upconversion may be performed on areas that are determined to be likely to be looked at by the user.Also, the movement of the user's line of sight may be predicted, and upconversion may be performed on areas that are determined to be likely to be looked at next.

[0188] The image processing operation described in this embodiment can be applied not only to up-conversion but also to resolution reduction (down-conversion), and also to image processing for adjusting hue, saturation, brightness, contrast, sharpness, etc.

[0189] This embodiment mode can be combined with the descriptions of other embodiment modes as appropriate.

[0190] (Embodiment 3) In this embodiment, a light-emitting element 70 (also referred to as a "light-emitting device") that can be applied to the display element 432 will be described.

[0191] <Example of display element configuration> As shown in FIG. 9A, the light-emitting element 70 has an EL layer 786 between a pair of electrodes (a conductor 772 and a conductor 788). The EL layer 786 can be composed of multiple layers, such as a layer 4420, a light-emitting layer 4411, and a layer 4430. The layer 4420 can have, for example, a layer containing a substance with high electron-injecting properties (electron-injecting layer) and a layer containing a substance with high electron-transporting properties (electron-transporting layer). The light-emitting layer 4411 contains, for example, a light-emitting compound. The layer 4430 can have, for example, a layer containing a substance with high hole-injecting properties (hole-injecting layer) and a layer containing a substance with high hole-transporting properties (hole-transporting layer).

[0192] A structure having the layer 4420, the light-emitting layer 4411, and the layer 4430 provided between a pair of electrodes can function as a single light-emitting unit, and the structure of FIG. 9A is referred to as a single structure in this specification and the like.

[0193] 9B shows a modification of the EL layer 786 included in the light-emitting element 70 shown in Fig. 9A. Specifically, the light-emitting element 70 shown in Fig. 9B includes a layer 4430-1 on the conductor 772, a layer 4430-2 on the layer 4430-1, a light-emitting layer 4411 on the layer 4430-2, a layer 4420-1 on the light-emitting layer 4411, a layer 4420-2 on the layer 4420-1, and a conductor 788 on the layer 4420-2. For example, when the conductor 772 is the anode and the conductor 788 is the cathode, the layer 4430-1 functions as a hole injection layer, the layer 4430-2 functions as a hole transport layer, the layer 4420-1 functions as an electron transport layer, and the layer 4420-2 functions as an electron injection layer. Alternatively, when the conductor 772 is used as a cathode and the conductor 788 is used as an anode, the layer 4430-1 functions as an electron injection layer, the layer 4430-2 functions as an electron transport layer, the layer 4420-1 functions as a hole transport layer, and the layer 4420-2 functions as a hole injection layer. With such a layer structure, it is possible to efficiently inject carriers into the light-emitting layer 4411 and increase the efficiency of carrier recombination in the light-emitting layer 4411.

[0194] Note that a configuration in which a plurality of light-emitting layers (light-emitting layer 4411, light-emitting layer 4412, light-emitting layer 4413) are provided between layer 4420 and layer 4430 as shown in FIG. 9C is also an example of a single structure.

[0195] 9D, a configuration in which multiple light-emitting units (EL layer 786a, EL layer 786b) are connected in series via an intermediate layer (charge generating layer) 4440 is referred to as a tandem structure or a stack structure in this specification and elsewhere. Note that a tandem structure can realize a light-emitting element capable of emitting light with high brightness.

[0196] The light-emitting element can emit light in red, green, blue, cyan, magenta, yellow, white, or the like, depending on the material of the EL layer 786. Furthermore, the color purity can be further improved by providing the light-emitting element with a microcavity structure.

[0197] The light-emitting layer may contain two or more light-emitting materials that emit light of R (red), G (green), B (blue), Y (yellow), O (orange), etc. A light-emitting element that emits white light (also called a "white light-emitting device") preferably has a configuration in which the light-emitting layer contains two or more types of light-emitting materials. To obtain white light emission, light-emitting materials can be selected so that the respective emissions of the two or more light-emitting materials have a complementary color relationship. For example, by making the emission color of the first light-emitting layer and the emission color of the second light-emitting layer complementary colors, a light-emitting element that emits white light as a whole can be obtained. The same applies to a light-emitting element having three or more light-emitting layers.

[0198] The light-emitting layer preferably contains two or more light-emitting materials that emit light of R (red), G (green), B (blue), Y (yellow), O (orange), etc. Alternatively, it is preferable that the light-emitting layer contains two or more light-emitting materials, and the light emitted by each of the light-emitting materials contains spectral components of two or more colors of R, G, and B.

[0199] <Method of forming the light emitting element 70> A method for forming the light emitting element 70 will be described below.

[0200] FIG. 10A is a schematic top view of a light-emitting element 70 according to one embodiment of the present invention. The light-emitting element 70 includes a plurality of light-emitting elements 70R that emit red light, a plurality of light-emitting elements 70G that emit green light, and a plurality of light-emitting elements 70B that emit blue light. In FIG. 10A, the light-emitting elements are labeled with R, G, and B within their light-emitting regions to easily distinguish between the light-emitting elements. The structure of the light-emitting element 70 shown in FIG. 10A may be referred to as a side-by-side (SBS) structure. The structure shown in FIG. 10A illustrates a structure having three colors, red (R), green (G), and blue (B), but is not limited thereto. For example, a structure having four or more colors may also be used.

[0201] The light-emitting elements 70R, 70G, and 70B are arranged in a matrix. Fig. 10A shows a so-called stripe arrangement in which light-emitting elements of the same color are arranged in one direction. Note that the arrangement of the light-emitting elements is not limited to this, and other arrangements such as a delta arrangement or a zigzag arrangement may also be used, or a pentile arrangement may also be used.

[0202] It is preferable to use organic EL devices such as OLEDs (organic light emitting diodes) or QLEDs (quantum-dot light emitting diodes) as the light emitting elements 70R, 70G, and 70B. Examples of light emitting materials that the EL elements have include fluorescent materials, phosphorescent materials, inorganic compounds (such as quantum dot materials), and materials that exhibit thermally activated delayed fluorescence (thermally activated delayed fluorescence: TADF materials).

[0203] FIG. 10B is a schematic cross-sectional view corresponding to the dashed-dotted line A1-A2 in FIG. 10A. FIG. 10B shows cross sections of light-emitting elements 70R, 70G, and 70B. Light-emitting elements 70R, 70G, and 70B are each provided on an insulating layer 251 and include a conductor 772 functioning as a pixel electrode and a conductor 788 functioning as a common electrode. The insulating layer 251 can be an inorganic insulating film or an organic insulating film, or both. It is preferable to use an inorganic insulating film as the insulating layer 251. Examples of inorganic insulating films include oxide insulating films and nitride insulating films, such as a silicon oxide film, a silicon oxynitride film, a silicon nitride oxide film, a silicon nitride film, an aluminum oxide film, an aluminum oxynitride film, and a hafnium oxide film.

[0204] The light-emitting element 70R has an EL layer 786R between a conductor 772 functioning as a pixel electrode and a conductor 788 functioning as a common electrode. The EL layer 786R contains a light-emitting organic compound that emits light having an intensity at least in the red wavelength range. The EL layer 786G of the light-emitting element 70G contains a light-emitting organic compound that emits light having an intensity at least in the green wavelength range. The EL layer 786B of the light-emitting element 70B contains a light-emitting organic compound that emits light having an intensity at least in the blue wavelength range.

[0205] The EL layer 786R, the EL layer 786G, and the EL layer 786B may each have one or more of an electron injection layer, an electron transport layer, a hole injection layer, and a hole transport layer in addition to a layer containing a light-emitting organic compound (light-emitting layer).

[0206] The conductor 772 functioning as a pixel electrode is provided for each light-emitting element. The conductor 788 functioning as a common electrode is provided as a continuous layer common to each light-emitting element. A conductive film that is transparent to visible light is used for either the conductor 772 functioning as a pixel electrode or the conductor 788 functioning as a common electrode, and a conductive film that is reflective is used for the other. By making the conductor 772 functioning as a pixel electrode transparent and the conductor 788 functioning as a common electrode reflective, a bottom-emission display device can be obtained. Conversely, by making the conductor 772 functioning as a pixel electrode reflective and the conductor 788 functioning as a common electrode transparent, a top-emission display device can be obtained. By making both the conductor 772 functioning as a pixel electrode and the conductor 788 functioning as a common electrode light-transmitting, a dual-emission display device can also be obtained.

[0207] An insulating layer 272 is provided to cover an edge of the conductor 772 functioning as a pixel electrode. The edge of the insulating layer 272 is preferably tapered. The insulating layer 272 can be formed using a material similar to that of the insulating layer 251.

[0208] The EL layer 786R, the EL layer 786G, and the EL layer 786B each have a region in contact with the top surface of the conductor 772 that functions as a pixel electrode, and a region in contact with the surface of the insulating layer 272. In addition, the ends of the EL layer 786R, the EL layer 786G, and the EL layer 786B are located on the insulating layer 272.

[0209] As shown in Figure 10B, a gap is provided between two EL layers between light-emitting elements of different colors. In this way, it is preferable that the EL layer 786R, the EL layer 786G, and the EL layer 786B are arranged so as not to contact each other. This makes it possible to effectively prevent current from flowing through two adjacent EL layers, resulting in unintended light emission (also known as crosstalk). This allows for increased contrast and a display device with high display quality to be realized.

[0210] The EL layer 786R, the EL layer 786G, and the EL layer 786B can be separately formed by vacuum deposition using a shadow mask such as a metal mask. Alternatively, they may be separately formed by photolithography. By using photolithography, a high-definition display device can be realized, which is difficult to achieve using a metal mask.

[0211] In this specification, etc., a device fabricated using a metal mask or FMM (fine metal mask, high-resolution metal mask) may be referred to as a device with an MM (metal mask) structure. In addition, in this specification, etc., a device fabricated without using a metal mask or FMM may be referred to as a device with an MML (metal maskless) structure. Because a display device with an MML structure is fabricated without using a metal mask, it has a higher degree of design freedom in terms of pixel arrangement, pixel shape, etc. than a display device with an FMM structure or an MM structure.

[0212] In the manufacturing method of a display device with an MML structure, the island-shaped EL layer is not formed using a metal mask pattern, but is formed by processing the EL layer after it has been deposited over the entire surface. This makes it possible to realize high-definition display devices or display devices with a high aperture ratio, which have been difficult to achieve until now. Furthermore, since the EL layer can be made separately for each color, it is possible to realize display devices with extremely vivid images, high contrast, and high display quality. In addition, by providing a sacrificial layer on the EL layer, damage to the EL layer during the display device manufacturing process can be reduced, improving the reliability of the light-emitting device.

[0213] Furthermore, the display device of one embodiment of the present invention can have a structure in which an insulator covering an edge of a pixel electrode is not provided. In other words, the display device has a structure in which an insulator is not provided between the pixel electrode and the EL layer. With this structure, light emitted from the EL layer can be efficiently extracted, and thus the viewing angle dependency can be significantly reduced. For example, in the display device of one embodiment of the present invention, the viewing angle (the maximum angle at which a certain contrast ratio is maintained when the screen is viewed from an oblique direction) can be set to a range of 100° to less than 180°, preferably 150° to 170°. Note that the above viewing angle can be applied to both the vertical and horizontal directions. The display device of one embodiment of the present invention can improve the viewing angle dependency and the visibility of images.

[0214] When a display device is formed using a fine metal mask (FMM) structure, there are cases where restrictions are imposed on the pixel arrangement configuration, etc. Here, the FMM structure will be described below.

[0215] The FMM structure involves placing a metal mask (also called an FMM) with openings facing the substrate so that EL is deposited in the desired area during EL deposition. EL deposition is then performed through the FMM, resulting in EL deposition in the desired area. As the substrate size increases during EL deposition, the FMM also increases in size and weight. Furthermore, heat and other factors are applied to the FMM during EL deposition, which can cause deformation of the FMM. Alternatively, a method can be used in which a certain tension is applied to the FMM during EL deposition, so the weight and strength of the FMM are important parameters.

[0216] Therefore, when designing a pixel arrangement configuration using FMM, the above parameters and other factors must be taken into consideration, and consideration must be given under certain limitations. On the other hand, a display device according to one embodiment of the present invention is fabricated using an MML structure, which provides an excellent effect of allowing greater freedom in pixel arrangement configuration and the like compared to an FMM structure. Note that this configuration is highly compatible with, for example, flexible devices, and allows various circuit arrangements for either or both of the pixels and the drive circuits.

[0217] In addition, a protective layer 271 is provided on the conductor 788 functioning as a common electrode to cover the light-emitting elements 70R, 70G, and 70B. The protective layer 271 has a function of preventing impurities such as water from diffusing from above into each light-emitting element.

[0218] The protective layer 271 may have, for example, a single-layer structure or a multilayer structure including at least an inorganic insulating film. Examples of inorganic insulating films include oxide films or nitride films such as silicon oxide film, silicon oxynitride film, silicon nitride oxide film, silicon nitride film, aluminum oxide film, aluminum oxynitride film, and hafnium oxide film. Alternatively, the protective layer 271 may be made of a semiconductor material such as indium gallium oxide or indium gallium zinc oxide (IGZO). The protective layer 271 may be formed by atomic layer deposition (ALD), chemical vapor deposition (CVD), or sputtering. While the protective layer 271 includes an inorganic insulating film, the present invention is not limited to this. For example, the protective layer 271 may have a multilayer structure including an inorganic insulating film and an organic insulating film.

[0219] In this specification, "nitride oxide" refers to a compound containing more nitrogen than oxygen. "Oxynitride" refers to a compound containing more oxygen than nitrogen. The content of each element can be measured, for example, by Rutherford Backscattering Spectrometry (RBS).

[0220] When indium gallium zinc oxide is used as the protective layer 271, it can be processed using a wet etching method or a dry etching method. For example, when IGZO is used as the protective layer 271, a chemical solution such as oxalic acid, phosphoric acid, or a mixed chemical solution (for example, a mixed chemical solution of phosphoric acid, acetic acid, nitric acid, and water (also called a mixed acid aluminum etching solution)) can be used. The mixed acid aluminum etching solution can have a volume ratio of phosphoric acid:acetic acid:nitric acid:water of approximately 53.3:6.7:3.3:36.7.

[0221] 10C shows a different example. Specifically, FIG. 10C shows a light-emitting element 70W that emits white light. The light-emitting element 70W has an EL layer 786W that emits white light between a conductor 772 that functions as a pixel electrode and a conductor 788 that functions as a common electrode.

[0222] The EL layer 786W may be configured by stacking two or more light-emitting layers selected so that the emitted colors are complementary to each other. Alternatively, a stacked EL layer may be used in which a charge generating layer is sandwiched between light-emitting layers.

[0223] FIG. 10C shows three light-emitting elements 70W lined up. A colored layer 264R is provided on the top of the left light-emitting element 70W. The colored layer 264R functions as a bandpass filter that transmits red light. Similarly, a colored layer 264G that transmits green light is provided on the top of the center light-emitting element 70W, and a colored layer 264B that transmits blue light is provided on the top of the right light-emitting element 70W. This allows the display device to display color images.

[0224] Here, the EL layer 786W and the conductor 788 functioning as a common electrode are separated between two adjacent light-emitting elements 70W. This prevents unintended light emission due to current flowing through the EL layer 786W between the two adjacent light-emitting elements 70W. In particular, when a stacked EL layer in which a charge-generating layer is provided between two light-emitting layers is used as the EL layer 786W, the higher the resolution, i.e., the smaller the distance between adjacent pixels, the more pronounced the effect of crosstalk becomes, resulting in a decrease in contrast. Therefore, by using such a configuration, a display device that combines high resolution and high contrast can be realized.

[0225] The EL layer 786W and the conductor 788 functioning as a common electrode are preferably separated by photolithography, which allows the spacing between light-emitting elements to be narrowed, thereby achieving a display device with a higher aperture ratio than when a shadow mask such as a metal mask is used.

[0226] In the case of a bottom-emission light-emitting element, a colored layer may be provided between the conductor 772 functioning as a pixel electrode and the insulating layer 251.

[0227] FIG. 10D shows an example different from the above. Specifically, FIG. 10D shows a configuration in which the insulating layer 272 is not provided between the light-emitting element 70R, the light-emitting element 70G, and the light-emitting element 70B. This configuration allows a display device with a high aperture ratio. Furthermore, the protective layer 271 covers the side surfaces of the EL layer 786R, the EL layer 786G, and the EL layer 786B. This configuration can suppress impurities (typically, water, etc.) that may enter from the side surfaces of the EL layer 786R, the EL layer 786G, and the EL layer 786B. Furthermore, in the configuration shown in FIG. 10D, the top surfaces of the conductor 772, the EL layer 786R, and the conductor 788 have approximately the same shape. This structure can be formed collectively using a resist mask or the like after the conductor 772, the EL layer 786R, and the conductor 788 are formed. This process can also be called self-aligned patterning, because the EL layer 786R and the conductor 788 are processed using the conductor 788 as a mask. Although the EL layer 786R has been described here, the EL layer 786G and the EL layer 786B can also have a similar configuration.

[0228] 10D shows a structure in which a protective layer 273 is further provided on the protective layer 271. For example, the protective layer 271 is formed using an apparatus (typically, an ALD apparatus) capable of depositing a film with high coverage, and the protective layer 273 is formed using an apparatus (typically, a sputtering apparatus) capable of depositing a film with lower coverage than the protective layer 271, thereby providing a region 275 between the protective layer 271 and the protective layer 273. In other words, the region 275 is located between the EL layer 786R and the EL layer 786G, and between the EL layer 786G and the EL layer 786B.

[0229] The region 275 contains, for example, one or more selected from air, nitrogen, oxygen, carbon dioxide, and Group 18 elements (typically, helium, neon, argon, xenon, krypton, etc.). The region 275 may also contain, for example, a gas used when forming the protective layer 273. For example, when the protective layer 273 is formed by sputtering, the region 275 may contain one or more of the above Group 18 elements. When the region 275 contains a gas, the gas can be identified by gas chromatography or the like. Alternatively, when the protective layer 273 is formed by sputtering, the gas used during sputtering may also be contained in the film of the protective layer 273. In this case, when the protective layer 273 is analyzed by energy dispersive X-ray analysis (EDX analysis) or the like, elements such as argon may be detected.

[0230] Furthermore, when the refractive index of region 275 is lower than that of protective layer 271, light emitted from EL layer 786R, EL layer 786G, or EL layer 786B is reflected at the interface between protective layer 271 and region 275. This may prevent light emitted from EL layer 786R, EL layer 786G, or EL layer 786B from entering adjacent pixels. This prevents light of different colors from being mixed in with neighboring pixels, thereby improving the display quality of the display device.

[0231] An insulating layer containing an organic material may be filled in the region 275. For example, an acrylic resin, a polyimide resin, an epoxy resin, a polyamide resin, a polyimideamide resin, a siloxane resin, a benzocyclobutene-based resin, a phenolic resin, or a precursor of these resins may be used as the insulating layer containing an organic material.

[0232] Furthermore, a photosensitive resin (e.g., a resist material) may be used as the insulating layer filled in the region 275. The photosensitive resin may be a positive-type material or a negative-type material. By using a photosensitive resin, an insulating layer can be provided in the region 275 simply by the steps of exposure and development. Furthermore, it is preferable that the material filled in the region 275 is a material that absorbs visible light. When the material that absorbs visible light is filled in the region 275, light emitted from the EL layer can be absorbed in the region 275, thereby suppressing light (stray light) that may leak into an adjacent EL layer. Therefore, a display device with high display quality can be provided.

[0233] 10D , the area between light-emitting element 70R and light-emitting element 70G or the area between light-emitting element 70G and light-emitting element 70B (hereinafter simply referred to as the distance between the light-emitting elements) can be narrowed. Specifically, the distance between the light-emitting elements can be set to 1 μm or less, preferably 500 nm or less, and more preferably 200 nm or less, 100 nm or less, 90 nm or less, 70 nm or less, 50 nm or less, 30 nm or less, 20 nm or less, 15 nm or less, or 10 nm or less. In other words, the distance between the side surface of EL layer 786R and the side surface of EL layer 786G or the distance between the side surface of EL layer 786G and the side surface of EL layer 786B has an area of ​​1 μm or less, preferably 0.5 μm (500 nm) or less, and more preferably 100 nm or less.

[0234] 10D can be referred to as an air isolation structure. The air isolation structure can isolate the light emitting elements while suppressing color mixing or crosstalk of the light from each light emitting element.

[0235] Furthermore, when comparing the above-mentioned white light-emitting device (single structure or tandem structure) with a light-emitting device with an SBS structure, the light-emitting device with an SBS structure can consume less power than the white light-emitting device. If you want to keep power consumption low, it is preferable to use a light-emitting device with an SBS structure. On the other hand, the manufacturing process of a white light-emitting device is simpler than that of a light-emitting device with an SBS structure, so it is preferable because it can reduce manufacturing costs or increase manufacturing yields.

[0236] FIG. 11A shows a different example. Specifically, the configuration shown in FIG. 11A differs from the configuration shown in FIG. 10D in the configuration of the insulating layer 251. The insulating layer 251 has a recess formed by removing a portion of its upper surface during processing of the light-emitting elements 70R, 70G, and 70B. A protective layer 271 is formed in the recess. In other words, the insulating layer 251 has a region where the lower surface of the protective layer 271 is located lower than the lower surface of the conductor 772 in a cross-sectional view. By providing this region, impurities (typically, water, etc.) that may enter the light-emitting elements 70R, 70G, and 70B from below can be effectively suppressed. The recess can be formed when impurities (also referred to as residue) that may adhere to the side surfaces of the light-emitting elements 70R, 70G, and 70B are removed by wet etching or the like during processing. After removing the residue, the side surfaces of the light-emitting elements are covered with the protective layer 271, resulting in a highly reliable display device.

[0237] FIG. 11B shows a different example. Specifically, the configuration shown in FIG. 11B includes an insulating layer 276 and a microlens array 277 in addition to the configuration shown in FIG. 11A. The insulating layer 276 functions as an adhesive layer. If the refractive index of the insulating layer 276 is lower than that of the microlens array 277, the microlens array 277 can condense light emitted from the light-emitting elements 70R, 70G, and 70B. This improves the light extraction efficiency of the display device. This is particularly advantageous because it allows a user to view a bright image when viewing the display surface from directly in front of the display surface. The insulating layer 276 can be made of various curable adhesives, such as a photo-curable adhesive (e.g., an ultraviolet-curable adhesive), a reactive-curable adhesive, a thermosetting adhesive, or an anaerobic adhesive. Examples of such adhesives include epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, and EVA (ethylene vinyl acetate) resin. In particular, materials with low moisture permeability, such as epoxy resin, are preferred. Two-component resins may also be used. Adhesive sheets may also be used.

[0238] FIG. 11C illustrates a different example. Specifically, the configuration illustrated in FIG. 11C includes three light-emitting elements 70W instead of the light-emitting elements 70R, 70G, and 70B in the configuration illustrated in FIG. 11A. An insulating layer 276 is provided above the three light-emitting elements 70W, and coloring layers 264R, 264G, and 264B are provided above the insulating layer 276. Specifically, a coloring layer 264R that transmits red light is provided at a position overlapping the left light-emitting element 70W, a coloring layer 264G that transmits green light is provided at a position overlapping the center light-emitting element 70W, and a coloring layer 264B that transmits blue light is provided at a position overlapping the right light-emitting element 70W. This allows the semiconductor device to display a color image. The configuration illustrated in FIG. 11C is also a variation of the configuration illustrated in FIG. 10C. Note that the coloring layers are sometimes referred to as "color filters."

[0239] 11C can be configured as a structure (single structure or tandem structure) capable of emitting white light as described above. The tandem structure is preferable because it can provide high-luminance light emission.

[0240] Furthermore, by combining the above-described structure capable of emitting white light (either a single structure or a tandem structure, or both), a color filter, and the MML structure of one embodiment of the present invention, a display device with a high contrast ratio can be obtained.

[0241] 11D shows another example. Specifically, in the configuration shown in FIG. 11D, protective layer 271 is provided adjacent to the side surfaces of conductor 772 and EL layer 786. Conductor 788 is provided as a continuous layer common to each light-emitting element. In the configuration shown in FIG. 11D, region 275 is preferably filled with a filler material.

[0242] The color purity of the emitted light can be improved by providing a micro-optical resonator (microcavity) structure to light-emitting element 70. To provide a microcavity structure to light-emitting element 70, the product (optical path length) of distance d between conductor 772 and conductor 788 and refractive index n of EL layer 786 should be configured to be m times half the wavelength λ (m is an integer equal to or greater than 1). Distance d can be calculated using Equation 1.

[0243] d=m×λ / (2×n) ··· Equation 1.

[0244] According to Equation 1, the distance d of the light emitting element 70 having a microcavity structure is determined according to the wavelength (emission color) of the emitted light. The distance d corresponds to the thickness of the EL layer 786. Therefore, the EL layer 786G may be provided thicker than the EL layer 786B, and the EL layer 786R may be provided thicker than the EL layer 786G.

[0245] Strictly speaking, the distance d is the distance from the reflective region of the conductor 772, which functions as a reflective electrode, to the reflective region of the conductor 788, which functions as a semi-transmissive and semi-reflective electrode. For example, if the conductor 772 is a laminate of silver and a transparent conductive film, ITO, and the ITO is on the EL layer 786 side, the distance d can be set according to the emitted color by adjusting the film thickness of the ITO. In other words, even if the thicknesses of the EL layer 786R, EL layer 786G, and EL layer 786B are the same, the distance d appropriate for the emitted color can be obtained by changing the thickness of the ITO.

[0246] However, it may be difficult to precisely determine the positions of the reflection regions in the conductors 772 and 788. In this case, it is assumed that the microcavity effect can be fully obtained by assuming that any position in the conductors 772 and 788 is the reflection region.

[0247] The light-emitting element 70 is composed of a hole transport layer, a hole transport layer, a light-emitting layer, an electron transport layer, an electron injection layer, etc. To increase the light extraction efficiency in the microcavity structure, it is preferable to set the optical distance from the conductor 772, which functions as a reflective electrode, to the light-emitting layer to an odd multiple of λ / 4. To achieve this optical distance, it is preferable to appropriately adjust the thickness of each layer that constitutes the light-emitting element 70.

[0248] Furthermore, when light is emitted from the conductor 788 side, it is preferable that the reflectance of the conductor 788 is greater than the transmittance. The light transmittance of the conductor 788 is preferably 2% or more and 50% or less, more preferably 2% or more and 30% or less, and even more preferably 2% or more and 10% or less. By reducing the transmittance of the conductor 788 (increasing the reflectance), the effect of the microcavity can be enhanced.

[0249] This embodiment mode can be combined with the descriptions of other embodiment modes as appropriate.

[0250] (Fourth embodiment) In this embodiment, a cross-sectional structure example of a display device 10 according to one embodiment of the present invention will be described.

[0251] 12 is a cross-sectional view showing an example of the configuration of the display device 10. The display device 10 has a substrate 701 and a substrate 705, and the substrates 701 and 705 are bonded together with a sealant 712.

[0252] A single crystal semiconductor substrate such as a single crystal silicon substrate can be used as the substrate 701. Note that the substrate 701 may be a semiconductor substrate other than a single crystal semiconductor substrate.

[0253] The transistor 441 and the transistor 601 are provided over a substrate 701. The transistor 441 and the transistor 601 can be the transistors provided in the layer 30 described in the above embodiment.

[0254] The transistor 441 includes a conductor 443 serving as a gate electrode, an insulator 445 serving as a gate insulator, and a part of the substrate 701, and includes a semiconductor region 447 including a channel formation region, a low-resistance region 449a serving as one of a source region and a drain region, and a low-resistance region 449b serving as the other of the source region and the drain region. The transistor 441 may be either a p-channel type or an n-channel type.

[0255] The transistor 441 is electrically isolated from other transistors by an element isolation layer 403. Fig. 12 shows a case where the transistor 441 and the transistor 601 are electrically isolated by the element isolation layer 403. The element isolation layer 403 can be formed by a LOCOS (LOCal Oxidation of Silicon) method, an STI (Shallow Trench Isolation) method, or the like.

[0256] 12, the semiconductor region 447 has a convex shape. The conductor 443 covers the side surface and the top surface of the semiconductor region 447 with the insulator 445 interposed therebetween. Note that the conductor 443 covering the side surface of the semiconductor region 447 is not shown in FIG. The conductor 443 can be formed using a material that adjusts the work function.

[0257] A transistor having a convex semiconductor region, such as the transistor 441, can be called a fin transistor because it utilizes the convex portion of a semiconductor substrate. Note that an insulator that is in contact with the top of the convex portion and functions as a mask for forming the convex portion may be provided. Although FIG. 12 shows a configuration in which the convex portion is formed by processing a part of the substrate 701, a semiconductor having a convex portion may be formed by processing an SOI substrate.

[0258] 12 is just an example, and is not limited to this configuration, and may be an appropriate configuration depending on the circuit configuration, the operation method of the circuit, etc. For example, the transistor 441 may be a planar transistor.

[0259] The transistor 601 can have a structure similar to that of the transistor 441 .

[0260] In addition to the element isolation layer 403, the transistor 441, and the transistor 601, an insulator 405, an insulator 407, an insulator 409, and an insulator 411 are provided on the substrate 701. A conductor 451 is embedded in the insulator 405, the insulator 407, the insulator 409, and the insulator 411. Here, the height of the top surface of the conductor 451 and the height of the top surface of the insulator 411 can be made approximately the same.

[0261] An insulator 421 and an insulator 214 are provided on the conductor 451 and the insulator 411. A conductor 453 is embedded in the insulator 421 and the insulator 214. Here, the height of the top surface of the conductor 453 and the height of the top surface of the insulator 214 can be made approximately the same.

[0262] An insulator 216 is provided on the conductor 453 and the insulator 214. A conductor 455 is embedded in the insulator 216. Here, the height of the top surface of the conductor 455 and the height of the top surface of the insulator 216 can be made approximately the same.

[0263] Insulators 222, 224, 254, 280, 274, and 281 are provided on conductor 455 and insulator 216. Conductor 305 is embedded in insulators 222, 224, 254, 280, 274, and 281. Here, the height of the top surface of conductor 305 and the height of the top surface of insulator 281 can be made approximately the same.

[0264] An insulator 361 is provided on the conductor 305 and on the insulator 281. The conductor 317 and the conductor 337 are embedded in the insulator 361. Here, the height of the top surface of the conductor 337 and the height of the top surface of the insulator 361 can be made approximately the same.

[0265] An insulator 363 is provided on the conductor 337 and on the insulator 361. The conductors 347, 353, 355, and 357 are embedded in the insulator 363. Here, the height of the top surfaces of the conductors 353, 355, and 357 can be made approximately the same as the height of the top surface of the insulator 363.

[0266] Connection electrodes 760 are provided on the conductors 353, 355, 357, and insulator 363. An anisotropic conductor 780 is provided so as to be electrically connected to the connection electrodes 760, and an FPC (Flexible Printed Circuit) 716 is provided so as to be electrically connected to the anisotropic conductor 780. Various signals and the like are supplied to the display device 10 from outside the display device 10 via the FPC 716.

[0267] 12 , the low-resistance region 449b, which functions as the other of the source and drain regions of the transistor 441, is electrically connected to the FPC 716 through the conductor 451, the conductor 453, the conductor 455, the conductor 305, the conductor 317, the conductor 337, the conductor 347, the conductor 353, the conductor 355, the conductor 357, the connection electrode 760, and the anisotropic conductor 780. Here, although FIG. 12 shows three conductors, the conductor 353, the conductor 355, and the conductor 357, as conductors that electrically connect the connection electrode 760 and the conductor 347, one embodiment of the present invention is not limited thereto. The number of conductors that electrically connect the connection electrode 760 and the conductor 347 may be one, two, or four or more. By providing a plurality of conductors that electrically connect the connection electrode 760 and the conductor 347, contact resistance can be reduced.

[0268] A transistor 750 is provided over the insulator 214. The transistor 750 can be the transistor provided in the layer 40 described in the above embodiment. For example, the transistor 750 can be the transistor provided in the pixel circuit 431. An OS transistor can be preferably used as the transistor 750. An OS transistor has an extremely low off-state current. Therefore, the retention time of image data and the like can be extended, thereby reducing the frequency of refresh operations. Therefore, the power consumption of the display device 10 can be reduced.

[0269] Conductor 301a and conductor 301b are embedded in insulator 254, insulator 280, insulator 274, and insulator 281. Conductor 301a is electrically connected to one of the source and drain of transistor 750, and conductor 301b is electrically connected to the other of the source and drain of transistor 750. Here, the height of the top surfaces of conductor 301a and conductor 301b and the height of the top surface of insulator 281 can be made approximately the same.

[0270] The conductor 311, the conductor 313, the conductor 331, the capacitor 790, the conductor 333, and the conductor 335 are embedded in the insulator 361. The conductor 311 and the conductor 313 are electrically connected to the transistor 750 and function as wirings. The conductor 333 and the conductor 335 are electrically connected to the capacitor 790. Here, the height of the top surfaces of the conductor 331, the conductor 333, and the conductor 335 can be made approximately the same as the height of the top surface of the insulator 361.

[0271] Conductor 341, conductor 343, and conductor 351 are embedded in insulator 363. Here, the height of the top surface of conductor 351 and the height of the top surface of insulator 363 can be made to be approximately the same.

[0272] The insulators 405, 407, 409, 411, 421, 214, 280, 274, 281, 361, and 363 function as interlayer films and may also function as planarizing films that cover the uneven shapes below them. For example, the top surface of the insulator 363 may be planarized by planarization treatment using chemical mechanical polishing (CMP) or the like to improve flatness.

[0273] 12, the capacitor 790 has a lower electrode 321 and an upper electrode 325. An insulator 323 is provided between the lower electrode 321 and the upper electrode 325. That is, the capacitor 790 has a layered structure in which the insulator 323, which functions as a dielectric, is sandwiched between a pair of electrodes. Note that while FIG. 12 shows an example in which the capacitor 790 is provided on the insulator 281, the capacitor 790 may also be provided on an insulator different from the insulator 281.

[0274] FIG. 12 shows an example in which conductors 301a, 301b, and 305 are formed in the same layer. It also shows an example in which conductors 311, 313, 317, and the lower electrode 321 are formed in the same layer. It also shows an example in which conductors 331, 333, 335, and 337 are formed in the same layer. It also shows an example in which conductors 341, 343, and 347 are formed in the same layer. It also shows an example in which conductors 351, 353, 355, and 357 are formed in the same layer. Forming multiple conductors in the same layer can simplify the manufacturing process of the display device 10, thereby reducing the manufacturing cost of the display device 10. These conductors may be formed in different layers and may be made of different materials.

[0275] 12 includes a light-emitting element 70. The light-emitting element 70 includes a conductor 772, an EL layer 786, and a conductor 788. The EL layer 786 includes an organic compound or an inorganic compound such as quantum dots.

[0276] Examples of materials that can be used for the organic compounds include fluorescent materials and phosphorescent materials, while examples of materials that can be used for the quantum dots include colloidal quantum dot materials, alloy quantum dot materials, core-shell quantum dot materials, and core quantum dot materials.

[0277] The conductor 772 is electrically connected to the other of the source and the drain of the transistor 750 through the conductor 351, the conductor 341, the conductor 331, the conductor 313, and the conductor 301b. The conductor 772 is formed over the insulator 363 and functions as a pixel electrode.

[0278] A material that is transparent to or reflective to visible light can be used for the conductor 772. For example, an oxide material containing indium, zinc, tin, or the like can be used as the light-transmitting material. For example, a material containing aluminum, silver, or the like can be used as the reflective material.

[0279] Although not shown in FIG. 12, the display device 10 can be provided with optical members (optical substrates) such as a polarizing member, a phase difference member, an anti-reflection member, and the like.

[0280] A light-shielding layer 738 and an insulator 734 in contact with the light-shielding layer 738 are provided on the substrate 705 side. The light-shielding layer 738 has a function of blocking light emitted from an adjacent region. Alternatively, the light-shielding layer 738 has a function of blocking external light from reaching the transistor 750 and the like.

[0281] 12, an insulator 730 is provided over an insulator 363. The insulator 730 can be configured to cover part of a conductor 772. The light-emitting element 70 includes a light-transmitting conductor 788 and can be a top-emission light-emitting element. The light-emitting element 70 may have a bottom-emission structure in which light is emitted to the conductor 772 side, or a dual-emission structure in which light is emitted to both the conductor 772 and the conductor 788.

[0282] The light-shielding layer 738 is provided to have a region overlapping with the insulator 730. The light-shielding layer 738 is covered with the insulator 734. The space between the light-emitting element 70 and the insulator 734 is filled with the sealing layer 732.

[0283] Furthermore, structure 778 is disposed between insulator 730 and EL layer 786. Structure 778 is also disposed between insulator 730 and insulator 734.

[0284] The display device 10 shown in FIG. 12 has an OS transistor and a light-emitting device with an MML structure. This configuration can significantly reduce leakage currents that may flow through the transistor and between adjacent light-emitting elements (also referred to as lateral leakage currents or side leakage currents). Furthermore, when an image is displayed on the display device, the viewer can observe one or more of image clarity, image sharpness, high saturation, and a high contrast ratio. By significantly reducing the leakage currents that may flow through the transistor and the lateral leakage currents between light-emitting elements, a display with minimal light leakage (so-called whiteout) that may occur during black display (also referred to as true black display) can be achieved.

[0285] In particular, among light-emitting devices with an MML structure, by applying the SBS structure described above, the layers provided between light-emitting elements (for example, organic layers shared between light-emitting elements, also called common layers) are separated, resulting in a display with no side leakage or extremely little side leakage.

[0286] 13 is a cross-sectional view including a Si transistor included in the layer 30 and an OS transistor included in the layer 40. The description of the cross-sectional view shown in FIG. 13 is the same as that of each configuration in the cross-sectional view shown in FIG.

[0287] 13, the layer 30 may be provided with a transistor 601 included in the peripheral driver circuit and a transistor 441 included in the functional circuit region 234. The transistor 601 and the transistor 441 are, for example, Si transistors. Also, as shown in FIG. 13, the layer 40 may be provided with a transistor 438 and a capacitor 433 in the pixel circuit 431, and a transistor 95 and a capacitor 96 electrically connected to the transistor 441 in the functional circuit region 234. Furthermore, a light-emitting element 70 may be provided above the layer 40.

[0288] For example, the transistor 95 can be a transistor that forms part of a memory circuit included in the functional circuit region 234. An OS transistor can be used as the transistor 95. An OS transistor has an extremely low off-state current. Therefore, data written to the memory circuit can be retained for a long period of time. Furthermore, data can be retained even when power supply to the memory circuit is stopped.

[0289] FIG. 14 illustrates a modification of the display device 10 illustrated in FIG. 12. The display device 10 illustrated in FIG. 14 differs from the display device 10 illustrated in FIG. 12 in that it does not include the transistor 601 and the transistor 441. As illustrated in FIG. 14, the display device does not necessarily include a Si transistor and may be formed only with OS transistors. Preferably, an OS transistor is used in a pixel circuit. At least a part of a driver circuit may be formed with OS transistors. At least a part of a functional circuit may be formed with OS transistors. At least a part of a driver circuit may be external. At least a part of a functional circuit may be external. Note that FIG. 14 illustrates an example in which the transistor 750 is provided over a substrate 701. As described above, the substrate 701 may be a single-crystal semiconductor substrate such as a single-crystal silicon substrate or another semiconductor substrate. Alternatively, the substrate 701 may be any of various insulating substrates such as a glass substrate or a sapphire substrate.

[0290] FIG. 15 shows a modified example of the display device 10 shown in FIG. 12. The display device 10 shown in FIG. 15 differs from the display device 10 shown in FIG. 12 in that a colored layer 736 is provided. The colored layer 736 is provided so as to have an area overlapping with the light-emitting element 70. By providing the colored layer 736, the color purity of the light extracted from the light-emitting element 70 can be increased. This allows the display device 10 to display a high-quality image. Furthermore, since all of the light-emitting elements 70 of the display device 10 can be light-emitting elements that emit white light, it is not necessary to form the EL layer 786 by different colors, and the display device 10 can have high definition.

[0291] The light emitting element 70 can have a micro-optical resonator (microcavity) structure. This allows light of a predetermined color (e.g., RGB) to be extracted without providing a colored layer, and the display device 10 can perform color display. By configuring the display device 10 without providing a colored layer, it is possible to suppress light absorption by the colored layer. This allows the display device 10 to display high-brightness images and reduce the power consumption of the display device 10. Note that even when the EL layer 786 is formed in an island shape for each pixel or in a striped shape for each pixel column, that is, formed by coloring, it is possible to configure the display device 10 without providing a colored layer. Note that the luminance of the display device 10 can be, for example, 500 cd / m 2 More than 20000cd / m 2 Less than 1000 cd / m 2 More than 20000cd / m 2 or less, more preferably 5000 cd / m 2 More than 20000cd / m 2 It can be as follows:

[0292] 12 and 15 show a structure in which the transistors 441 and 601 are provided so that channel formation regions are formed inside the substrate 701 and the OS transistors are stacked over the transistors 441 and 601; however, one embodiment of the present invention is not limited to this. FIG. 16 shows a modification of FIG. 15. The display device 10 shown in FIG. 16 differs from the display device 10 shown in FIG. 15 mainly in that OS transistors 602 and 603 are provided instead of the transistors 441 and 601. Furthermore, an OS transistor can be used as the transistor 750. That is, the display device 10 shown in FIG. 16 has a stack of OS transistors.

[0293] An insulator 613 and an insulator 614 are provided over a substrate 701, and a transistor 602 and a transistor 603 are provided over the insulator 614. Note that a transistor or the like may be provided between the substrate 701 and the insulator 613. For example, a transistor having a structure similar to that of the transistor 441 and the transistor 601 shown in FIG. 15 may be provided between the substrate 701 and the insulator 613.

[0294] The transistor 602 and the transistor 603 can be the transistors provided in the layer 30 described in the above embodiment. Therefore, the transistor 602 and the transistor 603 can be OS transistors having a structure similar to that of the transistor 750. Note that the transistor 602 and the transistor 603 may be OS transistors having a structure different from that of the transistor 750.

[0295] In addition to the transistor 602 and the transistor 603, insulators 616, 622, 624, 654, 680, 674, and 681 are provided over the insulator 614. The conductor 461 is embedded in the insulators 654, 680, 674, and 681. Here, the height of the top surface of the conductor 461 and the height of the top surface of the insulator 681 can be made approximately the same.

[0296] An insulator 501 is provided on the conductor 461 and the insulator 681. The conductor 463 is embedded in the insulator 501. Here, the height of the top surface of the conductor 463 and the height of the top surface of the insulator 501 can be made approximately the same.

[0297] An insulator 421 and an insulator 214 are provided on the conductor 463 and the insulator 501. A conductor 453 is embedded in the insulator 421 and the insulator 214. Here, the height of the top surface of the conductor 453 and the height of the top surface of the insulator 214 can be made approximately the same.

[0298] As shown in Figure 16, one of the source or drain of transistor 602 is electrically connected to FPC 716 via conductor 461, conductor 463, conductor 453, conductor 455, conductor 305, conductor 317, conductor 337, conductor 347, conductor 353, conductor 355, conductor 357, connection electrode 760, and anisotropic conductor 780.

[0299] The insulators 613, 614, 680, 674, 681, and 501 function as interlayer films and may also function as planarizing films that cover the uneven shapes underneath.

[0300] 16, the display device 10 can have a narrower frame and be smaller in size, and all of the transistors included in the display device 10 can be OS transistors. This allows, for example, the transistors provided in the layer 30 and the transistors provided in the layer 40 to be manufactured using the same device. This reduces the manufacturing cost of the display device 10, and the display device 10 can be manufactured at a low price.

[0301] 17 is a cross-sectional view illustrating a configuration example of the display device 10. The display device 10 differs from the display device 10 illustrated in FIG. 15 mainly in that a layer including a transistor 800 is provided between a layer including a transistor 750 and a layer including a transistor 601 and a transistor 441.

[0302] 17, the layer 30 described in the above embodiment can include a layer including the transistor 601 and the transistor 441 and a layer including the transistor 800. The transistor 750 can be the transistor provided in the layer 40 described in the above embodiment.

[0303] An insulator 821 and an insulator 814 are provided on the conductor 451 and the insulator 411. A conductor 853 is embedded in the insulator 821 and the insulator 814. Here, the height of the top surface of the conductor 853 and the height of the top surface of the insulator 814 can be made approximately the same.

[0304] An insulator 816 is provided on the conductor 853 and the insulator 814. A conductor 855 is embedded in the insulator 816. Here, the height of the top surface of the conductor 855 and the height of the top surface of the insulator 816 can be made approximately the same.

[0305] Insulators 822, 824, 854, 880, 874, and 881 are provided on conductor 855 and insulator 816. Conductor 805 is embedded in insulators 822, 824, 854, 880, 874, and 881. Here, the height of the top surface of conductor 805 and the height of the top surface of insulator 881 can be made approximately the same.

[0306] An insulator 421 and an insulator 214 are provided on the conductor 817 and the insulator 881 .

[0307] As shown in Figure 17, the low resistance region 449b, which functions as the other of the source region or drain region of transistor 441, is electrically connected to FPC 716 via conductor 451, conductor 853, conductor 855, conductor 805, conductor 817, conductor 453, conductor 455, conductor 305, conductor 317, conductor 337, conductor 347, conductor 353, conductor 355, conductor 357, connection electrode 760, and anisotropic conductor 780.

[0308] The transistor 800 is provided over the insulator 814. The transistor 800 is preferably an OS transistor, for example.

[0309] Conductor 801a and conductor 801b are embedded in insulator 854, insulator 880, insulator 874, and insulator 881. Conductor 801a is electrically connected to one of the source and drain of transistor 800, and conductor 801b is electrically connected to the other of the source and drain of transistor 800. Here, the height of the top surfaces of conductor 801a and conductor 801b and the height of the top surface of insulator 881 can be made approximately the same.

[0310] Insulator 405, insulator 407, insulator 409, insulator 411, insulator 821, insulator 814, insulator 880, insulator 874, insulator 881, insulator 421, insulator 214, insulator 280, insulator 274, insulator 281, insulator 361, and insulator 363 function as interlayer films and may also function as planarizing films that cover the uneven shapes below them.

[0311] 17 shows an example in which a conductor 801a, a conductor 801b, and a conductor 805 are formed in the same layer. Also shown is an example in which a conductor 811, a conductor 813, and a conductor 817 are formed in the same layer.

[0312] This embodiment mode can be combined with the descriptions of other embodiment modes as appropriate.

[0313] (Embodiment 5) In this embodiment, a transistor that can be used in a display device according to one embodiment of the present invention will be described.

[0314] <Transistor configuration example> 18A, 18B, and 18C are a top view and a cross-sectional view of a transistor 200 that can be used in a display device of one embodiment of the present invention and the periphery of the transistor 200. The transistor 200 can be applied to the display device of one embodiment of the present invention.

[0315] FIG. 18A is a top view of the transistor 200. Also, FIGS. 18B and 18C are cross-sectional views of the transistor 200. Here, FIG. 18B is a cross-sectional view of the portion indicated by the dashed-dotted line A1-A2 in FIG. 18A, and is also a cross-sectional view of the transistor 200 in the channel length direction. Also, FIG. 18C is a cross-sectional view of the portion indicated by the dashed-dotted line A3-A4 in FIG. 18A, and is also a cross-sectional view of the transistor 200 in the channel width direction. Note that in the top view of FIG. 18A, some elements are omitted for clarity.

[0316] As shown in FIG. 18, the transistor 200 has a metal oxide 231a arranged on a substrate (not shown), a metal oxide 231b arranged on the metal oxide 231a, a conductor 242a and a conductor 242b arranged spaced apart from each other on the metal oxide 231b, an insulator 280 arranged on the conductors 242a and 242b and having an opening formed between the conductors 242a and 242b, a conductor 260 arranged in the opening, an insulator 250 arranged among the metal oxide 231b, the conductors 242a, 242b, and the insulator 280, and the conductor 260, and a metal oxide 231c arranged among the metal oxide 231b, the conductors 242a, 242b, the insulator 280, and the insulator 250. 18B and 18C, it is preferable that the top surface of conductor 260 substantially coincides with the top surfaces of insulator 250, insulator 254, metal oxide 231c, and insulator 280. Note that, hereinafter, metal oxide 231a, metal oxide 231b, and metal oxide 231c may be collectively referred to as metal oxide 231. Furthermore, conductor 242a and conductor 242b may be collectively referred to as conductor 242.

[0317] 18, the side surfaces of the conductors 242a and 242b facing the conductor 260 have a substantially vertical shape. Note that the transistor 200 shown in FIG. 18 is not limited to this, and the angle formed between the side surface and the bottom surface of the conductors 242a and 242b may be 10° or more and 80° or less, preferably 30° or more and 60° or less. Furthermore, the opposing side surfaces of the conductors 242a and 242b may have multiple surfaces.

[0318] 18, it is preferable that insulator 254 be disposed between insulator 224, metal oxide 231a, metal oxide 231b, conductor 242a, conductor 242b, and metal oxide 231c and insulator 280. Here, it is preferable that insulator 254 be in contact with the side surface of metal oxide 231c, the top and side surfaces of conductor 242a, the top and side surfaces of conductor 242b, the side surfaces of metal oxide 231a and metal oxide 231b, and the top surface of insulator 224, as shown in FIGS.

[0319] Although the transistor 200 has been described as having a three-layer structure of the metal oxide 231a, the metal oxide 231b, and the metal oxide 231c in and around a region where a channel is formed (hereinafter also referred to as a channel formation region), the present invention is not limited to this. For example, a two-layer structure of the metal oxide 231b and the metal oxide 231c or a stacked structure of four or more layers may be provided. Furthermore, the transistor 200 has been described as having a two-layer stacked structure, but the present invention is not limited to this. For example, the conductor 260 may have a single-layer structure or a stacked structure of three or more layers. Furthermore, each of the metal oxide 231a, the metal oxide 231b, and the metal oxide 231c may have a stacked structure of two or more layers.

[0320] For example, when the metal oxide 231c has a layered structure consisting of a first metal oxide and a second metal oxide on the first metal oxide, it is preferable that the first metal oxide has a composition similar to that of the metal oxide 231b, and the second metal oxide has a composition similar to that of the metal oxide 231a.

[0321] Here, the conductor 260 functions as the gate electrode of the transistor, and the conductors 242a and 242b function as the source electrode and drain electrode, respectively. As described above, the conductor 260 is formed so as to be embedded in the opening of the insulator 280 and in the region sandwiched between the conductors 242a and 242b. Here, the arrangement of the conductors 260, 242a, and 242b is selected in a self-aligned manner with respect to the opening of the insulator 280. That is, in the transistor 200, the gate electrode can be positioned between the source electrode and the drain electrode in a self-aligned manner. Therefore, the conductor 260 can be formed without providing an alignment margin, thereby reducing the area occupied by the transistor 200. This allows for a high-resolution display device. Furthermore, the display device can have a narrow frame.

[0322] As shown in FIG. 18, the conductor 260 preferably has a conductor 260a provided inside the insulator 250 and a conductor 260b provided so as to be embedded inside the conductor 260a.

[0323] The transistor 200 preferably includes an insulator 214 disposed on a substrate (not shown), an insulator 216 disposed on the insulator 214, a conductor 205 disposed so as to be embedded in the insulator 216, an insulator 222 disposed on the insulator 216 and the conductor 205, and an insulator 224 disposed on the insulator 222. A metal oxide 231a is preferably disposed on the insulator 224.

[0324] An insulator 274 and an insulator 281, which function as interlayer films, are preferably disposed over the transistor 200. Here, the insulator 274 is preferably disposed in contact with the top surfaces of the conductor 260, the insulator 250, the insulator 254, the metal oxide 231c, and the insulator 280.

[0325] It is preferable that insulators 222, 254, and 274 have the function of suppressing the diffusion of at least one of hydrogen (e.g., hydrogen atoms, hydrogen molecules, etc.). For example, it is preferable that insulators 222, 254, and 274 have lower hydrogen permeability than insulators 224, 250, and 280. It is also preferable that insulators 222 and 254 have the function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.). For example, it is preferable that insulators 222 and 254 have lower oxygen permeability than insulators 224, 250, and 280.

[0326] Here, insulator 224, metal oxide 231, and insulator 250 are separated by insulators 280 and 281, and by insulators 254 and 274. This makes it possible to prevent impurities such as hydrogen and excess oxygen contained in insulators 280 and 281 from being mixed into insulator 224, metal oxide 231, and insulator 250.

[0327] It is preferable that a conductor 245 (conductor 245a and conductor 245b) electrically connected to the transistor 200 and functioning as a plug is provided. Note that the insulator 241 (insulator 241a and insulator 241b) is provided in contact with the side surface of the conductor 245 functioning as a plug. That is, the insulator 241 is provided in contact with the inner wall of the opening of the insulators 254, 280, 274, and 281. Alternatively, a first conductor of the conductor 245 may be provided in contact with the side surface of the insulator 241, and a second conductor of the conductor 245 may be provided further inward. Here, the height of the top surface of the conductor 245 and the height of the top surface of the insulator 281 can be made approximately the same. Note that, in the transistor 200, a configuration in which the first conductor of the conductor 245 and the second conductor of the conductor 245 are stacked is described, but the present invention is not limited to this. For example, the conductor 245 may be provided as a single layer or a laminated structure of three or more layers. When the structure has a laminated structure, it may be distinguished by assigning an ordinal number to the order of formation.

[0328] In the transistor 200, a metal oxide that functions as an oxide semiconductor (hereinafter also referred to as an oxide semiconductor) is preferably used for the metal oxide 231 (the metal oxide 231a, the metal oxide 231b, and the metal oxide 231c) including the channel formation region. For example, the metal oxide that serves as the channel formation region of the metal oxide 231 preferably has a band gap of 2 eV or more, preferably 2.5 eV or more.

[0329] The metal oxide preferably contains at least indium (In) or zinc (Zn). In particular, it is preferable that it contains indium (In) and zinc (Zn). Furthermore, it is preferable that it contains an element M in addition to these. The element M can be one or more of aluminum (Al), gallium (Ga), yttrium (Y), tin (Sn), boron (B), titanium (Ti), iron (Fe), nickel (Ni), germanium (Ge), zirconium (Zr), molybdenum (Mo), lanthanum (La), cerium (Ce), neodymium (Nd), hafnium (Hf), tantalum (Ta), tungsten (W), magnesium (Mg), and cobalt (Co). In particular, it is preferable that the element M is one or more of aluminum (Al), gallium (Ga), yttrium (Y), and tin (Sn). Furthermore, it is more preferable that the element M contains either or both of gallium (Ga) and tin (Sn).

[0330] 18B, the film thickness of the metal oxide 231b in the region that does not overlap with the conductor 242 may be thinner than the film thickness of the region that overlaps with the conductor 242. This is formed by removing a portion of the upper surface of the metal oxide 231b when forming the conductors 242a and 242b. When a conductive film that will become the conductor 242 is formed on the upper surface of the metal oxide 231b, a low-resistance region may be formed near the interface with the conductive film. In this way, by removing the low-resistance region located between the conductors 242a and 242b on the upper surface of the metal oxide 231b, it is possible to prevent a channel from being formed in that region.

[0331] According to one embodiment of the present invention, a display device having high definition and a small transistor can be provided. Alternatively, a display device having high luminance and a transistor with high on-state current can be provided. Alternatively, a display device having high-speed operation and a transistor with stable electrical characteristics can be provided. Alternatively, a display device having low power consumption and a transistor with low off-state current can be provided.

[0332] A detailed structure of the transistor 200 that can be used in the display device of one embodiment of the present invention will be described.

[0333] The conductor 205 is disposed so as to have an overlapping region with the metal oxide 231 and the conductor 260. The conductor 205 is preferably embedded in the insulator 216.

[0334] The conductor 205 includes conductor 205a, conductor 205b, and conductor 205c. The conductor 205a is provided in contact with the bottom surface and sidewall of an opening provided in the insulator 216. The conductor 205b is provided so as to be embedded in a recess formed in the conductor 205a. Here, the upper surface of the conductor 205b is lower than the upper surface of the conductor 205a and the upper surface of the insulator 216. The conductor 205c is provided in contact with the upper surface of the conductor 205b and the side surface of the conductor 205a. Here, the height of the upper surface of the conductor 205c is approximately the same as the height of the upper surface of the conductor 205a and the height of the upper surface of the insulator 216. In other words, the conductor 205b is configured to be enclosed by the conductors 205a and 205c.

[0335] Conductor 205a and conductor 205c are preferably made of a conductive material that has the function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (NO, NO, NO, etc.), copper atoms, etc. Alternatively, it is preferable to use a conductive material that has the function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.).

[0336] By using a conductive material capable of reducing hydrogen diffusion for the conductor 205a and the conductor 205c, it is possible to prevent impurities such as hydrogen contained in the conductor 205b from diffusing into the metal oxide 231 via the insulator 224 or the like. Furthermore, by using a conductive material capable of suppressing oxygen diffusion for the conductor 205a and the conductor 205c, it is possible to prevent the conductor 205b from being oxidized and its conductivity from decreasing. Examples of conductive materials capable of suppressing oxygen diffusion include titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, and ruthenium oxide. Therefore, the conductor 205a may be a single layer or a multilayer of the above conductive materials. For example, the conductor 205a may be made of titanium nitride.

[0337] The conductor 205b is preferably made of a conductive material containing tungsten, copper, or aluminum as a main component, for example, tungsten.

[0338] Here, the conductor 260 may function as a first gate (also referred to as a top gate) electrode. The conductor 205 may function as a second gate (also referred to as a bottom gate) electrode. In this case, the potential applied to the conductor 205 may be changed independently of the potential applied to the conductor 260, thereby controlling the V th In particular, applying a negative potential to conductor 205 can control the V th It is possible to make the off-state current smaller by making the potential greater than 0 V. Therefore, applying a negative potential to the conductor 205 can make the drain current smaller when the potential applied to the conductor 260 is 0 V than when no potential is applied.

[0339] The conductor 205 is preferably provided to be larger than the channel formation region of the metal oxide 231. In particular, as shown in Fig. 18C, the conductor 205 preferably extends also in a region outside the end portion intersecting with the channel width direction of the metal oxide 231. In other words, the conductor 205 and the conductor 260 preferably overlap with each other with an insulator interposed therebetween on the outside of the side surface of the metal oxide 231 in the channel width direction.

[0340] With the above structure, the channel formation region of the metal oxide 231 can be electrically surrounded by the electric field of the conductor 260 that functions as a first gate electrode and the electric field of the conductor 205 that functions as a second gate electrode.

[0341] 18C, the conductor 205 is extended to function as wiring. However, the present invention is not limited to this, and a conductor that functions as wiring may be provided below the conductor 205.

[0342] The insulator 214 preferably functions as a barrier insulating film that prevents impurities such as water or hydrogen from entering the transistor 200 from the substrate side. Therefore, the insulator 214 is preferably made of an insulating material that has a function of preventing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (NO, NO, NO, etc.), and copper atoms (i.e., the impurities are less likely to permeate through the insulator). Alternatively, the insulator 214 is preferably made of an insulating material that has a function of preventing the diffusion of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.) (i.e., the oxygen is less likely to permeate through the insulator).

[0343] For example, it is preferable to use aluminum oxide, silicon nitride, or the like as the insulator 214. This can prevent impurities such as water or hydrogen from diffusing from the substrate side of the insulator 214 to the transistor 200 side. Alternatively, it can prevent oxygen contained in the insulator 224 or the like from diffusing from the insulator 214 to the substrate side.

[0344] The insulators 216, 280, and 281, which function as interlayer films, preferably have a lower dielectric constant than the insulator 214. Using a material with a low dielectric constant as the interlayer film can reduce parasitic capacitance between wirings. For example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide to which fluorine has been added, silicon oxide to which carbon has been added, silicon oxide to which carbon and nitrogen have been added, silicon oxide having vacancies, or the like can be used as the insulators 216, 280, and 281 as appropriate.

[0345] The insulators 222 and 224 function as gate insulators.

[0346] Here, the insulator 224 in contact with the metal oxide 231 preferably releases oxygen by heating. In this specification, oxygen released by heating is sometimes referred to as excess oxygen. For example, the insulator 224 may be made of silicon oxide, silicon oxynitride, or the like as appropriate. By providing an insulator containing oxygen in contact with the metal oxide 231, oxygen vacancies in the metal oxide 231 can be reduced, and the reliability of the transistor 200 can be improved.

[0347] Specifically, it is preferable to use an oxide material from which a portion of oxygen is released by heating as the insulator 224. The oxide material from which oxygen is released by heating is an oxide material from which the amount of released oxygen converted into oxygen atoms is 1.0×10 in TDS (Thermal Desorption Spectroscopy) analysis. 18 atoms / cm 3 or more, preferably 1.0 × 10 19 atoms / cm 3 More preferably, 2.0 × 10 19 atoms / cm 3 or more, or 3.0 x 10 20 atoms / cm 3 The oxide film is one having the above properties. The surface temperature of the film during the TDS analysis is preferably in the range of 100°C or higher and 700°C or lower, or 100°C or higher and 400°C or lower.

[0348] 18C, the thickness of the region of insulator 224 that does not overlap with insulator 254 and metal oxide 231b may be thinner than the thickness of the other region. It is preferable that the thickness of the region of insulator 224 that does not overlap with insulator 254 and metal oxide 231b is a thickness that allows sufficient diffusion of the oxygen.

[0349] Like the insulator 214, the insulator 222 preferably functions as a barrier insulating film that prevents impurities such as water or hydrogen from entering the transistor 200 from the substrate side. For example, the insulator 222 preferably has lower hydrogen permeability than the insulator 224. By surrounding the insulator 224, the metal oxide 231, the insulator 250, etc. with the insulators 222, 254, and 274, impurities such as water or hydrogen can be prevented from entering the transistor 200 from the outside.

[0350] Furthermore, the insulator 222 preferably has a function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.) (i.e., the oxygen is less likely to permeate). For example, the insulator 222 preferably has lower oxygen permeability than the insulator 224. The insulator 222 preferably has a function of suppressing the diffusion of oxygen and impurities, which can reduce the diffusion of oxygen contained in the metal oxide 231 toward the substrate side. Furthermore, the conductor 205 can be prevented from reacting with the oxygen contained in the insulator 224 and the metal oxide 231.

[0351] The insulator 222 may be an insulator containing an oxide of one or both of insulating materials, aluminum and hafnium. Aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), or the like is preferably used as the insulator containing an oxide of one or both of aluminum and hafnium. When the insulator 222 is formed using such a material, the insulator 222 functions as a layer that suppresses oxygen release from the metal oxide 231 and the intrusion of impurities such as hydrogen into the metal oxide 231 from the periphery of the transistor 200.

[0352] Alternatively, for example, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide may be added to these insulators. Alternatively, these insulators may be nitrided. Silicon oxide, silicon oxynitride, or silicon nitride may be stacked on the above insulators.

[0353] The insulator 222 may be a single layer or a multilayer of an insulator containing a so-called high-k material, such as aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3), or (Ba,Sr)TiO3 (BST). As transistors become smaller and more highly integrated, thinning the gate insulator can cause problems such as leakage current. Using a high-k material for the insulator that functions as the gate insulator allows for a reduction in the gate potential during transistor operation while maintaining the physical film thickness.

[0354] The insulator 222 and the insulator 224 may have a layered structure of two or more layers. In this case, the layered structure is not limited to layers made of the same material, and may be layers made of different materials. For example, an insulator similar to the insulator 224 may be provided below the insulator 222.

[0355] The metal oxide 231 includes a metal oxide 231a, a metal oxide 231b on the metal oxide 231a, and a metal oxide 231c on the metal oxide 231b. By providing the metal oxide 231a below the metal oxide 231b, it is possible to suppress the diffusion of impurities from structures formed below the metal oxide 231a to the metal oxide 231b. Furthermore, by providing the metal oxide 231c on the metal oxide 231b, it is possible to suppress the diffusion of impurities from structures formed above the metal oxide 231c to the metal oxide 231b.

[0356] The metal oxide 231 preferably has a stacked structure of multiple oxide layers with different atomic ratios of each metal atom. For example, when the metal oxide 231 contains at least indium (In) and the element M, the ratio of the number of atoms of the element M contained in the metal oxide 231a to the number of atoms of all elements constituting the metal oxide 231a is preferably higher than the ratio of the number of atoms of the element M contained in the metal oxide 231b to the number of atoms of all elements constituting the metal oxide 231b. Furthermore, the ratio of the number of atoms of the element M contained in the metal oxide 231a to In is preferably higher than the ratio of the number of atoms of the element M contained in the metal oxide 231b to In. Here, the metal oxide 231c can be the same as the metal oxide 231a or the metal oxide 231b.

[0357] The energy of the conduction band minimum of the metal oxide 231a and the metal oxide 231c is preferably higher than the energy of the conduction band minimum of the metal oxide 231b. In other words, the electron affinity of the metal oxide 231a and the metal oxide 231c is preferably lower than the electron affinity of the metal oxide 231b. In this case, the metal oxide 231c is preferably a metal oxide that can be used for the metal oxide 231a. Specifically, the ratio of the number of atoms of the element M contained in the metal oxide 231c to the number of atoms of all elements constituting the metal oxide 231c is preferably higher than the ratio of the number of atoms of the element M contained in the metal oxide 231b to the number of atoms of all elements constituting the metal oxide 231b. Furthermore, the atomic ratio of the element M contained in the metal oxide 231c to In is preferably higher than the atomic ratio of the element M contained in the metal oxide 231b to In.

[0358] Here, the energy level of the conduction band minimum changes smoothly at the junction between the metal oxide 231a, the metal oxide 231b, and the metal oxide 231c. In other words, the energy level of the conduction band minimum at the junction between the metal oxide 231a, the metal oxide 231b, and the metal oxide 231c changes continuously or forms a continuous junction. To achieve this, it is advisable to reduce the defect level density of the mixed layers formed at the interface between the metal oxide 231a and the metal oxide 231b and at the interface between the metal oxide 231b and the metal oxide 231c.

[0359] Specifically, the metal oxide 231a and the metal oxide 231b, and the metal oxide 231b and the metal oxide 231c, have a common element other than oxygen (as a main component), thereby forming a mixed layer with a low density of defect states. For example, when the metal oxide 231b is an In-Ga-Zn oxide, the metal oxide 231a and the metal oxide 231c may be made of an In-Ga-Zn oxide, a Ga-Zn oxide, gallium oxide, or the like. The metal oxide 231c may also have a layered structure. For example, a layered structure of an In-Ga-Zn oxide and a Ga-Zn oxide on the In-Ga-Zn oxide, or a layered structure of an In-Ga-Zn oxide and a gallium oxide on the In-Ga-Zn oxide, may be used. In other words, a layered structure of an In-Ga-Zn oxide and an oxide not containing In may be used as the metal oxide 231c.

[0360] Specifically, the metal oxide 231a may be a metal oxide having an atomic ratio of In:Ga:Zn=1:3:4 or 1:1:0.5. The metal oxide 231b may be a metal oxide having an atomic ratio of In:Ga:Zn=4:2:3 or 3:1:2. The metal oxide 231c may be a metal oxide having an atomic ratio of In:Ga:Zn=1:3:4, In:Ga:Zn=4:2:3, Ga:Zn=2:1, or Ga:Zn=2:5. Specific examples of the metal oxide 231c having a layered structure include a layered structure of In:Ga:Zn=4:2:3 [atomic ratio] and Ga:Zn=2:1 [atomic ratio], a layered structure of In:Ga:Zn=4:2:3 [atomic ratio] and Ga:Zn=2:5 [atomic ratio], and a layered structure of In:Ga:Zn=4:2:3 [atomic ratio] and gallium oxide.

[0361] In this case, the main carrier path is the metal oxide 231b. By configuring the metal oxide 231a and the metal oxide 231c as described above, the defect level density at the interface between the metal oxide 231a and the metal oxide 231b and at the interface between the metal oxide 231b and the metal oxide 231c can be reduced. This reduces the effect of interface scattering on carrier conduction, allowing the transistor 200 to achieve a high on-state current and high frequency characteristics. Note that when the metal oxide 231c has a stacked structure, in addition to the effect of reducing the defect level density at the interface between the metal oxide 231b and the metal oxide 231c, it is expected that the diffusion of constituent elements of the metal oxide 231c toward the insulator 250 can be suppressed. More specifically, by configuring the metal oxide 231c as a stacked structure and positioning an oxide that does not contain In above the stacked structure, it is possible to suppress In that may diffuse toward the insulator 250. Because the insulator 250 functions as a gate insulator, the diffusion of In leads to poor transistor characteristics. Therefore, by forming the metal oxide 231c into a laminated structure, it is possible to provide a highly reliable display device.

[0362] Conductor 242 (conductor 242a and conductor 242b) functioning as a source electrode and a drain electrode are provided on metal oxide 231b. Conductor 242 is preferably made of a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, and lanthanum, or an alloy containing any of the above metal elements or an alloy combining any of the above metal elements. For example, tantalum nitride, titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, or an oxide containing lanthanum and nickel is preferably used. In addition, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are preferred because they are conductive materials that are resistant to oxidation or materials that maintain their conductivity even when they absorb oxygen.

[0363] By providing the conductor 242 so as to be in contact with the metal oxide 231, the oxygen concentration may decrease in the vicinity of the conductor 242 of the metal oxide 231. Furthermore, a metal compound layer containing the metal contained in the conductor 242 and components of the metal oxide 231 may be formed in the vicinity of the conductor 242 of the metal oxide 231. In such a case, the carrier density increases in the region of the metal oxide 231 in the vicinity of the conductor 242, and the region becomes a low-resistance region.

[0364] Here, the region between the conductor 242a and the conductor 242b is formed to overlap the opening of the insulator 280. This allows the conductor 260 to be arranged in a self-aligned manner between the conductor 242a and the conductor 242b.

[0365] The insulator 250 functions as a gate insulator. The insulator 250 is preferably disposed in contact with the upper surface of the metal oxide 231c. The insulator 250 can be made of silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide doped with fluorine, silicon oxide doped with carbon, silicon oxide doped with carbon and nitrogen, or silicon oxide having vacancies. Silicon oxide and silicon oxynitride are particularly preferred because they are stable against heat.

[0366] The insulator 250 preferably has a reduced concentration of impurities such as water or hydrogen, similar to the insulator 224. The thickness of the insulator 250 is preferably 1 nm or more and 20 nm or less.

[0367] A metal oxide may be provided between the insulator 250 and the conductor 260. The metal oxide preferably suppresses oxygen diffusion from the insulator 250 to the conductor 260. This makes it possible to suppress oxidation of the conductor 260 due to oxygen in the insulator 250.

[0368] The metal oxide may function as part of the gate insulator. Therefore, when silicon oxide or silicon oxynitride is used for the insulator 250, it is preferable to use a metal oxide that is a high-k material with a high dielectric constant. By forming the gate insulator into a stacked structure of the insulator 250 and the metal oxide, it is possible to achieve a stacked structure that is thermally stable and has a high dielectric constant. Therefore, it is possible to reduce the gate potential applied during transistor operation while maintaining the physical thickness of the gate insulator. In addition, it is possible to reduce the equivalent oxide thickness (EOT) of the insulator that functions as the gate insulator.

[0369] Specifically, it is possible to use a metal oxide containing one or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, magnesium, etc. In particular, it is preferable to use an insulator containing an oxide of either or both of aluminum and hafnium, such as aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate).

[0370] Although the conductor 260 is shown as having a two-layer structure in FIG. 18, it may have a single-layer structure or a laminated structure of three or more layers.

[0371] The conductor 260a is preferably made of a conductor having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (NO, NO, NO, etc.), copper atoms, etc. Alternatively, it is preferable to use a conductive material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.).

[0372] Conductor 260a has the function of suppressing oxygen diffusion, which can suppress a decrease in conductivity due to oxidation of conductor 260b caused by oxygen contained in insulator 250. As a conductive material having the function of suppressing oxygen diffusion, it is preferable to use, for example, tantalum, tantalum nitride, ruthenium, ruthenium oxide, or the like.

[0373] Conductor 260b is preferably made of a conductive material containing tungsten, copper, or aluminum as a main component. Furthermore, since conductor 260 also functions as wiring, it is preferable to use a conductor with high conductivity. For example, a conductive material containing tungsten, copper, or aluminum as a main component can be used. Conductor 260b may also have a layered structure, such as a layered structure of titanium or titanium nitride and the above-mentioned conductive material.

[0374] 18A and 18C, in a region of the metal oxide 231b that does not overlap with the conductor 242, in other words, in the channel formation region of the metal oxide 231, the side surface of the metal oxide 231 is arranged to be covered with the conductor 260. This makes it easier for the electric field of the conductor 260, which functions as the first gate electrode, to act on the side surface of the metal oxide 231. This increases the on-state current of the transistor 200 and improves the frequency characteristics.

[0375] Like the insulator 214, the insulator 254 preferably functions as a barrier insulating film that prevents impurities such as water or hydrogen from entering the transistor 200 from the insulator 280 side. For example, the insulator 254 preferably has lower hydrogen permeability than the insulator 224. Furthermore, as shown in FIGS. 18B and 18C , the insulator 254 preferably contacts the side surface of the metal oxide 231c, the top and side surfaces of the conductor 242a, the top and side surfaces of the conductor 242b, the side surfaces of the metal oxide 231a and the metal oxide 231b, and the top surface of the insulator 224. This configuration can prevent hydrogen contained in the insulator 280 from entering the metal oxide 231 from the top or side surfaces of the conductor 242a, the conductor 242b, the metal oxide 231a, the metal oxide 231b, and the insulator 224.

[0376] Furthermore, it is preferable that the insulator 254 has a function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.) (i.e., the oxygen is less likely to permeate). For example, it is preferable that the insulator 254 has lower oxygen permeability than the insulator 280 or the insulator 224.

[0377] The insulator 254 is preferably formed by sputtering. By forming the insulator 254 by sputtering in an oxygen-containing atmosphere, oxygen can be added to the insulator 224 near a region in contact with the insulator 254. This allows oxygen to be supplied from this region into the metal oxide 231 through the insulator 224. The insulator 254 has a function of suppressing upward oxygen diffusion, thereby preventing oxygen from diffusing from the metal oxide 231 to the insulator 280. The insulator 222 has a function of suppressing downward oxygen diffusion, thereby preventing oxygen from diffusing from the metal oxide 231 toward the substrate. In this way, oxygen is supplied to the channel formation region of the metal oxide 231. This reduces oxygen vacancies in the metal oxide 231 and suppresses the transistor from becoming normally on.

[0378] For example, an insulator containing one or both of an oxide of aluminum and hafnium may be formed as the insulator 254. Note that as the insulator containing one or both of an oxide of aluminum and hafnium, it is preferable to use aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), or the like.

[0379] The insulator 224, the insulator 250, and the metal oxide 231 are covered with the insulator 254, which has a barrier property against hydrogen, and the insulator 280 is separated from the insulator 224, the metal oxide 231, and the insulator 250 by the insulator 254. This makes it possible to prevent impurities such as hydrogen from penetrating from the outside of the transistor 200, thereby providing the transistor 200 with good electrical characteristics and reliability.

[0380] The insulator 280 is provided on the insulator 224, the metal oxide 231, and the conductor 242 with the insulator 254 interposed therebetween. For example, the insulator 280 preferably includes silicon oxide, silicon oxynitride, silicon nitride oxide, silicon oxide doped with fluorine, silicon oxide doped with carbon, silicon oxide doped with carbon and nitrogen, or silicon oxide having vacancies. Silicon oxide and silicon oxynitride are particularly preferred because they are thermally stable. Materials such as silicon oxide, silicon oxynitride, and silicon oxide having vacancies are particularly preferred because they can easily form a region containing oxygen that is released by heating.

[0381] It is preferable that the concentration of impurities such as water or hydrogen is reduced in the insulator 280. The top surface of the insulator 280 may be flattened.

[0382] Similar to the insulator 214, the insulator 274 preferably functions as a barrier insulating film that prevents impurities such as water or hydrogen from entering the insulator 280 from above. As the insulator 274, for example, an insulator that can be used for the insulator 214, the insulator 254, etc. may be used.

[0383] An insulator 281 functioning as an interlayer film is preferably provided over the insulator 274. Like the insulator 224, the insulator 281 preferably has a reduced concentration of impurities such as water or hydrogen.

[0384] The conductor 245a and the conductor 245b are arranged in openings formed in the insulator 281, the insulator 274, the insulator 280, and the insulator 254. The conductor 245a and the conductor 245b are arranged opposite each other with the conductor 260 interposed therebetween. The height of the upper surfaces of the conductor 245a and the conductor 245b may be flush with the upper surface of the insulator 281.

[0385] Note that insulator 241a is provided in contact with the inner walls of the openings of insulators 281, 274, 280, and 254, and a first conductor of conductor 245a is formed in contact with the side surface of insulator 241a. Conductor 242a is located on at least a portion of the bottom of the openings, and conductor 245a is in contact with conductor 242a. Similarly, insulator 241b is provided in contact with the inner walls of the openings of insulators 281, 274, 280, and 254, and a first conductor of conductor 245b is formed in contact with the side surface of insulator 241b. Conductor 242b is located on at least a portion of the bottom of the openings, and conductor 245b is in contact with conductor 242b.

[0386] The conductors 245a and 245b are preferably made of a conductive material containing tungsten, copper, or aluminum as a main component. The conductors 245a and 245b may have a layered structure.

[0387] When the conductor 245 has a layered structure, it is preferable to use the above-mentioned conductors that have the function of suppressing the diffusion of impurities such as water or hydrogen for the conductors in contact with the metal oxide 231a, the metal oxide 231b, the conductor 242, the insulator 254, the insulator 280, the insulator 274, and the insulator 281. For example, it is preferable to use tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, or ruthenium oxide. Furthermore, the conductive material that has the function of suppressing the diffusion of impurities such as water or hydrogen may be used in a single layer or a layered structure. The use of such a conductive material can suppress the absorption of oxygen added to the insulator 280 by the conductors 245a and 245b. Furthermore, it can suppress the intrusion of impurities such as water or hydrogen from layers above the insulator 281 into the metal oxide 231 through the conductors 245a and 245b.

[0388] The insulators 241a and 241b may be, for example, insulators that can be used for the insulator 254, etc. The insulators 241a and 241b are provided in contact with the insulator 254, and therefore can prevent impurities such as water or hydrogen from the insulator 280, etc., from being mixed into the metal oxide 231 through the conductors 245a and 245b. Furthermore, the oxygen contained in the insulator 280 can be prevented from being absorbed by the conductors 245a and 245b.

[0389] Although not shown, a conductor functioning as wiring may be disposed in contact with the upper surface of the conductor 245a and the upper surface of the conductor 245b. The conductor functioning as wiring is preferably made of a conductive material containing tungsten, copper, or aluminum as a main component. The conductor may also have a layered structure, for example, a layered structure of titanium or titanium nitride and the above-mentioned conductive material. The conductor may be formed so as to be embedded in an opening provided in an insulator.

[0390] <Transistor constituent materials> The constituent materials that can be used for the transistor will be described.

[0391] [substrate] The substrate on which the transistor 200 is formed may be, for example, an insulating substrate, a semiconductor substrate, or a conductive substrate. Examples of insulating substrates include glass substrates, quartz substrates, sapphire substrates, stabilized zirconia substrates (e.g., yttria-stabilized zirconia substrates), and resin substrates. Examples of semiconductor substrates include semiconductor substrates such as silicon and germanium, and compound semiconductor substrates made of silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, and gallium oxide. Examples of semiconductor substrates having an insulating region within the semiconductor substrate, such as an SOI (Silicon-On-Insulator) substrate, are also available. Examples of conductive substrates include graphite substrates, metal substrates, alloy substrates, and conductive resin substrates. Other examples include substrates having a metal nitride and a metal oxide. Examples of other substrates include an insulating substrate with a conductor or semiconductor provided thereon, a semiconductor substrate with a conductor or insulator provided thereon, and a conductive substrate with a semiconductor or insulator provided thereon. Alternatively, these substrates may be provided with elements. The elements provided on the substrate include a capacitor element, a resistor element, a switch element, a light-emitting element, a memory element, and the like.

[0392] [Insulator] Examples of insulators include oxides, nitrides, oxynitrides, nitride oxides, metal oxides, metal oxynitrides, and metal nitride oxides, which have insulating properties.

[0393] For example, as transistors become more miniaturized and highly integrated, thinner gate insulators can cause problems such as leakage current. Using a high-k material for the insulator that functions as the gate insulator allows for lower voltage operation of the transistor while maintaining the physical film thickness. On the other hand, using a material with a low dielectric constant for the insulator that functions as the interlayer film can reduce the parasitic capacitance that occurs between wiring. Therefore, it is best to select materials based on the insulator's function.

[0394] Examples of insulators with a high relative dielectric constant include gallium oxide, hafnium oxide, zirconium oxide, oxides containing aluminum and hafnium, oxynitrides containing aluminum and hafnium, oxides containing silicon and hafnium, oxynitrides containing silicon and hafnium, and nitrides containing silicon and hafnium.

[0395] Examples of insulators with a low dielectric constant include silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide doped with fluorine, silicon oxide doped with carbon, silicon oxide doped with carbon and nitrogen, silicon oxide having voids, and resin.

[0396] The electrical characteristics of a transistor including an oxide semiconductor can be stabilized by surrounding it with an insulator (such as the insulator 214, the insulator 222, the insulator 254, and the insulator 274) that has a function of suppressing the permeation of impurities such as hydrogen and oxygen. Examples of insulators that have a function of suppressing the permeation of impurities such as hydrogen and oxygen include, for example, insulators containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium, hafnium, and tantalum, and can be used in a single layer or a stacked layer. Specifically, examples of insulators that have a function of suppressing the permeation of impurities such as hydrogen and oxygen include metal oxides such as aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, and tantalum oxide, and metal nitrides such as aluminum nitride, aluminum titanium nitride, titanium nitride, silicon nitride oxide, and silicon nitride.

[0397] The insulator functioning as the gate insulator is preferably an insulator having a region containing oxygen that is released by heating. For example, by using a structure in which silicon oxide or silicon oxynitride having a region containing oxygen that is released by heating is in contact with the metal oxide 231, oxygen vacancies in the metal oxide 231 can be compensated for.

[0398] [conductor] As the conductor, it is preferable to use a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, lanthanum, etc., or an alloy containing the above metal element as a component, or an alloy combining the above metal elements. For example, it is preferable to use tantalum nitride, titanium nitride, tungsten, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, oxides containing lanthanum and nickel, etc. Furthermore, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are preferred because they are conductive materials that are resistant to oxidation or maintain conductivity even when absorbing oxygen. Furthermore, semiconductors with high electrical conductivity, such as polycrystalline silicon containing impurity elements such as phosphorus, and silicides such as nickel silicide may also be used.

[0399] A plurality of conductors formed from the above materials may be stacked. For example, a stacked structure may be formed by combining the above-mentioned material containing a metal element and a conductive material containing oxygen. A stacked structure may also be formed by combining the above-mentioned material containing a metal element and a conductive material containing nitrogen. A stacked structure may also be formed by combining the above-mentioned material containing a metal element, a conductive material containing oxygen, and a conductive material containing nitrogen.

[0400] When a metal oxide is used for the channel formation region of a transistor, a conductor functioning as a gate electrode preferably has a stacked structure of a combination of a material containing the metal element and a conductive material containing oxygen. In this case, the conductive material containing oxygen is preferably provided on the channel formation region side. By providing the conductive material containing oxygen on the channel formation region side, oxygen released from the conductive material is easily supplied to the channel formation region.

[0401] In particular, as a conductor functioning as a gate electrode, it is preferable to use a conductive material containing oxygen and a metal element contained in the metal oxide in which the channel is formed. Alternatively, a conductive material containing the aforementioned metal element and nitrogen may be used. For example, a conductive material containing nitrogen, such as titanium nitride or tantalum nitride, may be used. Alternatively, indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or indium tin oxide doped with silicon may be used. Furthermore, indium gallium zinc oxide containing nitrogen may be used. Using such a material may allow hydrogen contained in the metal oxide in which the channel is formed to be captured. Alternatively, hydrogen introduced from an external insulator or the like may be captured.

[0402] This embodiment mode can be combined with the descriptions of other embodiment modes as appropriate.

[0403] (Embodiment 6) In this embodiment, a metal oxide (hereinafter also referred to as an oxide semiconductor) that can be used for the OS transistor described in the above embodiment will be described.

[0404] <Classification of crystal structures> First, classification of crystal structures in oxide semiconductors will be described with reference to Fig. 19A. Fig. 19A is a diagram illustrating classification of crystal structures of oxide semiconductors, typically IGZO (a metal oxide containing In, Ga, and Zn).

[0405] As shown in FIG. 19A, oxide semiconductors are broadly classified into "amorphous," "crystalline," and "crystal." "Amorphous" includes completely amorphous. "Crystalline" includes c-axis-aligned crystalline (CAAC), nanocrystalline (nc), and cloud-aligned composite (CAC) (excluding single crystal and polycrystal). "Crystalline" excludes single crystal, polycrystal, and completely amorphous. "Crystalline" includes single crystal and polycrystal.

[0406] The structure within the bold frame in Figure 19A is an intermediate state between "Amorphous" and "Crystal" and belongs to a new boundary region (New crystalline phase). In other words, this structure can be described as a structure that is completely different from "Crystal" or the energetically unstable "Amorphous."

[0407] The crystalline structure of a film or substrate can be evaluated using X-ray diffraction (XRD) spectroscopy. Figure 19B shows the XRD spectrum obtained by GIXD (Grazing-Incidence XRD) measurement of a CAAC-IGZO film classified as "Crystalline." The GIXD method is also known as the thin-film method or the Seemann-Bohlin method. Hereinafter, the XRD spectrum obtained by GIXD measurement shown in Figure 19B will be simply referred to as the XRD spectrum. The composition of the CAAC-IGZO film shown in Figure 19B is approximately In:Ga:Zn = 4:2:3 [atomic ratio]. The thickness of the CAAC-IGZO film shown in Figure 19B is 500 nm.

[0408] As shown in Figure 19B, a clear peak indicating crystallinity is detected in the XRD spectrum of the CAAC-IGZO film. Specifically, a peak indicating c-axis orientation is detected near 2θ = 31° in the XRD spectrum of the CAAC-IGZO film. As shown in Figure 19B, the peak near 2θ = 31° is asymmetric with respect to the angle at which the peak intensity is detected.

[0409] The crystalline structure of a film or substrate can be evaluated by the diffraction pattern (also called the nanobeam electron diffraction pattern) observed by nanobeam electron diffraction (NBED). Figure 19C shows the diffraction pattern of a CAAC-IGZO film. Figure 19C shows a diffraction pattern observed by NBED, in which an electron beam is incident parallel to the substrate. The composition of the CAAC-IGZO film shown in Figure 19C is approximately In:Ga:Zn = 4:2:3 [atomic ratio]. In nanobeam electron diffraction, electron diffraction is performed using a probe diameter of 1 nm.

[0410] As shown in FIG. 19C, multiple spots indicating c-axis orientation are observed in the diffraction pattern of the CAAC-IGZO film.

[0411] [Structure of oxide semiconductor] Note that oxide semiconductors may be classified differently from those shown in FIG. 19A when focusing on their crystal structures. For example, oxide semiconductors are divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. Examples of non-single-crystal oxide semiconductors include the above-mentioned CAAC-OS and nc-OS. Non-single-crystal oxide semiconductors include polycrystalline oxide semiconductors, amorphous-like oxide semiconductors (a-like OSs), amorphous oxide semiconductors, and the like.

[0412] Here, the above-mentioned CAAC-OS, nc-OS, and a-like OS will be described in detail.

[0413] [CAAC-OS] CAAC-OS is an oxide semiconductor having multiple crystalline regions, each with its c-axis aligned in a specific direction. The specific direction can be the thickness direction of the CAAC-OS film, the normal direction to the surface on which the CAAC-OS film is formed, or the normal direction to the surface of the CAAC-OS film. A crystalline region is a region with periodic atomic arrangement. If the atomic arrangement is considered as a lattice arrangement, a crystalline region can also be a region with a uniform lattice arrangement. Furthermore, CAAC-OS has a region where multiple crystalline regions are connected in the ab-plane direction, and the region may have distortion. Note that distortion refers to a location where the lattice arrangement changes between a region with a uniform lattice arrangement and a region with a different uniform lattice arrangement in the region where multiple crystalline regions are connected. In other words, CAAC-OS is an oxide semiconductor with a c-axis aligned but no clear orientation in the ab-plane direction.

[0414] Each of the multiple crystalline regions is composed of one or more minute crystals (crystals with a maximum diameter of less than 10 nm). When a crystalline region is composed of one minute crystal, the maximum diameter of the crystalline region is less than 10 nm. When a crystalline region is composed of many minute crystals, the size of the crystalline region may be several tens of nm.

[0415] In an In-M-Zn oxide (wherein element M is one or more elements selected from aluminum, gallium, yttrium, tin, titanium, etc.), the CAAC-OS tends to have a layered crystal structure (also referred to as a layered structure) in which a layer containing indium (In) and oxygen (hereinafter referred to as an In layer) and a layer containing element M, zinc (Zn), and oxygen (hereinafter referred to as an (M, Zn) layer) are stacked. Note that indium and element M are mutually substituted. Therefore, the (M, Zn) layer may contain indium. Furthermore, the In layer may contain element M. Furthermore, the In layer may contain Zn. The layered structure is observed as a lattice image in a high-resolution TEM image, for example.

[0416] When the CAAC-OS film is subjected to structural analysis using, for example, an XRD apparatus, a peak indicating c-axis orientation is detected at or near 2θ=31° in out-of-plane XRD measurement using θ / 2θ scan. Note that the position of the peak indicating c-axis orientation (2θ value) may vary depending on the type and composition of the metallic elements constituting the CAAC-OS.

[0417] For example, in the electron diffraction pattern of a CAAC-OS film, multiple bright spots are observed, and the spots are observed at positions that are point-symmetric with respect to the spot of the incident electron beam that has passed through the sample (also called the direct spot).

[0418] When the crystalline region is observed from the specific direction, the lattice arrangement within the crystalline region is basically a hexagonal lattice, but the unit cell is not necessarily a regular hexagon and may be non-regular hexagonal. The distortion may also have a pentagonal, heptagonal, or other lattice arrangement. In the CAAC-OS, no clear grain boundaries can be identified even near the distortion. This indicates that the formation of grain boundaries is suppressed by the distortion of the lattice arrangement. This is thought to be because the CAAC-OS can tolerate distortion due to the lack of close-packed oxygen atom arrangement in the ab-plane direction and the change in interatomic bond distance caused by metal atom substitution.

[0419] A crystal structure with clear grain boundaries is called polycrystalline. Grain boundaries act as recombination centers, trapping carriers and potentially causing a decrease in the transistor's on-state current and field-effect mobility. Therefore, CAAC-OS, which lacks clear grain boundaries, is one of the crystalline oxides with a crystal structure suitable for use in transistor semiconductor layers. Zn is preferred for use in CAAC-OS. For example, In-Zn oxide and In-Ga-Zn oxide are suitable because they can suppress the generation of grain boundaries more effectively than In oxide.

[0420] CAAC-OS is an oxide semiconductor with high crystallinity and no clear grain boundaries. Therefore, it can be said that the CAAC-OS is less susceptible to a decrease in electron mobility due to grain boundaries. Furthermore, because the crystallinity of an oxide semiconductor can be reduced by the inclusion of impurities and / or the generation of defects, the CAAC-OS can also be said to be an oxide semiconductor with few impurities and defects (such as oxygen vacancies). Therefore, oxide semiconductors with CAAC-OS have stable physical properties. Therefore, oxide semiconductors with CAAC-OS are heat-resistant and highly reliable. Furthermore, the CAAC-OS is stable even under high temperatures (so-called thermal budgets) during the manufacturing process. Therefore, using a CAAC-OS for an OS transistor can increase the flexibility of the manufacturing process.

[0421] [nc-OS] The nc-OS has periodic atomic arrangement in a microscopic region (e.g., a region of 1 nm to 10 nm, particularly a region of 1 nm to 3 nm). In other words, the nc-OS has microcrystalline structures. The size of these microcrystalline structures is, for example, 1 nm to 10 nm, particularly 1 nm to 3 nm, and therefore these microcrystalline structures are also called nanocrystalline structures. Furthermore, the nc-OS exhibits no regularity in the crystal orientation between different nanocrystalline structures. Therefore, the entire film lacks orientation. Therefore, depending on the analytical method, the nc-OS may be indistinguishable from an a-like OS or an amorphous oxide semiconductor. For example, when a structural analysis of an nc-OS film is performed using an XRD system, no peaks indicating crystallinity are detected in out-of-plane XRD measurements using θ / 2θ scanning. Furthermore, when electron diffraction (also known as selected-area electron diffraction) is performed on an nc-OS film using an electron beam with a probe diameter larger than that of nanocrystalline structures (e.g., 50 nm or larger), a halo-like diffraction pattern is observed. On the other hand, when electron diffraction (also called nanobeam electron diffraction) is performed on an nc-OS film using an electron beam with a probe diameter close to or smaller than the size of the nanocrystals (for example, 1 nm to 30 nm), an electron diffraction pattern can be obtained in which multiple spots are observed within a ring-shaped region centered on the direct spot.

[0422] [a-like OS] The a-like OS is an oxide semiconductor having a structure between the nc-OS and the amorphous oxide semiconductor. The a-like OS has a pore or low-density region. That is, the a-like OS has lower crystallinity than the nc-OS and CAAC-OS. Furthermore, the a-like OS has a higher hydrogen concentration in the film than the nc-OS and CAAC-OS.

[0423] [Oxide semiconductor composition] Next, the above-mentioned CAC-OS will be described in detail, which relates to the material composition.

[0424] [CAC-OS] CAC-OS is a material structure in which elements constituting a metal oxide are unevenly distributed in a size range of 0.5 nm to 10 nm, preferably 1 nm to 3 nm, or a similar size range. Hereinafter, a metal oxide in which one or more metal elements are unevenly distributed and the regions containing the metal elements are mixed in a size range of 0.5 nm to 10 nm, preferably 1 nm to 3 nm, or a similar size range, is also referred to as a mosaic or patch state.

[0425] Furthermore, CAC-OS has a mosaic structure in which the material is separated into first and second regions, and the first regions are distributed throughout the film (hereinafter also referred to as a cloud structure). That is, CAC-OS is a composite metal oxide having a structure in which the first and second regions are mixed.

[0426] Here, the atomic ratios of In, Ga, and Zn to the metal elements constituting the CAC-OS in the In-Ga-Zn oxide are denoted as [In], [Ga], and [Zn], respectively. For example, in the CAC-OS in the In-Ga-Zn oxide, the first region is a region where [In] is larger than [In] in the composition of the CAC-OS film. The second region is a region where [Ga] is larger than [Ga] in the composition of the CAC-OS film. Alternatively, for example, the first region is a region where [In] is larger than [In] in the second region and [Ga] is smaller than [Ga] in the second region. The second region is a region where [Ga] is larger than [Ga] in the first region and [In] is smaller than [In] in the first region.

[0427] Specifically, the first region is a region whose main component is indium oxide, indium zinc oxide, or the like. The second region is a region whose main component is gallium oxide, gallium zinc oxide, or the like. In other words, the first region can be rephrased as a region whose main component is In. The second region can be rephrased as a region whose main component is Ga.

[0428] It should be noted that there are cases where a clear boundary between the first region and the second region cannot be observed.

[0429] For example, in the case of CAC-OS in In-Ga-Zn oxide, EDX mapping obtained using EDX (Energy Dispersive X-ray spectroscopy) confirms that the CAC-OS has a structure in which a region mainly composed of In (first region) and a region mainly composed of Ga (second region) are unevenly distributed and mixed.

[0430] When CAC-OS is used in a transistor, the conductivity due to the first region and the insulating property due to the second region act in a complementary manner, thereby providing the CAC-OS with a switching function (the ability to turn on and off). In other words, CAC-OS has a conductive function in part of the material and an insulating function in part of the material, and the material as a whole functions as a semiconductor. By separating the conductive function from the insulating function, both functions can be maximized. Therefore, by using CAC-OS in a transistor, a high on-current (I on ), high field-effect mobility (μ), and good switching behavior can be achieved.

[0431] Oxide semiconductors have a variety of structures, each with different characteristics. The oxide semiconductor of one embodiment of the present invention may include two or more of an amorphous oxide semiconductor, a polycrystalline oxide semiconductor, an a-like OS, a CAC-OS, an nc-OS, and a CAAC-OS.

[0432] <Transistors containing oxide semiconductors> Next, a case where the oxide semiconductor is used in a transistor will be described.

[0433] By using the oxide semiconductor for a transistor, a transistor with high field-effect mobility and high reliability can be realized.

[0434] For the transistor, an oxide semiconductor having a low carrier concentration is preferably used. For example, the carrier concentration of the oxide semiconductor is 1×10 17 cm -3 Less than 1 × 10 15 cm -3 or less, more preferably 1 × 10 13 cm -3 Less than or equal to 1×10 11 cm -3 or less, more preferably 1 × 10 10 cm -3 Less than 1 x 10 -9 cm -3 That is all. Note that in order to reduce the carrier concentration of an oxide semiconductor film, the impurity concentration in the oxide semiconductor film may be reduced to reduce the density of defect states. In this specification and the like, a semiconductor having a low impurity concentration and a low density of defect states is referred to as a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor. Note that an oxide semiconductor having a low carrier concentration may also be referred to as a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor.

[0435] A highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has a low density of defect states, and therefore, the density of trap states may also be low.

[0436] Charges trapped in the trap states of an oxide semiconductor take a long time to dissipate and may behave like fixed charges. Therefore, a transistor in which a channel formation region is formed in an oxide semiconductor with a high density of trap states may have unstable electrical characteristics.

[0437] Therefore, in order to stabilize the electrical characteristics of a transistor, it is effective to reduce the impurity concentration in the oxide semiconductor. Furthermore, in order to reduce the impurity concentration in the oxide semiconductor, it is preferable to also reduce the impurity concentration in the adjacent film. Impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, silicon, and the like.

[0438] <Impurities> Here, the influence of each impurity in an oxide semiconductor will be described.

[0439] When an oxide semiconductor contains silicon and / or carbon, which are elements of Group 14, defect levels are formed in the oxide semiconductor. Therefore, the concentrations of silicon and carbon in the oxide semiconductor and those near the interface with the oxide semiconductor (concentrations obtained by SIMS) are calculated as follows: 18 atoms / cm 3 Less than or equal to 2 x 10 17 atoms / cm 3 The following applies.

[0440] When an oxide semiconductor contains an alkali metal or alkaline earth metal, defect levels may be formed and carriers may be generated. Therefore, a transistor using an oxide semiconductor containing an alkali metal or alkaline earth metal is likely to have normally-on characteristics. Therefore, when the concentration of the alkali metal or alkaline earth metal in the oxide semiconductor obtained by SIMS is 1×10 18 atoms / cm 3 Less than or equal to 2 x 10 16 atoms / cm 3 Do the following:

[0441] When nitrogen is contained in an oxide semiconductor, electrons serving as carriers are generated, the carrier concentration increases, and the semiconductor is likely to become n-type. As a result, a transistor using an oxide semiconductor containing nitrogen as a semiconductor tends to have normally-on characteristics. Alternatively, when nitrogen is contained in an oxide semiconductor, trap states may be formed. As a result, the electrical characteristics of the transistor may become unstable. For this reason, the nitrogen concentration in the oxide semiconductor obtained by SIMS is set to 5×10 19 atoms / cm 3 Less than 5 x 10 18 atoms / cm 3 Less than or equal to 1×10 18 atoms / cm 3 Less than 5 × 10, more preferably 17 atoms / cm3 Do the following:

[0442] Hydrogen contained in an oxide semiconductor reacts with oxygen bonded to a metal atom to form water, which may form an oxygen vacancy. When hydrogen enters the oxygen vacancy, electrons serving as carriers may be generated. Furthermore, some of the hydrogen may bond with oxygen bonded to a metal atom to generate electrons serving as carriers. Therefore, a transistor using an oxide semiconductor containing hydrogen is likely to have normally-on characteristics. For this reason, it is preferable to reduce the amount of hydrogen in the oxide semiconductor as much as possible. Specifically, when the hydrogen concentration in an oxide semiconductor obtained by SIMS is 1×10 20 atoms / cm 3 Less than 1 x 10 19 atoms / cm 3 less than 5 × 10 18 atoms / cm 3 less than 1×10 18 atoms / cm 3 Make it less than.

[0443] When an oxide semiconductor with sufficiently reduced impurities is used for a channel formation region of a transistor, stable electrical characteristics can be obtained.

[0444] This embodiment mode can be combined with the descriptions of other embodiment modes as appropriate. [Explanation of symbols]

[0445] 10: display device, 11: lens, 12: mirror, 13: separator, 14: mirror, 30: layer, 40: layer, 50: sensor unit, 51: sensor unit, 70: light-emitting element, 95: transistor, 96: capacitor, 101: housing, 102: display area, 103: wearing unit, 104: battery, 105: voltage generation unit, 106: control unit, 107: communication unit, 108: antenna, 111: lens, 121: earphone, 122: acoustic device

Claims

[Claim 1] The device has a display unit, a line-of-sight detection unit, and a calculation unit, the line-of-sight detection unit has a function of acquiring first information indicating a direction of a user's line of sight, the first information is acquired using light emitted from the display unit, The calculation unit a function of determining a first area on the display unit that includes the user's gaze point using the first information; a function of increasing the resolution of the image displayed in the first area; determining a second region adjacent to the outside of the first region; a resolution of the image displayed in the first area is higher than a resolution of the image displayed in the second area; using a neural network to increase the resolution of the image displayed in the first area; a function of determining a resolution of an image to be displayed in the first area according to a video scene; An optical element is provided. Electronic devices in the form of glasses or goggles.

Images