Inertial sensor and inertial measurement unit

Abstract

To provide an inertial sensor having excellent bias characteristics.SOLUTION: The acceleration sensor 1 includes the first and second semi-conductor layers 4142, formed on the third side F3 which is the upper surface of the insulating film 5, the first side W1 oxide film 21 formed on the first side W2 of the first semi-conductor layer 41 on the second semi-conductor layer 42 side, and the second side W1 oxide film 22 formed on the second side R1 of the second semi-conductor layer 42 on the first semi-conductor layer 41 side. The second side surface side R2 has a third curved surface portion side W2 that is convex toward the first semiconductor layer 41 side at the end portion on the insulating film 5 side, and has a fourth curved surface portion side R3 that is convex toward the first semiconductor layer 41 side at the end portion on the side opposite to the insulating film 5, The first side wall oxide film 21 and the second side wall oxide film 22 are in physical contact with each other. R4.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to an inertial sensor, a method for manufacturing an inertial sensor, and an inertial measurement unit. [Background technology]

[0002] Patent Document 1 describes an angular velocity sensor in which a trench groove to be filled with an insulator is formed in a silicon substrate, which is a semiconductor substrate, and the insulator filled in the trench groove electrically separates, for example, a fixed electrode from its outer periphery at its base. Patent Document 2 describes a semiconductor device in which an isolation trench is formed in a silicon substrate, a sidewall insulating film is formed on the sidewall of the isolation trench, and buried polysilicon as a conductive material is filled in the isolation trench with the sidewall insulating film formed therein. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 11-248733 [Patent Document 2] Japanese Patent Application Laid-Open No. 2003-45988 Summary of the Invention [Problem to be solved by the invention]

[0004] However, when the technology described in Patent Document 2 is applied to the angular velocity sensor described in Patent Document 1, a conductive material is inserted between the fixed electrode and its outer periphery at its base, that is, between the semiconductors separated by the trench, which increases the parasitic capacitance between the semiconductors separated by the trench, raising concerns about deterioration of the bias characteristics of the angular velocity sensor. Note that bias characteristics refer to the magnitude and stability of the bias, which is an output component that is unrelated to the input component in an inertial sensor such as an angular velocity sensor. [Means for solving the problem]

[0005] an insulating film formed on a main surface of the substrate; a first semiconductor layer and a second semiconductor layer formed on a surface of the insulating film opposite the substrate; a first sidewall oxide film formed on a first side surface of the first semiconductor layer facing the second semiconductor layer; and a second sidewall oxide film formed on a second side surface of the second semiconductor layer facing the first semiconductor layer, wherein the first side surface has a first curved surface portion convex toward the second semiconductor layer at an end portion on the insulating film side, and a second curved surface portion convex toward the second semiconductor layer at an end portion opposite the insulating film side; the second side surface has a third curved surface portion convex toward the first semiconductor layer at an end portion on the insulating film side, and a fourth curved surface portion convex toward the first semiconductor layer at an end portion opposite the insulating film side; and the first sidewall oxide film and the second sidewall oxide film are in physical contact with each other.

[0006] A method for manufacturing an inertial sensor includes the steps of: preparing a base body having a substrate, an insulating film formed on a main surface of the substrate, and a semiconductor layer formed on the surface of the insulating film opposite the substrate; forming a trench portion and first and second semiconductor layers opposing each other via the trench portion by removing a portion of the semiconductor layer; and simultaneously oxidizing the first and second semiconductor layers to form a first sidewall oxide film on a first side surface of the first semiconductor layer facing the second semiconductor layer and a second sidewall oxide film on a second side surface of the second semiconductor layer facing the first semiconductor layer, and filling the trench portion by bringing the first sidewall oxide film and the second sidewall oxide film into physical contact with each other.

[0007] The inertial measurement unit includes the above-described inertial sensor and a control unit that controls the inertial sensor. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a plan view showing an inertial sensor according to a first embodiment. [Figure 2] Cross-sectional view taken along line AA in Figure 1. [Figure 3] FIG. 3 is a cross-sectional view corresponding to the position of portion D1 in FIG. 2. [Figure 4] FIG. 3 is a cross-sectional view corresponding to the position of portion D1 in FIG. 2. [Figure 5] 3A to 3C are diagrams showing a manufacturing process of the inertial sensor according to the first embodiment. [Figure 6] 10A to 10C are cross-sectional views illustrating a method for manufacturing the inertial sensor. [Figure 7] 10A to 10C are cross-sectional views illustrating a method for manufacturing the inertial sensor. [Figure 8] FIG. 8 is a cross-sectional view corresponding to the position of portion D2 in FIG. 7. [Figure 9] 10A to 10C are cross-sectional views illustrating a method for manufacturing the inertial sensor. [Figure 10] FIG. 10 is a cross-sectional view corresponding to the position of the D3 portion in FIG. 9. [Figure 11] 10A to 10C are cross-sectional views illustrating a method for manufacturing the inertial sensor. [Figure 12] FIG. 12 is a cross-sectional view corresponding to the position of D4 in FIG. [Figure 13] 10A to 10C are cross-sectional views illustrating a method for manufacturing the inertial sensor. [Figure 14] FIG. 10 is a cross-sectional view corresponding to the position of a D1 portion of the inertial sensor according to the second embodiment. [Figure 15] FIG. 11 is a cross-sectional view corresponding to the position of a D1 portion of the inertial sensor according to the third embodiment. [Figure 16] FIG. 10 is an exploded perspective view showing a schematic configuration of an inertial measurement unit according to a fourth embodiment. [Figure 17] FIG. 17 is a perspective view of the substrate in FIG. DETAILED DESCRIPTION OF THE INVENTION

[0009] Next, an embodiment of the present invention will be described with reference to the drawings. For ease of explanation, the following figures, except for Figure 5, illustrate three mutually perpendicular axes: the X axis, the Y axis, and the Z axis. The direction along the X axis is referred to as the "X direction," the direction along the Y axis as the "Y direction," and the direction along the Z axis as the "Z direction." The tip of the arrow in each axial direction is also referred to as the "plus side," and the base of the arrow is also referred to as the "minus side." For example, the Y direction refers to both the positive and negative Y directions. The positive Z side is also referred to as "up," and the negative Z side is also referred to as "down." In addition, the following figures may be illustrated with dimensions and scales that differ from the actual dimensions for ease of explanation.

[0010] 1. Embodiment 1 An acceleration sensor 1 as an example of an inertial sensor according to a first embodiment will be described with reference to FIGS. The acceleration sensor 1 is a capacitance type acceleration sensor that detects acceleration using a change in capacitance that depends on the distance between the movable part 2 and the fixed electrode part 3.

[0011] As shown in FIGS. 1 and 2, the acceleration sensor 1 is configured using a base body 7 in which a substrate 4, an insulating film 5, and a semiconductor layer 6 are laminated in this order along the Z direction.

[0012] The substrate 4 has a first surface F1 which is the main surface of the substrate 4, and a second surface F2 which is opposite to the first surface F1. In this embodiment, the first surface F1 is the surface of the substrate 4 on the positive side in the Z direction and is also referred to as the top surface of the substrate 4. The second surface F2 is the surface of the substrate 4 on the negative side in the Z direction and is also referred to as the bottom surface of the substrate 4. A bottomed recess 8 is formed in the center of the substrate 4 when viewed in a plane in the Z direction. The recess 8 has an opening on the first face F1 of the substrate 4 and is recessed from the first face F1 toward the second face F2. The recess 8 is also called a cavity. In this embodiment, the substrate 4 is a semiconductor substrate, and more specifically, a single crystal silicon substrate.

[0013] An insulating film 5 is formed on a first face F1, which is the upper face of the substrate 4. In this embodiment, the insulating film 5 is made of silicon oxide. In this embodiment, the insulating film 5 is also formed on the side and bottom faces of the recess 8. In this embodiment, it is sufficient that the insulating film 5 is formed on the first face F1, and the insulating film 5 on the side and bottom faces of the recess 8 may be removed. In this embodiment, no insulating film is formed on a second face F2, which is the lower face of the substrate 4, but an insulating film may be formed on the second face F2.

[0014] A semiconductor layer 6 is formed on the opposite side of the substrate 4 with the insulating film 5 sandwiched therebetween. The semiconductor layer 6 is bonded to a third face F3, which is the face of the insulating film 5 on the opposite side of the substrate 4, in the peripheral portion of the recess 8. The third face F3 of the insulating film 5 is also referred to as the upper face of the insulating film 5.

[0015] The semiconductor layer 6 has a fourth face F5, which is the face opposite to the insulating film 5. The fourth face F5 of the semiconductor layer 6 is also referred to as the upper face of the semiconductor layer 6. The semiconductor layer 6 is formed of a semiconductor such as silicon, germanium, or silicon germanium. The semiconductor layer 6 is preferably formed of a single-crystal semiconductor doped with impurities such as boron (B) or phosphorus (P). Doping with impurities generates carriers in the semiconductor layer 6, thereby reducing the resistivity. In this embodiment, the semiconductor layer 6 is formed of single-crystal silicon doped with boron to have a resistivity of 0.001 to 100 Ωcm. In addition, in this embodiment, the base 7 is an SOI (Silicon On Insulator) substrate having a recess 8 that is a cavity.

[0016] The semiconductor layer 6 is used to form the movable portion 2, the fixed electrode portion 3, the outer frame portion 9, and the elastic portion 13. In this embodiment, in a plan view in the Z direction, the movable portion 2 is formed inside the recessed portion 8. A plurality of fixed electrode portions 3 are formed on both sides of the movable portion 2 in the X direction, sandwiching the movable portion 2 therebetween. The outer frame portion 9 has a substantially rectangular frame shape that surrounds the movable portion 2 and the fixed electrode portion 3. The outer frame portion 9 is formed on the third face F3, which is the upper surface of the insulating film 5, in the periphery of the recessed portion 8. The movable portion 2 and the outer frame portion 9 are connected via the elastic portion 13.

[0017] The movable section 2 has a movable electrode support section 10 and a plurality of movable electrode fingers 11 supported by the movable electrode support section 10. In this embodiment, the movable section 2 is a vibrator that is displaceable in the Y direction. The movable electrode support part 10 has a rectangular shape with its longer sides in the Y direction. Elastic parts 13 are formed on both ends of the movable electrode support part 10 in the Y direction. Movable electrode fingers 11 are formed on both side surfaces of the movable electrode support part 10 in the X direction. The movable electrode fingers 11 have a cantilever shape with their free ends extending from the movable electrode support part 10 toward the fixed electrode part 3.

[0018] The fixed electrode portion 3 has a fixed electrode support portion 15 and fixed electrode fingers 16. The fixed electrode support portion 15 is formed on the third face F3, which is the upper surface of the insulating film 5, in the periphery of the recess 8. The fixed electrode fingers 16 have a cantilever shape with free ends extending from the fixed electrode support portion 15 toward the movable portion 2.

[0019] Movable electrode fingers 11 extending in the positive X-direction and fixed electrode fingers 16 extending in the negative X-direction are arranged opposite each other with a gap between them. Similarly, movable electrode fingers 11 extending in the negative X-direction and fixed electrode fingers 16 extending in the positive X-direction are arranged opposite each other with a gap between them. When movable section 2 is stationary, there is a predetermined gap between the side surfaces of movable electrode fingers 11 and fixed electrode fingers 16.

[0020] An insulating isolation region 20 is formed between the fixed electrode portion 3 and the outer frame portion 9. Specifically, the insulating isolation region 20 is formed between the fixed electrode support portion 15 of the fixed electrode portion 3 and the outer frame portion 9. The fixed electrode portion 3 and the outer frame portion 9 are electrically isolated by the insulating isolation region 20 and the insulating film 5. The insulating isolation region 20 has a first sidewall oxide film 21 and a second sidewall oxide film 22, which will be described later.

[0021] An interlayer insulating film 24 is formed on the upper surface of the insulating isolation region 20 and on the upper surfaces of the outer frame portion 9 and the fixed electrode support portion 15 of the fourth face F5, which is the upper surface of the semiconductor layer 6. The interlayer insulating film 24 is preferably a silicon oxide film formed from silicon oxide by thermal CVD (Chemical Vapor Deposition). In this embodiment, the interlayer insulating film 24 is formed from high temperature silicon oxide HTO (High Temperature Oxide) by low pressure thermal CVD.

[0022] A contact 26 is formed in the interlayer insulating film 24 at a position corresponding to the fixed electrode support portion 15. Electrode pads 27, 28 and wiring 29 are also disposed on the upper surface of the interlayer insulating film 24. One end of the wiring 29 is electrically connected to the fixed electrode support portion 15 via the contact 26. The other end of the wiring 29 is electrically connected to the electrode pad 27. That is, the fixed electrode portion 3 and the electrode pad 27 are electrically connected via the wiring 29. The electrode pad 28 is electrically connected to the movable portion 2 by wiring (not shown). In this embodiment, the electrode pads 27, 28 and wiring 29 are formed of a metal multilayer film. This metal multilayer film is preferably formed of a material that can ensure adhesion with the interlayer insulating film 24. Specifically, the electrode pads 27, 28 and wiring 29 are formed of a metal multilayer film made of titanium nitride, aluminum, copper, or the like.

[0023] In this embodiment, the outer frame portion 9 is electrically grounded, for example, by wiring (not shown), and a potential difference occurs between the outer frame portion 9 and the fixed electrode portion 3.

[0024] Such an acceleration sensor 1 can detect acceleration as follows: In this embodiment, the acceleration sensor 1 detects acceleration in the Y direction. When acceleration in the Y direction is applied, the movable part 2 is displaced in the Y direction relative to the base 7. This causes a change in the capacitance between the movable electrode fingers 11 of the movable part 2 and the fixed electrode fingers 16 of the fixed electrode part 3. Based on this change in capacitance, the acceleration in the Y direction can be detected.

[0025] Next, the insulating separation region 20 formed between the fixed electrode support portion 15 and the outer frame portion 9 will be described in detail.

[0026] As described above, the outer frame portion 9 and the fixed electrode portion 3 having the fixed electrode support portion 15 and the fixed electrode fingers 16 are formed of the semiconductor layer 6. Furthermore, the outer frame portion 9 and the fixed electrode support portion 15 are formed on the third face F3, which is the upper surface of the insulating film 5, in the peripheral portion of the recess 8.

[0027] That is, the outer frame portion 9 formed by the semiconductor layer 6 corresponds to the first semiconductor layer 41 in the present disclosure. Moreover, the fixed electrode portion 3 formed by the semiconductor layer 6 corresponds to the second semiconductor layer 42 in the present disclosure. In the following description, the outer frame portion 9 and the fixed electrode support portion 15 will be referred to as a first semiconductor layer 41 and a second semiconductor layer 42, respectively.

[0028] As shown in FIGS. 2, 3, and 4, the first semiconductor layer 41 (outer frame portion 9) and the second semiconductor layer 42 (fixed electrode support portion 15) are formed on the third face F3, which is the upper face of the insulating film 5. A trench portion 40, which is a bottomed groove, is formed between the first semiconductor layer 41 and the second semiconductor layer 42. The bottom face of the trench portion 40 is the third face F3, which is the upper face of the insulating film 5. The first semiconductor layer 41 and the second semiconductor layer 42 are spaced apart with the trench portion 40 sandwiched therebetween.

[0029] The first semiconductor layer 41 has a first side surface W1. The first side surface W1 is the surface of the first semiconductor layer 41 facing the second semiconductor layer 42. The second semiconductor layer 42 has a second side surface W2. The second side surface W2 is the surface of the second semiconductor layer 42 facing the first semiconductor layer 41.

[0030] A first sidewall oxide film 21 is formed on a first side surface W1 of the first semiconductor layer 41 facing the second semiconductor layer 42. A second sidewall oxide film 22 is formed on a second side surface W2 of the second semiconductor layer 42 facing the first semiconductor layer 41. The first sidewall oxide film 21 and the second sidewall oxide film 22 are in physical contact. FIG. 3 shows a contact region C1 where the first sidewall oxide film 21 and the second sidewall oxide film 22 are in physical contact. In this embodiment, the contact region C1 extends substantially parallel to the Z direction. Note that in this disclosure, "substantially parallel" and "substantially equal" mean "parallel" and "equal" including manufacturing variations.

[0031] The trench portion 40 is filled by bringing the first sidewall oxide film 21 and the second sidewall oxide film 22 into physical contact with each other. As a result, an insulating isolation region 20 having the first sidewall oxide film 21 and the second sidewall oxide film 22 is formed in the trench portion 40.

[0032] In this embodiment, the first and second sidewall oxide films 21 and 22 are formed by oxidizing the first and second semiconductor layers 41 and 42, respectively, by thermal oxidation. In this embodiment, the first and second sidewall oxide films 21 and 22 are formed of silicon oxide obtained by oxidizing, by thermal oxidation, the single-crystal silicon that constitutes the first and second semiconductor layers 41 and 42. Silicon oxide formed by oxidizing silicon by thermal oxidation is also called thermal silicon oxide.

[0033] The first side surface W1 of the first semiconductor layer 41 on the second semiconductor layer 42 side has a first curved surface portion R1 convex toward the second semiconductor layer 42 at an end portion on the insulating film 5 side, and a second curved surface portion R2 convex toward the second semiconductor layer 42 at an end portion opposite the insulating film 5 side. In this embodiment, the first curved surface portion R1 and the second curved surface portion R2 on the first side surface W1 are connected by a flat surface portion L1. The flat surface portion L1 extends approximately parallel to the Z direction.

[0034] Similarly, the second side surface W2 of the second semiconductor layer 42 on the first semiconductor layer 41 side has a third curved surface portion R3 that is convex toward the first semiconductor layer 41 at an end portion on the insulating film 5 side, and a fourth curved surface portion R4 that is convex toward the first semiconductor layer 41 at an end portion opposite the insulating film 5 side. In this embodiment, the third curved surface portion R3 and the fourth curved surface portion R4 on the second side surface W2 are connected by a flat surface portion L2. The flat surface portion L2 extends approximately parallel to the Z direction.

[0035] Thus, the first side surface W1 of the first semiconductor layer 41 has a first curved surface R1 convex toward the second semiconductor layer 42 at its end on the insulating film 5 side, and a second curved surface R2 convex toward the second semiconductor layer 42 at its end opposite the insulating film 5 side. The second side surface W2 of the second semiconductor layer 42 on the first semiconductor layer 41 side has a third curved surface R3 convex toward the first semiconductor layer 41 at its end on the insulating film 5 side, and a fourth curved surface R4 convex toward the first semiconductor layer 41 at its end opposite the insulating film 5 side. This reduces parasitic capacitance, such as fringe capacitance, between the first semiconductor layer 41 and the second semiconductor layer 42, thereby providing an acceleration sensor 1 with excellent bias characteristics. Here, the bias characteristics of the acceleration sensor 1 of this embodiment refer to the deviation or offset from the zero point in a stationary state. A stable acceleration sensor 1 with a low bias can be considered an excellent inertial sensor.

[0036] 3 and 4, when the flat surface portions L1 and L2 are both substantially parallel to the Z direction, the curvatures of the first curved surface portion R1, the second curved surface portion R2, the third curved surface portion R3, and the fourth curved surface portion R4 are substantially equal to each other. This increases the symmetry of parasitic capacitances such as fringe capacitance, making it possible to provide an acceleration sensor 1 with good bias characteristics.

[0037] Furthermore, in the first semiconductor layer 41, a low impurity concentration region 45 is formed near the surface of the first semiconductor layer 41. Similarly, in the second semiconductor layer 42, a low impurity concentration region 46 is formed near the surface of the second semiconductor layer 42. The surface of the first semiconductor layer 41 includes a first side surface W1, an upper surface of the first semiconductor layer 41, and a lower surface of the first semiconductor layer 41. The surface of the second semiconductor layer 42 includes a second side surface W2, an upper surface of the second semiconductor layer 42, and a lower surface of the second semiconductor layer 42. The upper surfaces of the first semiconductor layer 41 and the second semiconductor layer 42 are a fourth surface F5, which is the upper surface of the semiconductor layer 6. The lower surfaces of the first semiconductor layer 41 and the second semiconductor layer 42 are surfaces of the first semiconductor layer 41 and the second semiconductor layer 42 that face the third surface F3 of the insulating film 5.

[0038] The low-impurity-concentration regions 45, 46 are regions where the concentration of impurities such as boron and phosphorus pre-doped into the first and second semiconductor layers 41, 42 is reduced. This is because out-diffusion of impurities occurs when the first and second semiconductor layers 41, 42 are oxidized by thermal oxidation. Out-diffusion is a phenomenon in which impurities pre-doped into a semiconductor layer evaporate and diffuse from the semiconductor layer. The out-diffusion of impurities is particularly noticeable when the impurity is boron. The low impurity concentration regions 45, 46 have higher electrical resistance than the insides of the first and second semiconductor layers 41, 42. Therefore, by forming the low impurity concentration regions 45, 46, the insulation resistance between the first semiconductor layer 41 and the second semiconductor layer 42 can be further increased, making it possible to provide an acceleration sensor 1 with more stable bias characteristics.

[0039] In this embodiment, the insulating film 5 has a thickness greater than that of a region thereof in contact with the trench portion 40, the thickness being greater than that of a region thereof in contact with the first and second semiconductor layers 41, 42. The region of the insulating film 5 in contact with the trench portion 40 is a region of the insulating film 5 corresponding to the bottom surface of the trench portion 40. The reason why the insulating film 5 is thick in this region is that, when the first and second semiconductor layers 41, 42 are oxidized by thermal oxidation, oxygen atoms penetrate and diffuse into the insulating film 5, reacting with the substrate 4 to form a thermally oxidized film. By making the insulating film 5 thicker in the region thereof in contact with the trench portion 40 than that of the region thereof in contact with the first and second semiconductor layers 41, 42, the parasitic capacitance between the first semiconductor layer 41 and the second semiconductor layer 42 can be further reduced, and therefore an acceleration sensor 1 with even better bias characteristics can be provided.

[0040] In the region of the insulating film 5 that contacts the trench portion 40, the third surface F3, which is the upper surface of the insulating film 5, has a convex curved surface toward the trench portion 40, and the lower surface of the insulating film 5, which faces the first surface F1 of the substrate 4, has a convex curved surface toward the substrate 4.

[0041] In this embodiment, the insulating isolation region 20 has a contact region C1 where the first sidewall oxide film 21 and the second sidewall oxide film 22 are in physical contact with each other, and a void 50 where the first sidewall oxide film 21 and the second sidewall oxide film 22 are not in physical contact with each other. The void 50 is formed between the end of the contact region C1 on the insulating film 5 side and a third plane F3, which is the upper surface of the insulating film 5. The end of the contact region C1 on the insulating film 5 side is also referred to as the lower end of the contact region C1. The void 50 is formed by being surrounded by the insulating film 5, the first sidewall oxide film 21, and the second sidewall oxide film 22. When the void 50 is formed, the dielectric constant of the void 50 becomes the dielectric constant ε0 of a vacuum. The dielectric constant ε0 of a vacuum is 8.85×10 -12[F / m]. Generally, the relative dielectric constant of an oxide film relative to the dielectric constant ε0 of a vacuum is 3.8 to 3.9, so the presence of the voids 50, whose relative dielectric constant is 1, reduces the fringe capacitance. In other words, the parasitic capacitance between the first semiconductor layer 41 and the second semiconductor layer 42 can be further reduced, making it possible to provide an acceleration sensor 1 with even better bias characteristics.

[0042] In the first sidewall oxide film 21, the surface between the lower end of the contact region C1 and the third surface F3, which is the upper surface of the insulating film 5, is a curved surface that is convex toward the second semiconductor layer 42. That is, the interface between the void 50 and the first sidewall oxide film 21 is a curved surface. Similarly, in the second sidewall oxide film 22, the surface between the lower end of the contact region C1 and the third surface F3, which is the upper surface of the insulating film 5, is a curved surface that is convex toward the first semiconductor layer 41. That is, the interface between the void 50 and the second sidewall oxide film 22 is a curved surface. As described above, in the region where the insulating film 5 contacts the trench portion 40, the third surface F3, which is the upper surface of the insulating film 5, has a curved surface that is convex toward the trench portion 40. That is, the interface between the void 50 and the insulating film 5 is a curved surface.

[0043] In this way, the boundary surface between the gap 50 and the insulating film 5, the boundary surface between the gap 50 and the first sidewall oxide film 21, and the boundary surface between the gap 50 and the second sidewall oxide film 22 are all curved surfaces. Due to the presence of such curved surfaces, the electric field is not concentrated but is relaxed between the first semiconductor layer 41 and the second semiconductor layer 42. Therefore, it is possible to provide an acceleration sensor 1 with more stable bias characteristics.

[0044] As described above, in this embodiment, the first semiconductor layer 41 and the second semiconductor layer 42 are made of single-crystal silicon doped with impurities, and the first sidewall oxide film 21 and the second sidewall oxide film 22 are made of silicon oxide. Silicon oxide is a good insulator, and therefore the insulating characteristics of the insulating isolation region 20, which includes the first semiconductor layer 41 and the second semiconductor layer 42, are improved. This further reduces the parasitic capacitance between the first semiconductor layer 41 and the second semiconductor layer 42, making it possible to provide an acceleration sensor 1 with even better bias characteristics.

[0045] In this embodiment, the first and second sidewall oxide films 21 and 22 are thermally oxidized silicon obtained by thermally oxidizing the first and second semiconductor layers 41 and 42 made of single-crystal silicon. Thermally oxidized silicon is an insulator with higher quality and higher breakdown voltage than silicon oxide obtained by, for example, CVD. This further improves the insulating characteristics of the insulating isolation region 20.

[0046] Furthermore, if the height of the first and second side surfaces W1 and W2 is defined as height H1 and the height of the contact region C1 where the first sidewall oxide film 21 and the second sidewall oxide film 22 are in physical contact is defined as height H2, in this embodiment, H2 / H1 is 0.905. The height H1 of the first and second side surfaces W1 and W2 corresponds to the height of the insulating isolation region 20, which in this embodiment is the length of the first and second side surfaces W1 and W2 in the Z direction. The height H2 of the contact region C1 is the length from the top to the bottom of the contact region C1, which in this embodiment is the length of the contact region C1 in the Z direction. In other words, H2 / H1 corresponds to the contact ratio of the contact region C1 to the insulating isolation region 20. In this embodiment, the preferred range of H2 / H1 is 0.905 or more and 1 or less, and more preferably 0.946 or more and 1 or less.

[0047] By setting H2 / H1 to be greater than or equal to 0.905 and less than or equal to 1, the height H2 of the contact region C1 where the first sidewall oxide film 21 and the second sidewall oxide film 22 are in physical contact becomes larger, and the gap 50, which is the region where the first sidewall oxide film 21 and the second sidewall oxide film 22 are not in physical contact, becomes smaller. This makes it possible to suppress deterioration of the mechanical and temperature characteristics of the acceleration sensor 1 due to external forces such as vibrations and shocks and environmental changes such as temperature, and provides a highly reliable acceleration sensor 1.

[0048] By setting H2 / H1 to be greater than or equal to 0.946 and less than or equal to 1, it is possible to further suppress deterioration of the mechanical properties and temperature characteristics of the acceleration sensor 1 due to environmental changes such as temperature, and to provide an acceleration sensor 1 with even higher reliability.

[0049] Next, a method for manufacturing the acceleration sensor 1 as an example of the inertial sensor according to this embodiment will be described with reference to FIGS. As shown in FIG. 5 , the method for manufacturing the acceleration sensor 1 includes a base formation step of preparing a base 7 having a substrate 4, an insulating film 5 formed on a first face F1 that is the main surface of the substrate 4, and a semiconductor layer 6 formed on a third face F3 that is the surface of the insulating film 5 opposite the substrate 4; a trench portion formation step of forming a trench portion 40 and a first semiconductor layer 41 and a second semiconductor layer 42 that face each other via the trench portion 40 by removing a portion of the semiconductor layer 6; and a trench portion filling step of simultaneously oxidizing the first semiconductor layer 41 and the second semiconductor layer 42 to form a first sidewall oxide film 21 on a first side face W1 of the first semiconductor layer 41 that faces the second semiconductor layer 42 and a second sidewall oxide film 22 on a second side face W2 of the second semiconductor layer 42 that faces the first semiconductor layer 41, and filling the trench portion 40 by bringing the first sidewall oxide film 21 and the second sidewall oxide film 22 into physical contact with each other. Furthermore, the manufacturing method of the acceleration sensor 1 includes a wiring process for forming wiring (not shown) electrically connected to the movable part 2, wiring 29 electrically connected to the fixed electrode part 3, electrode pads 27, 28, etc., and a movable part formation process for forming the outer shapes of the movable part 2, the fixed electrode part 3, and the outer frame part 9, etc.

[0050] 1.1 Base formation process In step S1, as shown in FIG. 6, a substrate 7 is prepared. In this embodiment, as described above, the base 7 is an SOI substrate having a recess 8 that is a cavity.

[0051] The substrate 7 can be produced as follows. First, a substrate 4 and a structural substrate corresponding to the semiconductor layer 6 are prepared. The structural substrate is also called an active substrate or an active layer substrate. A recess 8 is formed in the substrate 4, and an insulating film is further formed on the surface of the substrate 4. As described above, in this embodiment, the insulating film 5 is formed on the first face F1, which is the main surface of the substrate 4, and on the side and bottom faces of the recess 8. Note that in this embodiment, it is sufficient that the insulating film 5 is formed on the first face F1, and the insulating film 5 on the side and bottom faces of the recess 8 may be removed. Furthermore, no insulating film is formed on the second face F2 of the substrate 4, but an insulating film may be formed thereon. The substrate 4 on which the insulating film 5 is formed is also called a support substrate. Next, by bonding the substrate 4 and a structural substrate corresponding to the semiconductor layer 6 via the insulating film 5, a base 7 can be produced in which the semiconductor layer 6 is formed on the opposite side of the substrate 4 with the insulating film 5 sandwiched therebetween.

[0052] 1.2 Trench formation process Next, in step S2, as shown in FIGS. 7 and 8, a portion of the semiconductor layer 6 is removed to form a trench portion 40. The trench portion 40 is a bottomed groove that penetrates the semiconductor layer 6 and has its bottom surface on the third face F3, which is the upper surface of the insulating film 5. In this embodiment, the trench portion 40 is formed using a dry etching method. As the dry etching method, for example, the Bosch process can be used. The trench portion 40 has a shape that is, for example, 3 μm wide and 30 μm deep. The width of the trench portion 40 is the length of the trench portion 40 in the X direction. The depth of the trench portion 40 is the length of the trench portion 40 in the Z direction.

[0053] Furthermore, by forming the trench portion 40, the semiconductor layer 6 is physically separated into a first semiconductor layer 41 and a second semiconductor layer 42 that faces the first semiconductor layer 41 via the trench portion 40. In this manner, by removing a portion of the semiconductor layer 6, the trench portion 40 and the first semiconductor layer 41 and the second semiconductor layer 42 that face each other via the trench portion 40 are formed. In this embodiment, the outer shapes of the outer frame portion 9 and the fixed electrode portion 3 are formed in a movable portion forming step that will be described later. The outer frame portion 9 formed in the movable portion forming step corresponds to the first semiconductor layer 41, and the fixed electrode support portion 15 of the fixed electrode portion 3 corresponds to the second semiconductor layer 42.

[0054] 1.3 Trench filling process Next, in step S3, as shown in Figures 9 and 10, the first semiconductor layer 41 and the second semiconductor layer 42 are simultaneously oxidized to form a first sidewall oxide film 21 on a first side surface W1 of the first semiconductor layer 41 facing the second semiconductor layer 42 and a second sidewall oxide film 22 on a second side surface W2 of the second semiconductor layer 42 facing the first semiconductor layer 41, and the trench portion 40 is filled by bringing the first sidewall oxide film 21 and the second sidewall oxide film 22 into physical contact with each other.

[0055] In this embodiment, in step S2, the substrate 7 on which the trench portion 40 is formed is placed in an oxidation furnace, and the substrate 7 is oxidized in the oxidation furnace using a thermal oxidation method. This allows the first semiconductor layer 41 and the second semiconductor layer 42 to be oxidized simultaneously. As the thermal oxidation method, for example, a pyrogenic oxidation method can be used. To shorten the oxidation treatment time, the oxidation treatment may be performed under an elevated pressure. Note that "simultaneously" in this disclosure means that the treatments are performed in the same process or in the same equipment.

[0056] By simultaneously oxidizing the first semiconductor layer 41 and the second semiconductor layer 42, oxide films are simultaneously formed on the surfaces of the first and second semiconductor layers 41, 42. For ease of explanation, of the oxide films formed on the surface of the first semiconductor layer 41, the oxide film formed on the first side surface W1 of the first semiconductor layer 41 is referred to as the first sidewall oxide film 21, and the oxide film formed on the upper surface of the first semiconductor layer 41 is referred to as the first upper surface oxide film 61. Similarly, of the oxide films formed on the surface of the second semiconductor layer 42, the oxide film formed on the second side surface W2 of the second semiconductor layer 42 is referred to as the second sidewall oxide film 22, and the oxide film formed on the upper surface of the second semiconductor layer 42 is referred to as the second upper surface oxide film 62. The upper surfaces of the first and second semiconductor layers 41, 42 are the fourth face F5 of the semiconductor layer 6.

[0057] In this embodiment, for example, a pyrogenic oxidation method is used to perform oxidation treatment at 1100°C for 30 hours or more, thereby forming an oxide film with a thickness of 3 μm or more on each surface of the first semiconductor layer 41 and the second semiconductor layer 42.

[0058] As time passes during the oxidation treatment, the first and second sidewall oxide films 21, 22 grow from the first side surface W1 of the first semiconductor layer 41 and the second side surface W2 of the second semiconductor layer 42 toward the inside of the trench portion 40. As the thicknesses of the first and second sidewall oxide films 21, 22 gradually increase, the first sidewall oxide film 21 and the second sidewall oxide film 22 come into physical contact with each other, and the trench portion 40 is filled.

[0059] When the first sidewall oxide film 21 and the second sidewall oxide film 22 are in physical contact with each other, it becomes difficult to supply oxygen to a region closer to the bottom of the trench portion 40 than the position where the first sidewall oxide film 21 and the second sidewall oxide film 22 are in physical contact with each other. Therefore, in a region closer to the bottom of the trench portion 40 than the position where the first sidewall oxide film 21 and the second sidewall oxide film 22 are in physical contact with each other, the growth of the first and second sidewall oxide films 21 and 22 slows down or stops, making it easier for voids 50 to occur. Therefore, by performing the oxidation process in step S3 so that the thickness of the oxide films formed on the surfaces of the first and second semiconductor layers 41 and 42 is equal to or greater than the width of the trench portion 40 in step S2, voids 50 can be made sufficiently small.

[0060] Furthermore, by performing the oxidation treatment for a sufficiently long time, the upper and lower ends of the first and second side surfaces W1, W2 of the first and second semiconductor layers 41, 42 are rounded. The upper ends of the first and second side surfaces W1, W2 are the ends of the first and second side surfaces W1, W2 on the insulating film 5 side. The lower ends of the first and second side surfaces W1, W2 are the ends of the first and second side surfaces W1, W2 on the opposite side from the insulating film 5 side.

[0061] That is, the first side surface W1 of the first semiconductor layer 41 has a first curved surface portion R1 convex toward the second semiconductor layer 42 at its end on the insulating film 5 side, and a second curved surface portion R2 convex toward the second semiconductor layer 42 at its end opposite to the insulating film 5 side. The second side surface W2 of the second semiconductor layer 42 has a third curved surface portion R3 convex toward the first semiconductor layer 41 at its end on the insulating film 5 side, and a fourth curved surface portion R4 convex toward the first semiconductor layer 41 at its end opposite to the insulating film 5 side.

[0062] In step S3, the first curved surface portion R1, the second curved surface portion R2, the third curved surface portion R3, and the fourth curved surface portion R4 are formed simultaneously. As mentioned above, "simultaneously" in this disclosure means that they are formed in the same process or by the same device. Therefore, the first curved surface portion R1, the second curved surface portion R2, the third curved surface portion R3, and the fourth curved surface portion R4 have approximately the same curvature. This increases the symmetry of parasitic capacitances such as fringe capacitance, enabling the acceleration sensor 1 to have excellent bias characteristics.

[0063] In addition, in this embodiment, the oxidation process is performed using a thermal oxidation method, which makes it easier for impurities such as boron and phosphorus, which are pre-doped into the first and second semiconductor layers 41 and 42, to diffuse outward due to heat. Therefore, in step S3, low impurity concentration regions 45 and 46 can be formed near the surfaces of the first and second semiconductor layers 41 and 42.

[0064] Furthermore, in step S3, a portion of the substrate 4 is oxidized by oxygen that has diffused and moved within the insulating film 5 via the bottom surface of the trench portion 40. As a result, the film thickness of the insulating film 5 in a region in contact with the trench portion 40 becomes thicker than the film thickness of the insulating film 5 in a region in contact with the first and second semiconductor layers 41, 42. Furthermore, in the region of the insulating film 5 in contact with the trench portion 40, the third face F3, which is the upper surface of the insulating film 5, has a convex curved surface facing the trench portion 40, and the surface of the insulating film 5 that faces the first face F1 of the substrate 4 has a convex curved surface facing the substrate 4.

[0065] 1.4 Wiring process Next, in step S4, wiring (not shown) electrically connected to the movable portion 2, wiring 29 electrically connected to the fixed electrode portion 3, electrode pads 27, 28, etc. are formed. 11 and 12, in this embodiment, the first and second upper surface oxide films 61 and 62, which are oxide films formed on the upper surfaces of the first and second semiconductor layers 41 and 42, are removed before forming the wiring 29 electrically connected to the fixed electrode portion 3. That is, by removing the first and second upper surface oxide films 61 and 62, the upper surfaces of the first and second semiconductor layers 41 and 42 and the upper surfaces of the first and second sidewall oxide films 21 and 22 are smoothed.

[0066] After smoothing the upper surfaces of the first and second semiconductor layers 41, 42 and the upper surfaces of the first and second sidewall oxide films 21, 22, an interlayer insulating film 24 is formed on the upper surfaces of the first and second semiconductor layers 41, 42 and the upper surfaces of the first and second sidewall oxide films 21, 22.

[0067] As described above, the interlayer insulating film 24 is preferably a silicon oxide film formed from silicon oxide by thermal CVD. Silicon oxide films formed by thermal CVD have excellent step coverage. Therefore, by forming the interlayer insulating film 24 from silicon oxide by thermal CVD, the interlayer insulating film 24 can be stably formed even when unevenness exists on the upper surfaces of the first and second semiconductor layers 41 and 42 or the upper surfaces of the first and second sidewall oxide films 21 and 22. Furthermore, unevenness occurring on the upper surfaces of the first and second semiconductor layers 41 and 42 or the upper surfaces of the first and second sidewall oxide films 21 and 22 is absorbed by the interlayer insulating film 24 formed from silicon oxide by thermal CVD. This allows for stable formation of electrode pads 27 and 28, wiring 29, and the like on the upper surface of the interlayer insulating film 24. In this embodiment, the interlayer insulating film 24 is formed from high-temperature silicon oxide HTO by low-pressure thermal CVD.

[0068] The interlayer insulating film 24 is patterned into a desired shape using photolithography. Wiring 29 is formed on the upper surface of the interlayer insulating film 24. Although not shown in Figures 11 and 12, electrode pads 27 and 28 are also formed on the upper surface of the interlayer insulating film 24, similar to the wiring 29.

[0069] In this embodiment, the upper surfaces of the first and second semiconductor layers 41 and 42 and the upper surfaces of the first and second sidewall oxide films 21 and 22 are smoothed by removing the first and second upper surface oxide films 61 and 62. However, the first and second upper surface oxide films 61 and 62 do not necessarily have to be removed. For example, the upper surfaces of the first and second upper surface oxide films 61 and 62 may be smoothed by chemical mechanical polishing (CMP) or etch-back. Alternatively, the first and second upper surface oxide films 61 and 62 may not be removed and may instead be used as the interlayer insulating film 24.

[0070] 1.5 Moving part forming process Next, in step S5, the outer shapes of the movable section 2, fixed electrode section 3, outer frame section 9, etc. are formed as shown in Fig. 13. As described above, the movable section 2, fixed electrode section 3, outer frame section 9, etc. are formed using the semiconductor layer 6. In this embodiment, unnecessary portions of the semiconductor layer 6 are removed using a method such as dry etching according to the outer shapes of each section, such as the movable section 2, fixed electrode section 3, and outer frame section 9. This forms the outer shapes of each section, such as the movable section 2, fixed electrode section 3, and outer frame section 9, resulting in the acceleration sensor 1 shown in Fig. 1.

[0071] As described above, according to this embodiment, the following effects can be obtained. An acceleration sensor 1 as an example of an inertial sensor includes a substrate 4, an insulating film 5 formed on a first face F1 which is a main surface of the substrate 4, first and second semiconductor layers 41, 42 formed on a third face F3 which is the face of the insulating film 5 opposite to the substrate 4, a first sidewall oxide film 21 formed on a first side face W1 of the first semiconductor layer 41 facing the second semiconductor layer 42, and a second sidewall oxide film 22 formed on a second side face W2 of the second semiconductor layer 42 facing the first semiconductor layer 41, The first side W1 has a first curved surface portion R1 convex toward the second semiconductor layer 42 at the end on the insulating film 5 side, and a second curved surface portion R2 convex toward the second semiconductor layer 42 at the end opposite the insulating film 5 side, the second side W2 has a third curved surface portion R3 convex toward the first semiconductor layer 41 at the end on the insulating film 5 side, and a fourth curved surface portion R4 convex toward the first semiconductor layer 41 at the end opposite the insulating film 5, and the first sidewall oxide film 21 and the second sidewall oxide film 22 are in physical contact. This makes it possible to reduce parasitic capacitance such as fringe capacitance between the first semiconductor layer 41 and the second semiconductor layer 42, thereby providing an acceleration sensor 1 with good bias characteristics.

[0072] A manufacturing method of an acceleration sensor 1 as an example of an inertial sensor includes the steps of: preparing a base body 7 having a substrate 4, an insulating film 5 formed on a first face F1 of the substrate 4, and a semiconductor layer 6 formed on a third face F3 of the insulating film 5; removing a portion of the semiconductor layer 6 to form a trench portion 40 and a first semiconductor layer 41 and a second semiconductor layer 42 that face each other via the trench portion 40; and simultaneously oxidizing the first semiconductor layer 41 and the second semiconductor layer 42 to form a first sidewall oxide film 21 on a first side face W1 of the first semiconductor layer 41 and a second sidewall oxide film 22 on a second side face W2 of the second semiconductor layer 42, and filling the trench portion 40 by bringing the first sidewall oxide film 21 and the second sidewall oxide film 22 into physical contact with each other. This makes it possible to provide a manufacturing method for the acceleration sensor 1 with good bias characteristics.

[0073] In this embodiment, the outer frame portion 9 corresponds to the first semiconductor layer 41, the fixed electrode support portion 15 corresponds to the second semiconductor layer 42, and an insulating isolation region 20 having first and second sidewall oxide films 21, 22 is formed between the outer frame portion 9 and the fixed electrode support portion 15, but the first and second semiconductor layers 41, 42 do not have to be the outer frame portion 9 or the fixed electrode support portion 15. For example, the insulating isolation region 20 may be formed between the movable portion 2 and the outer frame portion 9, with the movable portion 2 corresponding to the first semiconductor layer 41 and the outer frame portion 9 corresponding to the second semiconductor layer 42, and the insulating isolation region 20 having the first and second sidewall oxide films 21, 22 may be formed between the movable portion 2 and the outer frame portion 9.

[0074] In this embodiment, a sensor that detects acceleration in the Y direction has been described as an example of the acceleration sensor 1, but the acceleration sensor 1 may be a sensor that detects acceleration in the X direction or the Z direction, for example. In this embodiment, the acceleration sensor 1 has been described as an example of an inertial sensor, but the inertial sensor may be, for example, an angular velocity sensor.

[0075] 2. Embodiment 2 Next, an acceleration sensor 1a as an example of an inertial sensor according to the second embodiment will be described with reference to Fig. 14. Fig. 14 corresponds to a cross-sectional view taken along the line D1 in Fig. 2. The same components as those in the first embodiment are denoted by the same reference numerals, and redundant explanations will be omitted.

[0076] The acceleration sensor 1a according to the second embodiment is similar to the first embodiment except that the shapes of the first and second side surfaces W1a and W2a of the first and second semiconductor layers 41 and 42, respectively, are different from those of the first embodiment.

[0077] As shown in FIG. 14, on the first side surface W1a of the first semiconductor layer 41 facing the second semiconductor layer 42, the first curved surface portion R1 and the second curved surface portion R2 are connected by a flat surface portion L1a and a flat surface portion L3a. The flat surface portion L3a is disposed on the insulating film 5 side below the flat surface portion L1a. The upper end of the flat surface portion L1a is connected to the second curved surface portion R2. The lower end of the flat surface portion L1a is connected to the upper end of the flat surface portion L3a. The lower end of the flat surface portion L3a is connected to the first curved surface portion R1. The upper ends of the flat surface portions L1a and L3a are end portions of the flat surface portions L1a and L3a on the opposite side from the insulating film 5 side. The lower ends of the flat surface portions L1a and L3a are end portions of the flat surface portions L1a and L3a on the insulating film 5 side.

[0078] The flat surface portion L1a extends substantially parallel to the Z direction. The flat surface portion L3a extends so as to intersect with the Z direction. Specifically, the flat surface portion L3a is inclined so as to approach the second semiconductor layer 42 as it approaches the insulating film 5. In other words, the flat surface portion L3a corresponds to a first inclined surface portion that is inclined so as to approach the second semiconductor layer 42 as it approaches the insulating film 5.

[0079] Similarly, on the second side surface W2a of the second semiconductor layer 42 facing the first semiconductor layer 41, the third curved surface portion R3 and the fourth curved surface portion R4 are connected by the flat surface portion L2a and the flat surface portion L4a. The flat surface portion L4a is disposed on the insulating film 5 side below the flat surface portion L2a. The upper end of the flat surface portion L2a is connected to the fourth curved surface portion R4. The lower end of the flat surface portion L2a is connected to the upper end of the flat surface portion L4a. The lower end of the flat surface portion L4a is connected to the third curved surface portion R3. The upper ends of the flat surface portions L2a and L4a are end portions of the flat surface portions L2a and L4a on the opposite side from the insulating film 5 side. The lower ends of the flat surface portions L2a and L4a are end portions of the flat surface portions L2a and L4a on the insulating film 5 side.

[0080] The flat surface portion L2a extends substantially parallel to the Z direction. The flat surface portion L4a extends so as to intersect with the Z direction. Specifically, the flat surface portion L4a is inclined so as to approach the first semiconductor layer 41 toward the insulating film 5. In other words, the flat surface portion L4a corresponds to a second inclined surface portion that is inclined so as to approach the first semiconductor layer 41 toward the insulating film 5.

[0081] As described above, in this embodiment, the first side surface W1a has a flat portion L3a as a first inclined surface portion that slopes toward the second semiconductor layer 42 toward the insulating film 5, and the second side surface W2a has a flat portion L4a as a second inclined surface portion that slopes toward the first semiconductor layer 41 toward the insulating film 5. This can further reduce the gap 50. In other words, the height H2 of the contact region C1 where the first sidewall oxide film 21 and the second sidewall oxide film 22 are in physical contact with each other can further be increased.

[0082] According to this embodiment, in addition to the effects of the first embodiment, the following effects can be obtained. The first side surface W1a has a flat surface L3a as a first inclined surface, and the second side surface W2a has a flat surface L4a as a second inclined surface. This makes it possible to further reduce the gap 50 and increase the height H2 of the contact area C1, thereby further suppressing deterioration of the mechanical and temperature characteristics of the acceleration sensor 1 due to external forces such as vibration and impact, and environmental changes such as temperature, and providing an acceleration sensor 1a with even higher reliability.

[0083] 3. Embodiment 3 Next, an acceleration sensor 1b as an example of an inertial sensor according to a third embodiment will be described with reference to Fig. 15. Fig. 15 corresponds to a cross-sectional view taken along the line D1 in Fig. 2. The same components as those in the first embodiment are denoted by the same reference numerals, and redundant explanations will be omitted.

[0084] The acceleration sensor 1b according to the third embodiment is similar to the first embodiment except that the shapes of the first and second side surfaces W1b, W2b of the first and second semiconductor layers 41, 42, respectively, are different from those of the first embodiment.

[0085] As shown in FIG. 15, on the first side surface W1b of the first semiconductor layer 41 on the second semiconductor layer 42 side, the first curved surface portion R1 and the second curved surface portion R2 are connected by a flat surface portion L3b.

[0086] The flat surface portion L3b extends so as to intersect with the Z direction. Specifically, the flat surface portion L3b is inclined so as to approach the second semiconductor layer 42 toward the insulating film 5. In other words, the flat surface portion L3b corresponds to a first inclined surface portion that is inclined so as to approach the second semiconductor layer 42 toward the insulating film 5.

[0087] Similarly, on the second side surface W2b of the second semiconductor layer 42 on the first semiconductor layer 41 side, the third curved surface portion R3 and the fourth curved surface portion R4 are connected by a flat surface portion L4b.

[0088] The flat surface portion L4b extends so as to intersect with the Z direction. Specifically, the flat surface portion L4b is inclined so as to approach the first semiconductor layer 41 toward the insulating film 5. In other words, the flat surface portion L4b corresponds to a second inclined surface portion that is inclined so as to approach the first semiconductor layer 41 toward the insulating film 5.

[0089] Thus, in this embodiment, the first side W1b has a flat portion L3b as a first inclined surface portion that slopes toward the second semiconductor layer 42 as it approaches the insulating film 5, and the second side W2b has a flat portion L4b as a second inclined surface portion that slopes toward the first semiconductor layer 41 as it approaches the insulating film 5.

[0090] By increasing the angle at which the Z axis intersects with the flat surface L3b as the first inclined surface and the angle at which the Z axis intersects with the flat surface L4b as the second inclined surface, it is possible to reduce the gap 50. In other words, by increasing the angle at which the Z axis intersects with the flat surface L3b as the first inclined surface and the angle at which the Z axis intersects with the flat surface L4b as the second inclined surface, it is possible to increase the height H2 of the contact region C1 where the first sidewall oxide film 21 and the second sidewall oxide film 22 are in physical contact with each other.

[0091] Here, the distance between the flat portion L3b and the flat portion L4b is defined as LD. The distance LD between the flat portion L3b and the flat portion L4b has a maximum value LDmax and a minimum value LDmin. The distance LD between the flat portion L3b and the flat portion L4b decreases from the positive side of the Z direction to the negative side of the Z direction. In other words, the distance LD between the flat portion L3b and the flat portion L4b increases toward the fourth face F5 of the semiconductor layer 6 and decreases toward the insulating film 5. In other words, the maximum value LDmax is located near the fourth face F5 of the semiconductor layer 6, and the minimum value LDmin is located near the third face F3, which is the upper surface of the insulating film 5.

[0092] By increasing the difference between the maximum value LDmax and the minimum value LDmin of the distance LD between the flat portion L3b and the flat portion L4b, it is possible to reduce the gap 50. In other words, by increasing the difference between the maximum value LDmax and the minimum value LDmin, it is possible to increase the height H2 of the contact region C1 where the first sidewall oxide film 21 and the second sidewall oxide film 22 are in physical contact with each other.

[0093] Furthermore, in this embodiment, the gap 50 can be prevented from occurring by sufficiently increasing the angle at which the Z axis intersects with the flat surface L3b serving as the first inclined surface and the angle at which the Z axis intersects with the flat surface L4b serving as the second inclined surface. Alternatively, the gap 50 can be prevented from occurring by sufficiently increasing the difference between the maximum value LDmax and the minimum value LDmin of the distance LD between the flat surface L3b and the flat surface L4b. Note that FIG. 15 shows a state in which no gap 50 is present as an example of the state of the gap 50. Therefore, the gap 50 is not shown in FIG. 15.

[0094] [Table 1]

[0095] Table 1 shows the results of calculations performed by thermal oxidation simulation for the distance LD between the flat portions L3b and L4b and H2 / H1, which is the ratio of the height H2 of the contact area C1 to the height H1 of the first and second side surfaces W1 and W2. Table 1 also shows the percentage (LDmax-LDmin) / LDmax, which is the ratio of the difference between the maximum value LDmax and the minimum value LDmin of the distance LD between the flat portions L3b and L4b to the maximum value LDmax of the distance LD between the flat portions L3b and L4b.

[0096] When the difference between the maximum value LDmax and the minimum value LDmin of the distance LD between the flat portion L3b and the flat portion L4b is 0 (zero), the flat portion L3b and the flat portion L4b are parallel to the Z axis. At this time, H2 / H1 was 0.905. When the difference between the maximum value LDmax and the minimum value LDmin was 33.3% of the maximum value LDmax, i.e., when the ratio of the difference between the maximum value LDmax and the minimum value LDmin to the maximum value LDmax was 1 / 3, H2 / H1 was 0.946. Furthermore, when the difference between the maximum value LDmax and the minimum value LDmin was 93.3% of the maximum value LDmax, H2 / H1 was 1.000. That is, the first sidewall oxide film 21 and the second sidewall oxide film 22 were in complete contact.

[0097] In this embodiment, when the difference between the maximum value LDmax and the minimum value LDmin of the distance LD between the flat portion L3b and the flat portion L4b is 50% of the maximum value LDmax, H2 / H1 was 0.961.

[0098] The preferred range of H2 / H1 in the present invention is 0.905 to 1, and more preferably 0.946 to 1. Therefore, the difference between the maximum value LDmax and the minimum value LDmin of the distance LD between the flat portion L3b and the flat portion L4b is preferably 0% to 100% of the maximum value LDmax, and more preferably 33.3% to 100%. This makes it possible to suppress deterioration of the mechanical and temperature characteristics of the acceleration sensor 1 due to external forces such as vibration and impact, and environmental changes such as temperature, and provides a highly reliable acceleration sensor 1.

[0099] According to this embodiment, in addition to the effects of the first embodiment, the following effects can be obtained. The first side surface W1b has a flat surface L3b as a first inclined surface, and the second side surface W2b has a flat surface L4b as a second inclined surface. This makes it possible to further reduce the gap 50 and increase the height H2 of the contact area C1, thereby further suppressing deterioration of the mechanical and temperature characteristics of the acceleration sensor 1 due to external forces such as vibration and impact, and environmental changes such as temperature, and providing an acceleration sensor 1b with even higher reliability.

[0100] 4. Embodiment 4 Next, an inertial measurement unit (IMU) 2000 including acceleration sensors 1, 1a, and 1b according to a fourth embodiment will be described with reference to Fig. 16 and Fig. 17. In the following description, a configuration to which acceleration sensor 1 is applied will be exemplified.

[0101] The inertial measurement unit 2000 is a device that detects the inertial momentum, such as the attitude and behavior of a moving body such as an automobile or a robot. The inertial measurement unit 2000 is equipped with inertial sensors such as an acceleration sensor and an angular velocity sensor, and functions as a so-called motion sensor.

[0102] As shown in FIG. 16, the inertial measurement unit 2000 has a rectangular parallelepiped shape that is approximately square in plan view. The inertial measurement unit 2000 includes an outer case 301, a joint member 310, and a sensor module 325 in which an inertial sensor is mounted.

[0103] The external shape of outer case 301 is a rectangular parallelepiped with a substantially square planar shape, similar to the overall shape of inertial measurement unit 2000, and screw holes 302 are formed near each of two vertices located diagonally across the square. Two screws can be inserted into these two screw holes 302 to secure inertial measurement unit 2000 to the mounting surface of an object such as an automobile.

[0104] Further, outer case 301 is box-shaped and houses sensor module 325 inside. Specifically, sensor module 325 is inserted into outer case 301 with joining member 310 interposed therebetween.

[0105] The sensor module 325 includes an inner case 320 and a substrate 315 .

[0106] Inner case 320 is a member that supports substrate 315, and substrate 315 is bonded to the bottom surface of inner case 320 via an adhesive.

[0107] Furthermore, inner case 320 is shaped to fit inside outer case 301. Inner case 320 is formed with recess 331 for preventing contact with substrate 315 and opening 321 for exposing connector 316, which will be described later. Inner case 320 is joined to outer case 301 via joining member 310.

[0108] Next, the substrate 315 on which the inertial sensor is mounted will be described. 17, acceleration sensor 1, connector 316, angular velocity sensor 317z that detects angular velocity around the Z axis, and the like are mounted on the top surface of substrate 315, which faces inner case 320. Angular velocity sensor 317x that detects angular velocity around the X axis and angular velocity sensor 317y that detects angular velocity around the Y axis are mounted on the side surface of substrate 315.

[0109] The acceleration sensor 1 may be an acceleration sensor capable of detecting acceleration in two directions, the X direction and the Y direction, or an acceleration sensor capable of detecting acceleration in three directions, the X direction, the Y direction, and the Z direction, as needed.

[0110] Furthermore, a control IC 319 serving as a control unit is mounted on the underside of substrate 315, which faces outer case 301. Control IC 319 is an MCU (Micro Controller Unit) that incorporates a storage unit including nonvolatile memory, an A / D converter, and the like, and controls each unit of inertial measurement unit 2000. The storage unit stores programs that define the order and content for detecting acceleration and angular velocity, a program that digitizes the detected data and incorporates it into packet data, and associated data. Note that multiple other electronic components are also mounted on substrate 315.

[0111] According to the inertial measurement unit 2000, since the acceleration sensor 1 is used as an example of the inertial sensor described above, it is possible to provide an inertial measurement unit 2000 that enjoys the effects associated with the acceleration sensor 1. [Explanation of symbols]

[0112] 1, 1a, 1b...acceleration sensor, 2...movable portion, 3...fixed electrode portion, 4...substrate, 5...insulating film, 6...semiconductor layer, 7...base, 8...recess, 9...outer frame portion, 10...movable electrode support portion, 11...movable electrode finger, 15...fixed electrode support portion, 16...fixed electrode finger, 20...insulating isolation region, 21...first sidewall oxide film, 22...second sidewall oxide film, 40...trench portion, 41...first semiconductor layer, 42...second semiconductor layer, 50...air gap, 2000...inertial measurement unit, 319...control IC, F1...first surface, F3...third surface, R1...first curved surface portion, R2...second curved surface portion, R3...third curved surface portion, R4...fourth curved surface portion, W1, W1a, W1b...first side surface, W2, W2a, W2b...second side surface.

Claims

1. A substrate; an insulating film formed on a main surface of the substrate; a first semiconductor layer and a second semiconductor layer formed on a surface of the insulating film opposite to the substrate; a first sidewall oxide film formed on a first side surface of the first semiconductor layer on the second semiconductor layer side; a second sidewall oxide film formed on a second side surface of the second semiconductor layer on the first semiconductor layer side, the first side surface has a first curved surface portion that is convex toward the second semiconductor layer at an end portion on the insulating film side, and a second curved surface portion that is convex toward the second semiconductor layer at an end portion opposite to the insulating film side, the second side surface has a third curved surface portion convex toward the first semiconductor layer at an end portion on the insulating film side, and a fourth curved surface portion convex toward the first semiconductor layer at an end portion opposite to the insulating film side, the first sidewall oxide film and the second sidewall oxide film are in physical contact with each other; Inertial sensor.

2. a gap surrounded by the insulating film, the first sidewall oxide film, and the second sidewall oxide film; The inertial sensor of claim 1 .

3. the first side surface has a first slope portion that slopes toward the insulating film so as to approach the second semiconductor layer; the second side surface has a second inclined surface portion that is inclined so as to approach the first semiconductor layer toward the insulating film; The inertial sensor of claim 1 .

4. the first semiconductor layer and the second semiconductor layer are single crystal silicon; the first sidewall oxide film and the second sidewall oxide film are silicon oxide. The inertial sensor according to any one of claims 1 to 3.

5. preparing a base body having a substrate, an insulating film formed on a main surface of the substrate, and a semiconductor layer formed on a surface of the insulating film opposite to the substrate; forming a trench portion and a first semiconductor layer and a second semiconductor layer opposing each other across the trench portion by removing a portion of the semiconductor layer; a step of simultaneously oxidizing the first semiconductor layer and the second semiconductor layer to form a first sidewall oxide film on a first side surface of the first semiconductor layer facing the second semiconductor layer and a second sidewall oxide film on a second side surface of the second semiconductor layer facing the first semiconductor layer, and filling the trench portion by bringing the first sidewall oxide film and the second sidewall oxide film into physical contact with each other; A method for manufacturing an inertial sensor having the above structure.

6. An inertial sensor according to any one of claims 1 to 4; a control unit that controls the inertial sensor; An inertial measurement unit comprising:

Images