Multilayer capacitor and method of manufacturing the same

Abstract

To provide a multilayer capacitor which can be made thin by reducing the size of dielectric crystal grains in a dielectric layer and can realize high temperature stability and a high dielectric constant.SOLUTION: According to an aspect of the present disclosure, there is provided a multilayer capacitor including a capacitor body including dielectric layers and internal electrodes, and external electrodes disposed on an outer surface of the capacitor body, wherein the dielectric layer includes a plurality of dielectric grains, and the dielectric grains include a core containing a BaTiO3 portion, a first shell disposed on the core and containing the BaTiO3 portion doped with a first doping element of Sr, Ca, Bi, K, Na, or a combination thereof, and a second shell disposed on the first shell and containing a first coating element of Nb, Ta, or a combination thereof.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a multilayer capacitor and a method for manufacturing the same. [Background technology]

[0002] As the industry moves to reduce final package size, miniaturization of multi-layered ceramic capacitors (MLCCs) is also essential. In addition, in response to the recent trend of demanding miniaturization and high capacitance of MLCCs, many related companies and research institutes are focusing on fundamentally improving the base material, BaTiO3 dielectric, in order to simultaneously achieve the goals of ultra-miniaturization and high capacitance.

[0003] At the same time, as the electric vehicle market grows, demand for MLCCs for electrical equipment is also rapidly increasing, making it necessary to secure the development technology for dielectric ceramics with excellent temperature stability, an essential requirement for MLCCs for electrical equipment.

[0004] MLCCs can be broadly divided into a body, which is made up of multiple layers of dielectric and internal electrodes, and an external electrode, which connects the multiple internal electrodes. To increase the capacitance of an MLCC, the number of layers in the body must be increased, making it difficult to simultaneously increase the capacitance and reduce the size of the MLCC.

[0005] To solve this problem, it is necessary to increase the dielectric constant, reduce the thickness, and improve the temperature stability of the dielectric material that provides the capacitance of the MLCC.

[0006] Previous technology has attempted to increase the crystallinity of BaTiO3 or develop other new compositions to increase the dielectric constant and thin the layers of dielectric materials, but ultimately there were limitations to achieving a high dielectric constant due to the difficulty of controlling the microstructure during the sintering process. Furthermore, research into adding dopants to improve temperature stability has also improved temperature stability, but it has been difficult to simultaneously achieve a high dielectric constant. Summary of the Invention [Problem to be solved by the invention]

[0007] Therefore, one object of the present invention is to provide a multilayer capacitor that can reduce the size of the dielectric crystal grains in the dielectric layer to make the layer thinner, and that can also achieve high temperature stability and a high dielectric constant. [Means for solving the problem]

[0008] One embodiment of the present invention provides a multilayer capacitor including: a capacitor body including a dielectric layer and an internal electrode; and an external electrode disposed on the outside of the capacitor body, wherein the dielectric layer includes a plurality of dielectric crystal grains, the dielectric crystal grains including: a core containing BaTiO3; a first shell disposed on the core and containing BaTiO3 doped with a first doping element, which is Sr, Ca, Bi, K, Na, or a combination thereof; and a second shell disposed on the first shell and containing a first coating element, which is Nb, Ta, or a combination thereof.

[0009] When the dielectric crystal grains are subjected to line analysis using a transmission electron microscope-energy dispersive X-ray analyzer (TEM-EDX), a maximum peak of the first doping element concentration appears in the first shell region, and a maximum peak of the first coating element concentration appears in the second shell region.

[0010] When the dielectric crystal grains are subjected to line analysis using a transmission electron microscope-energy dispersive X-ray analyzer (TEM-EDX), the lowest concentration of the first doping element appears in the core region.

[0011] When the dielectric crystal grains are line-analyzed using a transmission electron microscope-energy dispersive X-ray analyzer (TEM-EDX), the lowest concentration of the first coating element appears in the core region.

[0012] The content of the first doping element in the dielectric crystal grains may be 4 mol % to 21 mol % based on the total mole number of Ti in the dielectric crystal grains.

[0013] The content of the first coating element in the dielectric crystal grains may be 1 mol % to 5 mol % based on the total mole number of Ti in the dielectric crystal grains.

[0014] The first shell may further contain a second doping element, which may be Ti, Hf, Zr, Mg, Nb, Ta, or a combination thereof.

[0015] The second shell may further include a second coating element that is Sr, Ca, or a combination thereof.

[0016] The content of the second coating element in the dielectric crystal grains may be 0.8 mol % to 3.2 mol % based on the total number of moles of Ti in the dielectric crystal grains.

[0017] The first shell may include a compound represented by the following Chemical Formula 1:

[0018] [Chemical formula 1] Ba (1-x) A x Ti (1-y) B y O3 In the above chemical formula 1, A is Sr, Ca, Bi, K, Na, or a combination thereof, B is Ti, Hf, Zr, Mg, Nb, Ta, or a combination thereof, and 0 <x≦0.3であり、0≦y≦0.3である。

[0019] The second shell is X2Nb3O 10 , X2Ta3O 10 , X2Nb2O7, X2Ta2O7, XBi2Nb2O9, XBi2Ta2O9, or a combination thereof, wherein X may be Sr, Ca, or a combination thereof.

[0020] The dielectric crystal grains may have an average grain size of 600 nm or less.

[0021] Another embodiment of the present invention provides a method for manufacturing a multilayer capacitor, the method comprising: preparing a dielectric powder; preparing a dielectric green sheet using the dielectric powder and forming a conductive paste layer on a surface of the dielectric green sheet; stacking the dielectric green sheets on which the conductive paste layer is formed to manufacture a dielectric green sheet laminate; firing the dielectric green sheet laminate to manufacture a capacitor body including a dielectric layer and an internal electrode; and forming an external electrode on one surface of the capacitor body, wherein the dielectric layer includes a plurality of dielectric crystal grains, the dielectric crystal grains including a core containing BaTiO3, a first shell disposed on the core and containing BaTiO3 doped with a first doping element which is Sr, Ca, Bi, K, Na, or a combination thereof, and a second shell disposed on the first shell and containing a first coating element which is Nb, Ta, or a combination thereof.

[0022] The step of preparing the dielectric powder includes the steps of mixing BaTiO3, a first doping source material, and a solvent to form a mixture; heat-treating the mixture, washing with water, and drying to form BaTiO3 doped with a first doping element; forming nanosheets containing a first coating element; and pulverizing and mixing the BaTiO3 doped with the first doping element and the nanosheets to form dielectric crystal grains, wherein the first doping source material may be a Sr source material, a Ca source material, a Bi source material, a K source material, a Na source material, or a combination thereof.

[0023] The step of forming the nanosheet includes the steps of mixing a first coating raw material and K2CO3 and then calcining to form a first intermediate material having a multilayer structure; treating the first intermediate material with an acid to form a second intermediate material having a multilayer structure containing hydrogen; and adding the second intermediate material to a basic solvent and then exfoliating it through stirring and ultrasonic treatment to form a single-layer nanosheet from which hydrogen has been removed. The first coating raw material may be a Nb raw material, a Ta raw material, or a combination thereof.

[0024] The basic solvent may be tetrabutylammonium hydroxide (TBAOH), tetramethylammonium hydroxide (TMAOH), or a combination thereof.

[0025] The grinding and mixing can be carried out by wet grinding and mixing.

[0026] The nanosheet may have a thickness of 3.5 nm or less.

[0027] In the step of forming the first intermediate material, the firing may be performed at 700°C to 1300°C.

[0028] During the mixing, a second coating source material may be further mixed, and in this case, the second coating source material may be a Sr source material, a Ca source material, or a combination thereof. [Effects of the Invention]

[0029] In a multilayer capacitor according to an embodiment of the present invention, the dielectric crystal grains in the dielectric layer include a core, a first shell, and a second shell having different compositions, thereby reducing the size of the dielectric crystal grains and enabling the dielectric layer to be made thinner, while also improving the temperature stability and dielectric constant of the dielectric layer. [Brief explanation of the drawings]

[0030] [Figure 1] 1 is a perspective view of a multilayer capacitor according to an embodiment of the present invention; [Figure 2] FIG. 2 is a cross-sectional view of the multilayer capacitor taken along line II' in FIG. [Figure 3] 2 is an exploded perspective view showing the laminated structure of the internal electrodes in the capacitor body of FIG. 1. FIG. [Figure 4] 1 is a conceptual diagram of a dielectric crystal grain according to the present invention. [Figure 5] 1A to 1C are schematic diagrams showing a method for manufacturing dielectric crystal grains according to the present invention. [Figure 6] 10 is a TEM-EDX line scan analysis image of dielectric crystal grains in a stacked capacitor manufactured according to Example 4. [Figure 7] 10 shows a TEM-EDX line scan analysis image and graph of dielectric crystal grains in a stacked capacitor manufactured according to Example 4. [Figure 8] 10 is a TEM-EDX elemental mapping analysis image of dielectric crystal grains in the stacked capacitor manufactured according to Example 4. [Figure 9] 10 is a TEM-EDX elemental mapping analysis image of dielectric crystal grains in the stacked capacitor manufactured according to Example 4. [Figure 10]10 is a TEM-EDX elemental mapping analysis image of dielectric crystal grains in the stacked capacitor manufactured according to Example 4. [Figure 11] 1 is a TEM-EDX elemental mapping analysis image of dielectric crystal grains of a comparative group according to Experimental Example 1. [Figure 12] 1 is a TEM-EDX elemental mapping analysis image of dielectric crystal grains of a comparative group according to Experimental Example 1. [Figure 13] 1 is a TEM-EDX elemental mapping analysis image of dielectric crystal grains of a comparative group according to Experimental Example 1. [Figure 14] 10 is a graph showing the results of evaluation of dielectric temperature stability in Experimental Example 2. DETAILED DESCRIPTION OF THE INVENTION

[0031] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily implement the present invention. In order to clearly explain the present invention in the drawings, parts unnecessary for explanation are omitted, and the same reference numerals are used throughout the specification to refer to the same or similar components. Furthermore, the accompanying drawings are merely for the purpose of making it easier to understand the embodiments disclosed in this specification, and the accompanying drawings should not be construed as limiting the technical ideas disclosed in this specification, and should be understood to include all modifications, equivalents, and alternatives falling within the idea and technical scope of the present invention.

[0032] Terms including ordinal numbers such as "first," "second," etc. may be used to describe various components, but the components are not limited by the terms. The terms are used only to distinguish one component from another.

[0033] When a component is said to be "coupled" or "connected" to another component, it should be understood that the component may be directly coupled to, connected to, or facing the other component, but that there may be other components in between. Conversely, when a component is said to be "directly coupled" or "directly connected" to another component, it should be understood that there are no other components in between.

[0034] Throughout the specification, the use of terms such as "comprises" or "having" is intended to specify the presence of a stated feature, numeral, step, operation, component, part, or combination thereof, but should be understood not to preclude the presence or addition of one or more other features, numerals, steps, operations, components, parts, or combinations thereof. Thus, when a part is said to "comprise" a certain component, this means that it can further include other components, but not to the exclusion of other components, unless specifically stated to the contrary.

[0035] FIG. 1 is a perspective view showing a multilayer capacitor 100 according to one embodiment, FIG. 2 is a cross-sectional view of the multilayer capacitor 100 taken along line II' in FIG. 1, and FIG. 3 is an exploded perspective view showing the stacked structure of the internal electrodes in the capacitor body 110 of FIG. 1.

[0036] To clearly explain this embodiment, the L-axis, W-axis, and T-axis shown in the drawings represent the length, width, and thickness directions of the capacitor body 110, respectively. Here, the thickness direction (T-axis direction) may be perpendicular to the wide surface (main surface) of the sheet-shaped component, and may be the same concept as the stacking direction of the dielectric layers 111. The length direction (L-axis direction) may be parallel to the wide surface (main surface) of the sheet-shaped component and substantially perpendicular to the thickness direction (T-axis direction). For example, it may be the direction in which the first external electrode 131 and the second external electrode 132 are located on both sides. The width direction (W-axis direction) may be parallel to the wide surface (main surface) of the sheet-shaped component and substantially perpendicular to the thickness direction (T-axis direction) and the length direction (L-axis direction). The length of the length direction (L-axis direction) of the sheet-shaped component may be longer than the length of the width direction (W-axis direction).

[0037] 1 to 3, the multilayer capacitor 100 according to this embodiment may include a capacitor body 110, and a first external electrode 131 and a second external electrode 132 disposed on opposite ends of the capacitor body 110 in the longitudinal direction (L-axis direction).

[0038] For example, the capacitor body 110 may have a substantially hexahedral shape.

[0039] In this embodiment, for ease of explanation, the two surfaces of the capacitor body 110 that face each other in the thickness direction (T-axis direction) are defined as the first surface and the second surface, the two surfaces that are connected to the first surface and the second surface and face each other in the length direction (L-axis direction) are defined as the third surface and the fourth surface, and the two surfaces that are connected to the first surface and the second surface and the third surface and the fourth surface and face each other in the width direction (W-axis direction) are defined as the fifth surface and the sixth surface.

[0040] As an example, the first surface, which is the bottom surface, may be the surface facing the mounting direction. Furthermore, the first to sixth surfaces may be flat, but this embodiment is not limited to this. For example, the first to sixth surfaces may be curved surfaces with convex central portions, and the corners that are the boundaries between the surfaces may be rounded.

[0041] The shape and size of the capacitor body 110 and the number of laminated dielectric layers 111 are not limited to those shown in the drawings of this embodiment.

[0042] The capacitor body 110 is formed by stacking a plurality of dielectric layers 111 in the thickness direction (T-axis direction) and then firing the laminated layers, and includes first internal electrodes 121 and second internal electrodes 122 that are alternately arranged in the thickness direction (T-axis direction) with the plurality of dielectric layers 111 sandwiched between them.

[0043] At this time, the boundaries between the adjacent dielectric layers 111 of the capacitor body 110 may be integrated to such an extent that they are difficult to identify without using a scanning electron microscope (SEM).

[0044] The capacitor body 110 may also include an active area and a cover area 112 , 113 .

[0045] The active region is a portion that contributes to forming the capacitance of the multilayer capacitor 100. As an example, the active region may be an overlapping region of the first internal electrode 121 or the second internal electrode 122 that are stacked along the thickness direction (T-axis direction).

[0046] The cover regions 112 and 113 are thickness direction margins and can be arranged on the first and second surface sides of the active region in the thickness direction (T axis direction), respectively. Such cover regions 112 and 113 can be a single dielectric layer 111 or two or more dielectric layers 111 stacked on the upper and lower surfaces of the active region, respectively.

[0047] In addition, the capacitor body 110 may further include side cover regions. The side cover regions are widthwise margins and may be disposed on the fifth and sixth sides of the active region in the widthwise direction (W-axis direction). These side cover regions may be formed by applying a conductive paste layer for forming internal electrodes to only a portion of the surface of the dielectric green sheet when applying the conductive paste layer to the surface of the dielectric green sheet, and then stacking dielectric green sheets without the conductive paste layer on both sides of the surface of the dielectric green sheet, followed by firing.

[0048] The cover areas 112 and 113 and the side cover areas serve to prevent damage to the first internal electrode 121 and the second internal electrode 122 due to physical or chemical stress.

[0049] The dielectric crystal grains according to the present invention will be described in more detail below.

[0050] The dielectric layer 111 according to the present invention includes a plurality of dielectric crystal grains 1111 .

[0051] FIG. 4 is a conceptual diagram of a dielectric crystal grain according to the present invention.

[0052] Referring to FIG. 4, the dielectric crystal grain according to the present invention includes a core containing BaTiO3, a first shell disposed on the core and containing BaTiO3 doped with a first doping element, and a second shell disposed on the first shell and containing a first coating element.

[0053] That is, the dielectric crystal grains according to the present invention have a sequentially layered structure including a core, a first shell, and a second shell having different compositions, which allows the size of the dielectric crystal grains to be reduced, making it possible to thin the dielectric layer, while also improving the temperature stability and dielectric constant of the dielectric layer.

[0054] More specifically, the core contains BaTiO3 as a major component.

[0055] Additionally, the first shell contains BaTiO3 doped with a first doping element, which may be Sr, Ca, Bi, K, Na, or a combination thereof.

[0056] The second shell also contains a first coating element that is Nb, Ta, or a combination thereof.

[0057] At this time, the different compositional aspects of the core, the first shell, and the second shell can be confirmed through transmission electron microscope-energy dispersive X-ray analysis (TEM-EDX).

[0058] Specifically, when a line analysis is performed on the dielectric crystal grains using a transmission electron microscope-energy dispersive X-ray analyzer (TEM-EDX), the maximum peak of the first doping element concentration may appear in the first shell region. Also, the maximum peak of the first coating element concentration may appear in the second shell region. That is, the first doping element may have the highest concentration in the first shell region among the entire core-first shell-second shell region. Also, the second doping element may have the highest concentration in the second shell region among the entire core-first shell-second shell region.

[0059] Furthermore, when the dielectric crystal grains are subjected to line analysis using a transmission electron microscope-energy dispersive X-ray analyzer (TEM-EDX), the minimum value of the first doping element concentration may appear in the core region, i.e., the first doping element may have the lowest concentration in the core region among the entire core-first shell-second shell region.

[0060] When the dielectric crystal grains are subjected to line analysis using a transmission electron microscope-energy dispersive X-ray analyzer (TEM-EDX), the minimum concentration of the first coating element may appear in the core region, i.e., the first coating element may have the lowest concentration in the core region among the entire core-first shell-second shell region.

[0061] As described above, the first doping element and the first coating element exhibit a clear concentration gradient from the core to the first shell and the second shell, and thus the aforementioned effect of improving the performance of the stacked capacitor can be more effectively achieved.

[0062] On the other hand, such a clear concentration gradient can be achieved by first doping BaTiO3 with the first doping element, and then producing nanosheets containing the first coating element and coating them, as described below. This will be explained in more detail in the manufacturing method described below.

[0063] The content of the first doping element in the dielectric crystal grains may be 4 mol% to 21 mol% based on the total mole number of Ti in the dielectric crystal grains, more specifically, 4.5 mol% to 20.5 mol%. If the content of the first doping element is too low, T c There is a possibility that the room temperature transfer characteristics (Curie temperature) are not sufficiently exhibited. If the content of the first doping element is too high, the paraelectric characteristics are more strongly exhibited, which may result in a decrease in the dielectric constant.

[0064] The content of the first coating element in the dielectric crystal grains may be 1 mol% to 5 mol% based on the total moles of Ti in the dielectric crystal grains, more specifically, 1.3 mol% to 4.7 mol%. If the content of the first coating element is too low, there is a risk that the temperature stability effect will not be exhibited. If the content of the first coating element is too high, there is a risk that the dielectric constant will decrease due to an increase in the shell fraction in the crystal grains during sintering.

[0065] Meanwhile, the first shell may further contain a second doping element, which may be Ti, Hf, Zr, Mg, Nb, Ta, or a combination thereof.

[0066] Additionally, the second shell may further contain a second coating element, which may be Sr, Ca, or a combination thereof.

[0067] In this case, the content of the second coating element in the dielectric crystal grains may be 0.8 mol% to 3.2 mol% based on the total moles of Ti in the dielectric crystal grains, more specifically, 0.9 mol% to 3.1 mol%. If the content of the second coating element is too low, there is a risk that the Tc room temperature shift characteristic is not sufficiently exhibited. If the content of the second coating element is too high, there is a risk that the paraelectric characteristic is more strongly exhibited, resulting in a decrease in the dielectric constant.

[0068] More specifically, the first shell may include a compound represented by the following Chemical Formula 1:

[0069] [Chemical formula 1] Ba (1-x) A x Ti (1-y) B y O3 In the above chemical formula 1, A is Sr, Ca, Bi, K, Na, or a combination thereof, B is Ti, Hf, Zr, Mg, Nb, Ta, or a combination thereof, and 0 <x≦0.3であり、0≦y≦0.3である。

[0070] The second shell is X2Nb3O 10 , X2Ta3O 10 , X2Nb2O7, X2Ta2O7, XBi2Nb2O9, XBi2Ta2O9, or a combination thereof, wherein X may be Sr, Ca, or a combination thereof.

[0071] The core diameter may be about 15 nm to 25 nm. If the core diameter is too small, the dielectric constant may decrease. If the core diameter is too large, the relative shell ratio may decrease, which may weaken reliability.

[0072] The thickness of the first shell may be about 30 nm to 70 nm. If the thickness of the first shell is too small, the relative shell ratio may decrease, which may result in a decrease in reliability. If the thickness of the first shell is too large, the paraelectric property may be further enhanced, which may result in a decrease in dielectric constant.

[0073] The thickness of the second shell may be about 2 nm to 5 nm. If the thickness of the second shell is too small, the effect of reducing the TCC (temperature coefficient of capacitance) curve due to the reduced content of the first coating element may not be achieved. If the thickness of the second shell is too large, the dielectric constant may decrease due to the increased content of the first coating element.

[0074] Meanwhile, the dielectric crystal grains according to the present invention can effectively reduce their average crystal grain size by forming the aforementioned core, first shell, and second shell structure, and the size may be 600 nm or less, more specifically, 500 nm, 400 nm, 300 nm, 250 nm, or 220 nm or less. In this specification, the average crystal grain size of the dielectric crystal grains can be measured by fabricating a specimen of the sintered body using a focused ion beam (FIB) and measuring it using a field emission transmission electron microscope (FE-TEM) at a voltage of 200 keV.

[0075] As an example, the average thickness of the dielectric layer 111 may be 0.5 μm to 10 μm.

[0076] Meanwhile, the first internal electrode 121 and the second internal electrode 122 are electrodes having different polarities and are alternately arranged facing each other along the T-axis direction with the dielectric layer 111 sandwiched therebetween, and one end is exposed through the third and fourth surfaces of the capacitor body 110, respectively.

[0077] The first internal electrode 121 and the second internal electrode 122 can be electrically insulated from each other by the dielectric layer 111 disposed therebetween.

[0078] The ends of the first internal electrode 121 and the second internal electrode 122 alternately exposed through the third and fourth surfaces of the capacitor body 110 may be electrically connected to the first external electrode 131 and the second external electrode 132, respectively.

[0079] The first internal electrode 121 and the second internal electrode 122 include a conductive metal, and may include, for example, a metal such as Ni, Cu, Ag, Pd, or Au, or an alloy thereof, such as an Ag—Pd alloy.

[0080] The first internal electrode 121 and the second internal electrode 122 may also contain dielectric particles of the same composition as the ceramic material contained in the dielectric layer 111 .

[0081] The first internal electrode 121 and the second internal electrode 122 can be formed using a conductive paste containing a conductive metal. The conductive paste can be printed by screen printing, gravure printing, or the like.

[0082] For example, the average thickness of the first internal electrode 121 and the second internal electrode 122 may be 0.1 μm to 2 μm.

[0083] The first external electrode 131 and the second external electrode 132 are supplied with voltages of different polarities and are electrically connected to the exposed portions of the first internal electrode 121 and the second internal electrode 122, respectively.

[0084] With the above configuration, when a predetermined voltage is applied to the first external electrode 131 and the second external electrode 132, charge is accumulated between the opposing first internal electrode 121 and second internal electrode 122. At this time, the capacitance of the multilayer capacitor 100 is proportional to the overlapping area of ​​the first internal electrode 121 and the second internal electrode 122 that overlap each other along the T-axis direction in the active region.

[0085] The first external electrode 131 and the second external electrode 132 may each include a first connection portion and a second connection portion that are arranged on the third and fourth surfaces of the capacitor body 110, respectively, and are connected to the first internal electrode 121 and the second internal electrode 122, and a first band portion and a second band portion that are arranged at the corners where the third and fourth surfaces of the capacitor body 110 meet the first and second surfaces or the fifth and sixth surfaces.

[0086] The first and second band portions extend from the first and second connection portions to parts of the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110. The first and second band portions can improve the bonding strength of the first and second external electrodes 131 and 132.

[0087] As an example, the first external electrode 131 and the second external electrode 132 may each include a sintered metal layer in contact with the capacitor body 110, a conductive resin layer arranged to cover the sintered metal layer, and a plating layer arranged to cover the conductive resin layer.

[0088] The sintered metal layer can include a conductive metal and glass.

[0089] For example, the sintered metal layer may contain copper (Cu), nickel (Ni), silver (Ag), palladium (Pd), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), lead (Pb), alloys thereof, or combinations thereof as the conductive metal. For example, copper (Cu) may contain a copper (Cu) alloy. When the conductive metal contains copper, metals other than copper may be contained in an amount of 5 molar parts or less per 100 molar parts of copper.

[0090] For example, the sintered metal layer may include a glassy oxide mixture, such as silicon oxide, boron oxide, aluminum oxide, transition metal oxide, alkali metal oxide, and alkaline earth metal oxide. The transition metal may be zinc (Zn), titanium (Ti), copper (Cu), vanadium (V), manganese (Mn), iron (Fe), and nickel (Ni), the alkali metal may be lithium (Li), sodium (Na), and potassium (K), and the alkaline earth metal may be magnesium (Mg), calcium (Ca), strontium (Sr), and barium (Ba).

[0091] The content of conductive metal and glass in the sintered metal layer is not particularly limited, but for example, the average area of ​​the conductive metal in a cross section (L-axis direction and T-axis direction cross section) perpendicular to the thickness direction (W-axis direction) of the multilayer capacitor 100 may be 30% to 90%, or 70% to 90% of the total area of ​​the sintered metal layer.

[0092] Alternatively, the conductive resin layer may be formed on the sintered metal layer, for example, to completely cover the sintered metal layer. Alternatively, the first external electrode 131 and the second external electrode 132 may not include a sintered metal layer, in which case the conductive resin layer may be in direct contact with the capacitor body 110.

[0093] The conductive resin layer extends to the first and second sides or the fifth and sixth sides of the capacitor body 110, and the length of the region (i.e., band portion) where the conductive resin layer is disposed extending to the first and second sides or the fifth and sixth sides of the capacitor body 110 may be longer than the length of the region (i.e., band portion) where the sintered metal layer is disposed extending to the first and second sides or the fifth and sixth sides of the capacitor body 110. That is, the conductive resin layer may be formed on the sintered metal layer to completely cover the sintered metal layer.

[0094] The conductive resin layer includes a resin and a conductive metal.

[0095] The resin contained in the conductive resin layer is not particularly limited as long as it has bonding and impact absorption properties and can be mixed with the conductive metal powder to form a paste, and may include, for example, phenolic resin, acrylic resin, silicone resin, epoxy resin, or polyimide resin.

[0096] The conductive metal contained in the conductive resin layer serves to electrically connect the first internal electrode 121 and the second internal electrode 122 or the sintered metal layer.

[0097] The conductive metal contained in the conductive resin layer may have a spherical shape, a flake shape, or a combination thereof. That is, the conductive metal may be in the form of only flakes, only spheres, or a mixture of flakes and spheres.

[0098] Here, the spherical shape may include shapes that are not perfectly spherical, for example, shapes in which the ratio of the major axis to the minor axis (major axis / minor axis) is 1.45 or less. The flake-shaped powder means a powder having a flat and elongated shape, and is not particularly limited, but may, for example, have a ratio of the major axis to the minor axis (major axis / minor axis) of 1.95 or more.

[0099] The first external electrode 131 and the second external electrode 132 may further include a plating layer disposed on the outside of the conductive resin layer.

[0100] The plating layer may include nickel (Ni), copper (Cu), tin (Sn), palladium (Pd), platinum (Pt), gold (Au), silver (Ag), tungsten (W), titanium (Ti), or lead (Pb), either alone or in alloys thereof. For example, the plating layer may be a nickel (Ni) plating layer or a tin (Sn) plating layer, or may be a nickel (Ni) plating layer and a tin (Sn) plating layer stacked sequentially, or a tin (Sn) plating layer, a nickel (Ni) plating layer, and a tin (Sn) plating layer stacked sequentially. The plating layer may also include multiple nickel (Ni) plating layers and / or multiple tin (Sn) plating layers.

[0101] The plating layer can improve the mountability of the multilayer capacitor 100 to a substrate, structural reliability, durability against external influences, heat resistance, and equivalent series resistance (ESR).

[0102] A method for manufacturing a multilayer capacitor according to another embodiment of the present invention will now be described.

[0103] Another embodiment of the present invention provides a method for manufacturing a multilayer capacitor, the method comprising: preparing a dielectric powder; preparing a dielectric green sheet using the dielectric powder and forming a conductive paste layer on a surface of the dielectric green sheet; stacking the dielectric green sheets on which the conductive paste layer is formed to manufacture a dielectric green sheet laminate; firing the dielectric green sheet laminate to manufacture a capacitor body including a dielectric layer and an internal electrode; and forming an external electrode on one surface of the capacitor body, wherein the dielectric layer includes a plurality of dielectric crystal grains, the dielectric crystal grains including a core containing BaTiO3, a first shell disposed on the core and containing BaTiO3 doped with a first doping element which is Sr, Ca, Bi, K, Na, or a combination thereof, and a second shell disposed on the first shell and containing a first coating element which is Nb, Ta, or a combination thereof.

[0104] Hereinafter, the method for manufacturing a multilayer capacitor according to the present invention will be described in detail step by step.

[0105] First, a dielectric powder is produced.

[0106] Fig. 5 is a schematic diagram showing a method for producing a dielectric powder according to the present invention. However, Fig. 5 merely shows one example of the dielectric powder according to the present invention, and it goes without saying that the scope of the present invention is not limited to the production method shown in Fig. 5.

[0107] Referring to FIG. 5, the step of preparing the dielectric powder includes the steps of mixing BaTiO3, a first doping source material, and a solvent to form a mixture; heat-treating the mixture, washing with water, and drying to form BaTiO3 doped with a first doping element; forming nanosheets containing a first coating element; and pulverizing and mixing the BaTiO3 doped with the first doping element and the nanosheets to form dielectric crystal grains.

[0108] First, BaTiO3, a first doping source material, and a solvent are mixed to form a mixture.

[0109] The BaTiO3 is not particularly limited as long as its average particle size (D50) is 5 to 15 nm. If the average particle size (D50) of BaTiO3 is too small, the core size of the final dielectric powder may become small, which may result in a decrease in the dielectric constant. If the average particle size (D50) of BaTiO3 is too large, the average particle size of the finished dielectric particles may increase or coarse powder may be generated.

[0110] Meanwhile, in this specification, the average particle size (D50) can be defined as the particle size corresponding to 50% of the cumulative volume in the particle size distribution curve of the particles. The average particle size (D50) can be measured, for example, using a laser diffraction method. The laser diffraction method generally can measure particle sizes from the submicron range to several mm, and can obtain results with high reproducibility and high resolution.

[0111] The first doping source material may be a Sr source material, a Ca source material, a Bi source material, a K source material, a Na source material, or a combination thereof.

[0112] The Sr source material may be, for example, Sr(NO3)2, SrCO3, or a combination thereof.

[0113] The Ca source material may be, for example, Ca(NO3)2, CaCO3, or a combination thereof.

[0114] The Bi source material may be, for example, Bi(NO3)3·5H2O, Bi5O(OH)9(NO3)4, or a combination thereof.

[0115] The K source material may be, for example, K2CO3, KOH, KNO3, or a combination thereof.

[0116] The Na source material may be, for example, NaNO3, Na2CO3, NaOH, or a combination thereof.

[0117] The solvent may be water, ethanol, toluene, or a combination thereof.

[0118] Then, the mixture is heat-treated, washed with water and dried to form BaTiO3 doped with the first doping element.

[0119] The heat treatment can be carried out at a temperature of 200°C to 300°C, more specifically, at a temperature of 220°C to 300°C. If the heat treatment temperature is too low, the target particle size may not be achieved or the crystallinity may decrease. If the heat treatment temperature is too high, defects within the particles may increase or the particles may grow excessively.

[0120] The heat treatment can be carried out at a pressure of 40 bar to 50 bar. If the pressure during the heat treatment is too low, the crystallinity of the particles may be reduced. If the pressure during the heat treatment is too high, the reaction concentration may be low, resulting in a decrease in particle uniformity.

[0121] The heat treatment can be performed for 30 minutes to 72 hours. When the heat treatment time is within this range, the size of BaTiO3 doped with the first doping element can be obtained within an appropriate range.

[0122] The resulting BaTiO3 doped with the first doping element may have an average particle size (D50) of 90 nm to 120 nm.

[0123] Next, a nanosheet containing the first coating element is formed.

[0124] More specifically, the step of forming the nanosheet may include the steps of mixing a first coating raw material and K2CO3, followed by calcining to form a first intermediate material having a multilayer structure, treating the first intermediate material with an acid to form a second intermediate material having a multilayer structure containing hydrogen, and adding the second intermediate material to a basic solvent and then exfoliating it through stirring and ultrasonic treatment to form a single-layer nanosheet from which hydrogen has been removed.

[0125] First, the first coating raw material and K2CO3 are mixed and then fired to form a first intermediate material having a multi-layer structure.

[0126] The first coating source material may be a Nb source material, a Ta source material, or a combination thereof.

[0127] The Nb source material may be, for example, Nb2O5, Ammonium niobate(V) oxalate hydrate, or a combination thereof.

[0128] The Ta source material may be, for example, Ta2O5.

[0129] At this time, a second coating source material may be further mixed, and the second coating source material may be a Sr source material, a Ca source material, or a combination thereof.

[0130] The Sr source material may be, for example, SrCO3, Sr(NO3)2, or a combination thereof.

[0131] The Ca source material may be, for example, CaCO3, Ca(NO3)2, or a combination thereof.

[0132] The calcination can be carried out at a temperature of 700°C to 1300°C, more specifically, at a temperature of 900°C to 1100°C. If the calcination temperature is too low, unreacted materials may remain, which may result in the formation of secondary phases or a decrease in yield. If the calcination temperature is too high, the volatilization of the K component may be accelerated, which may result in an inconsistency in the equivalent weight of the finished product, which may result in defects.

[0133] The calcination can be carried out for 3 to 9 hours, more specifically, for 5 to 7 hours. If the calcination time is too short, problems such as low conversion rate of raw materials or formation of secondary phases may occur. If the calcination time is too long, the size of the product may become too large, resulting in problems such as reduced efficiency of the peeling or wrapping process.

[0134] The first intermediate material is then acid-treated to form a multi-layered hydrogen-containing second intermediate material.

[0135] The acid treatment can be carried out by putting the first intermediate substance into an acidic solution and stirring the solution.

[0136] In this case, the acidic solution may be, for example, an aqueous solution of nitric acid, an aqueous solution of hydrochloric acid, or an aqueous solution of sulfuric acid.

[0137] The concentration of the acidic solution may be 4M to 7M.

[0138] The stirring can be carried out for 48 to 96 hours, more specifically, for 60 to 84 hours.

[0139] Next, the second intermediate material is put into a basic solvent and then exfoliated through stirring and ultrasonic treatment to form a nanosheet having a single layer structure from which hydrogen has been removed.

[0140] This allows the formation of the final product, a nanosheet with a single layer structure.

[0141] The basic solvent may be tetrabutylammonium hydroxide (TBAOH), tetramethylammonium hydroxide (TMAOH), or a combination thereof.

[0142] The ultrasonic treatment can be carried out, for example, in an ultrasonic homogenizer process.

[0143] The thickness of the nanosheet thus formed may be 3.5 nm or less, more specifically 3.2 nm. If the nanosheet is too thick, wrapping may not occur smoothly, which may result in reduced coating efficiency and variations in the content of the coating raw material in the final product.

[0144] Next, the BaTiO3 doped with the first doping element and the nanosheets are pulverized and mixed to form dielectric crystal grains.

[0145] As a result, the first coating element (or the first coating element and the second coating element) in the nanosheet is wrapped (coated) on the BaTiO3 surface doped with the first doping element.

[0146] The grinding and mixing can be performed by a wet grinding and mixing method, which has the advantage of providing better physical contact between the raw materials and higher mixing and wrapping (coating) efficiency than a dry grinding and mixing method.

[0147] The wet grinding and mixing can be carried out by a method commonly used in the art, for example, a wet grinding process using a bead mill.

[0148] For example, when carrying out the lapping process using a bead mill, the ratio of the doping element in the BaTiO3 particles doped with the first doping element and the ratio of the first coating element in the nanosheet are designed to match the target values. Water, ethanol, etc. can be used as the solvent, and after milling for about 10 to 40 hours at a stirring speed of 100 to 150 rpm, the inner slurry is dried to finally obtain dielectric crystal grains.

[0149] This ultimately results in the dielectric crystal grains according to the present invention.

[0150] Next, the fabrication of the capacitor body will be described.

[0151] In the manufacturing process of the capacitor body, a dielectric paste that will become a dielectric layer after firing and a conductive paste that will become an internal electrode after firing are prepared.

[0152] The dielectric paste is manufactured, for example, by the following method. The manufactured hafnium (Hf)-doped dielectric powder is uniformly mixed by means of wet mixing or the like, dried, and then heat-treated under predetermined conditions to obtain a calcined powder. An organic vehicle or an aqueous vehicle is added to the calcined powder and kneaded to prepare the dielectric paste.

[0153] The obtained dielectric paste is formed into a sheet by a technique such as a doctor blade method to obtain a dielectric green sheet. The dielectric paste may also contain additives selected from various dispersants, plasticizers, dielectrics, subcomponent compounds, glass, etc., as needed.

[0154] The conductive paste for the internal electrodes is prepared by kneading conductive powder made of a conductive metal or its alloy with a binder and a solvent. The conductive paste for the internal electrodes may contain ceramic powder (e.g., barium titanate powder) as a co-material, if necessary. The co-material can suppress sintering of the conductive powder during the firing process.

[0155] A conductive paste for internal electrodes is applied in a predetermined pattern to the surface of a dielectric green sheet by various printing methods such as screen printing or transfer methods. Then, multiple layers of the dielectric green sheets on which the internal electrode patterns have been formed are stacked, and then pressed in the stacking direction to obtain a dielectric green sheet laminate. At this time, the dielectric green sheets and the internal electrode patterns can be stacked so that the dielectric green sheets are located on the upper and lower surfaces of the dielectric green sheet laminate in the stacking direction.

[0156] Optionally, the obtained dielectric green sheet laminate can be cut to a predetermined size by dicing or the like.

[0157] Furthermore, the dielectric green sheet laminate can be solidified and dried to remove plasticizers, etc., if necessary, and after solidification and drying, can be barrel polished using a horizontal centrifugal barrel polishing machine or the like. In barrel polishing, the dielectric green sheet laminate is placed in a barrel container together with media and a polishing solution, and unnecessary parts such as burrs generated during cutting can be polished away by applying rotational motion or vibration to the barrel container. Furthermore, after barrel polishing, the dielectric green sheet laminate can be washed with a cleaning liquid such as water and dried.

[0158] The dielectric green sheet laminate is subjected to binder removal and firing to obtain a capacitor body.

[0159] The conditions for the binder removal treatment can be appropriately adjusted depending on the main component composition of the dielectric layer and the main component composition of the internal electrode. For example, the temperature increase rate during the binder removal treatment may be 5°C / hour to 300°C / hour, the support temperature may be 180°C to 400°C, and the temperature maintenance time may be 0.5 hours to 24 hours. The binder removal atmosphere may be air or a reducing atmosphere.

[0160] The firing conditions can be appropriately adjusted depending on the main component composition of the dielectric layer and the main component composition of the internal electrodes. For example, the firing temperature may be 1200°C to 1350°C, or 1220°C to 1300°C, and the firing time may be 0.5 to 8 hours, or 1 to 3 hours. The firing atmosphere may be a reducing atmosphere, for example, an atmosphere of a humidified mixed gas of nitrogen gas (N2) and hydrogen gas (H2). When the internal electrodes contain nickel (Ni) or a nickel (Ni) alloy, the oxygen partial pressure in the firing atmosphere is 1.0 x 10 -14 MPa~1.0×10 -10 It may be MPa.

[0161] After the firing treatment, annealing can be carried out if necessary. Annealing is a treatment for reoxidizing the dielectric layer, and can be carried out when the firing treatment is carried out in a reducing atmosphere. The conditions of the annealing treatment can also be appropriately adjusted depending on the main component composition of the dielectric layer. For example, the annealing temperature can be 950°C to 1150°C, the time can be 0 hours to 20 hours, and the temperature increase rate can be 50°C / hour to 500°C / hour. The annealing atmosphere can be a humidified nitrogen gas (N2) atmosphere, and the oxygen partial pressure can be 1.0 x 10 -9 MPa~1.0×10 -5 It may be MPa.

[0162] In the binder removal treatment, firing treatment, or annealing treatment, a wetter or the like can be used to humidify nitrogen gas or mixed gas, and in this case, the water temperature may be 5° C. to 75° C. The binder removal treatment, firing treatment, and annealing treatment can be performed consecutively or independently.

[0163] Optionally, the third and fourth surfaces of the obtained capacitor body may be subjected to surface treatment such as sandblasting, laser irradiation, or barrel polishing. By performing such surface treatment, the ends of the first and second internal electrodes are exposed on the outermost surfaces of the third and fourth surfaces, which improves the electrical connection between the first and second external electrodes and the first and second internal electrodes, making it easier to form alloy parts.

[0164] A paste for forming a sintered metal layer can be applied to the outer surface of the obtained capacitor body as an external electrode, and then sintered to form a sintered metal layer.

[0165] The paste for forming the sintered metal layer may contain a conductive metal and glass. The description of the conductive metal and glass is the same as that described above, so a repeated description will be omitted. The paste for forming the sintered metal layer may optionally contain a binder, a solvent, a dispersant, a plasticizer, or an oxide powder. For example, the binder may be ethyl cellulose, acrylic, or butyral, and the solvent may be an organic solvent such as terpineol, butyl carbitol, alcohol, methyl ethyl ketone, acetone, or toluene, or an aqueous solvent.

[0166] The paste for forming a sintered metal layer can be applied to the outer surface of the capacitor body by a dipping method, various printing methods such as screen printing, application methods using a dispenser, or spraying using a spray. The paste for forming a sintered metal layer is applied to at least the third and fourth surfaces of the capacitor body, and can also be selectively applied to parts of the first, second, fifth, or sixth surfaces on which the band portions of the first and second external electrodes are formed.

[0167] Thereafter, the capacitor body 110 to which the paste for forming a sintered metal layer has been applied is dried and sintered at a temperature of 700° C. to 1000° C. for 0.1 to 3 hours to form a sintered metal layer.

[0168] Alternatively, a conductive resin layer can be formed by applying a paste for forming a conductive resin layer to the outer surface of the obtained capacitor body and then curing the paste.

[0169] The paste for forming the conductive resin layer may include a resin and, optionally, a conductive metal or a non-conductive filler. The conductive metal and resin are the same as those described above, so repeated description will be omitted. The paste for forming the conductive resin layer may also include, optionally, a binder, a solvent, a dispersant, a plasticizer, or an oxide powder. For example, the binder may be ethyl cellulose, acrylic, or butyral, and the solvent may be an organic solvent such as terpineol, butyl carbitol, alcohol, methyl ethyl ketone, acetone, or toluene, or an aqueous solvent.

[0170] For example, the conductive resin layer may be formed by dipping the capacitor body 110 in a paste for forming the conductive resin layer and then curing it, or by printing the paste for forming the conductive resin layer on the surface of the capacitor body 110 using a screen printing method or a gravure printing method, or by applying the paste for forming the conductive resin layer on the surface of the capacitor body 110 and then curing it.

[0171] Next, a plating layer is formed on the outside of the conductive resin layer.

[0172] For example, the plating layer may be formed by a plating method, such as sputtering or electroplating.

[0173] Hereinafter, the present invention will be described in more detail with reference to examples, but the following examples are merely preferred examples of the present invention and the present invention is not limited to these examples. [Example]

[0174] [Example 1] (1) Dielectric crystal grain manufacturing (Production of Sr-doped BaTiO3) First, fine BaTiO3 particles with an average particle size (D50) of approximately 10 nm and the target amount of Sr(NO3)2 were placed in a closed batch reactor, followed by adding pure water to form a mixture. The mixture was then heat-treated at 260°C and 46 bar for 6 hours to produce Sr-doped BaTiO3 with an average particle size (D50) of approximately 75±5 nm. The content of the doped Sr (first doping element) was 5 mol% based on the total moles of Ti.

[0175] (nanosheet manufacturing) First, K2CO3, Nb2O5 as the first coating raw material, and SrCO3 as the second coating raw material were weighed out according to chemical equivalents and fired at 1000°C for 6 hours to obtain KSr2Nb3O, the first intermediate material with a multilayer structure. 10 Then, the first intermediate material was added to a 6M aqueous solution of nitric acid and stirred for about 72 hours, whereby K atoms were replaced with H atoms to form a second intermediate material with a multilayer structure containing H, HSR2Nb3O 10 Then, the second intermediate material was placed in a tetrabutylammonium hydroxide (TBAOH) solvent to remove the H atom layer present between the layers and exfoliate them into a single layer. Then, ultrasonic energy was applied using an ultrasonic homogenizer to improve the stirring and exfoliation efficiency. As a result, the final product, a single-layer 2D nanosheet of Sr2Nb3O with a thickness of 2 nm to 3 nm, was obtained. 10 In this case, the content of Nb (first coating element) in the nanosheet was 3 mol% based on the total moles of Ti, and the content of Sr (second coating element) in the nanosheet was 2 mol% based on the total moles of Ti.

[0176] (Dielectric crystal grain manufacturing (nanosheet wrapping)) The Sr-doped BaTiO3 and 2D nanosheets were mixed, and then pulverized and mixed through a wet bead mill process and dried to finally produce dielectric crystal grains wrapped with nanosheets.

[0177] (2) Stacked capacitor manufacturing The dielectric crystal grains as the dielectric base material were mixed with ethanol / toluene, a dispersant, and a binder, and then mechanically milled to prepare a slurry for the dielectric.

[0178] Thereafter, the prepared dielectric slurry was used in a head-discharging on-roll forming coater to prepare a dielectric green sheet.

[0179] Then, a conductive paste layer containing nickel (Ni) was printed on the surface of the dielectric green sheet, and the dielectric green sheets (width x length x height = 3.2 mm x 2.5 mm x 2.5 mm) on which the conductive paste layer was formed were stacked and pressed to produce a dielectric green sheet laminate.

[0180] Thereafter, the dielectric green sheet laminate was calcined in a nitrogen atmosphere at 400°C or less, and then fired at a firing temperature of 1300°C or less and with a hydrogen concentration of 1.0% H2 or less to manufacture a capacitor body, and then external electrodes were formed on the outside of the capacitor body to manufacture a multilayer capacitor.

[0181] [Examples 2 to 5] Dielectric crystal grains and stacked capacitors were manufactured in the same manner as in Example 1, except that in the Sr-doped BaTiO3 manufacturing step, the content of doped Sr (first doping element) was changed as shown in Table 1 below, and in the nanosheet manufacturing step, the content of Nb (first coating element) in the nanosheet and the content of Sr (second coating element) in the nanosheet were changed as shown in Table 1 below.

[0182] [Example 6] (1) Dielectric crystal grain manufacturing (Production of Sr-doped BaTiO3) First, fine BaTiO3 particles with an average particle size (D50) of approximately 10 nm and the target amount of Sr(NO3)2 were placed in a closed batch reactor, followed by adding pure water to form a mixture. The mixture was then heat-treated at 260°C and 46 bar for 6 hours to produce Sr-doped BaTiO3 with an average particle size (D50) of approximately 75±5 nm. The content of the doped Sr (first doping element) was 5 mol% based on the total moles of Ti.

[0183] (nanosheet manufacturing) First, K2CO3, Nb2O5 as the first coating raw material, and CaCO3 as the second coating raw material were weighed out according to chemical equivalents and fired at 1000°C for 6 hours to obtain the first intermediate material of multilayer structure, KCa2Nb3O 10 Then, the first intermediate material was added to a 6M aqueous solution of nitric acid and stirred for about 72 hours, whereby K atoms were replaced with H atoms to form a second intermediate material with a multilayer structure containing H, HCa2Nb3O 10 The second intermediate material was then placed in a tetrabutylammonium hydroxide (TBAOH) solvent to remove the interlayer hydrogen atoms and exfoliate it into a single layer. Ultrasonic energy was then applied using an ultrasonic homogenizer to increase the stirring and exfoliation efficiency. This resulted in the final product, a single-layer 2D nanosheet of Ca2Nb3O with a thickness of 2-3 nm. 10 At this time, the content of Nb (first coating element) in the nanosheet was 3 mol% based on the total moles of Ti, and the content of Ca (second coating element) in the nanosheet was 2 mol% based on the total moles of Ti.

[0184] (Dielectric crystal grain manufacturing) The Sr-doped BaTiO3 and 2D nanosheets were mixed, and then crushed and dried using a bead mill to finally produce dielectric crystal grains wrapped with nanosheets.

[0185] (2) Stacked capacitor manufacturing The dielectric crystal grains as the dielectric base material were mixed with ethanol / toluene, a dispersant, and a binder, and then mechanically milled to prepare a slurry for the dielectric.

[0186] Thereafter, the prepared dielectric slurry was used in a head-discharging on-roll forming coater to prepare a dielectric green sheet.

[0187] Then, a conductive paste layer containing nickel (Ni) was printed on the surface of the dielectric green sheet, and the dielectric green sheets (width x length x height = 3.2 mm x 2.5 mm x 2.5 mm) on which the conductive paste layer was formed were stacked and pressed to produce a dielectric green sheet laminate.

[0188] Thereafter, the dielectric green sheet laminate was calcined in a nitrogen atmosphere at 400°C or less, and then fired at a firing temperature of 1300°C or less and with a hydrogen concentration of 1.0% H2 or less to manufacture a capacitor body, and then external electrodes were formed on the outside of the capacitor body to manufacture a multilayer capacitor.

[0189] [Examples 7 and 8] Dielectric crystal grains and stacked capacitors were manufactured in the same manner as in Example 6, except that in the Sr-doped BaTiO3 manufacturing step, the content of doped Sr (first doping element) was changed as shown in Table 1 below, and in the nanosheet manufacturing step, the content of Nb (first coating element) in the nanosheet and the content of Ca (second coating element) in the nanosheet were changed as shown in Table 1 below.

[0190] [Comparative Examples 1 to 4] In the Sr-doped BaTiO3 preparation step, the content of doped Sr (first doping element) was set as shown in Table 1 below to prepare only Sr-doped BaTiO3, and the dielectric crystal grains and stacked capacitors were prepared in the same manner as in Example 1, except that the subsequent steps of nanosheet preparation and wrapping were not performed.

[0191] Comparative Example 5 Dielectric crystal grains and stacked capacitors were manufactured in the same manner as in Example 1, except that pure BaTiO3 base material not doped with Sr was used.

[0192] Comparative Example 6 Dielectric crystal grains and stacked capacitors were manufactured in the same manner as in Example 6, except that pure BaTiO3 base material not doped with Sr was used.

[0193] Table 1 below summarizes the dielectric crystal grain compositions of the examples and comparative examples.

[0194] [Table 1]

[0195] [Experimental Example 1: Evaluation of the internal composition of dielectric crystal grains in a stacked capacitor] In order to evaluate the internal composition of the dielectric crystal grains in the stacked capacitor manufactured according to Example 4, line scan analysis and mapping analysis were performed using a transmission electron microscope-energy dispersive X-ray analyzer (TEM-EDX), and the results are shown in FIGS. 6 to 10.

[0196] Meanwhile, instead of introducing Nb through nanosheets as in the present embodiment, dielectric crystal grains were manufactured by mixing BaTiO powder with Nb and Sr raw materials, followed by heat treatment to dope them, as in the conventional method. Mapping analysis was performed using a transmission electron microscope-energy dispersive X-ray analyzer (TEM-EDX), and the results are shown in Figures 11 to 13.

[0197] 6 and 7, the first coating element Nb in the dielectric crystal grains of the example showed the lowest concentration in the core region and the highest concentration (maximum peak) in the second shell region, and the first doping element Sr in the dielectric crystal grains of the example showed the lowest concentration in the core region and the highest concentration (maximum peak) in the first shell region.

[0198] Furthermore, referring to FIGS. 8 to 10, it was confirmed that the dielectric crystal grains exhibited the concentration gradient, and thus there were blank areas in the EDX mapping images for Sr and Nb concentrations.

[0199] As a result, it was confirmed that the first coating element Nb and the first doping element Sr have a significant concentration gradient in the core-first shell-second shell region within the dielectric crystal grain, and that the dielectric crystal grains according to the present invention have clear distinctions in the composition of the first coating element or the first doping element between the core-first shell-second shell.

[0200] 11 to 13, when Sr and Nb were introduced by doping without using the nanosheet process, it was confirmed that Sr and Nb were uniformly dispersed throughout the dielectric crystal grains, and therefore, a multi-shell structure like that in the example did not appear.

[0201] [Experimental Example 2: Evaluation of dielectric temperature stability] The dielectric characteristics of the dielectric layers in the multilayer capacitors manufactured in Example 2 and Comparative Example 3 as a function of temperature were evaluated, and the results are shown in FIG.

[0202] Referring to FIG. 14, it can be seen that in Example 2, the degree of change near the peak of the dielectric constant-temperature graph was relatively gentle, and the temperature stability was excellent.

[0203] Table 2 below summarizes the results of Experimental Examples 3 and 4, which will be described later.

[0204] [Table 2]

[0205] [Experimental Example 3: Evaluation of average crystal grain size of dielectric] The sintered body was fabricated in an epoxy mold and polished to expose the internal cross section. Measurements were then performed using a field emission scanning electron microscope (FE-SEM) at 2 kV to 10 kV and 0.1 nA to 0.2 nA to evaluate the average grain size of the dielectric grains in the stacked capacitors fabricated in the examples and comparative examples. The results are shown in Table 2.

[0206] Referring to Table 2, in Examples 1 to 8, it was confirmed that the average crystal grain size was very small as a result of having a multi-shell structure by doping Sr and introducing Nb or Ca through the 2D nanosheet.

[0207] On the other hand, in the case of Comparative Examples 1 to 4 in which Nb or Ca was not introduced through the 2D nanosheets, it was confirmed that the average crystal grain size was very large, at 800 nm or more.

[0208] In addition, in Comparative Examples 5 and 6, in which Nb or Ca was introduced through the 2D nanosheet but Sr was not doped, it was confirmed that the average crystal grain size was large, at 500 nm or more.

[0209] Therefore, in this embodiment, it was confirmed that the effect of reducing the average crystal grain size is very excellent due to the application of a multi-shell structure by doping Sr and additionally introducing Nb or Ca through nanosheets.

[0210] [Experimental Example 4: Dielectric Permittivity Evaluation] The double-shell dielectrics were synthesized using the above method in the examples, and multilayer capacitors were fabricated using the same. The completed products were then heat-treated at 150°C for 1 hour and aged at room temperature for 2 hours. The TCC was then measured to evaluate the dielectric constants of the dielectrics in the multilayer capacitors fabricated in the examples and comparative examples. The results are shown in Table 2.

[0211] Referring to Table 2, when comparing Comparative Examples 1 to 4, which do not use lapping (coating), with Examples 1 to 5 and Comparative Example 5, which have the same doping composition and introduce the first coating element through lapping (coating), the room temperature dielectric constant tends to decrease, but the ε value, which can measure the change in dielectric constant with temperature, is RT ε for max It was confirmed that the rate of change was significantly reduced, which confirmed that wrapping (coating) improves the temperature stability of the dielectric constant.

[0212] Although the preferred embodiment of the present invention has been described above, the present invention is not limited thereto, and various modifications can be made within the scope of the claims, the detailed description of the invention, and the accompanying drawings, and it is to be understood that these modifications also fall within the scope of the present invention.

[0213] Therefore, the true scope of the present invention should be defined by the appended claims and their equivalents. [Explanation of symbols]

[0214] 100: Multilayer capacitor 110: Capacitor Body 111: Dielectric layer 112: Coverage area 113: Coverage area 121: 1st internal electrode 122:Second internal electrode 131: 1st external electrode 132:Second external electrode

Claims

1. a capacitor body including a dielectric layer and an internal electrode; an external electrode disposed outside the capacitor body; the dielectric layer includes a plurality of dielectric crystal grains; The dielectric crystal grains are BaTiO ３ and a BaTiO3 doped with a first doping element, which is Sr, Ca, Bi, K, Na, or a combination thereof, disposed on the core. ３ and a second shell disposed on the first shell and containing a first coating element, the first coating element being Nb, Ta, or a combination thereof.

2. 2. The stacked capacitor of claim 1, wherein, in a line analysis of the dielectric crystal grains using a transmission electron microscope-energy dispersive X-ray analysis (TEM-EDX), a maximum peak of the concentration of the first doping element appears in the first shell region, and a maximum peak of the concentration of the first coating element appears in the second shell region.

3. 2. The stacked capacitor of claim 1, wherein a minimum concentration of the first doping element appears in the core region during line analysis of the dielectric crystal grains using a transmission electron microscope-energy dispersive X-ray analysis (TEM-EDX).

4. 2. The stacked capacitor of claim 1, wherein a minimum concentration of the first coating element appears in the core region when a line analysis is performed on the dielectric crystal grains using a transmission electron microscope-energy dispersive X-ray analysis (TEM-EDX).

5. 2. The multilayer capacitor of claim 1, wherein the content of the first doping element in the dielectric crystal grains is 4 mol % to 21 mol % based on the total moles of Ti in the dielectric crystal grains.

6. 2. The multilayer capacitor of claim 1, wherein the content of the first coating element in the dielectric crystal grains is 1 mol % to 5 mol % based on the total moles of Ti in the dielectric crystal grains.

7. The stacked capacitor of claim 1 , wherein the first shell further contains a second doping element selected from the group consisting of Ti, Hf, Zr, Mg, Nb, Ta, and combinations thereof.

8. The multilayer capacitor of claim 1 , wherein the second shell further contains a second coating element selected from Sr, Ca, and a combination thereof.

9. 2. The stacked capacitor of claim 1, wherein the first shell comprises a compound represented by the following Chemical Formula 1: [Chemical formula 1] Yes （１－ｘ） A ｘ Till （１－ｙ） B ｙ Oh ３ In the above Chemical Formula 1, A is Sr, Ca, Bi, K, Na, or a combination thereof, B is Ti, Hf, Zr, Mg, Nb, Ta, or a combination thereof, and 0<x≦0.3 and 0≦y≦0.

3.

10. The second shell is X ２ Nb ３ O １０ , X ２ Ta ３ O １０ , X ２ Nb ２ O ７ , X ２ Ta ２ O ７ , XBi ２ Nb ２ O ９ , XBi ２ Ta ２ O ９ 2. The multilayer capacitor of claim 1, wherein X is Sr, Ca, or a combination thereof.

11. 2. The multilayer capacitor according to claim 1, wherein the average crystal grain size of the dielectric crystal grains is 600 nm or less.

12. producing a dielectric powder; preparing a dielectric green sheet using the dielectric powder and forming a conductive paste layer on a surface of the dielectric green sheet; laminating the dielectric green sheets on which the conductive paste layers are formed to manufacture a dielectric green sheet laminate; sintering the dielectric green sheet laminate to form a capacitor body including dielectric layers and internal electrodes; forming an external electrode on one surface of the capacitor body; the dielectric layer includes a plurality of dielectric crystal grains; The dielectric crystal grains are BaTiO ３ and a BaTiO doped with a first doping element, which is Sr, Ca, Bi, K, Na, or a combination thereof, disposed on the core. ３ and a second shell disposed on the first shell and containing a first coating element, the first coating element being Nb, Ta, or a combination thereof.

13. The step of preparing the dielectric powder comprises: BaTiO ３ mixing a first doping source material and a solvent to form a mixture; The mixture was heat-treated, washed with water, and dried to obtain BaTiO doped with the first doping element. ３ and forming forming a nanosheet containing a first coating element; BaTiO doped with the first doping element ３ and grinding and mixing the nanosheets to form the dielectric crystal grains; 13. The method of claim 12, wherein the first doping source material is a Sr source material, a Ca source material, a Bi source material, a K source material, a Na source material, or a combination thereof.

14. The step of forming the nanosheet comprises: The first coating raw material and K ２ CO ３ and then firing the mixture to form a multi-layered first intermediate material; treating the first intermediate material with an acid to form a multi-layered hydrogen-containing second intermediate material; and adding the hydrogen-containing second intermediate material to a basic solvent and then exfoliating the material through stirring and ultrasonic treatment to form the nanosheet having a single layer structure from which hydrogen has been removed; 14. The method of claim 13, wherein the first coating source material is a Nb source material, a Ta source material, or a combination thereof.

15. The method for manufacturing a multilayer capacitor according to claim 14, wherein the basic solvent is tetrabutylammonium hydroxide (TBAOH), tetramethylammonium hydroxide (TMAOH), or a combination thereof.

16. The method for manufacturing a multilayer capacitor according to claim 13 , wherein the pulverization and mixing is performed by wet pulverization and mixing.

17. The method for manufacturing a multilayer capacitor according to claim 13, wherein the nanosheet has a thickness of 3.5 nm or less.

18. In the step of forming the first intermediate material, The method for manufacturing a multilayer capacitor according to claim 14, wherein the firing is performed at a temperature of 700°C or higher and 1300°C or lower.

19. In the step of forming the first intermediate material, 15. The method of claim 14, wherein a second coating source material is further mixed during the mixing, and the second coating source material is a Sr source material, a Ca source material, or a combination thereof.

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