Semiconductor device

Abstract

To provide a semiconductor device which can be highly integrated.SOLUTION: The transistor 100 includes a semiconductor layer 108, a first insulating layer 110, a second insulating layer 107, a third insulating layer 116, and a first conductive layer 111. The third insulating layer is located over the semiconductor layer and has an opening 112, the first conductive layer is located over the semiconductor layer, the first insulating layer is located between the first conductive layer and the semiconductor layer, and the second insulating layer is provided in a position in contact with a side surface of the first opening, the semiconductor layer, and the first insulating layer. A first region 108i overlapping with the first insulating layer, a pair of second regions 108n1 sandwiching the first region and overlapping with the second insulating layer, and a pair of third regions 108n2 sandwiching the first region and the pair of second regions and overlapping with neither the first insulating layer nor the second insulating layer; The width of the first region is smaller than that of the opening 112 and the thickness of the semiconductor layer in the first region is smaller than that in the second region, and the thickness of the semiconductor layer in the second region is smaller than that in the third region.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] One embodiment of the present invention relates to a semiconductor device and a manufacturing method thereof. The present invention relates to a semiconductor device having a compound semiconductor film and a method for manufacturing the same.

[0002] Note that one embodiment of the present invention is not limited to the above technical fields. The technical field of one embodiment of the present invention is a semiconductor device, a display device, a light-emitting device, a power storage device, a memory device, and the like. , electronic device, lighting device, input device, input / output device, driving method thereof, or manufacturing method thereof The law can be cited as an example.

[0003] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. This refers to devices in general. Transistors, semiconductor circuits, arithmetic units, memory devices, etc. are types of semiconductor devices. In addition, it is also used in imaging devices, electro-optical devices, power generation devices (thin film solar cells, organic thin film solar cells) and the like), and electronic devices may include semiconductor devices. [Background technology]

[0004] In recent years, the development of semiconductor devices has progressed, and LSIs, CPUs, and memories are mainly used. A CPU is a semiconductor integrated circuit (at least transistors and It is an assembly of semiconductor elements having a memory and electrodes that serve as connection terminals.

[0005] Semiconductor circuits (IC chips) such as LSI, CPU, and memory are mounted on circuit boards, e.g. It is mounted on a printed wiring board and used as one of the components of various electronic devices. The display device with this technology is expected to reduce the number of components by incorporating peripheral circuits such as driver circuits. It is being defeated.

[0006] Therefore, a transistor is constructed using a semiconductor thin film formed on a substrate having an insulating surface. The transistor is used in integrated circuits (ICs) and image display devices (simply It is widely used in electronic devices such as transistors. Silicon-based semiconductor materials are widely known as applicable semiconductor thin films, but other materials are also Oxide semiconductors have been attracting attention as such materials.

[0007] In addition, transistors using oxide semiconductors (Oxide Semiconductor An OS transistor (hereinafter referred to as an OS transistor) has a very low leakage current when it is off. For example, the leakage current of a transistor using an oxide semiconductor is known to be small. A low-power CPU that utilizes the low current characteristics has been disclosed (see Patent Document 1). Light. ).

[0008] In addition, a transistor with a self-aligned structure has been proposed as an OS transistor. As a transistor with this self-aligned structure, metal is formed on the source region and the drain region. By forming a metal film and performing a heat treatment on the metal film, the resistance of the metal film is increased. A method for reducing the resistance of the source and drain regions has been disclosed (see Patent Document 2). ).

[0009] In recent years, with the miniaturization and weight reduction of electronic devices, transistors and other components have been integrated at high density. There is also a growing demand for improved productivity of semiconductor devices, including integrated circuits. It is being considered. [Prior art documents] [Patent documents]

[0010] [Patent Document 1] Japanese Patent Application Laid-Open No. 2012-257187 [Patent Document 2] Japanese Patent Application Laid-Open No. 2011-228622 Summary of the Invention [Problem to be solved by the invention]

[0011] In Patent Document 2, when the resistance of the source region and the drain region is reduced, A metal film is formed on the source and drain regions, and the metal film is subjected to a heat treatment in an oxygen atmosphere. By performing the heat treatment, the source and drain regions of the oxide semiconductor film are filled with gold. The constituent elements of the metal film act as dopants to lower the resistance. By performing heat treatment under low temperature, the conductive film is oxidized and the resistance of the conductive film is increased. Since the heat treatment is performed in an oxygen atmosphere, the metal film extracts oxygen from the oxide semiconductor film. It has low efficacy.

[0012] Furthermore, Patent Document 2 describes the oxygen concentration in the channel formation region. However, there is no mention of the concentration of impurities such as water and hydrogen. The synthesis region is highly purified (reducing impurities such as water and hydrogen, typically by dehydration and dehydrogenation). Therefore, there was a problem that the transistor was likely to have normally-on characteristics. Normally-on transistor characteristics mean that the channel does not change even when no voltage is applied to the gate. Normally-off is a state in which a current flows through a transistor. The transistor characteristic is that when no voltage is applied to the gate, no current flows through the transistor. It is in a state where it cannot be done.

[0013] In view of the above-mentioned problems, one aspect of the present invention is to provide a transistor having a source region and a drain region formed by a semiconductor device. It stably reduces resistance and highly purifies the channel formation region, resulting in good electrical conductivity. It is an object of the present invention to provide a semiconductor device having such characteristics.

[0014] Another object of one embodiment of the present invention is to provide a semiconductor device that can be miniaturized or highly integrated. One embodiment of the present invention is to provide a semiconductor device having favorable electrical characteristics. An object of one embodiment of the present invention is to provide a semiconductor device with high productivity. One embodiment of the present invention is a semiconductor device or a display device using a flexible substrate. One of our goals is to provide the following.

[0015] The description of these problems does not preclude the existence of other problems. It is not necessary to solve all of these problems. It can be extracted from descriptions such as specifications, drawings, and claims. [Means for solving the problem]

[0016] A semiconductor device according to one embodiment of the present invention includes a semiconductor layer, a first insulating layer, a second insulating layer, and a third insulating layer. The third insulating layer is located on the semiconductor layer and the first conductive layer. The third insulating layer has a first opening on the semiconductor layer. The first conductive layer is positioned on the semiconductor layer. The first insulating layer is located between the first conductive layer and the semiconductor layer, and the second insulating layer is located between the first conductive layer and the semiconductor layer. The semiconductor layer is provided at a position where it contacts the side surface of the opening of the semiconductor layer, the semiconductor layer, and the first insulating layer. The layer has a first portion overlapping the first insulating layer and a second portion sandwiching the first portion and overlapping the second insulating layer. a pair of second portions sandwiching the first portion and the pair of second portions, and a first insulating layer and and a pair of third portions that do not overlap any of the second insulating layers. The first portion has a width smaller than that of the first opening, and the first portion has a thickness smaller than that of the second portion. The second portion has a smaller thickness than the third portion.

[0017] In addition, the semiconductor device has a fourth insulating layer in contact with the third portion, The edge layer preferably comprises aluminum, or titanium, or both, and nitrogen.

[0018] In the above, the second portion of the semiconductor layer has a higher carrier density than the first portion. It is preferable that the second portion has a region having a lower carrier density than the third portion.

[0019] In the above, the shape of the end of the third insulating layer in contact with the second insulating layer is 80 degrees or more, It is preferable to have a taper angle of 5 degrees or less.

[0020] In the semiconductor device, a second insulating layer is disposed between the first insulating layer and the first conductive layer. The fifth insulating layer contains aluminum or hafnium and oxygen. It is preferable.

[0021] In the semiconductor device, a second conductive layer is disposed below the semiconductor layer and overlaps the first conductive layer. a second conductive layer formed on the semiconductor layer and a sixth insulating layer positioned between the semiconductor layer and the second conductive layer. It is preferable.

[0022] In the above, the sixth insulating layer is formed by stacking the first layer, the second layer, and the The first layer and the third layer are laminated in this order, and each of the first layer and the third layer contains oxygen. The layer preferably comprises aluminum or hafnium and oxygen.

[0023] Further, the semiconductor device described above and a liquid crystal element or A display device having a light-emitting element is preferred. [Effects of the Invention]

[0024] According to one embodiment of the present invention, a semiconductor device with favorable electrical characteristics can be provided. According to one embodiment of the present invention, a semiconductor device that can be miniaturized or highly integrated can be provided. According to one embodiment of the present invention, a semiconductor device with high productivity can be provided.

[0025] Alternatively, it is possible to provide a semiconductor device that can retain data for a long period of time. In this way, a semiconductor device with a high data writing speed can be provided. Alternatively, a semiconductor device capable of suppressing power consumption can be provided. Alternatively, a novel semiconductor device can be provided. [Brief explanation of the drawings]

[0026] [Figure 1] An example of a transistor configuration. [Figure 2] An example of a transistor configuration. [Figure 3] An example of a transistor configuration. [Figure 4] An example of a transistor configuration. [Figure 5] An example of a transistor configuration. [Figure 6] 1A to 1C illustrate a method for manufacturing a transistor. [Figure 7] 1A to 1C illustrate a method for manufacturing a transistor. [Figure 8] 1A to 1C illustrate a method for manufacturing a transistor. [Figure 9] An example of a transistor configuration. [Figure 10] An example of a transistor configuration. [Figure 11] An example of a transistor configuration. [Figure 12] An example of a transistor configuration. [Figure 13] FIG. [Figure 14] FIG. [Figure 15] FIG. [Figure 16] FIG. [Figure 17] FIG. [Figure 18] FIG. [Figure 19] 1A and 1B are a block diagram and a circuit diagram of a display device. [Figure 20] FIG. [Figure 21] FIG. 1 is a diagram illustrating an electrical device. [Figure 22] An example of the display module configuration. [Figure 23] An example of the configuration of electronic devices. [Figure 24] An example of the configuration of electronic devices. [Figure 25] An example of the configuration of electronic devices. [Figure 26] 1 shows an example of the configuration of a television device. DETAILED DESCRIPTION OF THE INVENTION

[0027] Hereinafter, embodiments will be described with reference to the drawings. It is understood that the present invention may be embodied in various different forms without departing from its spirit and scope. It will be readily apparent to those skilled in the art that various modifications may be made to the embodiments and details of the present invention. However, the present invention should not be construed as being limited to the description of the following embodiments.

[0028] In addition, in each drawing described in this specification, the size of each component, the thickness of a layer, or the area is not clearly indicated. The figures may be exaggerated for clarity and are not necessarily limited to that scale. .

[0029] In addition, the ordinal numbers "first," "second," and "third" used in this specification refer to the number of components. This is added to avoid confusion and is not intended to limit the number.

[0030] In addition, in this specification, the terms "above" and "below" that indicate the position of components are used to indicate the position of components. The positional relationship is used for convenience in describing the structure with reference to the drawings. The relationship between the two components changes depending on the direction in which each component is depicted. The terms are not limited to those used above, but can be rephrased appropriately depending on the situation.

[0031] In this specification, a transistor includes a gate, a drain, and a source. It is an element having at least three terminals including a drain (drain terminal, drain A transistor is placed between the drain electrode and the source terminal. A channel forming region is provided, and a current flows between the source and the drain through the channel forming region. In this specification and the like, the channel forming region is a region through which an electric current can flow. The region where the current mainly flows.

[0032] The functions of the source and drain may differ depending on whether transistors with different polarities are used or whether the circuit This may happen when the direction of the current changes during operation. In the specification, the terms source and drain may be used interchangeably. do.

[0033] In addition, in this specification, "electrically connected" means "something that has some kind of electrical effect." This includes cases where the device is connected via a "of" is not subject to any particular restrictions as long as it allows the transmission and reception of electrical signals between connected objects. For example, "things that have some kind of electrical action" include electrodes, wiring, and transistors. It has various functions such as switching elements, resistors, inductors, capacitors, etc. This includes elements such as:

[0034] In this specification, "parallel" means that two straight lines are at an angle of -10° or more and 10° or less. This means that the angle is between -5° and 5°. "Perpendicular" means that two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, the angle may be between 85° and 95°.

[0035] In addition, in this specification and the like, the terms "film" and "layer" are interchangeable. For example, the term "conductive layer" can be changed to the term "conductive film." Or, for example, the term "insulating film" may be changed to "insulating layer." It may be possible to change the term to

[0036] Unless otherwise specified, in this specification and the like, the off-state current refers to the current that flows when a transistor is off. This refers to the drain current when the device is in a non-conducting state (also known as a cut-off state). Unless otherwise specified, for an n-channel transistor, the voltage V between the gate and source When gs is lower than the threshold voltage Vth, the gate and This refers to a state in which the voltage Vgs between the gates is higher than the threshold voltage Vth.

[0037] The off-state current of a transistor may depend on Vgs. The off-state current is I or less if there is a Vgs value at which the off-state current of the transistor is I or less. The off-state current of a transistor is the current that flows through it in the off state at a given Vgs. , an off-state at Vgs within a predetermined range or a sufficiently reduced off-current is obtained. It may refer to the off-state current in the off state at Vgs, etc.

[0038] As an example, when the threshold voltage Vth is 0.5V and Vgs is 0.5V, The on-current is 1×10 -9 A, and the drain current at Vgs of 0.1 V is 1×10 -1 3 A, and the drain current at Vgs = -0.5 V is 1 × 10 -19 A and Vg The drain current at s = -0.8V is 1×10 -22 A n-channel transistor The drain current of the transistor is as follows when Vgs is -0.5V: , or 1×10 in the range of Vgs from −0.5V to −0.8V -19 A or below Therefore, the off-state current of the transistor is 1×10 -19 It may be said that it is below A. The drain current of the transistor is 1×10 -22 Because there exists a Vgs below A , the off-state current of the transistor is 1×10 -22 It may be said that it is below A.

[0039] In this specification and the like, the off-state current of a transistor having a channel width W is calculated based on the It is sometimes expressed as the current value that flows per watt. In the latter case, the unit of the off-state current is current / length. It may be expressed in units with an element (e.g., A / μm).

[0040] The off-state current of a transistor may depend on temperature. Unless otherwise specified, the values ​​are measured at off-state current at room temperature, 60℃, 85℃, 95℃, or 125℃. Or, the reliability of the semiconductor device including the transistor may be insured. or the temperature at which a semiconductor device including the transistor is used (for example, The term "off-state current" may refer to the off-state current at any temperature between 5°C and 35°C. The off-state current of the transistor is I or less when the transistor is operated at room temperature, 60°C, 85°C, 95°C, 125°C, The temperature at which the reliability of a semiconductor device including a transistor is guaranteed, or The temperature at which the included semiconductor device, etc. is used (for example, any one of 5°C to 35°C) , there exists a value of Vgs at which the off-state current of the transistor is I or less. There is.

[0041] The off-state current of a transistor can depend on the voltage Vds between the drain and source In this specification, unless otherwise specified, the off-state current is measured when Vds is 0.1 V, 0.8 V, 1V, 1.2V, 1.8V, 2.5V, 3V, 3.3V, 10V, 12V, 16V, or It may also represent the off-state current at 20 V. Vds that guarantees the reliability of devices, etc., or in semiconductor devices, etc. that include the transistor The off-state current of a transistor is sometimes expressed as the off-state current at the Vds used in the I or less means that Vds is 0.1V, 0.8V, 1V, 1.2V, 1.8V, 2.5V, V, 3V, 3.3V, 10V, 12V, 16V, 20V, and the semiconductor Vds that guarantees the reliability of semiconductor devices, or semiconductor devices that include the transistor Vds used in, Vgs value at which the off-state current of the transistor is I or less It may refer to the existence of

[0042] In the above description of the off-state current, the drain may be read as the source. Current may also refer to the current through the source when the transistor is in the off state.

[0043] In this specification and the like, the term "leak current" may be used to mean the same thing as "off-state current." In this specification, the off-state current is, for example, the current when a transistor is in an off state. , may refer to the current flowing between the source and drain.

[0044] In this specification, the threshold voltage of a transistor is the voltage at which a channel is formed in the transistor. This refers to the gate voltage (Vg) when a gate electrode is formed. Specifically, it refers to the threshold voltage of a transistor. The voltage is plotted by plotting the gate voltage (Vg) on ​​the horizontal axis and the square root of the drain current (Id) on the vertical axis. In the simulated curve (Vg-√Id characteristics), the tangent line with the maximum slope is extrapolated to form a straight line. , the gate voltage (Vg Alternatively, the threshold voltage of a transistor can be expressed as the channel length L and the The channel width is W, and the value of Id[A]×L[μm] / W[μm] is 1×10 -9 [A] and It may also refer to the gate voltage (Vg) applied to the device.

[0045] In addition, even when the term "semiconductor" is used in this specification, for example, If the dielectric constant is low enough, it may have the properties of an "insulator." The boundary between "insulator" and "insulator" is vague, and it may not be possible to strictly distinguish them. The terms "semiconductor" and "insulator" may be interchangeable in some cases.

[0046] In addition, even when the term "semiconductor" is used in this specification, for example, If the electrical conductivity is high enough, it may have the properties of a "conductor." The boundary between "conductor" and "electroconductor" is vague and it may not be possible to strictly distinguish between them. The terms "semiconductor" and "conductor" may be interchangeable in some cases.

[0047] In the present specification and the like, the atomic ratio is In:Ga:Zn=4:2:3 or in the vicinity thereof. When the ratio of In to the total number of In, Ga, and Zn atoms is 4, The ratio of is 1 or more and 3 or less, and the ratio of Zn is 2 or more and 4 or less. The ratio n:Ga:Zn=5:1:6 or thereabouts means that the total number of In, Ga and Zn atoms is When the ratio of In to the sum is 5, the ratio of Ga is greater than 0.1 and less than 2, and Zn The ratio is 5 or more and 7 or less. In addition, the atomic ratio is In:Ga:Zn=1:1:1 or The vicinity of this range means that the ratio of In to the total number of In, Ga, and Zn atoms is 1. When the ratio of Ga is greater than 0.1 and less than 2, and the ratio of Zn is greater than 0.1 and less than 2, Let's say there is.

[0048] In this specification, the term "metal oxide" refers to a metal in a broad sense. Metal oxides are oxides of the following: oxide insulators, oxide conductors (including transparent oxide conductors), ), oxide semiconductors (also called oxide semiconductors or simply OS), For example, when a metal oxide is used in the active layer of a transistor, the metal oxide In addition, when referring to an "OS FET," In other words, the transistor can be a transistor including a metal oxide or an oxide semiconductor.

[0049] In this specification and the like, metal oxides containing nitrogen are also referred to as metal oxides (metal ox). Metal oxides containing nitrogen are sometimes collectively called metal oxynitrides (metal oxynitrides). It may also be called tal oxynitride.

[0050] In the present specification and the like, CAAC (c-axis aligned crystal) l), and when written as CAC (Cloud-Aligned Composite) CAAC represents an example of a crystal structure, and CAC represents an example of a function or material configuration. Represents.

[0051] In addition, in this specification and the like, CAC-OS or CAC-metal oxide means A part of the material has a conductive function, and a part of the material has an insulating function, and the whole material It functions as a semiconductor. CAC-OS or CAC-metal oxide When used in the active layer of a transistor, the conductive function is to transport electrons (or The insulating function is the function that prevents the flow of electrons, which are carriers. By making the conductive function and insulating function work in a complementary manner, The function to turn on / off the CAC-OS or CAC-metal ox It can be attached to CAC-OS or CAC-metal oxide. By separating the functions of each, the functions of both can be maximized.

[0052] In this specification and the like, CAC-OS or CAC-metal oxide is a The conductive region has the above-mentioned conductive function, and the insulating region has the above-mentioned insulating function. The region has the insulating function described above. In addition, the material has a conductive region and an insulating region. The regions may be separated at the nanoparticle level. The conductive regions may be unevenly distributed in the material. They may be observed connected in a similar manner.

[0053] In addition, in the CAC-OS or CAC-metal oxide, a conductive region and an insulating region are The peripheral region is 0.5 nm to 10 nm, preferably 0.5 nm to 3 nm. The following sizes may be dispersed in the material:

[0054] In addition, CAC-OS and CAC-metal oxide have different band gaps. For example, CAC-OS or CAC-metal oxide e is a component with a wide gap due to the insulating region and a narrow gap due to the conductive region. In this configuration, when a carrier is flowed, In the component with a narrow gap, carriers mainly flow. The component having a narrow gap acts complementary to the component having a wide gap. Carriers also flow to the wide gap component in conjunction with the CA component. When C-OS or CAC-metal oxide is used for the channel region of a transistor, In this case, the transistor has a high current driving force in the on state, i.e., a large on-current, and a high Field effect mobility can be obtained.

[0055] That is, CAC-OS or CAC-metal oxide is a matrix composite material. (matrix composite), or metal matrix composite It can also be called atrix composite.

[0056] An example of the crystal structure of a metal oxide will be described below. Sputtering was performed using a Zn oxide target (In:Ga:Zn=4:2:4.1 [atomic ratio]). The following will be explained as an example of a metal oxide film formed by the ring method. Metal oxide formed by sputtering at a plate temperature of 100°C to 130°C is called sIGZO, and using the above target, the substrate temperature is room temperature (RT), Metal oxides formed by sputtering are called tIGZO. For example, sIGZ O is the crystal structure of either or both of nc (nano crystal) and CAAC. In addition, tIGZO has a crystal structure of nc. .T.) includes temperatures when the substrate is not intentionally heated.

[0057] The CAAC structure is a structure consisting of multiple nanocrystals (crystal regions with a maximum diameter of less than 10 nm). It is a type of crystalline structure, such as a thin film, in which each nanocrystal has its c-axis oriented in a specific direction and The a-axis and b-axis do not have any orientation, and the nanocrystals are continuously connected without forming grain boundaries. In particular, thin films with the CAAC structure have the following characteristics: The c-axis of the crystal is aligned in the thickness direction of the thin film, the normal direction to the surface on which the film is formed, or the normal direction to the surface of the thin film. It has the characteristic of being easy to handle.

[0058] In crystallography, the three axes that make up the unit cell, the a-axis, the b-axis, and the c-axis (crystal It is common to take a unit cell with a specific axis as the c-axis for the layer structure. In a crystal with this structure, the two axes parallel to the plane direction of the layers are the a-axis and the b-axis, and the axis intersecting the layers is the The c-axis is generally defined as the plane of the crystal. Graphite is classified as a hexagonal crystal, and the a-axis and b-axis of the unit cell are parallel to the cleavage plane. The c-axis is perpendicular to the cleavage plane. For example, InGa ZnO4 crystals can be classified as hexagonal, and the a-axis and b-axis of the unit cell are the planes of the layers. The c-axis is perpendicular to the layers (i.e., the a-axis and b-axis).

[0059] In this specification, a display panel, which is one aspect of a display device, displays (outputs) an image or the like on a display surface. Therefore, a display panel is one aspect of an output device.

[0060] In this specification, the substrate of the display panel is provided with, for example, an FPC (Flexible Printed Circuit). Integrated Circuit) or TCP (Tape Carrier Packa ge) or a connector such as COG (Chip On Ground) is attached to the board. The IC mounted by the glass method is called a display panel module or a display module. It may also be called a display panel or simply a display panel.

[0061] In this specification, a touch sensor is a sensor that is touched by a detected object such as a finger or a stylus. It has the function of detecting when something is pressed or approached. Therefore, the touch sensor is one aspect of the input device. For example, the touch sensor may have one or more sensor elements.

[0062] In addition, in this specification and the like, a substrate having a touch sensor is referred to as a touch sensor panel, or simply In this specification, the substrate of the touch sensor panel For example, a connector such as FPC or TCP is attached to the board, or The IC mounted by the OG method is called a touch sensor panel module. It may be called a touch module, a sensor module, or simply a touch sensor.

[0063] In this specification and the like, a touch panel, which is one aspect of a display device, is a device for displaying images and the like on a display surface. The display function (output) and the function of detecting when a finger or stylus touches or presses the display surface. It also has the function of a touch sensor that detects the approach of the user. A panel is one aspect of an input / output device.

[0064] The touch panel may be, for example, a display panel (or display device) with a touch sensor, a touch sensor It can also be called a functional display panel (or display device).

[0065] The touch panel may also have a configuration including a display panel and a touch sensor panel. Alternatively, the display panel may be configured to have a touch sensor function inside or on its surface. It is also possible.

[0066] In addition, in this specification, a substrate of a touch panel is provided with a connector such as an FPC or TCP. or a board with an IC mounted on it using the COG method, etc. It may be called a touch panel module, a display module, or simply a touch panel. do.

[0067] (Embodiment 1) In this embodiment, a structural example of a semiconductor device according to one embodiment of the present invention and an example of a manufacturing method thereof will be described. and explain.

[0068] One embodiment of the present invention is a semiconductor layer in which a channel is formed over a formation surface, and a second insulating film formed on the semiconductor layer. The transistor has a first insulating layer and a gate electrode on the first insulating layer. The semiconductor layer is formed by containing a metal oxide (hereinafter also referred to as an oxide semiconductor) that exhibits semiconductor properties.

[0069] An insulating film (hereinafter also referred to as a spacer layer) is provided on the semiconductor layer as a spacer. The spacer layer has a first opening at a position overlapping a region where a channel is to be formed. A sidewall insulating layer is provided on the side surface of the first opening. At the positions where the source and drain regions are to be formed, a gap between the semiconductor layer and the spacer layer is formed. An insulating layer containing a metal element and nitrogen or oxygen is provided on the sidewall insulating layer. is disposed in contact with the semiconductor layer, the first insulating layer, and the spacer layer. The opening is filled with a first insulating layer and a gate electrode in this order. However, the insulating layer containing a metal element and nitrogen or oxygen on the semiconductor layer is used as a sidewall insulating layer. They may contact each other, but they do not have to contact each other. In this case, the width of the first opening is set to the minimum processing dimension. This makes it possible to provide a channel formation region that is smaller than the minimum processing dimension.

[0070] The semiconductor layer has a region where a channel is formed (channel formation The semiconductor layer has a pair of low-resistance regions sandwiching a channel formation region. The low resistance region functions as a source or a drain.

[0071] The low resistance region is a region having a higher carrier density than the channel formation region. The region is a region containing more hydrogen than the channel formation region, or a region containing less oxygen than the channel formation region. The region can be formed by bonding oxygen vacancies and hydrogen atoms in the oxide semiconductor. When they combine, they become a source of carrier generation.

[0072] The semiconductor layer may have a junction region between the channel formation region and the low resistance region. The junction region has a higher carrier density than the channel formation region and is a low resistance region. For example, the junction region has a lower carrier density than the channel formation region. The region contains more hydrogen or oxygen vacancies, or both, than the low resistance region. The region may have a low content of either one or both of the oxygen vacancies.

[0073] The carrier density in the junction region does not need to be uniform, and the channel is formed from the low resistance region side. There may be a density gradient where the density decreases towards the joining area. Either the hydrogen concentration or the oxygen vacancy concentration in the region, or both, are The concentration may have a gradient that decreases toward the channel forming region.

[0074] The sidewall insulating layer is also provided in contact with a part of the upper surface of the semiconductor layer. The process for forming a low resistance region in the semiconductor layer (such as supplying hydrogen or oxygen) When performing the defect formation process, a part of the semiconductor layer is covered with a sidewall insulating layer to achieve low resistance. Therefore, the resistance of the junction region is suppressed, and the junction region has a lower carrier density than the low-resistivity region. .

[0075] By adopting such a structure, the channel formation region and the low resistance region are not in contact with each other. This allows the low-resistance region to be converted into the channel region by heat or the like applied during the manufacturing process. The diffusion of hydrogen into the channel formation region and the diffusion of oxygen in the channel formation region into the low resistance region This prevents the occurrence of oxygen vacancies in the channel formation region. A transistor that can achieve extremely low electrode density and has good and stable electrical characteristics This can be achieved.

[0076] In addition, the thickness of the semiconductor layer is thinner in regions with lower carrier density, such as the channel formation region. Therefore, the semiconductor layer is preferably in the form of a capacitor that functions as a source or a drain. It is preferable that the low resistance region with high rear density has the thickest film thickness. The junction region where the layer contacts the sidewall insulating layer is a low resistance layer that functions as a source or drain. It is preferable that the thickness of the insulating film is thinner than the resistive region and thicker than the channel forming region. It's nice.

[0077] For example, as an oxide semiconductor, In-M-Zn oxide (element M is aluminum, gallium, Smoke, yttrium, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium Rumanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, One or more types of metals selected from the group consisting of tantalum, tungsten, and magnesium) In addition, metal oxides such as In-Ga oxide and In-Zn oxide are also suitable as oxide semiconductors. Compounds may also be used.

[0078] Here, the oxide semiconductor contains aluminum, ruthenium, and the like in addition to the elements constituting the oxide semiconductor. By adding metal elements such as sulphur, titanium, tantalum, chromium, and tungsten, It is preferable to use aluminum, titanium, It is preferable to use tantalum, tungsten, or the like. For example, a metal film containing the metal element or a nitride film containing the metal element may be formed on an oxide semiconductor. It is preferable to provide a metal oxide film or an oxide film containing a metal element. Part of oxygen in the oxide semiconductor located at the interface between the film and the oxide semiconductor or in the vicinity of the interface When oxygen is absorbed into the film, oxygen vacancies are formed, and the resistance of the oxide semiconductor in the vicinity of the interface decreases. There is a match.

[0079] Further, a metal film, a nitride film containing a metal element, or an oxide film containing a metal element may be formed on an oxide semiconductor. After the oxide film is formed, it is preferable to perform a heat treatment in an atmosphere containing nitrogen. The heat treatment causes the metal elements to diffuse from the metal film into the oxide semiconductor, and the metal elements are then transferred to the oxide semiconductor. In this case, a metal film provided on an oxide semiconductor, a nitride film having a metal element, The oxide film or the oxide film containing a metal element is preferably provided to cover the oxide semiconductor. .

[0080] Furthermore, hydrogen present in the oxide semiconductor diffuses into the low-resistance region of the oxide semiconductor, When the oxygen enters the oxygen vacancy in the resistive region, it becomes relatively stable. The hydrogen in the oxygen vacancies in the oxide semiconductor is converted into oxygen vacancies by heat treatment at 250°C or higher. The oxide semiconductor is then released from the low-resistance region, diffuses into the low-resistance region, and exists in the low-resistance region. It is known that the oxygen vacancies are contained in the crystals and become relatively stable. Therefore, the resistance of the oxide semiconductor is further reduced, and the resistance of the oxide semiconductor is not reduced. Semiconductors tend to be highly purified (reduced impurities such as water and hydrogen) and have higher resistance.

[0081] Furthermore, in an oxide semiconductor, the carrier density increases when hydrogen, nitrogen, or the like is present. Hydrogen in the oxide semiconductor reacts with oxygen that bonds with metal atoms to form water, creating oxygen vacancies. When hydrogen enters the oxygen vacancies, the carrier density increases. Some of the atoms bond with oxygen, which bonds with metal atoms, to generate electrons, which act as carriers. That is, the resistance of an oxide semiconductor containing nitrogen or hydrogen is reduced.

[0082] Therefore, metal elements, hydrogen, nitrogen, etc. are selectively added to the oxide semiconductor. By this, a high-resistance region and a low-resistance region can be formed in the oxide semiconductor. By selectively reducing the resistance of the oxide semiconductor, the oxide semiconductor processed into an island shape can be The region functions as a semiconductor with a low silicon density, and the other region functions as a source region or a drain region. A low resistance region can be provided.

[0083] After the resistance of the oxide semiconductor is reduced, a metal film, a nitride film containing a metal element, or a metal The oxide film containing the element may be removed. Even if the oxide film or oxide film containing metal elements is removed, the low-resistance region can be maintained. Cut.

[0084] The sidewall insulating layer has a portion in contact with the first insulating layer and a portion in contact with a part of the top surface of the semiconductor layer. The sidewall insulating layer is preferably formed using a photomask. For example, it is preferable to form the insulating layer that will become the sidewall insulating layer in a self-aligned manner. A border layer is formed, and the insulating film is anisotropically etched to form a first opening side. An insulating layer is formed along the surface.

[0085] In addition to the above, one aspect of the present invention is a semiconductor device including: a second gate electrode below the semiconductor layer; It is preferable to have a second gate insulating layer between the second gate electrode and the semiconductor layer. .

[0086] Here, the second gate insulating layer preferably has a laminated structure of at least two layers. It is more preferable that the second gate insulating film has a laminated structure of three or more layers. When the edge layer has a three-layer laminated structure, the first layer, the second layer, and the third layer are stacked from the second gate electrode side. Let's call this layer 3.

[0087] In the following, a case where the insulating layer of the second gate has a three-layer stacked structure will be described.

[0088] The third layer in contact with the semiconductor layer and the second layer located below it are made of different materials. It is preferred that it contains

[0089] For example, the second layer may be made to contain a material with a higher dielectric constant than the third layer. It is possible to lower the voltage applied to the gate electrode. Alternatively, the second layer may have a higher hydrogen content than the third layer. Alternatively, by forming a layer into which oxygen is less likely to diffuse, oxygen can be diffused from below the second gate insulating layer to the semiconductor layer. This can prevent impurities from diffusing.

[0090] More specifically, the second layer of the second insulating layer is made of aluminum oxide, hafnium oxide, or It is preferable to use hafnium aluminate for the third layer. It is preferable to use silicon, silicon oxynitride, or the like.

[0091] In addition, the first layer located below the second layer may be made of the same material as the third layer. preferable.

[0092] In the above, the first layer located on the second gate electrode side may be omitted.

[0093] By configuring the second gate insulating layer in this way, the second gate insulating layer can be used as a substrate supporting the transistor. Therefore, reliability can be improved even when using a substrate with low barrier properties such as a flexible substrate. .

[0094] A more specific example will be described below with reference to the drawings.

[0095] [Configuration example 1] 1A is a top view of a transistor 100, and FIG. 1B is a top view of the transistor 100 shown in FIG. FIG. 1(C) corresponds to a cross-sectional view of the cut surface taken along the dashed line A1-A2 shown in FIG. 1(A). It corresponds to a cross-sectional view of the cut surface taken along the dashed line B1-B2. Some of the components of the transistor 100 (such as the gate insulating layer) are omitted in the illustration. The dashed dotted line A1-A2 direction is the channel length direction, and the dashed dotted line B1-B2 direction is the channel width direction. In addition, the top view of the transistor is also shown in the following drawings. As with 1(A), some of the components may be omitted in the illustration.

[0096] The transistor 100 includes an insulating layer 104, a semiconductor layer 108, an insulating layer 109, and an insulating layer 110. , a conductive layer 111, an insulating layer 107a, an insulating layer 116, an insulating layer 118, etc. The semiconductor layer 104 is provided on the substrate 102. The semiconductor layer 108 is provided on the insulating layer 104. The edge layer 116 is provided to cover a portion of the semiconductor layer 108. The insulating layer 109 is provided on the semiconductor layer 108 and has an opening 112 formed therein. The top surface shapes of the layer 116 and the insulating layer 109 are roughly the same.

[0097] In this specification, the phrase "the upper surface shapes are roughly the same" means that there is at least a small difference between the layers. For example, the upper and lower layers may have the same mask pattern. This includes cases where the outline is processed by the same mask pattern. The upper layer is located inside the lower layer, and the upper layer is located outside the lower layer. In this case too, it is said that the top surface shapes roughly match.

[0098] The insulating layer 107a (hereinafter also referred to as a sidewall insulating layer 107a) is The side surface of the opening 112, the semiconductor layer 108, the insulating layer 110, and the insulating layer 116 are Therefore, the insulating layer 107a functions as a sidewall. The sidewall insulating layer 107a is formed on a part or a part of the side surface of the opening 112 of the insulating layer 109. is preferably provided to cover the entire surface.

[0099] Inside the opening 112, the insulating layer 110 and the conductive layer 111 are formed in this order as semiconductor layers. 108.

[0100] A part of the conductive layer 111 functions as a gate electrode. A part of the insulating layer 110 functions as a gate insulator. The transistor 100 has a gate electrode provided on the semiconductor layer 108. This is a so-called top-gate transistor.

[0101] In addition, a portion of the semiconductor layer 108 overlapping with the conductive layer 111 functions as a channel formation region. The semiconductor layer 108 preferably includes a metal oxide.

[0102] The insulating layer 110 is provided in contact with a part of the upper surface of the semiconductor layer 108. The region of the insulating layer 110 overlapping the conductive layer 111 in the insulating layer 110 is referred to as a region 108i. 108i functions as a channel forming region.

[0103] Furthermore, the sidewall insulating layer 107a may function as a barrier layer and may be used to protect against hydrogen, oxygen, and the like. Preferably, the sidewall insulating layer 107a is a layer through which water and the like do not easily diffuse. The insulating layer 110 functions as a base insulating layer, and the insulating layer 116 is provided between the insulating layer 110 and the insulating layer 116. By adopting this structure, impurities are prevented from diffusing from the insulating layer 116 into the insulating layer 110, and It is possible to prevent oxygen in the edge layer 110 from being desorbed from the side surfaces, thereby improving reliability. can be done.

[0104] The sidewall insulating layer 107a is formed on the side of the conductive layer 111 with the insulating layer 110 sandwiched therebetween. It is preferable that the sidewall insulation is provided so as to extend over the entire surface. It is preferable that the edge layer 107a is provided in contact with the insulating layer 110. The side-wall insulating layer 107a is formed by diffusing impurities at the interface between the semiconductor layer 108 and the insulating layer 110. This can prevent this from happening.

[0105] The sidewall insulating layer 107a may be an aluminum oxide film, a hafnium oxide film, or It is preferable to use a metal oxide film or an oxide film such as a hafnium aluminate film. It's nice.

[0106] The aluminum oxide film, hafnium oxide film, hafnium aluminate film, etc. have a thickness of Even when thin, it has extremely high barrier properties. Therefore, the thickness is set to 0.5nm or more and 50nm or less. m or less, preferably 1 nm or more and 40 nm or less, more preferably 2 nm or more and 30 nm or less In particular, the aluminum oxide film acts as a barrier against hydrogen or oxygen. Because of its high durability, it is effective even when extremely thin (for example, 0.5 nm to 1.5 nm). can be obtained.

[0107] When the sidewall insulating layer 107a is a metal oxide film, a sputtering method or Film formation methods such as atomic layer deposition (ALD) In particular, the ALD method has high step coverage and is extremely dense. Since a film can be formed, it can have high barrier properties. This method is suitable for large glass substrates, and therefore can increase productivity.

[0108] The sidewall insulating layer 107a is formed of a silicon oxide film, a silicon oxynitride film, or the like. However, when the sidewall insulating layer 107a is an oxide film, any inorganic insulating film can be used. In this case, it is preferable that the sidewall insulating layer is a film that releases oxygen by heat treatment. When 107a releases oxygen, the released oxygen can be present in the channel formation region. The oxygen deficiency can be compensated for.

[0109] The sidewall insulating layer 107a is provided in the opening 112 of the insulating layer 109. The wall insulating layer 107a can be formed in a self-aligned manner, and therefore the sidewall No photomask is required to form the insulating film 107a, reducing the manufacturing cost. Furthermore, by forming the sidewall insulating layer 107a in a self-aligned manner, the sidewall Since there is no relative positional deviation between the insulating layer 107a and the conductive layer 111, the semiconductor layer The widths of the pair of regions 108n1 that function as junction regions in the substrate 108 can be made approximately the same. Cut.

[0110] Furthermore, since the pair of regions 108n1 can be formed with a uniform width, the width of the opening 112 can be minimized. By setting the process size to a value smaller than the minimum process size, a region 108 is formed as a channel forming region. i can be formed.

[0111] The sidewall insulating layer 107a is made of the same material as the insulating layer 104 or the insulating layer 118, for example. It can be used.

[0112] Furthermore, by providing the sidewall insulating layer 107a, the conductive layer 111 and the conductive layer 120a or This allows the conductive layer 111 to be physically spaced from the conductive layer 120b. The parasitic capacitance between the conductive layer 111 and the conductive layer 120a and between the conductive layer 111 and the conductive layer 120b can be reduced. There are cases where this happens.

[0113] As shown in FIG. 1B, the sidewall insulating layer 107a is formed on the insulating layer 109. The semiconductor layer 108 is provided in contact with a part of the upper surface of the semiconductor layer 108, on the inner side of the side surface of the portion 112. In the semiconductor layer 108, the sidewall insulating layer 108i is located outside the region 108i. The pair of regions overlapping with 107a are referred to as regions 108n1. 08i includes the surface in contact with the insulating layer 110 and the area overlapping with this surface.

[0114] In addition, in the semiconductor layer 108, the area outside the area 108i and the pair of areas 108n1 The pair of regions located at the insulating layer 108 are referred to as regions 108n2. Preferably, layer 116 is provided in contact with the top surface of region 108n2.

[0115] The region 108n2 is a part of the semiconductor layer 108 and is a channel formation region. The region 108n2 has a lower resistance than the region 108i. The region 108n1 is a region with a high hydrogen concentration, a region close to n-type, or a region with a high hydrogen concentration. The insulating layer 116 contains nitrogen or hydrogen. A portion of the nitrogen or hydrogen in the insulating layer 116 is in the region 1. When added to O8n2, the carrier density increases, creating a low-resistance n-type region.

[0116] Region 108n1 is located between region 108i and region 108n2 and is also called a junction region. The region 108n1 has a higher carrier density than the region 108i. The region 108n1 has a lower portion than the region 108i. A region with a high carrier density, a region close to n-type, or a region with a high hydrogen concentration, and The region has a lower carrier density than 08n2, is close to i-type, or has a low hydrogen concentration. do.

[0117] As shown in FIG. 1B, a barrier layer is formed between the region 108n1 and the insulating layer 116. Since a functional sidewall insulating layer 107a is provided, water that the insulating layer 116 may release is not released. The hydrogen and nitrogen are blocked by the sidewall insulating layer 107a, and the hydrogen and nitrogen in the region 108n1 The carrier density and the like are lower than in the region 108n2.

[0118] The carrier density in the region 108n1 does not have to be uniform. There may be a density gradient where the density decreases toward the region 108i side. For example, either one or both of the hydrogen concentration and the oxygen vacancy concentration in the region 108n1 is The concentration may have a gradient that decreases from the 108n2 side to the region 108i side. .

[0119] The conductive layer 111 functioning as a gate electrode preferably contains a metal or an alloy. For example, the conductive layer 111 may be made of a low-resistance conductive film such as a copper film or an aluminum film. The conductive layer 111 may have a single layer structure or a multilayer structure.

[0120] As shown in FIGS. 1A and 1B, the transistor 100 includes a conductive layer 120a and a The conductive layer 120a and the conductive layer 120b may have an insulating layer. An opening 141 is provided in the edge layer 116, the insulating layer 109, the insulating layer 110, and the insulating layer 118. a or opening 141b, and is electrically connected to region 108n2.

[0121] Here, the conductive layer 111 functions as a gate electrode, and the conductive layer 120a functions as a source The conductive layer 120b functions as a drain electrode.

[0122] The insulating layer 110, which functions as a gate insulating layer, preferably has an excess oxygen region. The insulating layer 110 has an excess oxygen region, which allows excess oxygen to be supplied to the semiconductor layer 108. Therefore, oxygen vacancies that may be formed in the semiconductor layer 108 can be compensated for by excess oxygen. Therefore, a highly reliable semiconductor device can be provided. Preferably, O4 has an excess oxygen region similar to insulating layer 110.

[0123] Here, oxygen vacancies that can be formed in the semiconductor layer 108 will be described.

[0124] The oxygen vacancies formed in the semiconductor layer 108 are problematic because they affect the transistor characteristics. For example, when oxygen vacancies are formed in the semiconductor layer 108, hydrogen bonds to the oxygen vacancies. When a carrier source is generated in the semiconductor layer 108, This causes a change in the electrical characteristics of the transistor 100, typically a shift in the threshold voltage. In the semiconductor layer 108, it is preferable that the oxygen vacancies are as small as possible.

[0125] Therefore, in one aspect of the present invention, the insulating film near the semiconductor layer 108, specifically, the semiconductor The insulating layer 110 formed above the dielectric layer 108 contains excess oxygen. By transferring oxygen or excess oxygen from 110 to the semiconductor layer 108, It is possible to reduce oxygen vacancies.

[0126] The insulating layer 104 located below the semiconductor layer 108 may contain excess oxygen. At this time, excess oxygen is also transferred from the insulating layer 104 to the semiconductor layer 108, thereby forming a semiconductor layer. This makes it possible to further reduce oxygen deficiency in the composite layer 108.

[0127] Here, when the semiconductor layer 108 is a metal oxide containing In, Ga, and Zn, the bond between In and oxygen The resultant force is weaker than the bonding force between Ga and oxygen, so when the atomic ratio of In is large, the metal oxide In addition, when the metal element represented by M is used instead of Ga, oxygen vacancies are easily formed in the oxide film. The same tendency is observed even when a large number of oxygen vacancies exist in the metal oxide film. This will result in a deterioration in the electrical characteristics and reliability of the capacitor.

[0128] However, in one embodiment of the present invention, the semiconductor layer 108 containing a metal oxide contains a very large amount of Since oxygen can be supplied, it is possible to use metal oxide materials with a large atomic ratio of In. This allows for extremely high field-effect mobility, stable electrical characteristics, and high reliability. It is possible to realize a transistor having such a structure.

[0129] For example, the atomic ratio of In is 1.5 times or more, or 2 times or more, the atomic ratio of M; A metal oxide having a porosity of 3 times or more, 3.5 times or more, or 4 times or more can be suitably used. Cut.

[0130] In particular, the atomic ratio of In, M, and Zn in the semiconductor layer 108 is In:M:Zn=5:1. It is preferable that In is 5 or close to 6. Here, "close to" means that when In is 5, M is 0.5. This includes cases where Zn is 5 or more and 7 or less.

[0131] The composition of the semiconductor layer 108 is not limited to the above. The atomic ratio of In, M, and Zn is preferably In:M:Zn=4:2:3 or approximately thereabouts. It's nice.

[0132] In addition, as the composition of the semiconductor layer 108, the number of atoms of In, M, and Zn in the semiconductor layer 108 is The ratio may be approximately equal. That is, the ratio of the number of In, M, and Zn atoms may be In:M: It may contain a material with Zn=1:1:1 or a material thereabout.

[0133] The semiconductor layer 108 has a region in which the atomic ratio of In is greater than the atomic ratio of M, so that the transistor The field effect mobility of the transistor 100 can be increased. The field-effect mobility of 00 is 10 cm 2 / V s More preferably, the transistor 10 0 field-effect mobility is 30 cm 2 / V s It is possible to exceed this.

[0134] For example, the above-mentioned high field effect mobility transistor is used as a gate driver for generating a gate signal. By using this as a driver, it is possible to provide a display device with a narrow frame width (also called a narrow frame). In addition, the above-described transistor having high field effect mobility may be used as a source driver of a display device. (especially, a demultiplexer connected to the output terminal of a shift register of a source driver) By using the wires, it is possible to provide a display device with a small number of wires connected to the display device. can.

[0135] Even if the semiconductor layer 108 has a region in which the atomic ratio of In is greater than the atomic ratio of M, However, if the crystallinity of the semiconductor layer 108 is high, the field-effect mobility may be reduced.

[0136] The crystallinity of the semiconductor layer 108 can be determined by, for example, X-ray diffraction (XRD). or by transmission electron microscopy (TEM). The solution was found by analyzing the data using the Mission Electron Microscope. It can be analyzed.

[0137] Here, impurities such as hydrogen or moisture mixed into the semiconductor layer 108 affect the transistor characteristics. Therefore, in the semiconductor layer 108, hydrogen, moisture, etc. The fewer impurities, the better.

[0138] The semiconductor layer 108 is made of a metal oxide film having a low impurity concentration and a low defect level density. This is preferable because a transistor with excellent electrical characteristics can be manufactured. is a high purity intrinsic or A metal oxide film that is high-purity intrinsic or substantially high-purity intrinsic is: Since there are fewer carrier generation sources, the carrier density can be reduced. A transistor in which the channel region is formed in a nitride film has a negative threshold voltage. characteristics (also called normally-on). High-purity intrinsic metal oxide films have low defect level density, and therefore low trap level density. In addition, a highly pure intrinsic or substantially highly pure intrinsic metal oxide film may be The flow is significantly smaller, with a channel width of 1×10 6 μm and the channel length is 10 μm. However, when the voltage between the source electrode and the drain electrode (drain voltage) is in the range of 1V to 10V, The off-state current is below the measurement limit of the semiconductor parameter analyzer, i.e., 1×10 -13 It can achieve a characteristic of A or below.

[0139] The above is the explanation of the first configuration example.

[0140] Below, a configuration example of a transistor with a part of its configuration different from that of the above-mentioned Configuration Example 1 will be described. In the following, explanations of parts that overlap with the above-mentioned configuration example 1 may be omitted. In the drawings shown below, parts having the same functions as those in the above-mentioned configuration example 1 are indicated by hatching. In some cases, the turns are the same and no symbols are assigned.

[0141] [Configuration example 2] 2A is a top view of the transistor 100A, and FIG. 2B is a top view of the transistor 100B. 2(C) is a cross-sectional view of the channel length direction of the transistor 100A, and FIG. 2(D) is a cross-sectional view of the channel width direction of the transistor 100A. 1 is a cross-sectional view in the direction of the arrow.

[0142] The transistor 100A has a conductive layer 106 between a substrate 102 and an insulating layer 104. The conductive layer 106 is connected to the semiconductor layer 10 via the insulating layer 104. 8.

[0143] In the transistor 100A, the conductive layer 106 is a first gate electrode (bottom gate electrode). The conductive layer 111 functions as a second gate electrode (also called a top gate electrode). A part of the insulating layer 104 functions as a first gate insulating layer. A portion of the insulating layer 110 functions as a second gate insulating layer.

[0144] A portion of the semiconductor layer 108 overlapping with at least one of the conductive layer 111 and the conductive layer 106 , which functions as a channel forming region. The portion of the conductive layer 111 (corresponding to the region 108i) of the 08 is a channel forming region. However, in reality, the portion overlapping with the conductive layer 106 does not overlap with the conductive layer 111. A channel is also formed in the region (corresponding to the region 108n1 or the region 108n2).

[0145] As shown in FIG. 2C, the conductive layer 106 is formed on the insulating layer 104, the insulating layer 109, and the insulating layer 106. 110 and the conductive layer 111 through an opening 142 provided in the insulating layer 116. In this way, the conductive layer 106 and the conductive layer 111 can be given the same potential. It is possible.

[0146] The conductive layer 106 is made of the same material as the conductive layer 111, the conductive layer 120a, or the conductive layer 120b. In particular, the conductive layer 106 can be formed from a material containing copper, which can This is preferable because it can reduce the

[0147] As shown in FIGS. 2A and 2C, the conductive layer 111 and the It is preferable that the conductive layer 106 protrudes outward beyond the edge of the semiconductor layer 108. At this time, as shown in FIG. 2C, the entire semiconductor layer 108 in the channel width direction is covered with the insulating layer 11. 0 and insulating layer 104, and is covered with conductive layer 111 and conductive layer 106.

[0148] With this configuration, the semiconductor layer 108 is subjected to an electric field generated by the pair of gate electrodes. At this time, the conductive layer 106 and the conductive layer 111 are electrically surrounded by the same conductive layer. It is preferable to apply the same potential to the semiconductor layer 108. Since an electric field for the purpose can be effectively applied, the on-current of the transistor 100A can be increased. This also makes it possible to miniaturize the transistor 100A.

[0149] The conductive layer 111 and the conductive layer 106 may not be connected to each other. A constant potential is applied to one of the gate electrodes of the transistor 100A, and a signal for driving the transistor 100A is applied to the other gate electrode. At this time, the transistor 100A may be turned on by applying a potential to one electrode. It is also possible to control the threshold voltage when driving with one electrode.

[0150] 2B and 2C show the case where the insulating layer 104 has a laminated structure. The insulating layer 104 is made up of a first layer 104a, a second layer 104b, and a third layer 104c from the conductive layer 106 side. The layer 104c has:

[0151] The first layer 104a is provided to cover the top and side surfaces of the conductive layer 106. The second layer 104b is provided in contact with the lower surface of the semiconductor layer 108. The first layer 104a and the second layer 104c are sandwiched between the first layer 104a and the third layer 104c.

[0152] The third layer 104c in contact with the semiconductor layer 108 is made of an insulating film containing oxygen. For example, the third layer 104c is preferably a silicon oxide film or a silicon oxynitride film. It is preferable to use an oxide insulating film such as a film. It is easy to incorporate a large amount of oxygen after film formation, and the film is easy to release oxygen when heated. By providing the semiconductor layer 108 in contact with such an oxide insulating film, This allows for a greater supply of oxygen to the 108.

[0153] The first layer 104a is an insulating film formed by a film forming method with high step coverage. For example, it can be formed by a plasma CVD method, a sputtering method, or the like. When an inorganic insulating film is used as the first layer 104a, the following can be achieved: The thickness can be made thinner than that of the conventional transistor 100A, and the driving voltage of the transistor 100A can be reduced. The layer 104a is formed of an insulating film containing oxygen, similar to the third layer 104c. In particular, it is preferable to use the same insulating film for the first layer 104a and the third layer 104c. This is more preferable because the film forming equipment can be shared.

[0154] The second layer 104b is a thin film that is difficult for water, hydrogen, nitrogen, etc. to diffuse through (high barrier properties). This allows impurities contained in the substrate 102, the conductive layer 106, etc. to be removed. Diffusion into the semiconductor layer 108 can be prevented.

[0155] The second layer 104b is formed by mixing at least one of the first layer 104a and the third layer 104c. It is preferable that the second gate electrode contains a material having a higher dielectric constant than the first gate electrode. This allows a lower voltage to be applied to the functional conductive layer 106.

[0156] More specifically, the second layer 104b is made of aluminum oxide, hafnium oxide, or hafnium oxide. It is preferable to use ammonium aluminate or the like.

[0157] Figure 3(A) shows an enlarged view of the transistor area enclosed by the two-dot chain line in Figure 2(B). In FIG. 3A, an insulating layer 110 and a conductive layer 111 are provided between the insulating layer 110 and the conductive layer 111 in FIG. The difference is that an insulating layer 110a is provided. The insulating layer 110a is made of aluminum oxide, It is preferable to use a metal oxide film such as hafnium oxide or hafnium aluminate. stomach.

[0158] Metal oxide films have extremely high barrier properties even when they are thin. The aluminum film has a high barrier property against hydrogen and oxygen, so it can be made extremely thin (for example, 0.5 Even if the thickness is 1.5 nm or more, sufficient effects can be obtained.

[0159] The metal oxide film is preferably formed in an atmosphere containing oxygen. It is preferable to form the film by sputtering in an atmosphere containing metal oxide. Oxygen can be supplied to the insulating layer 110 during the deposition of the insulating film.

[0160] For example, the deposition conditions for a metal oxide film are as follows: oxygen is used as the deposition gas, and a metal target is used. It is preferable to form the metal oxide film by a reactive sputtering method. When aluminum is used as the base, an aluminum oxide film is formed. can be done.

[0161] When forming a metal oxide film, the ratio of the oxygen concentration to the total flow rate of the film formation gas introduced into the film formation chamber of the film formation device is The higher the oxygen flow rate ratio (oxygen flow rate ratio) or the oxygen partial pressure in the film formation chamber, the more oxygen is supplied to the insulating layer 110. The oxygen flow rate or oxygen partial pressure can be increased by, for example, 50% or more. 0% or less, preferably 65% ​​or more and 100% or less, more preferably 80% or more and 100% or less More preferably, the oxygen flow rate is 90% or more and 100% or less. It is preferable to make the partial pressure of the element as close to 100% as possible.

[0162] In this way, forming a metal oxide film by sputtering in an atmosphere containing oxygen As a result, oxygen is supplied to the insulating layer 110 during the formation of the metal oxide film. As a result, the insulating layer 110 can be prevented from releasing oxygen. Then, by the subsequent heat treatment, the semiconductor layer 108 can be filled with oxygen. As a result, oxygen vacancies in the semiconductor layer 108 can be reduced. A highly reliable transistor can be realized.

[0163] In FIG. 3B, an insulating layer 110b is further formed on the conductive layer 111 in the configuration of FIG. The insulating layer 110b is made of the same metal oxide as the insulating layer 110a. It is preferable to use a film. The insulating layer 110a and the insulating layer 110b cover the conductive layer 111. Therefore, the conductive layer 111 can function as a barrier layer. This can prevent the absorption of oxygen from the surface.

[0164] In the configuration shown in FIG. 4A, the sidewall insulating layer 107a in FIG. 2B is The sidewall insulating layer 107b is an insulating layer. A metal film, a nitride film containing a metal element, or an oxide film containing a metal element, similar to the edge layer 116, is used. Therefore, the area 108i can be made smaller.

[0165] In FIG. 4B, the sidewall insulating layer 107a in FIG. 2B is replaced with a sidewall insulating layer 107b. The difference is that the insulating layer 107b and the sidewall insulating layer 107a are stacked together. The sidewall insulating layer 107b forms a region 108n3 in contact with the semiconductor layer 108, and the region 1 The resistance of the region 108n3 is reduced to the same level as that of the region 108n1. By forming the sidewall insulating layer 107a in the region 108, the region 108 is further expanded compared to FIG. i can be made smaller.

[0166] FIG. 5 shows an enlarged view of the opening 141b in FIG. 2(B). 2(B) is replaced by a conductive layer 116a. Preferably, 16a contains titanium or tantalum and nitrogen.

[0167] The above is the explanation of configuration example 2.

[0168] [Components of semiconductor device] Next, the components included in the semiconductor device of this embodiment will be described in detail.

[0169] 〔substrate〕 There is no particular restriction on the material of the substrate 102, but it should be strong enough to withstand the subsequent heat treatment. For example, glass substrates, ceramic substrates, quartz substrates, and A fire substrate or the like may be used as the substrate 102. Also, silicon or silicon carbide may be used as the material. Single crystal semiconductor substrates, polycrystalline semiconductor substrates, compound semiconductors such as silicon germanium, etc. It is also possible to apply a substrate, an SOI substrate, etc., and a semiconductor element is provided on these substrates. The substrate 102 may be a glass substrate. If you are using 6th generation (1500mm x 1850mm), 7th generation (1870mm x 220 0mm), 8th generation (2200mm x 2400mm), 9th generation (2400mm x 280 0mm), 10th generation (2950mm x 3400mm), or 10.5th generation, 11th generation By using a large substrate, such as the 12th generation or 13th generation, it is possible to manufacture a large display device. It is possible.

[0170] In addition, a flexible substrate is used as the substrate 102, and the transistor 10 is directly formed on the flexible substrate. Alternatively, a peeling layer may be provided between the substrate 102 and the transistor 100 or the like. The release layer may be removed from the substrate 102 after a semiconductor device is partially or entirely completed thereon. The transistor 100 can be separated and transferred to another substrate. can be transferred onto substrates with poor heat resistance or flexible substrates.

[0171] [Insulating layer 104] The insulating layer 104 can be formed by sputtering, CVD, evaporation, pulsed laser deposition ( The insulating layer 104 can be formed by appropriately using a PLD method, a printing method, a coating method, or the like. For example, a single layer or a stacked layer of an oxide insulating film or a nitride insulating film can be used as the insulating film. In order to improve the interface characteristics with the semiconductor layer 108, the insulating layer 104 is at least In addition, a region in contact with the semiconductor layer 108 preferably includes an oxide insulating film. By using an oxide insulating film that releases oxygen by heating as the layer 104, Oxygen contained in the insulating layer 104 can be transferred to the semiconductor layer 108 .

[0172] The thickness of the insulating layer 104 is 50 nm or more, or 100 nm or more and 3000 nm or less, or 2 By making the insulating layer 104 thick, the insulating The amount of oxygen released from the insulating layer 104 can be increased, and the insulating layer 104 and the semiconductor layer 10 8 and oxygen vacancies in the semiconductor layer 108. is possible.

[0173] The insulating layer 104 may be, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, or nitride. silicon oxide, aluminum oxide, hafnium oxide, gallium oxide or Ga-Zn oxide The insulating layer 10 may be formed as a single layer or a multilayer. As the layer 4, a laminated structure of a silicon nitride film and a silicon oxynitride film is used. The insulating layer 104 has a laminated structure, with a silicon nitride film on the lower layer and a silicon oxynitride film on the upper layer. By using the carbon film, oxygen can be efficiently introduced into the semiconductor layer 108.

[0174] In addition, the insulating layer 104 may have a layer other than an oxide film such as a silicon nitride film on the side in contact with the semiconductor layer 108. In this case, the surface of the insulating layer 104 that is in contact with the semiconductor layer 108 may be a film of the same material. Then, a pretreatment such as an oxygen plasma treatment is performed to oxidize the surface or the vicinity of the surface of the insulating layer 104. It is preferable that

[0175] [Conductive film] The conductive layer 111 and the conductive layer 106 function as a gate electrode, and the conductive layer 111 and the conductive layer 106 function as a source electrode. The conductive layer 120a and the conductive layer 120b functioning as the drain electrode are made of chromium (Cr). , copper (Cu), aluminum (Al), gold (Au), silver (Ag), zinc (Zn), molyb Mo, Tantalum (Ta), Titanium (Ti), Tungsten (W), Manganese (M n), nickel (Ni), iron (Fe), cobalt (Co), ruthenium (Ru) or an alloy containing the above-mentioned metal elements or a combination of the above-mentioned metal elements. Each of them can be formed using an alloy or the like.

[0176] The conductive layer 111 and the conductive layer 106 function as a gate electrode, and the conductive layer 108 function as a source electrode. The conductive layer 120a serving as a drain electrode and the conductive layer 120b serving as a drain electrode are made of indium and Oxides containing tin (In-Sn oxides), oxides containing indium and tungsten (In-W oxide), oxide containing indium, tungsten and zinc (In-WZ n-oxide), oxides containing indium and titanium (In-Ti oxide), indium and Oxides containing titanium and tin (In-Ti-Sn oxides), oxides containing indium and zinc oxide (In-Zn oxide), oxide containing indium, tin and silicon (In-Sn -Si oxide), oxide containing indium, gallium and zinc (In-Ga-Zn oxide) It is also possible to use oxide conductors such as oxides or metal oxides.

[0177] Here, the oxide conductor will be described. In this specification and the like, the oxide conductor is referred to as OC (Oxide Conductor). Examples of oxide conductors include When oxygen vacancies are formed in a metal oxide and hydrogen is added to the oxygen vacancies, donors are formed in the vicinity of the conduction band. As a result, the metal oxide becomes conductive and becomes a conductor. The metal oxides can be called oxide conductors. On the other hand, oxide conductors have a large conduction gap and are therefore transparent to visible light. It is a metal oxide that has a donor level near the conduction band. The influence of absorption by the metal oxide is small, and the metal oxide has the same level of transparency to visible light.

[0178] The conductive layer 111 may be a conductive film containing the oxide conductor (metal oxide) and a metal or Alternatively, a laminated structure of a conductive film containing a metal or an alloy may be used. In this case, the insulating layer that functions as a gate insulating film and the It is preferable to use a conductive film containing an oxide conductor on the contact side.

[0179] The conductive layer 111, the conductive layer 106, the conductive layer 120a, and the conductive layer 120b are made of Cu—X An alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti) may be applied. By using a Cu-X alloy film, it can be processed by wet etching process, so This makes it possible to reduce manufacturing costs.

[0180] The conductive layers 111, 106, 120a, and 120b are made of the above-mentioned gold. Among the group elements, titanium, tungsten, tantalum, and molybdenum are particularly preferred. In particular, the conductive layer 111, the conductive layer 106, the conductive layer 117, the conductive layer 108, the conductive layer 119, the conductive layer 110, the conductive layer 111, the conductive layer 106, the conductive layer 111, the conductive layer 108, the conductive layer 110, the conductive layer 111, the conductive layer 106 ... It is preferable to use a tantalum nitride film for the conductive layer 120a and the conductive layer 120b. The tantalum chloride film is electrically conductive and has a high barrier property against copper or hydrogen. In addition, the tantalum nitride film releases less hydrogen from itself, so that it is in contact with the semiconductor layer 108. The conductive film can be suitably used as a conductive film for forming a conductive layer or a conductive film in the vicinity of the semiconductor layer 108.

[0181] [Insulating layer 110] The insulating layer 110 functioning as a gate insulating film of the transistor 100 or the like is formed by plasma Chemical Vapor Deposition (PECVD: Plasma Enhanced Chemical Vapor Silicon oxide film, oxide film, etc. are formed by the por deposition method, sputtering method, etc. Silicon nitride film, silicon oxynitride film, silicon nitride film, aluminum oxide film, oxide hafnium tungsten oxide film, yttrium oxide film, zirconium oxide film, gallium oxide film, tantalum oxide film , magnesium oxide film, lanthanum oxide film, cerium oxide film, and neodymium oxide film, or The insulating layer 110 may have a stacked structure of two layers or three or more layers. The laminated structure may be formed as follows.

[0182] In addition, an insulating layer in contact with the semiconductor layer 108 that functions as a channel region of the transistor 100 or the like The edge layer 110 is preferably an oxide insulating film, and contains oxygen in excess of the stoichiometric composition. In other words, it is more preferable that the insulating layer 110 has a region containing oxygen (excess oxygen region). The insulating layer 110 is an insulating film that can release oxygen. To achieve this, for example, the insulating layer 110 is formed in an oxygen atmosphere, or the insulating layer after film formation is 110 may be heat-treated in an oxygen atmosphere.

[0183] Furthermore, when hafnium oxide is used as the insulating layer 110, the following effects are achieved. Hafnium has a higher dielectric constant than silicon oxide and silicon oxynitride. Compared to when silicon is used, the thickness of the insulating layer 110 can be increased, so that the tunnel current That is, a transistor with a small off-state current can be formed. Furthermore, hafnium oxide having a crystalline structure can be used to form amorphous hafnium oxide. It has a higher dielectric constant than hafnium oxide, which is used for the transistor with a small off-state current. To obtain a crystalline hafnium oxide, it is preferable to use hafnium oxide having a crystalline structure. Examples of the crystal structure include monoclinic and cubic crystals. Not limited to these.

[0184] Furthermore, it is preferable that the insulating layer 110 has few defects. The signal observed by ESR (Electron Spin Resonance) For example, the signal above is observed at a g value of 2.001. The E' center is an electron-doped ion that occurs in the dangling bond of silicon. The insulating layer 110 has a spin density due to the E' center of 3×10 17 spi ns / cm 3 Less than or equal to 5 x 10 16 spins / cm 3 Silicon oxide is less than A silicon oxynitride film or a silicon nitride film may be used.

[0185] [Semiconductor layer] When the semiconductor layer 108 is an In-M-Zn oxide, in order to form an In-M-Zn oxide film, The atomic ratio of the metal elements in the sputtering target used in the present invention preferably satisfies In>M. The atomic ratio of the metal elements in such a sputtering target is preferably In:M: Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn=2:1:3, I n:M:Zn=3:1:2, In:M:Zn=4:2:4.1, In:M:Zn=5:1 :6, In:M:Zn=5:1:7, In:M:Zn=5:1:8, In:M:Zn=6 :1:6, In:M:Zn=5:2:5, etc.

[0186] In addition, when the semiconductor layer 108 is an In-M-Zn oxide, the sputtering target For this purpose, it is preferable to use a target containing polycrystalline In-M-Zn oxide. By using a target containing In-M-Zn oxide, a crystalline semiconductor layer 108 The atomic ratio of the semiconductor layer 108 to be formed is determined by the above sputtering method. This includes a ±40% variation in the atomic ratio of metal elements contained in the target. For example, the composition of the sputtering target used for the semiconductor layer 108 is In:Ga:Zn=4. In the case of the atomic ratio of In:Ga:Z, the composition of the semiconductor layer 108 to be formed is In:Ga:Z. The atomic ratio may be close to n=4:2:3.

[0187] The semiconductor layer 108 has an energy gap of 2 eV or more, preferably 2.5 eV or more. In this way, by using metal oxides with a wide energy gap, The off-state current of the transistor can be reduced.

[0188] The semiconductor layer 108 preferably has a non-single-crystal structure. CAAC-OS(C Axis Aligned Crystalline Oxide Semiconductor), including polycrystalline, microcrystalline, or amorphous structures. In single crystal structures, the amorphous structure has the highest density of defect states, and CAAC-OS has the lowest density of defects. The level density is low.

[0189] However, in the semiconductor layer 108 of one embodiment of the present invention, a channel formation region of a transistor is formed using a metal oxide film. For example, the semiconductor device of this embodiment is not limited to a structure having a metal oxide. Silicon can be used for the channel forming region of the transistor. Amorphous silicon (a-Si:H), low temperature polysilicon (LTPS Polycrystalline silicon (Poly-Silicon) or crystalline silicon can be used. Crystalline silicon includes microcrystalline silicon, polycrystalline silicon, and single crystal silicon. Examples include:

[0190] [Production method example 1] An example of a method for manufacturing a transistor of one embodiment of the present invention will be described below. The transistor 100A illustrated in the above configuration example 2 will be described as an example.

[0191] The thin films (insulating films, semiconductor films, conductive films, etc.) that constitute the semiconductor device are formed by sputtering. method, chemical vapor deposition (CVD) method , vacuum evaporation, pulsed laser deposition (PLD) The CVD method can be used to form the film by plasma deposition, ALD, etc. Chemical vapor deposition (PECVD: Plasma Enhanced CVD) and thermal CVD Also, one of the thermal CVD methods is metal organic chemical vapor deposition (MOCVD:Me There is a method called tal Organic CVD.

[0192] In addition, thin films (insulating films, semiconductor films, conductive films, etc.) that constitute semiconductor devices are formed by spin coating, Dip, spray application, inkjet, dispensing, screen printing, offset Printing methods, doctor knife, slit coat, roll coat, curtain coat, It can be formed by a tool (equipment) such as a fukot.

[0193] Furthermore, when processing the thin films that make up the semiconductor device, photolithography and other methods are used. Other methods include nanoimprinting, sandblasting, and lift-off. The thin film may be processed by a method such as a masking method. The island-shaped thin film may be directly formed by the film method.

[0194] There are two typical photolithography methods: A resist mask is formed on the thin film to be processed by etching or the like. The other method is to remove the photomask after forming a photosensitive thin film. Then, the thin film is processed into a desired shape by performing development.

[0195] In photolithography, the light used for exposure is, for example, i-line (wavelength 365 nm), Uses g-ray (wavelength 436 nm), h-ray (wavelength 405 nm), or a mixture of these. In addition, ultraviolet light, KrF laser light, ArF laser light, etc. can be used. The exposure may also be performed by immersion exposure technology. , even with extreme ultraviolet (EUV) or X-rays. In addition, electron beams can be used instead of light for exposure. X-rays or electron beams are preferred because they allow extremely fine processing. When exposure is performed by scanning a beam such as a electron beam, a photomask is not required. be.

[0196] There are three methods for etching thin films: dry etching, wet etching, and sandblasting. Methods such as these can be used.

[0197] 6 to 8 are diagrams illustrating a method for manufacturing the transistor 100A. FIG.

[0198] [Formation of Conductive Layer 106] A conductive film is formed on the substrate 102 and processed by etching to form a gate electrode. A functional conductive layer 106 is formed (FIG. 6(A)).

[0199] [Formation of insulating layer 104] Next, the insulating layer 104 is formed to cover the substrate 102 and the conductive layer 106 (FIG. 6(B)). The insulating layer 104 is formed by using a plasma CVD method, an ALD method, a sputtering method, or the like. It is possible.

[0200] Here, the insulating layer 104 is formed to have a three-layer laminate structure.

[0201] The first layer 104a and the third layer 104c are formed by plasma CVD or sputtering. By a method or the like, a silicon oxide film, a silicon oxynitride film, a silicon nitride oxide film, or a silicon nitride film is formed. An insulating film containing silicon, such as a silicon film, is formed.

[0202] The second layer 104b is formed by sputtering or ALD. Silicon-free metal oxide films, such as hafnium oxide films, or hafnium aluminate films An insulating film containing a compound is formed.

[0203] Here, it is preferable to add oxygen to the insulating layer 104 after forming the insulating layer 104. The oxygen to be added to the insulating layer 104 may be an oxygen radical, an oxygen atom, an oxygen atomic ion, or an oxygen atom. There are various methods for adding ions, such as ion doping, ion implantation, Also, after forming a film for suppressing oxygen desorption on the insulating layer 104, Oxygen may be added to the insulating layer 104 through the film.

[0204] As the film for suppressing the desorption of the above-mentioned oxygen, indium, zinc, gallium, tin, aluminum, Aluminum, chromium, tantalum, titanium, molybdenum, nickel, iron, cobalt, or tungsten A conductive film or a semiconductor film having one or more of the above-mentioned elements can be used.

[0205] In addition, when oxygen is added in plasma treatment, the oxygen is excited by microwaves to form high-density oxygen. By generating oxygen plasma, the amount of oxygen added to the insulating layer 104 can be increased. In addition, by performing a plasma treatment in an atmosphere containing oxygen, the amount of oxygen adsorbed on the surface of the insulating layer 104 is reduced. This allows the removal of water, hydrogen, etc. from the semiconductor layer 108 to be formed later. Alternatively, water or hydrogen that may be present at the interface between the semiconductor layer 108 and the insulating layer 104 can be reduced.

[0206] When silicon nitride or silicon oxynitride is used as the insulating layer 104, the insulating layer In this case, hydrogen may be contained in 104. In this case, the above-mentioned plasma treatment or the like may be performed. As a result, the hydrogen concentration at least on the semiconductor layer 108 side can be reduced.

[0207] [Formation of Semiconductor Layer 108] Subsequently, the semiconductor layer 108 is formed on the insulating layer 104 (FIG. 6(C)).

[0208] The metal oxide film that becomes the semiconductor layer 108 is formed by sputtering using a metal oxide target. It is preferable to form it by a method.

[0209] In addition, when forming a metal oxide film, in addition to oxygen gas, an inert gas (e.g., helium Gases such as argon gas and xenon gas may be mixed. The ratio of oxygen gas to the total deposition gas when forming a film (hereinafter referred to as the oxygen flow ratio) is The oxygen flow rate is preferably 0% or more and 100% or less, and more preferably 5% or more and 20% or less. By lowering the amount ratio and making the metal oxide film relatively low in crystallinity, the on-current is increased. It can be a transistor.

[0210] The metal oxide film is formed under the following conditions: the substrate temperature is preferably from room temperature to 180° C. The substrate temperature during the deposition of the metal oxide film may be set to be between room temperature and 140°C. For example, if the substrate temperature is set to a temperature above room temperature but below 140° C., productivity will be increased, which is preferable. By forming a metal oxide film at room temperature or without intentional heating, crystalline This makes it easier to form a low-temperature metal oxide film.

[0211] The thickness of the semiconductor layer 108 is 3 nm or more and 200 nm or less, preferably 3 nm or less. The thickness may be set to 100 nm or more, and more preferably 3 nm or more and 60 nm or less.

[0212] As the substrate 102, a large glass substrate (for example, 6th to 12th generations) is used. When the substrate temperature is between 200°C and 300°C during metal oxide film formation, Therefore, when a large glass substrate is used, the substrate 102 may be deformed (distorted or warped). In this case, the substrate temperature during the deposition of the metal oxide film is set to be equal to or higher than room temperature and lower than 200°C. This makes it possible to suppress deformation of the glass substrate.

[0213] In addition, the sputtering gas must be highly purified. The oxygen gas and argon gas used in this process have a dew point of -40°C or less, preferably -80°C or less, and Preferably, the gas is purified to a temperature of -100°C or lower, more preferably -120°C or lower. By using this, it is possible to prevent moisture and the like from being taken into the metal oxide film as much as possible.

[0214] In addition, when forming a metal oxide film by sputtering, The chamber is cryopreserved to remove as much water as possible, which is an impurity for metal oxides. A high vacuum (5 x 10) was created using a vacuum pump of the adsorption type. -7 Pa to 1 x 10 -4 It is preferable to evacuate the air to a pressure of about 100 Pa. The gas molecules equivalent to H2O (gas molecules equivalent to m / z = 18) in the chamber Divide the pressure by 1×10 -4 Pa or less, preferably 5×10 -5 It is preferable to set it to Pa or less.

[0215] Before forming the metal oxide film, water and hydrogen adsorbed on the surface of the insulating layer 104 are desorbed. For example, a heat treatment is carried out at a temperature of 70°C or higher and 200°C or higher under a reduced pressure atmosphere. At this time, the surface of the insulating layer 104 can be exposed to the atmosphere. It is preferable to form the metal oxide film continuously without exposing it to heat. The heating chamber for heating the substrate and the deposition chamber for depositing the metal oxide film are connected by a gate valve. It is preferable to have a configuration in which they are connected via the like.

[0216] The formed metal oxide film is processed into the semiconductor layer 108 by wet etching. Either or both of the dry etching method and the dry etching method may be used.

[0217] After the metal oxide film is formed or processed into the semiconductor layer 108, heat treatment is performed to remove the metal. The metal oxide film or the semiconductor layer 108 may be dehydrogenated or dehydrated. Typically, the temperature is 150°C or higher and lower than the strain point of the substrate, or 250°C or higher and 450°C or lower, or 30 It is between 0℃ and 450℃.

[0218] Heat treatment is carried out using rare gases such as helium, neon, argon, xenon, krypton, or nitrogen. Alternatively, the heating may be carried out in an inert atmosphere containing oxygen. It should be noted that the inert atmosphere and oxygen atmosphere do not contain hydrogen, water, etc. The treatment time may be from 3 minutes to 24 hours.

[0219] The heat treatment can be carried out using an electric furnace, an RTA device, or the like. Therefore, heat treatment can be performed at a temperature above the strain point of the substrate for a short period of time. The processing time can be reduced.

[0220] The metal oxide film is formed while being heated, or after being formed, the metal oxide film is subjected to a heat treatment. By doing so, the hydrogen concentration in the metal oxide film obtained by SIMS was reduced to 5×10 19 atoms / cm 3 or less, or 1×10 19 atoms / cm 3 Below, 5 x 10 18 atoms / cm 3 or less, or 1 x 10 18 atoms / cm 3 or less, or 5 x 10 17 atom s / cm 3 or less, or 1×10 16 atoms / cm 3 It can be as follows:

[0221] [Formation of insulating layer 116] The nitride film containing metal elements that becomes the insulating layer 116 is formed by a method such as sputtering or ALD. It is preferable to form the film by a thin-film method. In particular, the ALD method has high step coverage and is very precise. Since a dense film can be formed, it is possible to obtain a film with high barrier properties.

[0222] The insulating layer 116 may be made of aluminum, ruthenium, titanium, tantalum, tungsten, or chromium. One or more selected from metal elements such as iron, oxygen, and nitrogen That is, it is preferable to use a metal film, a nitride film containing a metal element, or a nitride film containing a metal element. The oxide film may be provided so as to cover and be in contact with the oxide semiconductor. In some cases, a metal element is added to an oxide semiconductor to form a metal compound in the oxide semiconductor. The metal compound may attract hydrogen contained in the oxide semiconductor.

[0223] In the oxide semiconductor, the carrier density increases when hydrogen, nitrogen, or the like is present. Hydrogen in semiconductors reacts with oxygen that bonds with metal atoms to form water, which can lead to oxygen vacancies. When hydrogen enters the oxygen vacancies, the carrier density increases. The part may combine with oxygen that bonds with metal atoms to generate electrons, which are carriers. That is, the resistance of an oxide semiconductor containing nitrogen or hydrogen is reduced.

[0224] [Formation of insulating layer 109] Subsequently, an insulating layer 109 serving as a spacer layer is formed on the semiconductor layer 108 and the insulating layer 116. do.

[0225] The insulating layer 109 is, for example, an oxide film such as a silicon oxide film or a silicon oxynitride film. Plasma-enhanced chemical vapor deposition (PECVD) equipment (also called plasma CVD equipment) In this case, the source gas is a deposition gas containing silicon. It is preferable to use a gas containing silicon and an oxidizing gas. Examples of oxidizing gases include silane, disilane, trisilane, and fluorinated silane. , ozone, nitrous oxide, nitrogen dioxide, etc.

[0226] In addition, the insulating layer 109 is formed by increasing the flow rate of the oxidizing gas to 20 times or more the flow rate of the deposition gas. The pressure in the processing chamber is set to less than 100 times, or between 40 and 80 times, and the pressure is set to less than 100 Pa. By using a PECVD device with a pressure of 50 Pa or less, silicon oxide with a low defect level can be obtained. A silicon oxynitride film or a silicon nitride film can be formed.

[0227] In addition, as the insulating layer 109, a substrate placed in a vacuum-evacuated processing chamber of a PECVD apparatus is The plate is kept at 280°C or higher and 350°C or lower, and raw material gas is introduced into the treatment chamber. The pressure is set to 20 Pa or more and 250 Pa or less, and more preferably 100 Pa or more and 250 Pa or less. The insulating layer 109 is formed under the condition that high frequency power is supplied to the electrode provided in the processing chamber. A dense silicon oxide film or silicon oxynitride film can be formed.

[0228] Alternatively, the insulating layer 109 may be formed by a PECVD method using microwaves. Microwaves refer to the frequency range from 300MHz to 300GHz. The electron energy is low. The proportion of molecules that are absorbed is small, so it can be used to dissociate and ionize more molecules, and the density Therefore, it is possible to excite a high-energy plasma (high-density plasma) on the surface on which the film is to be formed and on which the deposition is to be performed. The insulating layer 109 can be formed with less plasma damage to the deposited material and fewer defects. .

[0229] The insulating layer 109 can also be formed by a CVD method using organic silane gas. The organic silane gases include ethyl silicate (TEOS: chemical formula Si(OC2H5)4), Tetramethylsilane (TMS: chemical formula Si(CH3)4), tetramethylcyclotetrasilane Octamethylcyclotetrasiloxane (TMCTS), Octamethylcyclotetrasiloxane (OMCTS), Hexa Methyldisilazane (HMDS), triethoxysilane (SiH(OC2H5)3), tri Silicon-containing compounds such as dimethylaminosilane (SiH(N(CH3)2)3) are used. By using the CVD method with organic silane gas, it is possible to obtain insulating films with high coating properties. Layer 109 can be formed.

[0230] [Etching of insulating layer 116 and insulating layer 109] Subsequently, the insulating layer 116 and a part of the insulating layer 109 are etched, and a part of the semiconductor layer 108 is removed. The area is exposed (Figure 6(D)).

[0231] Here, the insulating layer 109 and the insulating layer 116 are processed using the same resist mask. As a result, an opening having a top surface shape that is approximately the same as that of the semiconductor layer 108 is formed. 112 can be formed.

[0232] The semiconductor layer 108 is formed by etching the insulating layer 109 and the insulating layer 116. In some cases, a part of the insulating layer 109 is also etched and thinned. The end portion in contact with the side wall insulating layer 107a has a tapered shape with a taper angle. The tapered angle of the end portion of the insulating layer 109 is preferably, for example, 60 degrees or more. 15 degrees or less, preferably 70 degrees or more and 105 degrees or less, and more preferably 80 degrees or more and 95 degrees or less As will be described later, the shape of the end of the insulating layer 109 has a taper angle. By virtue of the tapered shape, the thickness of the sidewall insulating layer 107a when it is formed can be reduced. It can be controlled.

[0233] [Deposition of insulating layer 107] Next, in order to form sidewalls on the sides of the opening 112, an insulating layer 1 07 is deposited (Figure 6(E)).

[0234] The insulating layer 107 can be formed by a plasma CVD method, a sputtering method, or the like. The insulating layer 107 is a silicon oxide film or a silicon oxynitride film that is dense and has few defects. It is preferred that a .alpha.- ...beta.

[0235] [Formation of Sidewall Insulating Layer 107a] Next, anisotropic dry etching is performed without forming a resist mask on the insulating layer 107. By this, the sidewall insulating layer 107a is formed (FIG. 6(F)). Thus, a sidewall insulating layer 107a is formed on the side surface of the opening 112. The hole insulating layer 107a is gradually increased in thickness along the side surface of the opening 112 toward the semiconductor layer. It is preferable that the width of the insulating layer 107a is thick. During the etching in step 07, a part of the semiconductor layer 108 is also etched, and the sidewall insulating layer In some cases, the thickness of the semiconductor layer 108 is thinner than that of the semiconductor layer 108 in the area where the semiconductor layer 107a is in contact.

[0236] By forming the sidewall insulating layer 107a in this manner, the upper surface of the semiconductor layer 108 and The width (area) of the contact portion can be made approximately equal. In the channel length direction of 0A, the shape of the pair of insulating layers 107 is made symmetrical. The width of the contact portion between the sidewall insulating layer 107a and the semiconductor layer 108 is This can be controlled by adjusting the thickness of the sidewall insulating layer 107a.

[0237] [Heat Treatment] After the sidewall insulating layer 107a is formed, a heat treatment is performed in a nitrogen atmosphere. It is preferable to perform heat treatment in an oxygen atmosphere.

[0238] By the heat treatment, some of the hydrogen released from the insulating layer 116 is supplied to the semiconductor layer 108. As a result, a low-resistance (carrier-concentrated) layer is formed in the portion of the semiconductor layer 108 that contacts the insulating layer 116. A region 108n2 (highly polarized region) is formed.

[0239] Furthermore, in the region where the semiconductor layer 108 is not in contact with the insulating layer 116, hydrogen is not supplied and a high resistance is formed. The region 108i overlapping with the insulating layer 104 is a region 108i with a low carrier concentration. In the portion i, the semiconductor layer 108 is heated to remove impurities such as ZnO. Subsequently, hydrogen is released from the insulating layer 104 by heat treatment in an oxygen atmosphere. Oxygen is supplied to the semiconductor layer 108, and oxygen vacancies in the semiconductor layer 108 can be reduced. Since the insulating layer 104 contains a large amount of excess oxygen, it can be easily removed by a relatively low-temperature heat treatment. Even if the oxygen concentration is high, a sufficient amount of oxygen can be supplied to the semiconductor layer 108.

[0240] In addition, the semiconductor layer 108 is provided at a portion thereof in contact with the sidewall insulating layer 107a. A part of hydrogen diffuses laterally from the portion of the region 08 in contact with the insulating layer 116. A region 108n1 having a higher resistance than the region 108n2 and a lower resistance than the region 108i is formed. At this time, the area 108n1 located between the area 108n2 and the area 108i is Although the oxygen vacancies are smaller than those in the region 108n2, they are formed by the plasma treatment or the like. Therefore, most of the hydrogen diffusing from the region 108n2 can be trapped in the oxygen vacancies. As a result, almost no hydrogen is diffused to the region 108i side, and the carrier concentration is extremely low. The temperature is kept low.

[0241] The higher the maximum temperature of the heat treatment, the better. However, when a large substrate is used, for example, 10 0°C or higher and 450°C or lower, preferably 150°C or higher and 400°C or lower, more preferably 150°C or higher and 350°C or less, more preferably 150°C or more and 340°C or less, and even more preferably 20 The temperature is preferably 0°C or higher and 330°C or lower, more preferably 200°C or higher and 300°C or lower.

[0242] [Deposition of insulating layer 110] Subsequently, the insulating layer 110 is formed. The insulating layer 110 is formed by plasma CVD or sputtering. The insulating layer 110 can be formed by a method such as a coating method. It is preferable that the insulating film be formed of a silicon oxide film or a silicon oxynitride film, which is dense and not easily broken down (see FIG. 7(A)).

[0243] [Formation of Conductive Layer 111] Subsequently, a conductive layer 111 is formed on the insulating layer 110. The conductive layer 111 is made of a metal or an alloy. It is preferable to form the film by sputtering using the sputtering target described above. The conductive layer 111 is formed by depositing a conductive film on the insulating layer 110 so as to cover the opening 112. The conductive film is processed into the desired shape to form a gate electrode (Figure 7(B)).

[0244] [Formation of insulating layer 118] Subsequently, an insulating layer 118 is formed to cover the insulating layer 110 and the conductive layer 111 (FIG. 7(C) ).

[0245] The insulating layer 118 can be formed by a plasma CVD method, a sputtering method, or the like. The insulating layer 118 is preferably formed by a method similar to that for the insulating layer 109.

[0246] [Formation of openings 141a and 141b] Next, a mask is formed by lithography at a desired position on the insulating layer 118, and then the insulating layer 118 is Etching a portion of layer 118, insulating layer 110, insulating layer 109, and insulating layer 116 Then, openings 141a and 141b are formed, which reach the region 108n2 (FIG. 7(D)). .

[0247] [Formation of Conductive Layers 120a and 120b] Subsequently, a conductive film is formed on the insulating layer 118 so as to cover the openings 141a and 141b. The conductive film is then processed into a desired shape to form the conductive layers 120a and 120b. (Figure 7(D)).

[0248] Through the above steps, the transistor 100A can be manufactured. The cross-sectional view shown in is the same as the view shown in FIG. 2(B).

[0249] According to this manufacturing method, the low resistance regions that function as source and drain regions of the semiconductor layer are A junction region can be provided between the gate region and the channel forming region. This can effectively prevent impurities such as hydrogen from diffusing from the silicon dioxide film to the channel forming region. In addition, by providing a junction region, a transistor with excellent electrical characteristics can be realized. The carrier concentration in a part of the channel formation region increases, shortening the effective channel length. That is, the width of the gate electrode in the channel length direction and the channel length can be roughly Since it is possible to roughly match the channel length, circuit design becomes easier. Even if the The channel length can be reduced to less than 2 μm or even 1.5 μm or less, which is To realize the finest transistors, or to realize transistors with higher on-state current than conventional transistors. It becomes possible to manifest it.

[0250] Furthermore, according to this manufacturing method, a photomass for forming the sidewall insulating layer 107a is Since no sidewall insulating layer 107a is required, the manufacturing cost can be reduced. Since the junction regions at both ends of the channel forming region can be formed in a self-aligned manner, This allows the width of the area to be uniform, eliminating the problem of defects caused by misalignment of the photomask. Variation in properties can be suppressed, and yield can be improved.

[0251] In addition, for example, the maximum temperature in the manufacturing process of a transistor is set to 400°C or less, or 350°C or less. or below, or 340°C or below, or 330°C or below, or 300°C or below. This can increase productivity.

[0252] The above is the description of the first example of the manufacturing method.

[0253] In addition, when manufacturing the transistor 100 illustrated in Configuration Example 1, in this manufacturing method example, By omitting the step of forming the conductive layer 106 in the semiconductor device and by forming the insulating layer 104 as a single layer, It is possible to make it.

[0254] [Modification of Production Method Example 1] Hereinafter, a description will be given of an example of a manufacturing method in which some steps of the above-mentioned manufacturing method example 1 are changed.

[0255] [Variation 1] First, as in the above, a first layer 104a and a second layer 104b are formed on a substrate 102 as an insulating layer 104. The layer 104b and the third layer 104c are stacked.

[0256] Subsequently, a metal oxide film that will become the semiconductor layer 108 is formed on the third layer 104c. Then, a resist mask is formed on the metal oxide film, and a part of the metal oxide film is etched to form a semi-transparent film. A conductor layer 108 is formed, and an insulating layer 116 is formed (FIG. 8(A)). The insulating layer 116 is then etched using the resist mask (FIG. 8(B)). Then, an insulating layer 109 is formed (FIG. 8(C)).

[0257] At this time, in the region where the semiconductor layer 108 and the insulating layer 104 do not overlap, the insulating layer 10 Therefore, the upper surface of the insulating layer 116 is exposed. A part of the hydrogen that is introduced is supplied only to the semiconductor layer 108. In the unexposed portions, the insulating layer 116 can be prevented from absorbing oxygen.

[0258] Below, an example of a transistor configuration different from the above example will be described.

[0259] [Configuration example 3] According to one embodiment of the present invention, a transistor can be manufactured at a low temperature, and therefore, heat resistance Transistors can be fabricated on relatively low substrates. For example, flexible A transistor provided on a thin organic resin substrate will be described.

[0260] 9A and 9B are cross-sectional views of a transistor 100B, which will be described below as an example. 2A can be used for the top view. In comparison with the transistor 100A shown in FIG. 1, the substrate 102 is replaced by a substrate 102a. The main differences are that the insulating layer 103 is provided.

[0261] The substrate 102a is thin enough to be flexible (for example, a thickness of 100 nm or more). A substrate such as an organic resin (thickness: 1 μm or less) can be used.

[0262] As the organic resin, a polyimide resin can be typically used. is preferred because of its excellent heat resistance. Other examples include acrylic resin, epoxy resin, and polyamide Resin, polyimide amide resin, siloxane resin, benzocyclobutene resin, phenol Resin or the like can be used.

[0263] Organic resins can be applied by a variety of methods, including spin coating, dipping, spray coating, inkjet coating, and disc coating. Pens, screen printing, offset printing, doctor knife, slit coat, Using tools (equipment) such as roll coater, curtain coater, and knife coater, resin precursors are A mixed material of a solvent or a mixed material of a soluble resin material and a solvent is formed on a support substrate. After that, the solvent and the like are removed by heat treatment, and the material is hardened to form a base material containing an organic resin. Plate 102a can be formed.

[0264] For example, when using polyimide, a resin precursor that generates imide bonds upon dehydration is used. Alternatively, a material containing soluble polyimide may be used.

[0265] The substrate 102a is an extremely thin film (for example, 5 μm thick) formed by spin coating or the like. When organic resins (thickness less than 1000 nm) are used, sufficient mechanical strength cannot be obtained, making it difficult to transport and handle the substrate. Therefore, for reinforcement, the back side of the substrate 102a (transistor 100B) is provided with a flexible material having a thickness of 20 μm or more and 300 μm or less. The film may be attached via an adhesive layer.

[0266] The insulating layer 103 may be an inorganic insulating film. The film functions as a barrier film to prevent impurities contained in 2a from diffusing into the transistor 100B. It is preferable that this be possible.

[0267] Examples of inorganic insulating films with high barrier properties include silicon nitride, silicon nitride oxide, and aluminum oxide. Examples of the material include aluminum, aluminum nitride, and aluminum oxynitride.

[0268] In addition, when the insulating layer 103 is a laminated film, at least one layer of the insulating layer 103 should be made of an inorganic insulating material with high barrier properties. For example, a silicon oxynitride film and a nitride film are preferably applied from the substrate 102a side. A two-layer structure of a silicon oxynitride film, a silicon nitride film, and a silicon oxynitride film. A three-layer structure in which silicon films are stacked may also be used.

[0269] Here, an example of a method for manufacturing the transistor 100B will be described. The resin layer that will become the substrate 102a and the insulating layer 103 are laminated on a support substrate such as a metal foil. Then, a transistor is formed over the insulating layer 103 by a method similar to that of the above-described example of the manufacturing method. Thereafter, the support substrate and the substrate 102a are separated to obtain the flexible substrate 102a. The above transistor 100B can be fabricated.

[0270] The method for separating the support substrate from the substrate 102a can be various methods. By irradiating the laser light from the substrate side, the adhesion between the support substrate and the substrate 102a is reduced. In this case, a light absorbing layer may be provided between the support substrate and the substrate 102a. The light absorption layer can be made of a material that can absorb part of the light used in the laser beam. For example, when an excimer laser with a wavelength of 308 nm is used as the laser light, the optical absorption The material of the layer can be a metal, a semiconductor, an oxide, or the like. For example, silicon Semiconductor films, metal films such as titanium and tungsten, titanium oxide, tungsten oxide, and iron oxide An oxide film such as indium or indium tin oxide can be used.

[0271] In addition, an insulating layer 103 is formed on a support substrate, and after a transistor is fabricated, After separating the insulating layer 103, the insulating layer 103 and the flexible substrate 102b are bonded. The structure may be such that the layers are bonded together by a bonding layer 105. In this case, a cross section in the channel length direction is shown in FIG. 9(C).

[0272] At this time, it is preferable to form a release layer between the insulating layer 103 and the support substrate. For example, a layer containing a high melting point metal material such as tungsten as a peeling layer and an oxide of the metal material The insulating layer 103 thereon is made of silicon nitride, silicon oxide, Insulating layers containing inorganic insulating materials such as silicon oxynitride and silicon nitride oxide are stacked. With this structure, after the manufacturing process of the transistor is completed, Without laser irradiation, the interface between tungsten and tungsten oxide, The peeling can occur during the process or at the interface between the tungsten oxide and the insulating layer.

[0273] Furthermore, according to this manufacturing method, an organic resin is not provided on the surface on which the transistor is to be formed. Therefore, the temperature in the manufacturing process can be increased. The temperature at which the insulating layer is formed and the processing temperature for removing impurities contained in the insulating layer or semiconductor layer are determined. The temperature of the heat treatment can be increased, resulting in a more reliable transistor.

[0274] Furthermore, according to this manufacturing method, after the transistor is completed, the substrate 102b is bonded. Therefore, there is no limitation on the material of the substrate 102b. Various materials can be selected and used depending on the requirements.

[0275] The above is a description of a structural example of a transistor provided over a flexible substrate. do.

[0276] Here, the transistor 100B provided on the insulating layer 103 has the structure described above. The transistor 100A shown in the second configuration example is the same as the transistor 100A shown in the first configuration example. The transistor 100, each transistor exemplified in each manufacturing method example, or each transistor exemplified below Transistors can also be fabricated on flexible substrates.

[0277] [Configuration example 4] Below, an example of a transistor configuration in which the semiconductor layer configuration is different from that described above will be described.

[0278] [Configuration Example 4-1] 10A and 10B are cross-sectional views of a transistor 100C, which will be described below as an example. 2A can be used for the top view. The transistor 100A is different from the transistor 100A illustrated above in that the semiconductor layer 108 has a stacked structure. is different from.

[0279] Regarding the transistors exemplified below, the transistor 100 exemplified in Configuration Example 2 A is used as the basic configuration, but the present invention is not limited to this, and the transistor 100 exemplified in Configuration Example 1 may be used. Alternatively, a similar semiconductor layer can be applied to each transistor or the like exemplified in each manufacturing method example. can.

[0280] The semiconductor layer 108 is formed by stacking a semiconductor layer 108a and a semiconductor layer 108b from the insulating layer 104 side. The laminated structure is formed by the above-mentioned steps.

[0281] The semiconductor layer 108b is preferably a film having higher crystallinity than the semiconductor layer 108a.

[0282] The semiconductor layers 108a and 108b were formed using the same oxide target under the same film forming conditions. It is preferable that the conditions be varied so that the layers can be formed continuously without being exposed to the atmosphere.

[0283] For example, the oxygen flow rate ratio during the deposition of the semiconductor layer 108a is set to be equal to the oxygen flow rate during the deposition of the semiconductor layer 108b. Alternatively, oxygen may not be supplied during the deposition of the semiconductor layer 108a. This allows oxygen to be effectively supplied to the semiconductor layer 108a during the deposition of the semiconductor layer 108b. In addition, the semiconductor layer 108a has lower crystallinity than the semiconductor layer 108b, and On the other hand, the semiconductor layer 108b provided on the upper side can be made of a semiconductor. By forming the film with higher crystallinity than the insulating layer 108a, it is possible to improve the crystallinity during processing of the semiconductor layer 108 and during processing of the insulating layer 108b. For example, the semiconductor layer 108a may be formed with a CAC- An OS film can be used, and a CAAC-OS film can be used for the semiconductor layer 108b.

[0284] More specifically, the oxygen flow rate ratio during the deposition of the semiconductor layer 108a is set to 0% or more and less than 50%, preferably Preferably, it is 0% or more and 30% or less, more preferably 0% or more and 20% or less, and typically 10%. The oxygen flow rate ratio during the deposition of the semiconductor layer 108b is preferably set to 50% or more and 100% or less. Preferably, the ratio is 60% or more and 100% or less, more preferably 80% or more and 100% or less, and even more preferably is 90% or more and 100% or less, typically 100%. The conditions of pressure, temperature, power, etc. during film formation may be different between the layer 108a and the layer 108b. By keeping the conditions other than the ratio the same, the time required for the film formation process can be shortened, which is preferable. I wish.

[0285] By forming the semiconductor layer 108 in such a laminated structure, it is possible to obtain excellent electrical characteristics and high reliability. This makes it possible to realize a high-performance transistor.

[0286] The semiconductor layer 108a and the semiconductor layer 108b may be films having different compositions. At this time, both the semiconductor layer 108a and the semiconductor layer 108b are formed with In-Ga-Zn oxide. When an oxide is used, the semiconductor layer 108a has an oxide with a higher In composition than the semiconductor layer 108b. It is preferable to use a solid target.

[0287] [Configuration Example 4-2] 11A and 11B are cross-sectional views of a transistor 100D, which will be described below as an example.

[0288] The semiconductor layer 108 is formed by stacking a semiconductor layer 108c and a semiconductor layer 108a from the insulating layer 104 side. The laminated structure is formed by the above-mentioned steps.

[0289] The semiconductor layer 108c is preferably a film having higher crystallinity than the semiconductor layer 108a. The semiconductor layer 108c is a film in which hydrogen and oxygen are less likely to diffuse than the semiconductor layer 108a. It is preferable that

[0290] When In-Ga-Zn oxide is used as the semiconductor layer 108a and the semiconductor layer 108c In order to achieve this, the semiconductor layer 108c should be made of a material having a lower In content than the semiconductor layer 108a. It is also preferable that the semiconductor layer 108c is made of a material having a higher Zn content than the semiconductor layer 108a. This improves the barrier properties of the semiconductor layer 108c against hydrogen and oxygen. In particular, by increasing the Zn composition, the crystallinity of the semiconductor layer 108c can be improved. Since it becomes easy to increase the crystallinity, the barrier properties can be improved.

[0291] For example, the semiconductor layer 108a may have a ratio of the number of In, M, and Zn atoms of In:M:Z. n=5:1:6, In:M:Zn=4:2:3, In:M:Zn=1:1:1, or It is preferable to use a film formed from a sputtering target that is in the vicinity of the above.

[0292] For example, the semiconductor layer 108c may have a ratio of the number of In, M, and Zn atoms of In:M:Z Sputtering where n=1:3:4, In:M:Zn=1:3:2, or a value close thereto It is preferable to use a film formed from a target.

[0293] A semiconductor layer 108c with high barrier properties is provided between the semiconductor layer 108a and the insulating layer 104. This prevents oxygen and hydrogen from diffusing from the insulating layer 104 to the semiconductor layer 108a. Therefore, hydrogen in the channel formation region of the semiconductor layer 108a can be reduced, and reliability can be improved. In addition, the low-resistance region 108n2 of the semiconductor layer 108a can be By supplying oxygen to the area located at Therefore, the resistance between the source and drain can be reduced.

[0294] [Configuration Example 4-3] 12A and 12B are cross-sectional views of a transistor 100E, which will be described below as an example.

[0295] The semiconductor layer 108 is made up of a semiconductor layer 108c, a semiconductor layer 108a, and a semiconductor layer 108b from the insulating layer 104 side. The layer 108b and the layer 108c are stacked to form a laminated structure.

[0296] The semiconductor layer 108a and the semiconductor layer 108b are made of the same film as in the above-described Configuration Example 4-1. The semiconductor layer 108c can be formed using the same film as in the above-described Configuration Example 4-2. .

[0297] For example, the semiconductor layer 108a, the semiconductor layer 108b, and the semiconductor layer 108c are When a semiconductor film formed using a sputtering target with the same composition is used, The semiconductor layer 108b and the semiconductor layer 108c are films each having higher crystallinity than the semiconductor layer 108a. Preferably, the semiconductor layer 108b and the semiconductor layer 108c are semiconductor layers. It is preferable that the film is one through which hydrogen and oxygen are less likely to diffuse than the semiconductor layer 108a. The semiconductor layer 108a is a CAC-OS film, and the semiconductor layers 108b and 108c are A CAAC-OS film can be used.

[0298] For example, the semiconductor layers 108a to 108c may be made of In-Ga-Zn oxide. In this case, the semiconductor layers 108b and 108c are thicker than the semiconductor layer 108a. It is preferable to use a material having a lower In content than the semiconductor layer 108b. The layer 108c and the semiconductor layer 108a may be made of a material having a higher Zn content than the semiconductor layer 108a. preferable.

[0299] For example, the semiconductor layer 108a may have a ratio of the number of In, M, and Zn atoms of In:M:Z. n=5:1:6, In:M:Zn=4:2:3, In:M:Zn=1:1:1, or It is preferable to use a film formed from a sputtering target that is in the vicinity of the above.

[0300] For example, the semiconductor layer 108b and the semiconductor layer 108c may be formed by adding In, M, and Zn atoms. The ratio of In:M:Zn=1:3:4, In:M:Zn=1:3:2, or a ratio in the vicinity thereof It is preferable to use a film formed from a sputtering target having the following formula:

[0301] With this configuration, the insulating layer 104 is separated from the semiconductor layer 108 by the semiconductor layer 108c. While preventing impurities from diffusing into 8a, the semiconductor layer 108b prevents damage during processing. This makes it possible to realize a highly reliable transistor.

[0302] This concludes the description of configuration example 4.

[0303] The configuration examples, manufacturing method examples, and corresponding drawings etc. illustrated in this embodiment mode are merely examples. However, a part of the present invention may be implemented by appropriately combining it with other configuration examples, manufacturing method examples, drawings, etc. can.

[0304] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0305] (Embodiment 2) In this embodiment, a display device including the transistor described in the previous embodiment will be described. An example will be described.

[0306] [Configuration example] 13(A) is a top view showing an example of a display device. 00 is a pixel portion 702 provided on a first substrate 701 and a The source driver circuit section 704 and the gate driver circuit section 706 are connected to the pixel section 702 and the source driver circuit section 706. A shield is disposed to surround the gate driver circuit section 704 and the gate driver circuit section 706. The substrate 701 has a first substrate 701a and a second substrate 705a. The first substrate 701 and the second substrate 705 are bonded together with a sealant 712. That is, a pixel section 702, a source driver circuit section 704, and a gate driver The buffer circuit section 706 is sealed by the first substrate 701, the sealant 712, and the second substrate 705. Although not shown in FIG. 13A, the first substrate 701 and the second substrate 70 A display element is provided between the 5.

[0307] The display device 700 is surrounded by a sealant 712 on the first substrate 701. In a region different from the above region, an FPC terminal portion 708 (FPC: Flexible Printed The FPC terminal section 708 is connected to the pixel section 702, the source driver The gate driver circuitry 704 and the gate driver circuitry 706 are electrically connected to each other. In addition, an FPC 716 is connected to the FPC terminal portion 708, and the pixel portion 702, a source driver circuit section 704, and a gate driver circuit section 706 receive various signals. In addition, the pixel section 702, the source driver circuit section 704, the gate driver circuit section A signal line 710 is connected to the FPC 71 and the FPC terminal portion 708. 6 are transmitted to the pixel section 702, the source driver 703, and the like via a signal line 710. The power supply voltage is supplied to a gate driver circuit section 704, a gate driver circuit section 706, and an FPC terminal section 708.

[0308] Furthermore, the display device 700 may be provided with a plurality of gate driver circuits 706. The device 700 includes a source driver circuit section 704 and a gate driver circuit section 706. Although an example in which the pixel portion 702 is formed on the same first substrate 701 is shown, the present invention is not limited to this configuration. For example, only the gate driver circuit section 706 may be formed on the first substrate 701. Alternatively, only the source driver circuit portion 704 may be formed on the first substrate 701. In this case, a substrate on which a source driver circuit or a gate driver circuit is formed (for example, a single crystal semiconductor A driving circuit board formed of a conductive film and a polycrystalline semiconductor film) is mounted on the first substrate 701 or The drive circuit board may be provided on the FPC 716. The method is not particularly limited, and may be a COG (Chip On Glass) method, a wire board method, or the like. A bonding method or the like can be used.

[0309] The display device 700 also includes a pixel section 702, a source driver circuit section 704, and a gate The driver circuit portion 706 includes a plurality of transistors. A transistor having a specific position can be applied.

[0310] The display device 700 can also include various elements, such as: For example, electroluminescence (EL) elements (EL elements including organic and inorganic materials, organic EL elements, inorganic EL elements, LEDs, etc.), light-emitting transistor elements (which emit light according to the current) transistors), electron emission elements, liquid crystal elements, electronic ink elements, electrophoretic elements, Low-wetting element, plasma display panel (PDP), MEMS (micro- Electro-mechanical systems) displays (e.g., grating light bulbs) GLV (Glass Laser Diode), Digital Micromirror Device (DMD), Digital Microshaft Distributed Membrane Switching (DMS) element, Interferometric Modulation (IMOD) element ), piezoelectric ceramic displays, etc.

[0311] An example of a display device using an EL element is an EL display. An example of a display device using emission elements is a field emission display (FE D) or SED type flat panel display (SED: Surface-conductive n Electron-emitter Display) etc. An example of such a display device is a liquid crystal display (transmissive liquid crystal display, semi-transmissive liquid crystal display, etc.). Displays, reflective LCD displays, direct-view LCD displays, projection LCD displays Examples of display devices using electronic ink elements or electrophoretic elements include: There are also semi-transmissive LCD displays and reflective LCD displays. In this case, a part or all of the pixel electrodes should function as a reflective electrode. For example, a part or all of the pixel electrodes may be made of aluminum, silver, etc. In this case, it is also possible to provide a memory circuit such as an SRAM under the reflective electrode. This allows for further reduction in power consumption.

[0312] The display method of the display device 700 may be a progressive method or an interlace method. In addition, the color elements controlled by pixels when displaying colors include R It is not limited to the three colors GB (R stands for red, G stands for green, B stands for blue). For example, It may be composed of four pixels: a pixel, a B pixel, and a W (white) pixel. As shown above, two colors of RGB compose one color element, and two different colors are created depending on the color element. Alternatively, you can add one or more colors such as yellow, cyan, magenta, etc. to RGB. The size of the display area may be different for each dot of the color element. However, the disclosed invention is not limited to color display devices, but also includes monochrome display devices. The present invention can also be applied to display devices such as:

[0313] Also, backlights or frontlights (organic EL elements, inorganic EL elements, LEDs, fluorescent In order to display color on the display device by using white light (W) in the lamp, a colored layer (color The colored layer may be, for example, a red (R), green (G) ), blue (B), yellow (Y), etc. can be used in appropriate combination. By using a colored layer, it is possible to improve color reproducibility compared to when no colored layer is used. In this case, by arranging a region having a colored layer and a region not having a colored layer, The white light in the area without the color layer may be used directly for display. By arranging the colored layer, the decrease in brightness due to the colored layer can be reduced during bright display. It may be possible to reduce power consumption by 20 to 30%. However, organic EL elements and inorganic EL elements When using self-luminous elements such as The light may be emitted from an element having a luminescent color. In some cases, power consumption can be reduced even further.

[0314] In addition, as a colorization method, a part of the light emitted from the above-mentioned white light is passed through a color filter. In addition to the color filter method, which converts red, green, and blue by filtering, A method that uses each color of light (three-color method), or a method that uses part of the light emitted from the blue light to red or green A color conversion method (color conversion method, quantum dot method) may also be applied.

[0315] The display device 700A shown in FIG. 13(B) is suitable for use in electronic devices having large screens. For example, television equipment, monitor equipment, digital signage equipment, etc. It can be suitably used for printing.

[0316] The display device 700A includes a plurality of source driver ICs 721 and a pair of gate driver circuits. It has 722.

[0317] The plurality of source driver ICs 721 are attached to respective FPCs 723. In addition, the plurality of FPCs 723 are arranged such that one terminal is connected to the substrate 701 and the other terminal is connected to the printed circuit board 72. 4. By bending the FPC 723, the printed circuit board 724 It can be mounted on the back side of the pixel section 702 and installed in an electronic device, thereby saving space in the electronic device. It is possible to achieve this.

[0318] On the other hand, the gate driver circuit 722 is formed on the substrate 701. It is possible to realize electronic devices in a picture frame.

[0319] By adopting such a configuration, a large-sized and high-resolution display device can be realized. Diagonal surface size: 30 inches or more, 40 inches or more, 50 inches or more, or 60 inches or more In addition, the display device can be applied to display devices with resolutions of full high definition, 4K2K, or It is possible to realize extremely high-resolution display devices such as 8K4K.

[0320] [Cross-section example] In the following, a configuration using a liquid crystal element and an EL element as a display element will be described with reference to FIGS. 14 to 18. 14 and 15 are diagrams showing the structure of the dashed line QR in FIG. 16 is a cross-sectional view of the display device, which uses a liquid crystal element as the display element. 13(A) is a cross-sectional view taken along the dashed line QR in FIG. 13(A), and shows a display device using an EL element. This is the configuration.

[0321] First, the common parts shown in FIGS. 14 to 16 will be explained, and then the different parts will be explained. This will be explained below.

[0322] [Explanation of common parts of the display device] The display device 700 shown in FIGS. 14 to 16 includes a wiring portion 711, a pixel portion 702, and a , a source driver circuit section 704, and an FPC terminal section 708. The line section 711 includes a signal line 710 or a signal line 710a. The source driver circuit portion 704 includes a transistor 750 and a capacitor 790. It has a transistor 752 .

[0323] The transistor 750 and the transistor 752 are the same as those described in Embodiment 1. can be applied.

[0324] The transistor used in this embodiment is made of a highly purified oxide in which the formation of oxygen vacancies is suppressed. The transistor has a semiconductor film. The off-state current of the transistor can be reduced. This allows for longer retention times for electrical signals such as signals, and the write interval can also be extended when the power is on. Therefore, the frequency of refresh operations can be reduced, resulting in reduced power consumption. It has the effect of suppressing force.

[0325] In addition, the transistor used in this embodiment has a relatively high field-effect mobility. For example, a transistor capable of such high speed driving can be used in a display device. By using this in a device, the switching transistor in the pixel section and the driver used in the drive circuit section can be In other words, a separate driver circuit can be formed on the same substrate. Since it is not necessary to use a semiconductor device formed from a silicon wafer or the like, the part of the semiconductor device The number of parts can be reduced. Also, in the pixel section, transistors that can be driven at high speed are used. By using this data, high quality images can be provided.

[0326] The capacitor 790 has a conductive film that functions as a first gate electrode of the transistor 750. The lower electrode is formed through a process of processing the same conductive film as the film, and the transistor 750 is The semiconductor layer 108, which functions as a source region or a drain region, is in contact with the insulating layer 116. and an upper electrode formed through a process. The same insulating film as the insulating film that functions as the first gate insulating film of the transistor 750 is formed. The insulating film formed through the process of forming the insulating film 750 functions as a protective insulating film on the transistor 750. In other words, an insulating film is provided that is formed through a process for forming the same insulating film as the insulating film to be formed. That is, the capacitor element 790 is a stacked structure in which an insulating film functioning as a dielectric film is sandwiched between a pair of electrodes. It is a type structure.

[0327] 14 to 16, the transistor 750, the transistor 752, and the capacitor A planarization insulating film 770 is provided on the capacitor 790 .

[0328] 14 to 16, the transistor 750 and the The transistor 752 in the source driver circuit portion 704 has the same structure as the transistor 752 in the source driver circuit portion 704. However, the present invention is not limited to this. For example, the pixel section 702 and the source A transistor different from that of the driver circuit section 704 may be used. A top-gate transistor is used for the source driver circuit section 702, and a bottom-gate transistor is used for the source driver circuit section 704. Alternatively, a bottom-gate transistor may be used in the pixel portion 702. and a top-gate transistor is used in the source driver circuit section 704. The source driver circuit section 704 may be referred to as a gate driver circuit section. It may be read differently.

[0329] The signal line 710 is connected to the source and drain electrodes of the transistors 750 and 752. The signal line 710a is formed through the same process as the conductive film that functions as the transistor. The conductive film is formed through the same process as the conductive film that functions as the gate electrodes of the signal electrodes 750 and 752. For example, when a material containing copper is used as the wire 710, the signal delay due to the wiring resistance There are fewer problems, and it is possible to display on a large screen.

[0330] The FPC terminal portion 708 includes a connection electrode 760, an anisotropic conductive film 780, and an FPC 71. 6. The connection electrode 760 is connected to the source and drain electrodes of the transistors 750 and 752. The connection electrode 760 is formed through the same process as the conductive film that functions as the drain electrode. , and is electrically connected to a terminal of the FPC 716 via an anisotropic conductive film 780 .

[0331] The first substrate 701 and the second substrate 705 may be made of, for example, glass. In addition, the first substrate 701 and the second substrate 705 may be flexible substrates. The flexible substrate may be, for example, a plastic substrate. do.

[0332] In addition, a structure 778 is provided between the first substrate 701 and the second substrate 705. The structure 778 is a columnar spacer, which determines the distance ( The structure 778 is provided to control the cell gap. It is also possible to use a

[0333] On the second substrate 705 side, there is a light-shielding film 738 that functions as a black matrix, A colored film 736 that functions as a color filter, a light-shielding film 738, and a film that contacts the colored film 736 An insulating film 734 is provided.

[0334] [Configuration example of a display device using a liquid crystal element] The display device 700 shown in FIG. 14 includes a liquid crystal element 775. The liquid crystal element 775 includes a conductive film The conductive film 774 is formed on the second substrate 705. The display device 700 shown in FIG. The alignment state of the liquid crystal layer 776 changes depending on the voltage applied to the conductive film 772 and the conductive film 774. This controls whether light is transmitted or not, allowing images to be displayed.

[0335] The conductive film 772 serves as a source electrode or a drain electrode of the transistor 750. The conductive film 772 is formed over the planarization insulating film 770. The pixel electrode functions as one electrode of the display element.

[0336] The conductive film 772 may be a conductive film that transmits visible light or a conductive film that reflects visible light. As a conductive film that transmits visible light, for example, For example, a material containing one selected from indium (In), zinc (Zn), and tin (Sn) As a conductive film that is reflective in visible light, for example, aluminum, Alternatively, a material containing silver may be used.

[0337] When a conductive film that is reflective to visible light is used as the conductive film 772, the display device 700 The liquid crystal display device is a reflective type. When the liquid crystal display device 700 is used, the liquid crystal display device 700 becomes a transmissive liquid crystal display device. In the case of a transmissive liquid crystal display device, a polarizing plate is provided on the viewing side. A pair of polarizing plates is provided.

[0338] In addition, by changing the structure on the conductive film 772, the driving method of the liquid crystal element can be changed. An example of this case is shown in FIG. 15. The display device 700 shown in FIG. This is an example of a configuration using a horizontal electric field method (e.g., FFS mode) as the driving method. In the structure shown in FIG. 1, an insulating film 773 is provided over a conductive film 772, and a conductive film 773 is provided over the insulating film 773. In this case, the conductive film 774 is used as a common electrode. The insulating film 773 functions as a conductive film. The orientation state of the liquid crystal layer 776 can be controlled by the field.

[0339] Although not shown in FIGS. 14 and 15, either the conductive film 772 or the conductive film 774 Alternatively, an alignment film may be provided on one or both of the liquid crystal layers 776 on the side in contact with the liquid crystal layer 776. 14 and 15, a polarizing member, a phase difference member, an anti-reflection member, etc. Optical components (optical substrates) such as polarizing substrates and retardation substrates may be provided as appropriate. Circular polarization by the substrate may be used. Also, a backlight, a sidelight, etc. may be used as a light source. It may be used.

[0340] When liquid crystal elements are used as display elements, thermotropic liquid crystals, low molecular weight liquid crystals, polymer liquid crystals, crystals, polymer dispersed liquid crystals, polymer network liquid crystals, ferroelectric liquid crystals, antiferroelectric liquid crystals, etc. These liquid crystal materials can be used in various phases, such as cholesteric and smectic phases, depending on the conditions. These phases include cubic phase, chiral nematic phase, and isotropic phase.

[0341] In addition, when the in-plane switching method is adopted, a liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases, and when the temperature of cholesteric liquid crystal is increased, the cholesteric The blue phase appears just before the transition from the black phase to the isotropic phase. Therefore, in order to improve the temperature range, a liquid crystal composition containing a chiral agent of several weight percent or more is used. The liquid crystal composition containing the liquid crystal exhibiting the blue phase and the chiral agent is used in the liquid crystal layer. Since the liquid crystal display has a short rotational speed and is optically isotropic, no alignment treatment is required. Since the rubbing process is unnecessary, electrostatic damage caused by the rubbing process is prevented. This can prevent defects and damage to the liquid crystal display device during the manufacturing process. Furthermore, liquid crystal materials exhibiting a blue phase have little viewing angle dependency.

[0342] When a liquid crystal element is used as a display element, a TN (Twisted Nematic) ) mode, IPS (In-Plane-Switching) mode, FFS (Frin ge Field Switching) mode, ASM (Axially Symme tric aligned Micro-cell) mode, OCB(Optical Compensated Birefringence mode, FLC (Ferrero) lectric Liquid Crystal) mode, AFLC (AntiFerr oelectric Liquid Crystal) mode, ECB (Electri Call Controlled Birefringence mode, guest host A mode such as a 3D mode can be used.

[0343] Furthermore, normally black type liquid crystal display devices, such as those employing vertical alignment (VA) mode, The vertical alignment mode may be a transmission type liquid crystal display device. For example, MVA (Multi-Domain Vertical Alignment) ) mode, PVA (Patterned Vertical Alignment) mode Mode, ASV mode, etc. can be used.

[0344] [Display device using light-emitting elements] The display device 700 shown in FIG. 16 includes a light-emitting element 782. The light-emitting element 782 is made of a conductive film 16 includes a pixel electrode 772, an EL layer 786, and a conductive film 788. The EL layer 786 of the light emitting element 782 provided for each element emits light, and an image is displayed. The EL layer 786 can be made of an organic compound or an inorganic compound such as quantum dots. It has a compound.

[0345] Materials that can be used for the organic compound include fluorescent materials and phosphorescent materials. In addition, materials that can be used for quantum dots include colloidal quantum dot materials. materials, alloy-type quantum dot materials, core-shell-type quantum dot materials, core-type quantum dot materials, etc. In addition, the elements of groups 12 and 16, 13 and 15, or 14 and 16 are Materials containing loops may also be used. Alternatively, cadmium (Cd), selenium (Se), zinc ( Zn), sulfur (S), phosphorus (P), indium (In), tellurium (Te), lead (Pb), Quantum dots containing elements such as gallium (Ga), arsenic (As), and aluminum (Al) Materials may also be used.

[0346] In the display device 700 shown in FIG. 16, an insulating film 770 is formed on the planarizing insulating film 770 and the conductive film 772. The insulating film 730 covers part of the conductive film 772. The conductive film 788 has a light-transmitting property, and the EL layer 786 In this embodiment, the top emission structure is For example, a bottom emitter that emits light to the conductive film 772 side is used. A mission structure or a dual emitter that emits light to both the conductive film 772 and the conductive film 788 may be used. It can also be applied to junction structures.

[0347] A colored film 736 is provided at a position overlapping the light-emitting element 782, and a colored film 736 is provided at a position overlapping the insulating film 730. A light-shielding film 738 is provided in the position where the light-shielding film 738 is to be drawn, the wiring portion 711, and the source driver circuit portion 704. The colored film 736 and the light-shielding film 738 are covered with an insulating film 734. In addition, the space between the light emitting element 782 and the insulating film 734 is filled with a sealing film 732. In the display device 700 shown in FIG. 1, a configuration in which a colored film 736 is provided is exemplified. For example, the EL layer 786 may be formed in an island shape for each pixel, i.e., in a separate color. In the case where the colored film 736 is formed, the colored film 736 may not be provided.

[0348] [Configuration example of providing an input / output device to a display device] Furthermore, the display device 700 shown in FIGS. 14 to 16 may be provided with an input / output device. An example of the force device is a touch panel.

[0349] 17 and 16 show a configuration in which a touch panel 791 is provided on the display device 700 shown in FIG. 15. FIG. 18 shows a configuration in which a touch panel 791 is provided on a display device 700.

[0350] FIG. 17 is a cross-sectional view of a configuration in which a touch panel 791 is provided on the display device 700 shown in FIG. 18 is a cross-sectional view of a configuration in which a touch panel 791 is provided on the display device 700 shown in FIG. be.

[0351] First, the touch panel 791 shown in FIGS. 17 and 18 will be described below.

[0352] The touch panel 791 shown in FIGS. 17 and 18 is provided between the substrate 705 and the colored film 736. The touch panel 791 is a so-called in-cell type touch panel. 736 and may be formed on the substrate 705 side before the colored film 736 is formed.

[0353] The touch panel 791 includes a light-shielding film 738, an insulating film 792, an electrode 793, and an electrode 794, an insulating film 795, an electrode 796, and an insulating film 797. Capacitance between electrode 793 and electrode 794 that may occur when a detection object such as a stylus approaches It is possible to detect changes in

[0354] 17 and 18, an electrode 793 and The electrode 796 is formed through an opening in the insulating film 795. 17. The electrode 794 is electrically connected to the two electrodes 793 sandwiching the electrode 794 via the electrodes 793. 18 illustrates a configuration in which the region where the electrode 796 is provided is provided in the pixel portion 702. However, the present invention is not limited to this, and may be formed in the source driver circuit section 704, for example.

[0355] The electrodes 793 and 794 are provided in a region overlapping with the light-shielding film 738. As shown in FIG. 1, the electrode 793 is preferably provided so as not to overlap with the liquid crystal element 775. 18, the electrode 793 is provided so as not to overlap with the light emitting element 782. In other words, the electrode 793 overlaps with the light-emitting element 782 and the liquid crystal element 775. In other words, the electrode 793 has a mesh shape. By configuring the electrode 793 in this manner, the electrode 793 does not block the light emitted from the light emitting element 782. Alternatively, the electrode 793 may have a structure that does not block light that passes through the liquid crystal element 775. Therefore, the reduction in brightness due to the placement of the touch panel 791 is extremely small. Therefore, a display device with high visibility and reduced power consumption can be realized. 4 may be configured in a similar manner.

[0356] In addition, since the electrodes 793 and 794 do not overlap with the light-emitting element 782, The electrode 794 can be made of a metal material with low transmittance for visible light. Since the electrodes 793 and 794 do not overlap with the liquid crystal element 775, A metal material with low transmittance of visible light can be used.

[0357] Therefore, compared with electrodes using oxide materials with high visible light transmittance, The resistance of the electrode 794 can be reduced, improving the sensor sensitivity of the touch panel. It is possible.

[0358] For example, the electrodes 793, 794, and 796 may be made of conductive nanowires. The nanowires have an average diameter of 1 nm to 100 nm, preferably 5 nm to 50 nm. The size of the nanoparticles may be 5 nm or less, more preferably 5 nm or more and 25 nm or less. The wires may be metal nanowires such as Ag nanowires, Cu nanowires, or Al nanowires. For example, electrodes 793 and 794 may be used. When Ag nanowires are used for either one or all of 4, 796, The light transmittance can be set to 89% or more, and the sheet resistance can be set to 40Ω / □ or more and 100Ω / □ or less. Cut.

[0359] 17 and 18 show examples of the configuration of an in-cell type touch panel. For example, a so-called on-cell type transistor formed on the display device 700 may be used. a touch panel or a so-called out-cell type touch panel that is attached to the display device 700 It may also be possible to use the following.

[0360] In this way, the display device of one embodiment of the present invention can be used in combination with various types of touch panels. It can be used.

[0361] The configuration examples exemplified in this embodiment and the corresponding drawings etc. are at least part of The above can be implemented in appropriate combination with other configuration examples or drawings, etc.

[0362] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0363] (Embodiment 3) In this embodiment, a display device including a semiconductor device of one embodiment of the present invention will be described with reference to FIG. This will be used to explain.

[0364] The display device shown in FIG. 19A includes a region having pixels (hereinafter referred to as a pixel portion 502), A circuit section (hereinafter referred to as a driving section) is arranged outside the pixel section 502 and has a circuit for driving the pixel. circuit section 504) and a circuit having a function of protecting the element (hereinafter referred to as a protection circuit 506) and a terminal portion 507. Note that the protection circuit 506 may not be provided.

[0365] A part or the whole of the driver circuit portion 504 is formed on the same substrate as the pixel portion 502. This makes it possible to reduce the number of parts and terminals. When a part or the whole of the pixel portion 502 is not formed on the same substrate, the driver circuit portion Part or all of 504 is COG or TAB (Tape Automated Bond) This can be implemented by

[0366] The pixel section 502 is arranged in X rows (X is a natural number of 2 or more) and Y columns (Y is a natural number of 2 or more). The display device has a circuit for driving a plurality of display elements (hereinafter referred to as pixel circuit 501), The path section 504 is a circuit (hereinafter referred to as a gate driver) that outputs a signal (scanning signal) for selecting a pixel. 504a), for supplying signals (data signals) for driving the display elements of the pixels. The source driver 504b includes a driving circuit such as the circuit (hereinafter referred to as a source driver 504b).

[0367] The gate driver 504a includes a shift register and the like. A signal for driving the shift register is inputted through the terminal section 507, and a signal for outputting the shift register is outputted. For example, the gate driver 504a receives a start pulse signal, a clock signal, etc. The gate driver 504a receives a scanning signal and outputs a pulse signal. The gate line GL_1 to GL_X have a function of controlling the potential of the gate lines GL_2 to GL_X. A plurality of gate drivers 504a are provided, and the gate lines GL_ Alternatively, the gate driver 504a may control the GL_1 to GL_X separately. However, this is not limited to this, and the gate driver 5 04a may also provide other signals.

[0368] The source driver 504b includes a shift register and the like. Through the terminal section 507, signals for driving the shift register as well as the source of the data signal are transmitted. The source driver 504b receives a signal (image signal) that is to be output from the pixel circuit The source driver 504b has a function of generating a data signal to be written to the source driver 501. A data signal is generated in accordance with a pulse signal obtained by inputting a start pulse, a clock signal, etc. The source driver 504b has a function of controlling the output of a data signal. The data lines DL_1 to DL_Y are connected to the data lines DL_2 through DL_Y. Alternatively, the source driver 504b has a function of supplying an initialization signal. However, the present invention is not limited to this, and the source driver 504b may supply other signals. It is Noh.

[0369] The source driver 504b is configured using, for example, a plurality of analog switches. The source driver 504b sequentially turns on a plurality of analog switches, The image signal can be time-divided and output as a data signal. The source driver 504b may be configured using the same.

[0370] Each of the plurality of pixel circuits 501 is connected to one of the plurality of scanning lines GL to which a scanning signal is applied. A pulse signal is input via the data line DL, and a data signal is given via one of the data lines DL. Each of the pixel circuits 501 is connected to a gate driver 504a controls writing and holding of data of the data signal. The second pixel circuit 501 is connected to a gate driver GL_m (where m is a natural number equal to or less than X) via a scanning line GL_m. A pulse signal is input from 504a, and the data line DL_n ( A data signal is input from the source driver 504b via the input terminal 504a (n is a natural number equal to or less than Y).

[0371] The protection circuit 506 shown in FIG. 19(A) is, for example, a gate driver 504a and a pixel circuit 5 01. Alternatively, the protection circuit 506 is connected to the scanning line GL, which is the wiring between the source driver The protection circuit 504b is connected to the data line DL, which is the wiring between the protection circuit 504b and the pixel circuit 501. The line 506 can be connected to the wiring between the gate driver 504a and the terminal section 507. Alternatively, the protection circuit 506 is connected to the wiring between the source driver 504b and the terminal unit 507. The terminal unit 507 can be used to transmit power and control signals from an external circuit to the display device. This refers to the part where terminals for inputting the image signal and the image signal are provided.

[0372] When a potential outside a certain range is applied to the wiring to which the protection circuit 506 is connected, the protection circuit 506 This is a circuit that brings one wire into electrical continuity with another wire.

[0373] As shown in FIG. 19A, a pixel section 502 and a driver circuit section 504 are provided with a protection circuit 50. 6, ESD (Electro Static Discharge: This can improve the resistance of the display device to overcurrents caused by electrostatic discharges and the like. However, the configuration of the protection circuit 506 is not limited to this. For example, A configuration in which a protection circuit 506 is connected, or a configuration in which a protection circuit 506 is connected to a source driver 504b Alternatively, a protection circuit 506 may be connected to the terminal section 507. You can also do this.

[0374] In FIG. 19(A), the gate driver 504a and the source driver 504b Therefore, although an example in which the driver circuit portion 504 is formed is shown, the present invention is not limited to this configuration. For example, only the gate driver 504a is formed, and a separately prepared source driver circuit is formed. A substrate (for example, a drive circuit substrate formed of a single crystal semiconductor film or a polycrystalline semiconductor film) is implemented. It may also be configured to be equipped with

[0375] Here, a configuration different from that of FIG. 19(A) is shown in FIG. 20. In FIG. 20, A pair of source lines (for example, source line DLa1 and source line DLb1) are arranged to sandwich the array of pixels. DLb1) are arranged. In addition, two adjacent gate lines (for example, gate line GL_1 and gate line GL_2) are electrically connected.

[0376] In addition, the pixels connected to the gate line GL_1 are connected to one of the source lines (source line DLa1, The pixels connected to the gate line GL_1 are connected to the other source line DLa2, etc. (source line DLb1, source line DLb2, etc.).

[0377] With this configuration, two gate lines can be selected at the same time. As a result, the length of one horizontal period can be doubled compared to the configuration shown in FIG. 19(A). This makes it easy to increase the resolution and size of the display device.

[0378] 19(A) and 20. The pixel circuits 501 shown in FIG. 19(B) may be, for example, The configuration shown in FIG.

[0379] The pixel circuit 501 shown in FIG. 19B includes a liquid crystal element 570, a transistor 550, and a capacitor. The transistor 550 may be any of the transistors described in the previous embodiments. can be applied.

[0380] The potential of one of the pair of electrodes of the liquid crystal element 570 is set appropriately according to the specifications of the pixel circuit 501. The orientation state of the liquid crystal element 570 is set by the written data. A common potential is applied to one of a pair of electrodes of the liquid crystal element 570 included in each of the pixel circuits 501. A common potential may be applied to the pair of liquid crystal elements 570 of the pixel circuits 501 in each row. One of the electrodes may be given a different potential.

[0381] For example, the display device including the liquid crystal element 570 can be driven in a TN mode, an STN mode, or the like. Mode, VA mode, ASM (Axially Symmetric Aligned Mode) Micro-cell mode, OCB (Optically Compensated Birefringence mode, FLC (Ferroelectric Liquid Crystal id Crystal) mode, AFLC (AntiFerroelectric Li Quid Crystal) mode, MVA mode, PVA (Patterned Ve Vertical Alignment mode, IPS mode, FFS mode, or TBA (Transverse Bend Alignment) mode may also be used. In addition to the above-mentioned driving method, the display device can also be driven by an ECB (Electric Carrier Board) or the like. Ally Controlled Birefringence mode, PDLC (P Polymer Dispersed Liquid Crystal (PNLC) mode (Polymer Network Liquid Crystal) mode, guest However, there are various types of liquid crystal elements and their driving methods, and they are not limited to these. A variety of materials can be used.

[0382] In the pixel circuit 501 in the mth row and the nth column, the source electrode or the drain electrode of the transistor 550 One of the electrodes is electrically connected to the data line DL_n, and the other is a pair of electrodes of the liquid crystal element 570. The gate electrode of the transistor 550 is electrically connected to the other of the scan lines GL The transistor 550 controls the writing of data of the data signal. It has the function of controlling

[0383] One of the pair of electrodes of the capacitor 560 is connected to a wiring to which a potential is supplied (hereinafter, a potential supply line VL ) and the other is electrically connected to the other of the pair of electrodes of the liquid crystal element 570. The value of the potential of the potential supply line VL is set appropriately according to the specifications of the pixel circuit 501. The capacitor 560 functions as a storage capacitor for storing written data.

[0384] For example, in a display device having the pixel circuit 501 of FIG. 19(B), The pixel circuits 501 in each row are sequentially selected by the gate driver 504a shown in FIG. 550 is turned on and data of the data signal is written.

[0385] The pixel circuit 501 in which data has been written is turned off by turning off the transistor 550. By repeating this process for each row, an image can be displayed.

[0386] Furthermore, the plurality of pixel circuits 501 shown in FIG. 19(A) may be, for example, a configuration shown in FIG. 19(C). It can be said that:

[0387] The pixel circuit 501 shown in FIG. 19C includes transistors 552 and 554 and a capacitor. The transistor 552 and the transistor 554 The transistor described in the above embodiment can be used for either one or both of the above.

[0388] One of the source electrode and the drain electrode of the transistor 552 is electrically connected to the data line DL_n. The gate electrode is electrically connected to the scanning line GL_m.

[0389] The transistor 552 has a function of controlling writing of data signals.

[0390] One of a pair of electrodes of the capacitor 562 is electrically connected to the potential supply line VL_a, and the other is electrically connected to the other of the source electrode and the drain electrode of the transistor 552.

[0391] The capacitor 562 functions as a storage capacitor for holding written data.

[0392] One of the source electrode and the drain electrode of the transistor 554 is connected to the potential supply line VL_a. Furthermore, the gate electrode of transistor 554 is electrically connected to the It is electrically connected to the other of the source electrode and the drain electrode.

[0393] One of the anode and cathode of the light emitting element 572 is electrically connected to the potential supply line VL_b. The other is electrically connected to the other of the source electrode and drain electrode of the transistor 554. will be done.

[0394] The light emitting element 572 may be, for example, an organic electroluminescence element (also known as an organic EL element). However, the light emitting element 572 is not limited to this. Alternatively, an inorganic EL element containing an inorganic material may be used.

[0395] A high power supply potential VDD is applied to one of the potential supply lines VL_a and VL_b. and the other is supplied with a low power supply potential VSS.

[0396] In a display device having the pixel circuit 501 of FIG. 19(C), for example, The pixel circuits 501 in each row are sequentially selected by the gate driver 504a, and the transistors 552 are turned on. The data signal is written by turning it on.

[0397] The pixel circuit 501 to which the data has been written is turned off by turning off the transistor 552. Furthermore, the transistor 554 is held in a holding state in response to the potential of the written data signal. The amount of current flowing between the source electrode and the drain electrode is controlled, and the light emitting element 572 The light is emitted at a brightness that corresponds to the flow rate. By repeating this process row by row, an image can be displayed.

[0398] The configuration examples exemplified in this embodiment and the corresponding drawings etc. are at least part of The above can be implemented in appropriate combination with other configuration examples or drawings, etc.

[0399] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0400] (Fourth embodiment) Electronic devices to which the display device of one embodiment of the present invention can be applied will be described below. The following description will be given taking an example of an electronic device that includes a power generating device and a power receiving device.

[0401] A portable information terminal will be described as an example of the electrical device with reference to FIG.

[0402] FIG. 21(A) is a perspective view showing the front and side of the portable information terminal 8040. The information terminal 8040 may be, for example, a mobile phone, an electronic mail, a document viewing and creation, a music playback, It is possible to run various applications such as internet communication and computer games. The portable information terminal 8040 has a display unit 8042, a camera 8045, and a It has a microphone 8046 and a speaker 8047, and the left side of the housing 8041 is provided with an operation It has a button 8043 and a connection terminal 8048 on the bottom.

[0403] The display portion 8042 includes a display module or a display panel according to one embodiment of the present invention.

[0404] A portable information terminal 8040 shown in FIG. 21A includes a housing 8041 and a display unit 8042. However, the present invention is not limited to this example, and the display unit 8042 may be provided on the back of the portable information terminal 8040. Alternatively, two or more display units may be provided as a foldable portable information terminal.

[0405] The display unit 8042 is also provided with a touch panel that allows information to be input using a pointing device such as a finger or a stylus. A touch panel is provided as an input means. The icon 8044 can be easily operated by the pointing means. This layout eliminates the need for an area for placing a keyboard on the mobile information terminal 8040, allowing for a large area The display can be placed in the area where the device is used. Information can also be input using a finger or a stylus. This allows for a user-friendly interface. There are various types of sensors, including resistive, capacitive, infrared, electromagnetic induction, and surface acoustic wave. Various methods can be adopted, but since the display unit 8042 is curved, it is particularly important to use a method that is resistant to bending. It is preferable to use a capacitive touch panel. The so-called in-cell method, which is combined with the display module or display panel described above. It may also be of the type:

[0406] In addition, even if the touch panel can function as an image sensor, In this case, for example, by touching the display unit 8042 with a palm or a finger, a palm print, a fingerprint, or the like can be captured. In addition, the display unit 8042 is provided with a backlight that emits near-infrared light. If a sensing light source that emits infrared or near-infrared light is used, it is possible to capture images of finger veins, palm veins, etc. It is also possible to do so.

[0407] The display unit 8042 may be provided with a keyboard instead of a touch panel. Both a touch panel and a keyboard may be provided.

[0408] The operation button 8043 can be given various functions depending on the purpose. For example, the button 8043 is used as a home button, and pressing the button 8043 displays Alternatively, the home screen may be displayed. By doing so, the main power supply of the mobile information terminal 8040 may be turned off. If the device is in sleep mode, pressing button 8043 will bring it out of sleep mode. In addition, you can set it to return to normal depending on the period of time you keep pressing it or pressing it at the same time as another button. This allows it to be used as a switch to activate various functions.

[0409] In addition, button 8043 can be used as a volume adjustment button or mute button, and a speaker for sound output. The speaker 8047 may have a function to adjust the volume of the speaker. The sound set for specific processes such as the startup sound of the rating system (OS), music playback application Music from various applications, such as music from software, and sound files executed by various applications It outputs various sounds such as a call sound, an incoming call sound for an email, etc. Although not shown, the sound output can be output from a speaker. Use headphones, earphones, or headphones in addition to or instead of the 8047 speaker. A connector for outputting sound to a device such as a headset may be provided.

[0410] In this way, various functions can be given to the button 8043. In FIG. , the mobile information terminal 8040 is shown with two buttons 8043 on the left side. The number and arrangement of the buttons 8043 are not limited to this and can be designed as appropriate.

[0411] The microphone 8046 can be used for voice input and recording. The image acquired by 45 can be displayed on the display unit 8042.

[0412] The mobile information terminal 8040 is operated using a touch panel provided on the display unit 8042. In addition to the buttons 8043, the camera 8045 and the sensors built into the mobile information terminal 8040 are also included. It can also be used to recognize the user's movements (gestures) and perform operations (gesture Alternatively, the microphone 8046 can be used to recognize the user's voice. In this way, operations can be performed using natural human behavior (called voice input). NUI (Natural User Interface) technology for inputting data into electrical devices By implementing the above, the operability of the mobile information terminal 8040 can be further improved.

[0413] The connection terminal 8048 is a signal or power input terminal for communication with external devices and power supply. For example, in order to connect the portable information terminal 8040 to an external memory drive, 8 can be used. For example, an external HDD (hard disk drive) can be used as an external memory drive. Drives), flash memory drives, DVDs (Digital Versati DVD-R (DVD-Recordable), DVD-RW (DV D-ReWritable), CD (Compact Disc), CD-R (Comp CD-RW (Compact Disc Recordable), CD-RW (Compact Disc Recordable), CD-RW (Compact Disc Recordable) ReWritable), MO(Magneto Optical Disc), FDD (Floppy Disk Drive), or other non-volatile solid state drive Recording media drives such as solid state drives (SSD) The portable information terminal 8040 has a touch panel on the display portion 8042. However, instead of this, a keyboard may be provided on the housing 8041. It may be attached externally.

[0414] FIG. 21A shows a portable information terminal 8040 having one connection terminal 8048 on the bottom surface. However, the number and arrangement of the connection terminals 8048 are not limited to this and can be designed as appropriate. can be done.

[0415] FIG. 21(B) is a perspective view showing the rear and side of the portable information terminal 8040. The information terminal 8040 has a solar cell 8049 and a camera 8050 on the surface of a housing 8041. It also includes a charge / discharge control circuit 8051, a battery 8052, a DCDC converter 8053, etc. 21B, a battery 8052 is used as an example of the charge / discharge control circuit 8051. , a configuration having a DC-DC converter 8053 is shown.

[0416] A solar cell 8049 attached to the back of the portable information terminal 8040 supplies power to the display, It can be supplied to a touch panel, a video signal processor, etc. The solar cell can be provided on one side or both sides of the housing 8041. By installing the battery 8049, it can be used outdoors or in other places where there is no power supply. The battery 8052 of the information terminal 8040 can be charged.

[0417] In addition, solar cells 8049 include monocrystalline silicon, polycrystalline silicon, and microcrystalline silicon. , amorphous silicon or silicon-based solar cells made of these layers, InGaAs-based solar cells, GaAs, CIS, Cu2ZnSnS4, CdTe-CdS solar cells, organic dyes dye-sensitized solar cells using conductive polymers and fullerenes, organic thin-film solar cells using conductive polymers and fullerenes, Quantum dot type thin film with quantum dot structure formed by silicon or the like in the i-layer of pin structure A solar cell or the like can be used.

[0418] Here, an example of the configuration and operation of the charge / discharge control circuit 8051 shown in FIG. This will be explained using the block diagram shown in FIG.

[0419] FIG. 21(C) shows a solar cell 8049, a battery 8052, a DC-DC converter 80 53, converter 8057, switch 8054, switch 8055, switch 8056, The display unit 8042 is shown, along with the battery 8052 and the DC-DC converter 8053. ,Converter 8057, switch 8054, switch 8055, switch 8056,Fig. This corresponds to the charge / discharge control circuit 8051 shown in 21(B).

[0420] The electricity generated by the solar cell 8049 from external light is used to charge the battery 8052. To obtain the required voltage, the voltage is increased or decreased by the DC-DC converter 8053. When the power from the solar cell 8049 is used to operate the display unit 8042, the switch 80 54 is turned on, and the converter 8057 increases or decreases the voltage to the voltage required for the display unit 8042. When the display unit 8042 is not to be displayed, the switch 8054 is turned off. Switch 8055 is turned on to charge battery 8052.

[0421] Although the solar cell 8049 is shown as an example of the power generating means, the present invention is not limited to this and may be applied to a piezoelectric element. Other power generation methods such as piezoelectric elements and thermoelectric elements (Peltier elements) are used to generate electricity. The battery 8052 of the portable information terminal 8040 may be charged. The charging method is not limited to this, and for example, the charging may be performed by connecting the above-mentioned connection terminal 8048 to a power source. In addition, a contactless power transmission module that transmits and receives power wirelessly for charging may be used. The above charging methods may be used in combination.

[0422] Here, the state of charge (SOC) of the battery 8052 is (omitted) is displayed in the upper left corner (within the dashed frame) of the display unit 8042. The charging status of the mobile information terminal 8040 can be checked accordingly. A power saving mode can also be selected. When the user selects the power saving mode, For example, the user can operate the above-mentioned button 8043 or icon 8044 to access the information stored in the mobile information terminal 8040. The display module or display panel, the CPU and other computing devices, memory, and other components are power-saving. Specifically, in each of these components, In power saving mode, the device will reduce or disable certain features depending on the charging status. It is also possible to configure the device to automatically switch to power saving mode depending on the settings. The portable information terminal 8040 is provided with a detection means such as an optical sensor, and when the portable information terminal 8040 is used, By detecting the amount of external light and optimizing the display brightness, the power consumption of the battery 8052 is reduced. This can reduce costs.

[0423] Also, when charging by the solar battery 8049 or the like, as shown in FIG. 21(A), the display unit 80 An image or the like showing this may be displayed in the upper left corner of 42 (within the dashed frame).

[0424] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0425] (Embodiment 5) In this embodiment, a display module that can be manufactured using one embodiment of the present invention will be described. and explain.

[0426] The display module 6000 shown in FIG. 22(A) includes an upper cover 6001 and a lower cover 6002. Between the FPC 6005 and the display device 6006, the frame 6009, and the printer The device has a main board 6010 and a battery 6011.

[0427] For example, a display device manufactured according to one embodiment of the present invention can be used as the display device 6006. The display device 6006 realizes a display module with extremely low power consumption. It is possible.

[0428] The upper cover 6001 and the lower cover 6002 are designed to fit the size of the display device 6006. The shape and dimensions can be changed as appropriate.

[0429] A touch panel may be provided over the display device 6006. A resistive or capacitive touch panel may be used by superimposing it on the display device 6006. In addition, a touch panel is not provided, and the display device 6006 does not have a touch panel function. It is also possible to make it so that

[0430] The frame 6009 has a function of protecting the display device 6006 and also a function of preventing the operation of the printed circuit board 6010. It also functions as an electromagnetic shield to block electromagnetic waves generated by the frame. The frame 6009 may also function as a heat sink.

[0431] The printed circuit board 6010 includes a power supply circuit, a signal circuit for outputting a video signal and a clock signal. The power supply circuit is provided with a signal processing circuit. Alternatively, the power source may be a battery 6011 provided separately. 1 can be omitted if commercial power is used.

[0432] FIG. 22(B) is a schematic cross-sectional view of a display module 6000 equipped with an optical touch sensor. is.

[0433] The display module 6000 includes a light emitting section 6015 and a receiving section 6016 provided on a printed circuit board 6010. The optical unit 6016 is enclosed by an upper cover 6001 and a lower cover 6002. The region has a pair of light guide portions (light guide portion 6017a, light guide portion 6017b).

[0434] The upper cover 6001 and the lower cover 6002 can be made of, for example, plastic. In addition, the upper cover 6001 and the lower cover 6002 are each thin (for example, 0. Therefore, the display module 6000 can be extremely Furthermore, it is possible to make the upper cover 6001 and the lower cover 6002 with less material. Since it is possible to produce 002, the production cost can be reduced.

[0435] The display device 6006 is connected to a printed circuit board 6010 and a battery via a frame 6009. The display device 6006 and the frame 6009 are provided so as to overlap with the light guide unit 6011. 017a and fixed to the light guiding portion 6017b.

[0436] Light 6018 emitted from the light emitting unit 6015 is guided to the display device 600 by the light guiding unit 6017a. 6, and reaches the light receiving part 6016 through the light guiding part 6017b. A touch operation is detected when the light 6018 is blocked by a detection object such as an illustration. It is possible.

[0437] A plurality of light emitting sections 6015 are provided along two adjacent sides of the display device 6006, for example. A plurality of light receiving sections 6016 are provided at positions facing the light emitting sections 6015. It is possible to obtain information about the position where the touch operation was performed.

[0438] The light emitting unit 6015 can be a light source such as an LED element. 6015, a light that emits infrared rays that are invisible to the user and harmless to the user. It is preferred to use a source.

[0439] The light receiving section 6016 is a photoelectric element that receives the light emitted by the light emitting section 6015 and converts it into an electrical signal. Preferably, a photodiode capable of receiving infrared rays can be used. can.

[0440] The light guide portions 6017a and 6017b are made of a material that transmits at least the light 6018. By using the light guide portion 6017a and the light guide portion 6017b, the light emitting portion The light receiving unit 6015 and the light receiving unit 6016 can be disposed below the display device 6006, and external light is received. This can prevent the light from reaching the light unit 6016 and causing the touch sensor to malfunction. It is preferable to use a resin that absorbs infrared rays and transmits infrared rays. This can more effectively suppress the production of

[0441] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0442] (Sixth embodiment) In this embodiment, electronic devices including a display device manufactured using one embodiment of the present invention will be described. and explain.

[0443] FIG. 23(A) shows the appearance of the camera 8000 with the viewfinder 8100 attached. This is a diagram.

[0444] The camera 8000 includes a housing 8001, a display unit 8002, operation buttons 8003, and a shutter. The camera 8000 has a button 8004 and the like. The camera 8000 also has a detachable lens 8006. It is attached.

[0445] Here, the camera 8000 is assumed to have a lens 8006 that is detached from the housing 8001 and replaced. However, the lens 8006 and the housing may be integrated.

[0446] The camera 8000 can capture an image by pressing the shutter button 8004. The display unit 8002 also functions as a touch panel. It is also possible to take an image by

[0447] The housing 8001 of the camera 8000 has a mount with electrodes, and a finder 810 In addition to the 0, strobe devices etc. can also be connected.

[0448] The finder 8100 includes a housing 8101, a display unit 8102, buttons 8103, etc. .

[0449] The housing 8101 has a mount that engages with the mount of the camera 8000, The mount can be attached to the camera 8000. The image received from the camera 8000 through the electrode is displayed on the display unit 8102. It can be done.

[0450] The button 8103 functions as a power button. The 8102 display can be switched on and off.

[0451] The display unit 8002 of the camera 8000 and the display unit 8102 of the viewfinder 8100 are The display device according to one embodiment of the present invention can be applied.

[0452] In FIG. 23(A), the camera 8000 and the finder 8100 are separate electronic devices. These are configured to be detachable, but the housing 8001 of the camera 8000 is equipped with a display device. The camera may have a built-in viewfinder.

[0453] FIG. 23B is a diagram showing the appearance of the head mounted display 8200.

[0454] The head-mounted display 8200 includes a mounting part 8201, a lens 8202, and a main body 82 8203, a display unit 8204, a cable 8205, etc. It has a built-in 8206 battery.

[0455] A cable 8205 supplies power from a battery 8206 to the main body 8203. 203 is equipped with a wireless receiver and the like, and displays video information such as received image data on a display unit 8204 In addition, a camera installed in the main body 8203 can capture the image of the user's eyeballs and eyelids. By capturing the user's movements and calculating the coordinates of the user's viewpoint based on that information, can be used as an input means.

[0456] Furthermore, the wearing unit 8201 may be provided with a plurality of electrodes at positions that come into contact with the user. The main body 8203 detects the current flowing through the electrodes in accordance with the movement of the user's eyeballs, The device may have a function to recognize the user's point of view. By doing so, the attachment unit 820 may have a function of monitoring the pulse of the user. The sensor 1 may have various sensors such as a temperature sensor, a pressure sensor, an acceleration sensor, etc. The device may have a function to display the user's biological information on the display unit 8204. The image displayed on the display unit 8204 is changed according to the movement of the part. Good too.

[0457] The display device of one embodiment of the present invention can be applied to the display portion 8204.

[0458] 23(C), (D), and (E) are diagrams showing the appearance of the head-mounted display 8300. The head mounted display 8300 includes a housing 8301, a display portion 8302, and a backlight. The lens 8302 has a braided fixture 8304 and a pair of lenses 8305 .

[0459] A user can view the display on the display unit 8302 through the lens 8305 . It is preferable to arrange the display portion 8302 in a curved manner. By placing the device in this position, the user can feel a high sense of realism. Although the example shows a configuration in which one display unit 8302 is provided, the present invention is not limited to this. For example, Two display units 8302 may be provided. In this case, one display is provided for each eye of the user. If the display unit is arranged in such a way that it is possible to perform 3D display using parallax, etc. do.

[0460] Note that the display device of one embodiment of the present invention can be applied to the display portion 8302. A display device including the semiconductor device of one embodiment of this invention has extremely high definition. Even if the image is enlarged using the lens 8305, the pixels are not visible to the user, and the image is displayed more clearly. This makes it possible to display images with a higher sense of reality.

[0461] Next, an example of an electronic device different from the electronic devices shown in FIGS. 23(A) to 23(E) will be described with reference to FIG. 4(A) to 24(G).

[0462] The electronic devices shown in FIGS. 24A to 24G include a housing 9000, a display portion 9001, a screen Speaker 9003, operation keys 9005 (including a power switch or an operation switch), connection terminal Child 9006, sensor 9007 (force, displacement, position, velocity, acceleration, angular velocity, number of rotations, distance, Light, liquid, magnetism, temperature, chemical substances, sound, time, hardness, electric field, current, voltage, power, radiation, (including functions to measure flow rate, humidity, gradient, vibration, odor or infrared rays), It has 9008, etc.

[0463] The electronic devices shown in FIGS. 24A to 24G have various functions. Function to display various information (still images, videos, text images, etc.) on the display, touch panel function , calendar, date or time display functions, various software (programs) Therefore, it has the functions of controlling processing, wireless communication, and various computer networks using wireless communication functions. Functions for connecting to a network, transmitting or receiving various data using wireless communication functions Function to read out the program or data recorded on the recording medium and display it on the display unit 24(A) to 24(G) can have the following. The functions that can be implemented are not limited to these, and various other functions can be implemented. Although not shown in Figures 24(A) to 24(G), the electronic device may have a plurality of display units. The electronic device may be provided with a camera or the like to take still images and video images. The function to take pictures, and the function to save the pictures to a recording medium (external or built-in to the camera), The camera may also have a function to display the captured image on a display unit.

[0464] The electronic devices shown in FIGS. 24A to 24G will be described in detail below.

[0465] FIG. 24A is a perspective view showing a television device 9100. 100 is a display unit 9001 with a large screen, for example, 50 inches or more, or 100 inches or more. It is possible to incorporate.

[0466] 24(B) is a perspective view showing a portable information terminal 9101. The portable information terminal 9101 is For example, the device has one or more functions selected from a telephone, a notebook, an information viewing device, etc. Specifically, it can be used as a smartphone. A speaker, a connection terminal, a sensor, and the like may be provided. Image information can be displayed on multiple sides of the screen. For example, three operation buttons 9050 ( Operation icons (also referred to simply as icons) can be displayed on one side of the display unit 9001. Also, information 9051 shown in a dashed rectangle can be displayed on another surface of the display unit 9001. Examples of information 9051 include email and social networking sites (SNS). Indications for notifications of incoming calls, e-mails, SNS messages, etc. Name, sender name of email or SNS, date and time, time, remaining battery level, antenna reception Or, instead of the information 9051, Operation buttons 9050 and the like may be displayed on the screen.

[0467] 24(C) is a perspective view showing a portable information terminal 9102. The portable information terminal 9102 is , and has the function of displaying information on three or more surfaces of the display unit 9001. An example is shown in which information 9053 and information 9054 are displayed on different sides. The user of the portable information terminal 9102 stores the portable information terminal 9102 in the breast pocket of his / her clothes. In this state, the display (information 9053 in this case) can be confirmed. The telephone number or name of the caller is displayed in a position that can be observed from above the mobile information terminal 9102. The user can view the display without taking the mobile information terminal 9102 out of his pocket. You can check the call and decide whether to accept it or not.

[0468] 24(D) is a perspective view showing a wristwatch-type portable information terminal 9200. The 9200 is suitable for mobile phone calls, e-mail, document browsing and writing, music playback, and internet communications. It is possible to run various applications such as computer games. The portable information terminal 9200 is provided with a speaker 9003, a connection terminal 9006, a sensor 9007, etc. The display surface of the display unit 9001 is curved, and the curved display surface The portable information terminal 9200 can display information along the screen. It is possible to perform wireless communication. For example, it is possible to communicate with a wireless headset. By doing so, hands-free conversation is also possible. , and has a connection terminal 9006, and can directly exchange data with other information terminals via a connector. Charging can also be performed via the connection terminal 9006. The operation may be performed by wireless power supply without going through the connection terminal 9006.

[0469] 24(E), (F), and (G) are perspective views showing a foldable portable information terminal 9201. 24(E) is a perspective view of the portable information terminal 9201 in an unfolded state, and FIG. (F) shows the change of the portable information terminal 9201 from one of the unfolded state and the folded state to the other. 24(G) is a perspective view of the portable information terminal 9201 in a folded state. The portable information terminal 9201 is highly portable when folded, and is unfolded. In this state, the seamless, wide display area provides excellent visibility of the display. The display unit 9001 of the display device 1 is attached to three housings 9000 connected by hinges 9055. The hinge 9055 allows the two housings 9000 to bend. , and the mobile information terminal 9201 can be reversibly transformed from an unfolded state to a folded state. For example, the portable information terminal 9201 can be bent with a curvature radius of 1 mm or more and 150 mm or less. It is possible.

[0470] The electronic device described in this embodiment has a display unit for displaying some information. However, the semiconductor device of one embodiment of the present invention is an electronic device that does not have a display portion. It can also be applied to vessels.

[0471] The configuration examples exemplified in this embodiment and the corresponding drawings etc. are at least part of The above can be implemented in appropriate combination with other configuration examples or drawings, etc.

[0472] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0473] (Embodiment 7) In this embodiment, an electronic device of one embodiment of the present invention will be described with reference to drawings.

[0474] The electronic devices exemplified below include a display device according to one embodiment of the present invention in a display portion. Therefore, it is an electronic device that has achieved high resolution. Also, high resolution and a large screen are compatible. The electronic device may be an electronic device.

[0475] The display unit of the electronic device according to one embodiment of the present invention may be configured to display, for example, full high-definition, 4K2K, 8K4 It is possible to display images with a resolution of 16K, 16K, 8K, or higher. The display screen size is 20 inches or more diagonally, or 30 inches or more diagonally, or It can also be 50 inches or more, 60 inches or more diagonally, or 70 inches or more diagonally.

[0476] Examples of electronic devices include television sets, desktop or notebook PCs, etc. Personal computers, computer monitors, digital signage electronic signage), pachinko machines and other large game machines. In addition to electronic devices with screens, digital cameras, digital video cameras, digital photo cameras, Examples include cameras, mobile phones, portable game consoles, personal digital assistants, and sound reproduction devices. .

[0477] The electronic device or lighting device according to one aspect of the present invention is a device for attaching a light source to an interior or exterior wall of a house or building, or can be incorporated into the curved surfaces of the interior or exterior of a vehicle.

[0478] The electronic device according to one embodiment of the present invention may include an antenna. By doing so, it is possible to display images, information, etc. on the display unit. If the device has a secondary battery, the antenna may be used for contactless power transmission.

[0479] The electronic device according to one embodiment of the present invention includes a sensor (force, displacement, position, velocity, acceleration, angular velocity, rotation Number, distance, light, liquid, magnetism, temperature, chemicals, sound, time, hardness, electric field, current, voltage, power (including the ability to measure radiation, flow rate, humidity, gradient, vibration, odor or infrared rays) It may be possible.

[0480] The electronic device of one embodiment of the present invention can have various functions. (still images, videos, text images, etc.) on the display, touch panel function, calendar functions such as displaying the date and time, and running various software (programs) Functions for transmitting data, wireless communication, and reading programs or data recorded on recording media etc.

[0481] FIG. 25A shows an example of a television device. The television device 7100 has a housing 7 The display unit 7500 is built into the housing 7101. 101 is shown as a supported configuration.

[0482] The display device of one embodiment of the present invention can be applied to the display portion 7500.

[0483] The television device 7100 shown in FIG. 25A is operated by an operation switch provided in the housing 7101. This can be done by a separate remote control 7111 or a display unit 750. The display unit 7500 may be provided with a touch sensor, and the operation may be performed by touching the display unit 7500 with a finger or the like. The remote control unit 7111 displays the information output from the remote control unit 7111. The remote control unit 7111 may have a display unit for displaying the operation keys or touch panel. The channel and volume can be controlled by the control panel, and the channel and volume are displayed on the display unit 7500. You can manipulate the video.

[0484] The television device 7100 is configured to include a receiver, a modem, and the like. It is possible to receive general television broadcasts using a TV set. It is also possible to receive wired or wireless TV broadcasts via a modem. By connecting to a wired communication network, it can be transmitted in one direction (sender to receiver) or both directions. It is also possible to communicate information in both directions (between a sender and a receiver, or between receivers). .

[0485] FIG. 25B shows a notebook personal computer 7200. The mobile computer 7200 includes a housing 7211, a keyboard 7212, a pointing device, and a The housing 7211 includes a display unit 7500 and an external connection port 7214. It is embedded.

[0486] The display device of one embodiment of the present invention can be applied to the display portion 7500.

[0487] Figure 25(C) and (D) show the digital signage. An example of a sub-sign is shown below.

[0488] The digital signage 7300 shown in FIG. 25C includes a housing 7301, a display unit 7500, and a speaker 7303. In addition, LED lamps, operation keys (power switch, It may have a control switch, connection terminals, various sensors, a microphone, etc. do.

[0489] FIG. 25(D) shows a digital signage 740 attached to a cylindrical pillar 7401. The digital signage 7400 is a display unit provided along the curved surface of a pillar 7401. It has 7500.

[0490] 25C and 25D, the display device of one embodiment of the present invention is applied to the display portion 7500. It is possible.

[0491] The larger the display unit 7500, the more information can be displayed at once. The wider the display unit 7500, the more easily it will be noticed by people, which will increase the effectiveness of advertising, for example. can.

[0492] By applying a touch panel to the display unit 7500, images or videos can be displayed on the display unit 7500. It is also preferable because it not only shows route information but also allows users to operate it intuitively. When used to provide information such as traffic information, intuitive operation is required. Usability can be improved.

[0493] Also, as shown in FIGS. 25(C) and 25(D), a digital signage 7300 or a digital The signage 7400 is an information terminal 7311 such as a smartphone carried by a user or an information It is preferable that the display unit 75 can be connected to the information terminal 7411 by wireless communication. The advertisement information displayed on 00 is displayed on the screen of the information terminal 7311 or the information terminal 7411. In addition, by operating the information terminal 7311 or the information terminal 7411, The display on the display unit 7500 can be switched by doing this.

[0494] In addition, the digital signage 7300 or the digital signage 7400 is provided with an information terminal 7 311 or the screen of the information terminal 7411 is used as an operating means (controller) to play a game. This allows an unspecified number of users to participate in and enjoy the game at the same time. This can be done.

[0495] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0496] (Embodiment 8) In this embodiment, a display device including a semiconductor device according to one embodiment of the present invention is applied. An example of a television device that can be used will be described with reference to the drawings.

[0497] FIG. 26A shows a block diagram of a television device 600. As shown in FIG.

[0498] In the drawings attached to this specification, the components are classified by function and are separated into blocks independent of each other. Although the block diagram is shown as a block, the actual components are completely separated by function. This can be difficult, and one component may be involved in multiple functions.

[0499] The television device 600 includes a control unit 601, a storage unit 602, a communication control unit 603, an image processing unit 604, and a video processing unit 605. processing circuit 604, decoder circuit 605, video signal receiving unit 606, timing controller 6 07, a source driver 608, a gate driver 609, a display panel 620, etc.

[0500] The display device exemplified in the above embodiment is applied to the display panel 620 in FIG. This allows a large-sized, high-resolution television with excellent visibility to be produced. The device 600 can be realized.

[0501] The control unit 601 is, for example, a central processing unit (CPU). For example, the control unit 601 can function as a system bus 63. 0, the memory unit 602, the communication control unit 603, the image processing circuit 604, and the decoder circuit 605 and a function to control components such as a video signal receiving unit 606.

[0502] Signals are transmitted between the control unit 601 and each component via a system bus 630. The control unit 601 also receives information from each component connected via a system bus 630. It has functions to process the signals input from the This allows overall control of each component connected to the system bus 630. It is possible.

[0503] The storage unit 602 stores registers and keys that can be accessed by the control unit 601 and the image processing circuit 604. It functions as cache memory, main memory, secondary memory, etc.

[0504] Examples of storage devices that can be used as secondary memories include rewritable nonvolatile A storage device using a non-volatile memory element can be used. For example, a flash memory, MRAM(Magnetoresistive Random Access Memo ry), PRAM (Phase change RAM), ReRAM (Resisti ve RAM), FeRAM (Ferroelectric RAM), etc. can be done.

[0505] It can also be used as temporary memory such as a register, cache memory, or main memory. The memory devices that can do this are DRAM (Dynamic RAM) and SRAM (Static RAM). A volatile memory element such as a volatile RAM may also be used.

[0506] For example, a DRAM is used as the RAM provided in the main memory. A virtual memory space is allocated and used as a working space for the memory unit 601. The operating system, application programs, and program modules stored in Modules, program data, etc. are loaded into RAM for execution. These data, programs, and program modules can be directly accessed by the control unit 601. are processed and manipulated.

[0507] On the other hand, ROM has a BIOS (Basic Input / Output) that does not require rewriting. It can store the ROM, such as the ROM (System Write) and firmware. Mask ROM and OTPROM (One Time Programmable Read Only Memory) d Only Memory), EPROM (Erasable Programmable EEPROM (Read Only Memory) can be used. UV-EPROM (Ultra-V) is a type of EEPROM that allows data to be erased by exposure to ultraviolet light. iolet Erasable Programmable Read Only Me mory), EEPROM (Electrically Erasable Program memory, and flash memory. can be.

[0508] In addition to the storage unit 602, a removable storage device may be connectable. For example, a hard disk drive (Hard Disk) acts as a storage device. Drive: HDD or Solid State Drive ve:SSD) and other recording media drives, flash memory, Blu-ray discs, It is preferable that the device has a terminal for connecting to a recording medium such as a DVD. It is possible.

[0509] The communication control unit 603 has the function of controlling communication performed via a computer network. For example, the control unit 601 may connect to a computer network in response to a command from the control unit 601. The control signal for the purpose of the control is transmitted to the computer network. The Internet, which is the foundation of the World Wide Web (WWW), Net, extranet, PAN (Personal Area Network), LAN (Local Area Network), CAN (Campus Area Network) Network), MAN(Metropolitan Area Network), WAN (Wide Area Network), GAN (Global Area N It can connect to computer networks such as the Internet and communicate with them.

[0510] The communication control unit 603 is also configured to use Wi-Fi (registered trademark), Bluetooth (registered trademark), ), ZigBee (registered trademark), or other communication standards are used to connect to a computer network or other It may have a function to communicate with electronic devices.

[0511] The communication control unit 603 may have a function for wireless communication. For example, an antenna All you need to do is install a high frequency circuit (RF circuit) to transmit and receive RF signals. The electromagnetic signal is converted into an electric signal in the frequency band specified by the regulations, and the electromagnetic signal is converted into an electric signal. It is a circuit for wireless communication between other communication devices using a practical frequency band. The frequency ranges from several tens of kHz to several tens of GHz are generally used. The circuit has a high-frequency circuit section that corresponds to multiple frequency bands, and the high-frequency circuit section includes an amplifier ( It can be configured with a mixer, filter, DSP, RF transceiver, etc. Cut.

[0512] The video signal receiving unit 606 includes, for example, an antenna, a demodulation circuit, and an AD conversion circuit (analog -Digital conversion circuit) and the like. The demodulation circuit demodulates the signal input from the antenna. The AD conversion circuit converts the demodulated analog signal into a digital signal. The signal processed by the video signal receiving unit 606 is sent to the decoder circuit 605. do.

[0513] The decoder circuit 605 receives the digital signal from the video signal receiving unit 606. The video data is decoded according to the broadcasting standard specifications and sent to the image processing circuit. For example, the broadcasting standard for 8K broadcasting is H.265 | MPEG-H High Efficiency Video Coding (abbreviation :HEVC) etc.

[0514] The broadcasting waves that can be received by the antenna of the video signal receiving unit 606 include terrestrial waves, Radio waves transmitted from satellites and broadcast waves that can be received by an antenna are also examples. There are analog broadcasting, digital broadcasting, and also broadcasting of video and audio, or audio only. For example, UHF band (approximately 300MHz to 3GHz) or VHF band (30MHz It can receive broadcast radio waves transmitted in a specific frequency band (up to 300MHz). For example, by using multiple data received in multiple frequency bands, the transfer rate can be increased. This allows for a higher image quality and more information to be obtained. It is possible to display images with a resolution exceeding that of the display panel 620. For example, , 4K2K, 8K4K, 16K8K, or higher resolution images can be displayed. This can be done.

[0515] The video signal receiving unit 606 and the decoder circuit 605 are connected to a computer network. The broadcast data transmitted by the data transmission technology is sent to the image processing circuit 604. In this case, if the received signal is a digital signal, In other words, the video signal receiving unit 606 does not need to have a demodulation circuit, an AD conversion circuit, and the like.

[0516] The image processing circuit 604 processes the time based on the video signal input from the decoder circuit 605. It has a function of generating a video signal to be output to the video controller 607.

[0517] The timing controller 607 also receives the video signal processed by the image processing circuit 604. 609 and the source driver 608 based on the synchronization signal included in the It has the function of generating signals (clock signals, start pulse signals, etc.). In addition to the above signals, the timing controller 607 outputs the video signals to the source driver 608. It has the function of generating a video signal.

[0518] The display panel 620 has a plurality of pixels 621. Each pixel 621 is connected to a gate driver 6 609 and is driven by signals supplied from the source driver 608. 8K4K standard. The resolution of the display panel 620 is not limited to this, and may be full high-definition (pixel Resolution according to standards such as 4K2K (pixel count 3840 x 2160) or 4K2K (pixel count 1920 x 1080) It may also be the image quality.

[0519] The control unit 601 and the image processing circuit 604 shown in FIG. 26(A) may be implemented by, for example, a processor. For example, the control unit 601 may have a central processing unit (CPU) Using a processor that functions as a Central Processing Unit In addition, the image processing circuit 604 may be, for example, a DSP (Digital Sign al Processor), GPU(Graphics Processing Un) It is also possible to use other processors such as the control unit 601 and the image processing circuit 60. 4. The above processor is implemented as an FPGA (Field Programmable Gate Array). Array) and FPAA (Field Programmable Analog Array) and FPAA (Field Programmable Analog Array) PLD (Programmable Logic Device) The configuration may be realized as follows.

[0520] The processor performs various data processing by interpreting and executing instructions from various programs. The programs that can be executed by the processor are those that the processor is capable of It may be stored in a memory area provided in the computer or in a separately provided storage device. good.

[0521] Also, a control unit 601, a storage unit 602, a communication control unit 603, an image processing circuit 604, a decoder The image signal receiving circuit 605, the image signal receiving unit 606, and the timing controller 607 Two or more of these functions are integrated into one IC chip to form a system LSI. For example, a processor, a decoder circuit, a tuner circuit, an AD conversion circuit, , a DRAM, an SRAM, and the like.

[0522] In addition, the control unit 601 and ICs of other components have an oxide in the channel forming region. It is also possible to use a transistor that uses a nitride semiconductor and has an extremely low off-state current. Since the off-state current of the transistor is extremely low, the transistor can be used as a memory element. It can be used as a switch to hold the charge (data) that has flowed into the capacitance element that functions as a This allows the data to be retained for a long period of time. By using it as a register or cache memory, the control unit 601 can be operated only when necessary. In other cases, the information from the immediately preceding process is saved in the memory element, so that the normal This allows off-line computing, thereby reducing the power consumption of the television device 600. This will enable us to strengthen our capabilities.

[0523] The configuration of the television device 600 illustrated in FIG. 26(A) is an example, and all configurations The television device 600 does not need to include any of the components shown in FIG. The television device 600 may have any of the components necessary for the television set 600 shown in FIG. The present invention may have components other than those shown in the above.

[0524] For example, the television device 600 may have an external interface in addition to the configuration shown in FIG. It includes an interface, audio output unit, touch panel unit, sensor unit, camera unit, etc. For example, the external interface may be a USB (Universal Serial Bus) al Serial Bus) terminal, LAN (Local Area Network) Connection terminal, power supply terminal, audio output terminal, audio input terminal, video output terminal, video External connection terminals such as input terminals, and optical communication transmission and reception using infrared, visible light, ultraviolet light, etc. For example, the audio input / output section may be a sound These include a hand controller, microphone, and speaker.

[0525] The image processing circuit 604 will be described in more detail below.

[0526] The image processing circuit 604 processes an image based on the video signal input from the decoder circuit 605. It is preferable that the device has a function for executing the processing.

[0527] Image processing includes, for example, noise removal processing, tone conversion processing, color correction processing, and brightness correction processing. Examples of color correction processing and brightness correction processing include gamma correction. do.

[0528] The image processing circuit 604 also performs pixel interpolation processing associated with resolution up-conversion and Performs processing such as frame interpolation associated with frame frequency up-conversion It is preferable that the function is

[0529] For example, noise removal processing can be used to remove mosquito noise that occurs around the contours of characters, etc. Block noise that occurs in high-speed video, random noise that causes flickering, and increased resolution Removes various noises such as dot noise caused by conversion.

[0530] The gradation conversion process converts the gradation of the image into a gradation that corresponds to the output characteristics of the display panel 620. For example, when increasing the number of gradations, for an image input with a small number of gradations, The histogram is smoothed by interpolating and assigning a corresponding tone value to each pixel. It can also be used to widen the dynamic range, high dynamic range (HD R) processing is also included in the tone conversion processing.

[0531] In addition, pixel interpolation processing can cause data that does not actually exist to be generated when the resolution is up-converted. For example, the pixels around the target pixel are referenced and the intermediate color is displayed. Interpolate the data to

[0532] The color correction process is a process for correcting the color tone of an image. For example, the television device 600 The type, brightness, or color purity of the lighting installed in the space where the device is installed is detected, and the device is adjusted accordingly. The brightness and color tone of the image displayed on the display panel 620 are corrected to be optimal. Matching the image shown with images of various scenes in a pre-stored image list; It may have a function to correct the image to be displayed to a brightness and color tone suitable for the image of the nearest scene. stomach.

[0533] Inter-frame interpolation is used to increase the frame frequency of the displayed image, which is not inherently present. For example, two images can be generated from the difference between two images. Generates an interpolated frame image to be inserted between two images, or generates multiple interpolated frames between two images. For example, an image input from the decoder circuit 605 can be generated. When the frame frequency of the image signal is 60Hz, multiple interpolated frames are generated. Then, the frame frequency of the video signal output to the timing controller 607 is doubled to 12 It can be increased to 0Hz, or 4 times to 240Hz, or 8 times to 480Hz, etc.

[0534] The image processing circuit 604 also uses a neural network to perform image processing. In FIG. 26(A), the image processing circuit 604 is 6 shows an example in which the network 610 is provided.

[0535] For example, the neural network 610 can generate a The image processing circuit 604 can then perform feature extraction. It is possible to select a suitable correction method or parameters to be used for correction.

[0536] Alternatively, the neural network 610 itself may be provided with the function of performing image processing. That is, image data before image processing is input to the neural network 610. The image data that has been subjected to image processing may then be output.

[0537] The weighting coefficient data used in the neural network 610 is stored in a data table. The data table including the weighting coefficients is stored in the storage unit 602. The unit 603 can be updated to the latest version via a computer network. Alternatively, the image processing circuit 604 may have a learning function and may update the data table containing the weighting coefficients. It may also be configured to be capable of

[0538] FIG. 26B shows a schematic diagram of the neural network 610 included in the image processing circuit 604. Shows.

[0539] In this specification, the term "neural network" refers to a network that imitates the neural circuit network of a living organism and is used for learning. The general model that determines the strength of connections between neurons through learning and gives them problem-solving ability is A neural network has an input layer, an intermediate layer (also called a hidden layer), and an output layer. Among neural networks, those with two or more hidden layers are called deep neural networks. Learning by a deep neural network is called a "data network (DNN)." This is called "deep learning."

[0540] In addition, when describing neural networks in this specification, etc., The process of determining the connection strength (also called weight coefficient) between neurons from the information is called "learning." In this specification, the connection strength obtained by learning is used. The process of constructing a neural network using these data and deriving new conclusions from it is called "inference." There is a match.

[0541] The neural network 610 comprises an input layer 611, one or more hidden layers 612, and an output The input layer 611 receives input data, and the output layer 613 outputs the data. The data is output.

[0542] The input layer 611, the hidden layer 612, and the output layer 613 each have neurons 615. Here, the neuron 615 indicates a circuit element (product-sum operation element) that can realize a product-sum operation. In Figure 26(B), the data input between two neurons 615 in two layers is The output direction is indicated by an arrow.

[0543] The calculation process in each layer is performed using the output of the neuron 615 in the previous layer and the weight coefficients. For example, the output of the i-th neuron in the input layer is x i year , output x i The connection strength (weight coefficient) between the j-th neuron and the j-th neuron in the next hidden layer 612 is wj i Then, the output of the jth neuron in the hidden layer, y j is y j =f(Σw ji x i ) where i and j are integers equal to or greater than 1. Here, f(x) is the activation function and A modal function, a threshold function, etc. can be used. Similarly, the neurons 615 in each layer The output of the neuron 615 in the previous layer is multiplied by the weighting coefficient and the activation function is applied to the result. The connection between layers is the total connection between all neurons. Alternatively, partial connections may be used, in which some neurons are connected to each other. This shows the case where all connections are made.

[0544] FIG. 26(B) shows an example having three intermediate layers 612. The number of intermediate layers is not limited to this, and it is sufficient to have one or more intermediate layers. The number of neurons in the hidden layer 6 can be changed as needed depending on the specifications. The number of neurons 615 in the input layer 611 or the output layer 613 is The number of the spools may be greater or less than the number of spools 615.

[0545] The weighting coefficients, which are indicative of the strength of connections between neurons 615, are determined by learning. The learning may be performed by a processor included in the television device 600, but may also be performed by a dedicated server. It is preferable to run it on a computer with high computing power, such as a server or the cloud. The weighting coefficients determined by the above are stored in the storage unit 602 as a table, and are output to the image processing circuit 6 The table is used by being read by 04. It can be updated via a computer network.

[0546] This concludes the explanation of neural networks.

[0547] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination. [Explanation of symbols]

[0548] DL_Y: data line, DL_1: data line, DLa1: source line, DLa2: source line, DLb1: source line, DLb2: source line, GL_X: gate line, GL_1: gate line, GL_2: gate line, 100: transistor, 100A: transistor, 100B: transistor Transistor, 100C:Transistor, 100D:Transistor, 100E:Transistor , 102: substrate, 102a: substrate, 102b: substrate, 103: insulating layer, 104: insulating layer, 105: adhesive layer, 106: conductive layer, 107: insulating layer, 107a: sidewall insulating layer, 107b: sidewall insulating layer, 108: semiconductor layer, 108a: semiconductor layer, 108b: Semiconductor layer, 108c: semiconductor layer, 109: insulating layer, 110: insulating layer, 110a: insulating layer, 110b: insulating layer, 111: conductive layer, 112: opening, 116: insulating layer, 116a: conductive layer, 118: insulating layer, 120a: conductive layer, 120b: conductive layer, 141a: opening, 141 b: opening, 142: opening, 501: pixel circuit, 502: pixel section, 504: driving circuit section , 504a: gate driver, 504b: source driver, 506: protection circuit, 507: Terminal portion, 550: transistor, 552: transistor, 554: transistor, 560 : Capacitance element, 562: Capacitance element, 570: Liquid crystal element, 572: Light emitting element, 600: Television John device, 601: control unit, 602: storage unit, 603: communication control unit, 604: image processing circuit, 605: decoder circuit, 606: video signal receiving unit, 607: timing controller 608: source driver, 609: gate driver, 610: neural network 611: input layer, 612: hidden layer, 613: output layer, 615: neurons, 620: Display panel, 621: pixels, 630: system bus, 700: display device, 700A: display Device, 701: substrate, 702: pixel unit, 704: source driver circuit unit, 705: substrate, 706: Gate driver circuit section, 708: FPC terminal section, 710: Signal line, 710a: Signal Line, 711: Wiring section, 712: Sealant, 716: FPC, 721: Source driver I C, 722: Gate driver circuit, 723: FPC, 724: Printed circuit board, 730: Insulator Insulating film, 732: sealing film, 734: insulating film, 736: coloring film, 738: light-shielding film, 750: Transistor, 752: transistor, 760: connection electrode, 770: planarization insulating film, 772 : Conductive film, 773: Insulating film, 774: Conductive film, 775: Liquid crystal element, 776: Liquid crystal layer, 77 8: Structure, 780: Anisotropic conductive film, 782: Light-emitting element, 786: EL layer, 788: Conductive film, 790: capacitance element, 791: touch panel, 792: insulating film, 793: electrode, 794 : Electrode, 795: Insulating film, 796: Electrode, 797: Insulating film, 6000: Display module, 6001: Upper cover, 6002: Lower cover, 6005: FPC, 6006: Display device , 6009: Frame, 6010: Printed circuit board, 6011: Battery, 6015: Generator Light part, 6016: Light receiving part, 6017a: Light guide part, 6017b: Light guide part, 6018: Light, 7 100: Television device, 7101: Housing, 7103: Stand, 7111: Remote control Operating device, 7200: Notebook personal computer, 7211: Housing, 7212: Key board, 7213: pointing device, 7214: external connection port, 7300: device Digital signage, 7301: Housing, 7303: Speaker, 7311: Information terminal, 74 00: Digital signage, 7401: Pillar, 7411: Information terminal, 7500: Display unit, 8000: camera, 8001: housing, 8002: display unit, 8003: operation button, 800 4: Shutter button, 8006: Lens, 8040: Mobile information terminal, 8041: Housing, 8042: Display, 8043: Button, 8044: Icon, 8045: Camera, 804 6: Microphone, 8047: Speaker, 8048: Connection terminal, 8049: Solar cell, 8050: Camera, 8051: Charge / discharge control circuit, 8052: Battery, 8053: DC DC converter, 8054: Switch, 8055: Switch, 8056: Switch, 80 57: Converter, 8100: Finder, 8101: Housing, 8102: Display, 81 03: Button, 8200: Head-mounted display, 8201: Wearing part, 8202: Lens, 8203: Main unit, 8204: Display unit, 8205: Cable, 8206: Battery -, 8300: Head-mounted display, 8301: Housing, 8302: Display unit, 83 04: Fixture, 8305: Lens, 9000: Housing, 9001: Display, 9003: Spin 9005: Operation keys, 9006: Connection terminal, 9007: Sensor, 9008: Microphone 9050: Operation button, 9055: Hinges, 9100: Television device, 9 101: Portable information terminal, 9102: Portable information terminal, 9200: Portable information terminal, 9201: Mobile information terminal

Claims

[Claim 1] A semiconductor device having a semiconductor layer, a first insulating layer, a second insulating layer, a third insulating layer, and a first conductive layer, the third insulating layer is located on the semiconductor layer; the third insulating layer has a first opening on the semiconductor layer; the first conductive layer is located on the semiconductor layer; the first insulating layer is located between the first conductive layer and the semiconductor layer; the second insulating layer is provided at a position in contact with a side surface of the first opening, the semiconductor layer, and the first insulating layer; the semiconductor layer has a first portion overlapping the first insulating layer, a pair of second portions sandwiching the first portion and overlapping the second insulating layer, and a pair of third portions sandwiching the first portion and the pair of second portions and not overlapping either the first insulating layer or the second insulating layer; the first portion has a width smaller than a width of the first opening; the first portion has a shape with a smaller thickness than the second portion, The second portion has a smaller thickness than the third portion.

Images