Substrate and semiconductor module
The substrate with crack stop structures and a side protection layer addresses packaging limitations, enhancing manufacturing yield and electrical performance of high-frequency semiconductor devices.
Patent Information
- Application Number
- JP2025184003
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2022-11-15
- Filing Date
- 2025-10-30
- Publication Date
- 2026-01-27
AI Technical Summary
Existing semiconductor packaging technologies fail to support high-performance, high-frequency semiconductor devices due to limitations in wiring pitch and material properties of ceramic or resin substrates, leading to potential cracks and reduced manufacturing yield.
A substrate with a core made of glass or ceramic, divided into product and dummy regions, featuring crack stop structures such as grooves and vias to prevent crack propagation, and a side protection layer to enhance structural integrity.
The substrate effectively prevents cracks, ensuring high manufacturing yield and enabling the production of high-frequency semiconductor modules with improved electrical performance.
Smart Images
Figure 2026012917000001_ABST
Abstract
Description
[Technical Field]
[0001] The embodiment relates to a substrate including a core, which is a support substrate of a packaging substrate, or a packaging substrate including the core.
[0002] The embodiment relates to a semiconductor module including the substrate. [Background technology]
[0003] In the production of electronic components, the process of creating circuits on semiconductor wafers is called the front-end process (FE), and the process of assembling the wafers so that they can be used in actual products is called the back-end process (BE), which includes the packaging process.
[0004] The four core technologies of the semiconductor industry that have enabled the rapid development of electronic products in recent years are semiconductor technology, semiconductor packaging technology, manufacturing process technology, and software technology. Semiconductor technology has evolved into various forms, including nano-level line widths below microns, more than 10 million cells, high-speed operation, and high heat dissipation, but the technology to perfectly package this has not been supported. As a result, the electrical performance of semiconductors is sometimes determined by packaging technology and the resulting electrical connections rather than the performance of the semiconductor technology itself.
[0005] Ceramic or resin is used as a material for the packaging substrate. Ceramic substrates have high resistance or high dielectric constant, making it difficult to mount high-performance, high-frequency semiconductor devices. Resin substrates can mount relatively high-performance, high-frequency semiconductor devices, but there is a limit to how much the wiring pitch can be reduced. Summary of the Invention [Problem to be solved by the invention]
[0006] An object of the embodiment is to provide a substrate with excellent manufacturing yield.
[0007] Another object of the embodiment is to provide a substrate that can be used to manufacture packaging substrates as individual products with a high yield despite cracks that may occur at the edges or sides of the core.
[0008] Yet another object of the present embodiment is to provide a semiconductor module using the packaging substrate. [Means for solving the problem]
[0009] One or more embodiments to achieve the above object include a substrate including a core that is a glass or ceramic support, the substrate being divided into a product region and a dummy region, the product region being an area where one or more individual products are placed, the dummy region being an area of the substrate excluding the product region, a damage prevention part being placed in the product region or the dummy region, the damage prevention part being an area where one or more crack stop structures are placed, the crack stop structures being grooves or vias placed in the core that stop cracks that occur from the sides of the core from growing toward the center of the individual products, the grooves being recesses in the surface of the core, and the vias being through holes that are removed so that the core partially penetrates in the thickness direction.
[0010] The individual products may have a cutting line, a center point, and an internal border line when viewed from above, the cutting line being a line that defines the outer periphery of the individual products when the individual products are singulated, the center point being an imaginary point corresponding to the geometric center of the individual products, and the internal border line being an imaginary line extending 20% inward from the cutting line toward the center point, and the breakage prevention portion being disposed between the edge of the core and the internal border line.
[0011] The damage prevention portion may include a plurality of the grooves or vias arranged adjacent to a boundary line between the product area and the dummy area.
[0012] In one or more embodiments, the groove or via may have an opening with a diameter A, and the pitch between adjacent grooves or vias may be 1.3 to 20 times A.
[0013] In one or more embodiments, the crack arrest structure may include a curved structure in which the groove or via is positioned to follow the shape of a corner of the individual product.
[0014] In one or more embodiments, the trench may be a filled trench, the via may be a filled via, and the opening of the trench or via may be bonded to a via pad.
[0015] In one or more embodiments, the crack arrest structure may further include a side protection layer, which may be a structure that surrounds a portion or all of the side of the core.
[0016] In one or more embodiments, the substrate may further include a stabilization layer surrounding the core, the stabilization layer surrounding surfaces including the upper and lower surfaces of the core.
[0017] In one or more embodiments, a surface including the side of the core, a portion of the upper surface connected to the side, and a portion of the lower surface connected to the side is a surface to be protected by side protection, and the side protection layer may be disposed on part or all of the surface to be protected by side protection.
[0018] The stabilization layer may include an insulating layer.
[0019] The side protection layer may include an insulating layer. [Effects of the Invention]
[0020] The substrate of the embodied example can substantially prevent damage to packaging substrates, which are individual products, and product areas where the packaging substrates are gathered, due to damage such as cracks occurring on the sides or edges of the substrate.
[0021] The semiconductor module of the embodiment may provide a packaging substrate having excellent properties that can be manufactured with a high yield by utilizing the substrate, and in particular, may achieve an excellent manufacturing yield even when a substrate with properties such as a glass plate is used as a core. [Brief explanation of the drawings]
[0022] [Figure 1] 1A to 1C are conceptual diagrams illustrating substrates according to various embodiments, each viewed from above; [Figure 2] 1A to 1C are conceptual diagrams illustrating substrates according to various embodiments, each viewed from above; [Figure 3] 1A to 1C are conceptual diagrams illustrating substrates according to various embodiments, each viewed from above; [Figure 4] 1A to 1C are conceptual diagrams illustrating substrates according to various embodiments, each viewed from above; [Figure 5] 1A to 1C are conceptual diagrams illustrating substrates according to various embodiments, each viewed from above; [Figure 6] 6A and 6B are conceptual diagrams illustrating substrates of various embodiments through the portion indicated by A in FIG. 5. [Figure 7] 6A and 6B are conceptual diagrams illustrating substrates of various embodiments through the portion indicated by A in FIG. 5. [Figure 8] 6A and 6B are conceptual diagrams illustrating substrates of various embodiments through the portion indicated by A in FIG. 5. [Figure 9] 6A and 6B are conceptual diagrams illustrating substrates of various embodiments through the portion indicated by A in FIG. 5. [Figure 10] 6A and 6B are conceptual diagrams illustrating substrates of various embodiments through the portion indicated by A in FIG. 5. [Figure 11] 6A and 6B are conceptual diagrams illustrating substrates of various embodiments through the portion indicated by A in FIG. 5. [Figure 12] 4A to 4C are cross-sectional views taken along line bb' of FIG. 3 illustrating substrates according to various embodiments. [Figure 13] 4A to 4C are cross-sectional views taken along line bb' of FIG. 3 illustrating substrates according to various embodiments. [Figure 14]1A to 1C are conceptual diagrams illustrating cross sections of packaging substrates according to various embodiments. [Figure 15] 1A to 1C are top views illustrating semiconductor modules according to various embodiments. [Figure 16] 1A to 1C are cross-sectional conceptual diagrams illustrating semiconductor modules according to various embodiments. [Figure 17] FIG. 16 is a conceptual diagram illustrating a cross section taken along line XX′ in FIG. 15. [Figure 18] 1A to 1C are cross-sectional conceptual diagrams illustrating semiconductor modules according to various embodiments. [Figure 19] 1A to 1C are cross-sectional conceptual diagrams illustrating semiconductor modules according to various embodiments. [Figure 20] 1A to 1C are cross-sectional conceptual diagrams illustrating semiconductor modules according to various embodiments. [Figure 21] 1A and 1B are conceptual diagrams illustrating crack arrest structures applicable to various embodiments. [Figure 22] 1A and 1B are conceptual diagrams illustrating crack arrest structures applicable to various embodiments. [Figure 23] 1A and 1B are conceptual diagrams illustrating crack arrest structures applicable to various embodiments. [Figure 24] 1A and 1B are conceptual diagrams illustrating crack arrest structures applicable to various embodiments. [Figure 25] 1A and 1B are conceptual diagrams illustrating crack arrest structures applicable to various embodiments. [Figure 26] 1A and 1B are conceptual diagrams illustrating crack arrest structures applicable to various embodiments. [Figure 27] 1A and 1B are conceptual diagrams illustrating crack arrest structures applicable to various embodiments. [Figure 28] 1A and 1B are conceptual diagrams illustrating crack arrest structures applicable to various embodiments. [Figure 29] 1A and 1B are conceptual diagrams illustrating crack arrest structures applicable to various embodiments. [Figure 30] 1A and 1B are conceptual diagrams illustrating crack arrest structures applicable to various embodiments. [Figure 31] 1A and 1B are conceptual diagrams illustrating crack arrest structures applicable to various embodiments. BEST MODE FOR CARRYING OUT THE INVENTION
[0023] The present invention will be described in detail below with reference to the accompanying drawings so that those skilled in the art can easily understand the present invention. However, the present invention may be embodied in various different forms and is not limited to the embodiments described herein. The same reference numerals are used throughout the specification to refer to similar parts.
[0024] Throughout this specification, the term "combinations thereof" contained in a Markush form phrase means a mixture or combination of one or more selected from the group of elements set forth in the Markush form phrase, and means including one or more selected from the group of elements.
[0025] Throughout this specification, terms such as "first," "second," or "A," "B" are used to distinguish between identical terms, and singular expressions include plural expressions unless the context clearly indicates otherwise.
[0026] In this specification, the term "-" may mean that the compound includes a compound corresponding to "-" or a derivative of "-".
[0027] In this specification, the term "B is located on A" means that B is located on A in direct contact with A, or that B is located on A with another layer located therebetween, and is not to be interpreted as being limited to B being located in contact with the surface of A.
[0028] In this specification, the expression "B is linked to A" means that A and B are directly linked or that A and B are linked via another component therebetween, and unless otherwise specified, it is not to be interpreted as being limited to A and B being directly linked.
[0029] In this specification, unless otherwise specified, the singular expression is to be construed as including the singular or plural as the context requires.
[0030] In this specification, high frequency means a frequency of about 1 GHz to about 300 GHz. Specifically, it may mean a frequency of about 1 GHz to about 30 GHz, or may mean a frequency of about 1 GHz to about 15 GHz.
[0031] In this specification, unless otherwise specified, a fine line means a line having a width of 5 μm or less, and illustratively means a line having a width of 1 to 4 μm or less.
[0032] In this specification, the shape, relative size, angle, etc. of each component in the drawings are illustrative and may be exaggerated for the purpose of explanation, and the rights should not be interpreted as being limited to the drawings.
[0033] In this specification, a core refers to a plate-like support member that is placed on a substrate.
[0034] In this specification, the packaging substrate refers to a plate-like member that is a product obtained by cutting a substrate and on which a rewiring layer, a solder resist layer, etc. are arranged so that a device can be mounted.
[0035] In this specification, the term "substrate" refers to a substrate before being cut into the packaging substrates, and includes a core as a support. The substrate may be a strip substrate in which multiple individual products are arranged with dummy areas sandwiched between them; a quarter substrate in which dummy areas are arranged between multiple strips; or a panel substrate in which dummy areas are arranged between multiple quarters. For convenience of description, all of these will be referred to as "substrate."
[0036] Depending on the context, the substrate may be interpreted as a core on which an electrically conductive layer and / or an insulating layer is disposed, or as a core on which an electrically conductive layer, an insulating layer, and a solder resist layer are disposed, or as a substrate further including bumps. Also, the substrate may refer to a plurality of packaging substrates connected to each other without being cut and disposed side by side or with dummy areas interposed therebetween.
[0037] Figures 1, 2, 3, 4 and 5 are conceptual diagrams illustrating substrates of various embodiments as viewed from above, and Figures 6, 7, 8, 9, 10 and 11 are conceptual diagrams illustrating substrates of various embodiments through the portion indicated by A in Figure 5.
[0038] 12 and 13 are conceptual diagrams illustrating various embodiments of substrates in cross section along line b-b' in FIG. 3, FIG. 14 is a conceptual diagram illustrating a cross section of various embodiments of packaging substrates, and FIG. 15 is a top view illustrating various embodiments of semiconductor modules.
[0039] FIG. 16 is a conceptual diagram illustrating a cross section of a semiconductor module of various embodiments, FIG. 17 is a conceptual diagram illustrating a cross section of line X-X' of FIG. 15, and FIGS. 18, 19, and 20 are conceptual diagrams illustrating a cross section of a semiconductor module of various embodiments.
[0040] 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, and 31 are conceptual diagrams illustrating crack arrest structures applicable to various embodiments.
[0041] Hereinafter, the embodiments will be described in more detail with reference to the drawings.
[0042] To achieve the above object, the substrate 10 according to the embodiment can be used as a core 20, which is a support for a semiconductor packaging substrate, and has a breakage prevention portion 30 disposed thereon.
[0043] The substrate 10 can be divided into a product area 16 and a dummy area 14 .
[0044] The product region 16 is a region where one or more parts (for convenience, referred to as "individual products") that will be cut into individual products and that will constitute the packaging substrate are placed.
[0045] The dummy region 14 is the region of the core 20 excluding the product region 16 .
[0046] The substrate 10 of the embodied example includes a damage prevention portion 30 disposed in the dummy region 14 (see FIGS. 1 and 2).
[0047] The substrate 10 of the embodied example includes a breakage prevention portion 30 disposed in the product area 16 (see FIGS. 3 and 4).
[0048] The substrate 10 of the embodied example includes a damage prevention portion 30 disposed in the dummy area 14 and the product area 16 (see FIG. 5).
[0049] The substrate 10 of the embodied example includes a breakage prevention portion 30 (not shown) disposed on the dummy area 14, the product area 16, and the individual product 90.
[0050] The damage prevention section has a crack stopping structure arranged therein, which can inhibit the progression of cracks that start and progress at the corners or edges of the core, thereby preventing further damage to the core.
[0051] A crack stop structure 32 is disposed on the damage prevention portion 30. The crack stop structure 32 is a concave or via formed in the core (see FIG. 21) and prevents the crack from progressing.
[0052] The groove is a depression in the surface of the core, and the via is a through-hole that is removed so as to penetrate part of the core in the thickness direction.
[0053] The damage prevention portion 30 may be provided with a crack stop structure 32, which may be a groove, a via, or a mixture thereof, and may be provided with a plurality of such structures in the form of regular or irregular rows.
[0054] A board-type member is applied as the core 20. The core 20 may be selected from a silicon-based ceramic substrate, a glass-based ceramic substrate, a glass substrate, and combinations thereof.
[0055] The core 20 can be made of an inorganic material-based plate-shaped member in order to overcome the feasible limits of line-space and integrate semiconductor modules.
[0056] The core 20 may be, for example, a silicon-based ceramic substrate, a glass-based ceramic substrate, or the like. The silicon-based ceramic substrate may be a substrate that partially or entirely includes a silicon substrate, a silicon carbide substrate, or the like. The glass-based ceramic substrate may be a substrate that partially or entirely includes a quartz substrate, a sapphire substrate, or the like.
[0057] When a glass ceramic substrate or plate glass is used as the core 20, it has non-conductive properties, so that the occurrence of parasitic elements is suppressed, and power efficiency can be improved when it is used as a high frequency semiconductor packaging substrate.
[0058] The glass substrate (plate glass) may be, for example, alkali borosilicate plate glass, alkali-free borosilicate plate glass, alkali-free alkaline earth borosilicate plate glass, or the like, and any plate glass suitable for use in electronic components may be used.
[0059] The core 20 may have a thickness of 50 μm or more, 100 μm or more, 250 μm or more, 400 μm or more, or 500 μm or more. The core may have a thickness of 3000 μm or less, 1000 μm or less, or 800 μm or less. When the core is used within this thickness range, it can be highly usable as a substrate for semiconductor packaging.
[0060] Although not shown in the drawings, the core 20 may have a conductive through via formed therein and may have a cavity if necessary, so as to be suitable for application as a semiconductor support layer or a semiconductor packaging substrate.
[0061] One or more breakage prevention portions 30 may be arranged independently of each other.
[0062] The breakage prevention portion 30 may be disposed along the edge of the core 20 .
[0063] Breakage prevention portion 30 may be positioned along the edge of product area 16 .
[0064] The breakage prevention portion 30 may be located along the edge of the individual product 90 .
[0065] "Arranged along the edge" means that the damage prevention portion is arranged inside or outside the edge (only if it can be arranged) in the form of a dotted line or the like generally following the shape of the edge.
[0066] At least a portion of the breakage prevention portion 30 may be located at the boundary of or within the product area 16 .
[0067] If the breakage prevention portion 30 is disposed in the dummy region 14, it is removed during the singulation process during the substrate manufacturing process and does not remain in the individual product 90. However, if a portion of the breakage prevention portion 30 is disposed in the product region 16, particularly inside the individual product (packaging substrate), the breakage prevention portion can be confirmed in the cross section of the individual product.
[0068] Illustratively, the individual product 90 has a cutting line 92, a center point 94, and an interior border 96 when viewed from above (see, e.g., FIG. 3).
[0069] The cutting line 92 is a line that defines the outline of the individual product when the individual product is singulated. The center point 94 is an imaginary point that corresponds to the geometric center of the individual product. The inner border line 96 is an imaginary line that extends from the cutting line toward the center point by about 20%, or may extend by about 15%, or may extend by about 10%.
[0070] The breakage prevention portion 30 may be disposed between the cut line and the inner border line. The breakage prevention portion may be located at least partially between the cut line and the inner border line.
[0071] The crack arrest structure 32 may be configured in a variety of forms with an array of trenches and / or vias.
[0072] Illustratively, the crack arrest structure 32 may be a multiplicity of trenches or vias arranged in a row adjacent to the boundary between the product area 16 and the dummy area 14 .
[0073] Illustratively, the crack arrest structure 32 may be a multiplicity of trenches or vias arranged in a row adjacent the boundary between the individual products 90 and the dummy areas 14 .
[0074] For example, the crack arrest structure 32 may include adjacent grooves (or vias) with a pitch of 1 or more. The pitch may be 1.2 or more, 1.3 or more, 1.4 or more, or 1.5 or more. The pitch may be 20 or less, 16 or less, 10 or less, 8 or less, 4 or less, or 2 or less. The pitch refers to how many times the diameter of the opening of the groove (or via) is A that the distance between the centers of adjacent grooves (or vias) is.
[0075] The crack arresting structures 32 may be arranged in a fixed array. For example, they may be a row structure in which grooves and / or vias are arranged in rows (see FIG. 8, etc.). For example, they may be a curved structure in which grooves and / or vias are arranged along the corner shapes of individual products (see FIG. 9, etc.).
[0076] The grooves and vias are classified according to whether they are recessed or penetrate the core in the thickness direction, and various shapes of the openings may be applied. The shape of the openings may be various shapes such as a circle, an ellipse, a square, a rectangle, a rhombus, a trapezoid, a triangle, a hexagon, a polygon, etc. Although a circle, an ellipse, a square, a triangle, etc. are shown in the drawings, the shapes are not limited thereto.
[0077] A crack arrest structure 32 may be positioned along the edge of the core.
[0078] The crack arrest structures 32 may be arranged in a direction from the apex of the core towards the center of the core.
[0079] The crack arrest structure 32 may include the grooves and / or vias arranged in a curved configuration that follows the shape of the apex of the individual product.
[0080] Damage to a substrate, particularly cracks that start from the side and progress in a direction parallel to one or other surface (breakage, or glass cohesive separation in the case of glass), can occur for various reasons. For example, it is believed that the cracks occur when the materials repeatedly laminated to the upper and / or lower surfaces of the core harden and shrink, creating shear stress on the upper and lower surfaces of the substrate during the process of forming the redistribution layer, causing horizontal damage to the substrate. While efforts to minimize the occurrence of such stress are necessary, a method is also needed to structurally prevent cracks from occurring in the core despite the occurrence of such stress, or to prevent the occurrence of cracks from impairing the functionality of individual products.
[0081] Such damage occurs frequently at the corners of the core, so it is advisable to arrange a crack stopping structure formed by a "┐" structure or a "□" structure along the shape of the corner of the core or the corner of an individual product.
[0082] The trenches or vias may or may not be filled with a filling material (see Figures 24, 25, etc.).
[0083] The grooves may be filled grooves 325 filled with a filler material, or blank grooves 327 having an empty space inside the groove.
[0084] The vias are either filled vias 323 filled with a filler material or blank vias 321 having an empty space inside the vias.
[0085] The filler may be any one selected from the group consisting of a metal material, an organic material, an organic-inorganic composite material, and a combination thereof.
[0086] The organic material and the organic-inorganic composite material may be, for example, an elastic material. When an elastic material is used as the filler, it can act as a buffer by partially absorbing stress generated in the core.
[0087] The organic-inorganic composite material may include glass fibers, which can enhance the bonding strength between the fillers, thereby further suppressing breakage of the substrate despite tension generated in the substrate.
[0088] If the trenches or vias are in a filled form, they may be filled with an insulating material 111 and / or a conductive metal 131 .
[0089] The metal may be gold (Au), silver (Ag), copper (Cu), nickel (Ni), aluminum (Al), or a combination thereof.
[0090] The insulating material may be a thermosetting material, a thermoplastic material, a UV-curable material, or the like. The insulating material may be a silicon-based material, an epoxy-based material, an acrylic-based material, or the like. The insulating material may be a polymer material, or an organic-inorganic composite material in which inorganic particles are dispersed in a polymer material. The insulating material may be an EMC (Epoxy Molding Compound). For example, Ajinomoto Co.'s ABF may be used, but is not limited thereto.
[0091] When the trenches or vias are filled with an insulating material, each opening can contact the insulating portion of the redistribution layer, and in this case, the insulating material can effectively suppress the occurrence of glass cohesive separation in the core.
[0092] When the trenches or vias are filled with a metal layer (electrically conductive layer), each opening can contact a via pad 329 (see FIG. 24(b)). In addition, the via pad 329 can contact a blind via disposed in a redistribution layer (see FIGS. 24(c) and 27). In this way, the vias or trenches can function as a crack stop structure, a heat generating via, or an electrically conductive via.
[0093] The crack arrest structure 32 can prevent cracks from occurring from the side of the core.
[0094] The crack arrest structure 32 can stop cracks that originate from the sides of the core from growing towards the center of the individual product.
[0095] The crack arrest structure 32 may comprise a filled via filled with an insulating material or a filled trench with a diameter that decreases toward the interior of the trench (see FIG. 25).
[0096] The crack arrest structure 32 may include a series of filled grooves arranged side by side, each having an opening on its upper surface and a lower surface, and each having a diameter that decreases toward the interior of the groove (see FIGS. 26 and 28).
[0097] JPEG2026012917000002.jpg10164
[0098] The crack stop structure 32 may have openings on its upper and lower surfaces, through vias that contact pads, and the pads on the upper and lower surfaces may be connected to blind vias and pads on the blind vias, respectively. In this case, the blind vias may be formed in the upper or lower redistribution layer (see FIGS. 30 and 31).
[0099] The crack arrest structure 32 may further include a side protection layer 40 (see Figures 19, 20, etc.).
[0100] The side surface protective layer 40 is a layer that surrounds part or all of the side surfaces of the core.
[0101] The side protective layer 40 may include a filler material.
[0102] The filling material can be the same as the filling material used to fill the vias or grooves.
[0103] The surface including the side surface of the core, a part of the upper surface connected to the side surface, and a part of the lower surface connected to the side surface is the surface to be protected.
[0104] The side protection layer 40 can be disposed on a part or all of the surface to be protected.
[0105] The side protective layer 40 may include any one selected from the group consisting of metal, polymer, glass fiber, and combinations thereof.
[0106] The side protection layer 40 may surround the sides of the core and help inhibit the growth of damage that may originate from the sides or edges of the core.
[0107] The substrate 10 may further include a stabilizing layer 45 surrounding the core (see Figures 16, 18, etc.).
[0108] The stabilizing layers 45 may be layers surrounding the upper and lower surfaces of the core, respectively.
[0109] The stabilizing layer 45 may be a layer that surrounds the upper and lower surfaces of the core and the side surfaces connecting them.
[0110] The stabilizing layer 45 may include any one selected from the group consisting of metal, polymer, fiberglass, and combinations thereof.
[0111] The stabilizing layer 45 may be a layer containing the filler material.
[0112] The stabilization layer 45 may include an insulating layer.
[0113] The side protection layer 40 may include an insulating layer.
[0114] The insulating layer may include inorganic particles dispersed in a polymer resin.
[0115] The core may have a cavity (not shown).
[0116] The core may further include a cavity space disposed on one or both sides.
[0117] The individual substrates may further include cavity spaces disposed on one or both sides of the core.
[0118] The cavity space is a space in which a part of the core is recessed and in which a part or all of the element is embedded.
[0119] 14 is a conceptual diagram illustrating a packaging substrate 90. An upper redistribution layer 27 (redistribution wires are not shown) may be disposed on one surface of the core 20. A lower redistribution layer 29 (redistribution wires are not shown) may be disposed below the other surface of the core. The grooves or vias of the crack stop structure 32 may be connected to the upper redistribution layer or the lower redistribution layer. Solder resist 60 may be disposed above and below the upper redistribution layer 27 and the lower redistribution layer 29, respectively. A connection structure such as a bump 52 may also be disposed below the lower redistribution layer 29.
[0120] 15 and 17 are conceptual diagrams each illustrating a cross section of a semiconductor module. The semiconductor module 900 includes a substrate and an element 80 mounted on the substrate. The substrate 10 is the substrate described above. The substrate may have a glass core. The specific descriptions of the substrate, packaging substrate, etc., as described above, apply as is.
[0121] The element 80 may be an active element and / or a passive element.
[0122] Exemplarily, the active element may include any one of an application processor (AP), a power management integrated circuit (PMIC), a central processing unit (CPU), a controller, and an application specific integrated circuit (ASIC).
[0123] Illustratively, the passive element may include any one of a capacitor, a resistor, and an inductor.
[0124] A structure generally applied to a semiconductor module, such as a bump structure for connecting elements, can be applied to the embodiment.
[0125] Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements made by those skilled in the art using the basic concept of the present invention defined in the appended claims also fall within the scope of the present invention. [Explanation of symbols]
[0126] 10 Substrate 12 Edge of the board 14 Dummy Area 16 Product Area 20 cores 22 Core Edge 30 Damage prevention part 32 Crack arrest structure 321 Blank Beer 323 Filled Vias 325 Filling groove 327 Blank Groove 329 Viapad 40 Side protection layer 45 Stabilization Layer 90 Individual products, packaging substrates 96 Internal Border 94 center point 92 Cutting line 111 Insulation materials 131 Conductive Metals 27 Upper redistribution layer 29 Lower redistribution layer 60 Solder resist 52 Bump 80 elements 900 Semiconductor Modules
Claims
1. A substrate comprising a core which is a glass or ceramic support, The substrate is divided into a product area and a dummy area, The product area is an area in which one or more individual products are placed, the dummy region is a region of the substrate excluding the product region, a breakage prevention portion is disposed in the product area or the dummy area; the damage prevention portion is a region in which one or more crack arrest structures are disposed; the crack stop structure is a concave or via disposed in the core, which stops cracks originating from the side of the core from growing toward the center of the individual product; The crack arrest structure further includes a side protection layer; the side protection layer has a structure surrounding a part or all of the side surfaces of the core, and the product region and the dummy region are disposed inside the region surrounded by the side protection layer; the groove is a depression in the surface of the core, The via is a through hole formed by removing the core so as to penetrate part of the core in the thickness direction of the substrate.
2. the individual product, when viewed from above, has a cutting line, a center point, and an interior border; The cutting line is a line that defines the outline of the individual product when the individual product is separated (singulation), The center point is a virtual point corresponding to the geometric center of the individual product, The inner frame line is a virtual line extending from the cutting line toward the center point by 20% of its length, The substrate of claim 1 , wherein the breakage prevention portion is disposed between an edge of the core and the inner border.
3. The substrate according to claim 1 , wherein the damage prevention portion includes a plurality of the grooves or vias arranged adjacent to a boundary line between the product area and the dummy area.
4. 2. The substrate according to claim 1, wherein the groove or the via has an opening with a diameter A, and the pitch between adjacent grooves or vias is 1.3 to 20 times A.
5. The substrate of claim 1 , wherein the crack arrest structure comprises a curved structure in which the groove or via is positioned to follow the shape of a corner of the individual product.
6. the trench is a filled trench and the via is a filled via; The substrate of claim 1 , wherein the opening of the trench or via is bonded to a via pad.
7. the substrate further includes a stabilization layer surrounding the core; The substrate of claim 1 , wherein the stabilization layer surrounds the core on surfaces including its upper and lower surfaces.
8. The substrate of claim 7, wherein a surface including the side of the core, a portion of the upper surface connected to the side, and a portion of the lower surface connected to the side is a side protection surface, and the side protection layer is disposed on part or all of the side protection surface.
9. The substrate of claim 8 , wherein the stabilization layer comprises an insulating layer.
10. The substrate of claim 1 , wherein the side protection layer comprises an insulating layer.