Integration of dry development and etch processes into a single process chamber for EUV patterning

Abstract

Dry development and post-dry development processes are integrated into a single process chamber.SOLUTION: Process condition management facilitates the integration of a combination of dry development and etching into a single process chamber, eliminating the need for a post-dry development bake step during semiconductor fabrication. A method and apparatus for rapidly performing a large reduction in process chamber pressure allows thermal dry develop and side O2 flush processing or thermal dry develop and plasma hard mask opening operations to be performed without wafer transfer.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] (Incorporated by reference) A PCT application is being filed contemporaneously with this application as part of this application. Each application identified within this contemporaneously filed PCT application to which this application claims benefit or priority is incorporated herein by reference in its entirety for all purposes. [Background technology]

[0002] The fabrication of semiconductor devices, such as integrated circuits, is a multi-step process that involves photolithography. Generally, this process involves depositing material on a wafer and patterning the material using lithographic techniques to form the structural features (e.g., transistors and circuits) of the semiconductor device. Typical photolithography process steps include preparing a substrate, applying a photoresist, such as by spin coating, exposing the photoresist to light in a desired pattern to make the exposed areas of the photoresist somewhat soluble in a developer, developing the photoresist pattern by applying a developer to remove either the exposed or unexposed areas of the photoresist, and subsequent processing, such as by etching or deposition of material, to create features in the areas of the substrate from which the photoresist was removed.

[0003] The evolution of semiconductor design has been driven by the need for and ability to create ever-smaller features on semiconductor substrate materials. One of the challenges in fabricating devices with such small features is the ability to reliably and reproducibly create photolithography masks with sufficient resolution. Current photolithography processes typically use 193 nm ultraviolet (UV) light to expose photoresist. The fact that the wavelength of this light is significantly larger than the desired size of the features formed on the semiconductor substrate presents inherent problems. Achieving feature sizes smaller than the wavelength of light requires the use of complex resolution enhancement techniques, such as multi-patterning. Therefore, there has been significant interest and research in developing photolithography techniques that use shorter wavelength light, such as extreme ultraviolet (EUV) light, which has a wavelength of 10 nm to 15 nm, e.g., 13.5 nm.

[0004] However, EUV photolithography processes present challenges, including low power, light loss during patterning, and metal cross-contamination due to metal outgassing. Therefore, an improved EUV photoresist process is needed that produces materials with desired properties in a more efficient manner.

[0005] The background discussion provided herein is intended to generally present the contents of the present disclosure. To the extent described in this Background section, the work of the presently named inventors, as well as aspects of the description that may not be considered prior art at the time of filing, are not admitted, expressly or impliedly, as prior art against the present disclosure. Summary of the Invention

[0006] The present disclosure relates to a method and apparatus for integrating dry development and post-dry development processes into a single process chamber. This integration increases semiconductor manufacturing efficiency by increasing throughput, reducing wafer transport, increasing wafer productivity, and improving lithography control. The post-dry development process of etching with plasma can be performed in the same process chamber as the dry development, eliminating the need for a post-dry development bake to control outgassing. In some cases, O flash or pattern transfer can be utilized in conjunction with dry development in a single process chamber.

[0007] Accordingly, in a first aspect, the present disclosure encompasses an apparatus for integrating dry development and etching semiconductor processes into a single process chamber. In some embodiments, the apparatus includes one or more process chambers, one or more pressure regulation devices, one or more pumps fluidly coupled to the pressure regulation devices, a plasma processing system, one or more gas inlets into the process chamber and associated flow control hardware, and a controller having at least one processor and memory, the at least one processor and memory being communicatively coupled to each other, the at least one processor being operatively coupled to at least the associated flow control hardware, the memory storing computer-executable instructions that control the at least one processor to perform thermal dry development in the process chamber at a first pressure, plasma dry development and etching in the same process chamber at a second pressure lower than the first pressure, transition the pressure in the same process chamber from the first pressure to the second pressure within 10 seconds, and at least control the associated flow control hardware to maintain uniformity of one or more process parameters.

[0008] In some embodiments, the one or more pressure regulating devices include a pressure control valve assembly.

[0009] In some embodiments, the pressure control valve assembly includes a throttle valve.

[0010] In some embodiments, the one or more pumps include a roughing pump and a turbo pump.

[0011] In some embodiments, the first pressure is between 5 and 50 times higher than the second pressure.

[0012] In some embodiments, the one or more process parameters include pumping, gas delivery, or pumping and gas delivery.

[0013] In a second aspect, the present disclosure encompasses an apparatus for processing a metal-containing photoresist. In some embodiments, the apparatus includes one or more process chambers, one or more pressure regulation devices, one or more pumps fluidly coupled to the pressure regulation devices, one or more gas inlets into the process chambers and associated flow control hardware, a plasma processing system, and a controller having at least one processor and memory, wherein the at least one processor and memory are communicatively coupled to each other, and the at least one processor is at least operatively coupled to the associated flow control hardware, and the memory stores computer-executable instructions that control the at least one processor to at least control the associated flow control hardware to perform thermal dry development in the process chamber at a first pressure, perform plasma dry development and etching in the same process chamber at a second pressure lower than the first pressure, adjust the pressure in the same process chamber from the first pressure to the second pressure within 10 seconds, and after the plasma dry development and etching, return the pressure in the same process chamber from the second pressure to the first pressure within 20 seconds, and maintain one or more process parameters uniform.

[0014] In some embodiments, the plasma processing system includes a radio frequency power amplifier.

[0015] In some embodiments, the radio frequency power amplifier operates continuously or in a pulsed manner.

[0016] In a third aspect, the present disclosure encompasses a method for processing a semiconductor substrate. In some embodiments, the method includes providing a patterned photoresist on a semiconductor substrate in a process chamber, thermally dry developing the patterned photoresist with a process gas at a first pressure to form a thermally dry-developed patterned resist, and plasma dry developing and etching the dry-developed patterned resist with an etchant at a second pressure to form a patterned substrate, wherein the thermal dry developing, plasma dry developing, and etching are performed in the same process chamber, the process chamber is transitioned from the first pressure to the second pressure within 10 seconds before the etching and returned to the first pressure within 20 seconds after the etching, and the patterned photoresist is a metal-containing photoresist.

[0017] In some embodiments, the first pressure is about 200-500 mTorr and the second pressure is about 20-50 mTorr.

[0018] In some embodiments, the metal-containing photoresist comprises a photopatterned EUV-sensitive organometallic oxide, a photopatterned EUV-sensitive metal oxide, or an organometallic-containing thin film EUV resist.

[0019] In some embodiments, the photopatterned EUV-sensitive metal oxide comprises tin oxide.

[0020] In some embodiments, the outgassing of tin from tin oxide is reduced.

[0021] In some embodiments, the method also includes selective metal deposition.

[0022] In some embodiments, the etching comprises exposure to an etchant plasma.

[0023] In some embodiments, the etchant plasma comprises a hard mask opening gas.

[0024] In some embodiments, the hard mask opening gas comprises carbonyl sulfide, oxygen, carbon dioxide, nitrogen, hydrogen, or a combination thereof.

[0025] In some embodiments, the hard mask opening gas comprises an oxygen plasma.

[0026] In some embodiments, the exposure to the oxygen plasma is for a duration of about 0.5 to about 4 seconds.

[0027] These and other aspects are further described below with reference to the drawings. [Brief explanation of the drawings]

[0028] [Figure 1] FIG. 1 shows a flow diagram of a conventional process for depositing, developing, and treating photoresist.

[0029] [Figure 2A] FIG. 2A is a cross-sectional schematic illustration of various processing stages including photoresist development and processing. [Figure 2B] FIG. 2B is a cross-sectional schematic illustration of various processing stages including photoresist development and processing. [Figure 2C] FIG. 2C is a cross-sectional schematic illustration of various processing stages including photoresist development and processing.

[0030] [Figure 3] FIG. 3 illustrates a flow diagram of an exemplary method of the overall process of treating photoresist on a developed substrate in a single process chamber, according to certain disclosed embodiments.

[0031] [Figure 4]FIG. 4 illustrates a flow diagram of an exemplary method for combining dry development and etching steps in the same process chamber, according to certain disclosed embodiments.

[0032] [Figure 5] FIG. 5 illustrates a flow diagram of another exemplary method that combines dry development and etching steps in the same process chamber and includes selective metal deposition, according to certain disclosed embodiments.

[0033] [Figure 6] FIG. 6 illustrates a schematic diagram of an exemplary process station for maintaining a suitable environment for performing photoresist development, photoresist treatment, and / or etching operations, according to certain disclosed embodiments.

[0034] [Figure 7] FIG. 7 illustrates a schematic diagram of an exemplary multi-station processing tool suitable for performing the photoresist developing, photoresist treating, and / or etching operations described herein, in accordance with certain disclosed embodiments.

[0035] [Figure 8] FIG. 8 illustrates a cross-sectional schematic diagram of an exemplary inductively coupled plasma apparatus for carrying out certain embodiments and operations described herein, according to certain disclosed embodiments.

[0036] [Figure 9] FIG. 9 illustrates a semiconductor process cluster tool architecture with a vacuum-integrated deposition and patterning module in conjunction with a vacuum transfer module, suitable for carrying out the processes described herein, in accordance with certain disclosed embodiments. DETAILED DESCRIPTION OF THE INVENTION

[0037] In the following description, numerous specific details are set forth in order to provide a thorough understanding of the presented embodiments. The disclosed embodiments may be practiced without some or all of these specific details. In other instances, well-known process operations have not been described in detail so as not to unnecessarily obscure the disclosed embodiments. While the disclosed embodiments will be described in conjunction with specific embodiments, it will be understood that they are not intended to limit the disclosed embodiments.

[0038] definition As used herein, the term "about" is understood to allow for slight increases and / or decreases beyond the stated value, where the changes do not significantly affect the desired function of the parameter beyond the stated value. In some cases, "about" encompasses ±10% of any stated value. As used herein, the term modifies any stated value, range of values, or one or more end points of a range.

[0039] As used herein, the terms "top," "bottom," "upper," "lower," "above," and "below" are used to describe relative relationships between structures. The use of these terms does not indicate or require that a particular structure be located in a particular position within a device.

[0040] The embodiments disclosed below describe the deposition of materials onto a substrate, such as a wafer, substrate, or other workpiece. The workpiece can be of various shapes, sizes, and materials. In this application, the terms "semiconductor wafer," "wafer," "substrate," "wafer substrate," and "partially fabricated integrated circuit" are used interchangeably. Those skilled in the art will understand that the term "partially fabricated integrated circuit" can refer to a silicon wafer at any of the multiple stages of integrated circuit fabrication thereon. Wafers or substrates used in the semiconductor device industry typically have diameters of 200 mm, 300 mm, or 450 mm. Unless otherwise noted, process details (e.g., flow rates, power levels, etc.) described herein relate to the processing of 300 mm diameter substrates or processing chambers configured to process 300 mm diameter substrates and may be appropriately scaled for substrates or chambers of other sizes. In addition to semiconductor wafers, other workpieces that can be used in the embodiments disclosed herein include various articles such as printed circuit boards. The process and apparatus can be used in the fabrication of semiconductor devices, displays, LEDs, photovoltaic panels, and the like.

[0041] As used herein, the phrase "at least one of A, B, and C" should be interpreted to mean non-exclusive "or" logic (A or B or C), and not to mean "at least one of A, at least one of B, and at least one of C."

[0042] As used herein, the term "photoresist" and its derivatives refer to a photosensitive material used in processes such as photolithography, photoetching, or photoengraving to form a patterned coating on a surface. Photoresist materials change their solubility in a developer when exposed to light of a specific wavelength. Photoresist layers can be composed of positive-acting (exposed areas become soluble) or negative-acting (exposed areas become insoluble) photoresist materials.

[0043] Introduction and Background The present disclosure relates generally to the field of semiconductor processing. In particular, the present disclosure relates to post-development treatments of photoresists, including metal-containing photoresists. Such metal- and / or metal oxide-containing photoresists can be subjected to treatments after development and before pattern transfer to alter the chemical, physical, and / or optical properties of the photoresist. Treatment of the photoresist improves the photoresist's performance. For example, treatment of the photoresist can reduce dose-to-size (DtS), reduce line width write (LWR), increase line CD, improve etch resistance, reduce tin or other outgassing, and / or reduce defects / line breaks.

[0044] Patterning thin films in semiconductor processing is often a critical step in semiconductor fabrication. Patterning involves lithography. In traditional photolithography, such as 193 nm photolithography, a pattern is printed onto a light-sensitive photoresist film by exposing the photoresist in selected areas defined by a photomask to photons, which triggers a chemical reaction within the exposed photoresist, creating chemical contrast that can be used in a development step to remove specific portions of the photoresist to form the pattern. The patterned and developed photoresist film can then be used as an etch mask to transfer the pattern into underlying films composed of metals, oxides, etc.

[0045] Advanced technology nodes (as defined by the International Technology Roadmap for Semiconductors) include the 22 nm, 16 nm, and beyond. For example, at the 16 nm node, via or line widths in damascene structures are typically about 30 nm or less. The shrinking features of advanced semiconductor integrated circuits (ICs) and other devices are driving improvements in lithography resolution.

[0046] Extreme ultraviolet (EUV) lithography enables the extension of lithography techniques by moving to shorter imaging light source wavelengths than are achievable with traditional photolithography methods. EUV light sources with wavelengths of approximately 10-20 nm, or 11-14 nm, e.g., 13.5 nm, can be used in cutting-edge lithography tools, also known as scanners. EUV radiation is strongly absorbed by a wide range of solid and fluid materials, including quartz and water vapor, and therefore operates in a vacuum.

[0047] In EUV lithography, a patterned EUV resist is used to form a mask for etching the underlying layer. The EUV resist can be a polymer-based chemically amplified resist (CAR) fabricated by a liquid-based spin-on technique. An alternative to CAR is a directly photopatternable metal oxide-containing film, such as those available from Inpria Corp. (Corvallis, Oregon), and described, for example, in U.S. Patent Publication Nos. US2017 / 0102612, US2016 / 0216606, and US2016 / 0116839, which are incorporated by reference herein at least for their disclosure of photopatternable metal oxide-containing films. Such films can be fabricated by spin-on techniques or dry deposition. Metal oxide-containing films can be patterned directly (i.e., without the use of a separate photoresist) by EUV exposure in a vacuum atmosphere, providing patterning resolution of less than 30 nm, as described, for example, in U.S. Pat. No. 9,996,004, entitled "EUV PHOTOPATTERNING OF VAPOR-DEPOSITED METAL OXIDE-CONTAINING HARD MASKS," issued June 12, 2018, and / or International Application No. PCT / US19 / 31618, entitled "METHODS FOR MAKING EUV PATTERNABLE HARD MASKS," published in International Publication No. WO 2019 / 217749 and filed May 9, 2019, the disclosures of which, at least as they relate to the composition, deposition, and patterning of directly photopatternable metal oxide films to form EUV resist masks, are incorporated herein by reference. Generally, patterning involves exposing the EUV resist to EUV radiation to form a photopattern in the resist, followed by development to remove portions of the resist according to the photopattern to form a mask.

[0048] Directly photopatternable EUV or DUV resists may be composed of or include metals and / or metal oxides mixed with organic components. The metals / metal oxides can facilitate absorption of EUV or DUV photons, generate secondary electrons, and / or exhibit increased etch selectivity relative to underlying film stacks and device layers. Such resists can be developed using a wet (solvent) approach, which requires moving the wafer to a track where it is exposed to a developing solvent, dried, and then baked. Such resists can also be developed using a dry approach, or a combination of wet and dry approaches, as described herein.

[0049] In general, resists can be employed as either positive or negative resists by controlling the resist chemistry and / or the solubility or reactivity of the developer. It would be beneficial to have an EUV or DUV resist that can function as either a negative or positive resist.

[0050] Although the following may be described as techniques relating to EUV processes, such techniques may also be applicable to other next-generation lithography technologies. A variety of radiation sources may be employed, including EUV (typically around 13.5 nm), DUV (deep ultraviolet light, typically in the 248 nm or 193 nm range with excimer laser sources), X-ray (including EUV in the lower energy range of the X-ray range), and electron beam (including a wide energy range).

[0051] The present disclosure relates to post-development treatments for photoresists. Metal- or metal oxide-containing photoresists can be wet- or dry-deposited. Metal- or metal oxide-containing photoresists have high absorptivity for EUV radiation, allowing the photoresist to be patterned by EUV exposure to form exposed and unexposed regions. After selectively removing the exposed or unexposed regions of the photopatterned metal- or metal oxide-containing photoresist by development, the developed photoresist can be treated. Such treatments can include one or more of the following operations: (i) thermal annealing, (ii) plasma exposure, (iii) reactive gas exposure, and (iv) selective deposition of a protective layer. Such treatments can achieve one or more of the following benefits: reduced defects, reduced line width write (LWR), reduced distance to stress (DtS), reduced outgassing (e.g., tin outgassing), improved etch resistance, and increased line CD, thereby improving the performance of the metal- or metal oxide-containing photoresist during etching.

[0052] Reference will be made in detail herein to specific embodiments of the present disclosure. Examples of specific embodiments are illustrated in the accompanying drawings. While the present disclosure will be described in conjunction with these specific embodiments, it will be understood that it is not intended to limit the disclosure to such specific embodiments. On the contrary, it is intended to cover alternatives, modifications, and equivalents as may be included within the spirit and scope of the present disclosure. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure. The present disclosure may be practiced without some or all of these specific details. In other instances, well-known process operations have not been described in detail in order to avoid unnecessarily obscuring the present disclosure.

[0053] 1 shows a flow diagram of the steps of a conventional method for depositing, developing, and treating photoresist. In block 102 of process 100, a layer of photoresist is deposited. This can be either a dry deposition process, such as an evaporation process, or a wet deposition process, such as a spin-on deposition process. In one embodiment, the metal-containing precursor is deposited as a solution using a liquid-based spin-on technique. In another embodiment, the metal-containing precursor is deposited in vapor form using a dry technique (e.g., chemical vapor deposition).

[0054] A photoresist film can be deposited on a substrate. Such films can be deposited using wet or dry deposition processes in which a metal-containing precursor (e.g., a tin-containing precursor such as any described herein) is provided adjacent to the substrate. In one embodiment, the metal-containing precursor is deposited as a solution using a liquid-based spin-on technique. In another embodiment, the metal-containing precursor is deposited in vapor form using a dry technique (e.g., chemical vapor deposition). In this disclosure, the metal-containing precursor is often referred to as a tin-containing precursor, although other metal atoms can be employed.

[0055] The layers and films described herein are 7 cm 2 The imaging layer may include components (e.g., metal atoms or non-metal atoms) having a large optical absorption cross section, such as 1000 u / mol or more. Such components may be provided by depositing one or more precursors to provide the imaging layer.

[0056] In some embodiments, the film is a radiation-sensitive film (e.g., an EUV-sensitive film). The film can function as an EUV resist, as described further herein. In certain embodiments, the layer or film can include one or more ligands (e.g., EUV-labile ligands) that can be removed, cleaved, or crosslinked by radiation (e.g., EUV radiation or DUV radiation).

[0057] The precursor can provide a patternable film that is sensitive to radiation (or a patterned radiation-sensitive film or a photopatternable film). Such radiation can include EUV radiation, DUV radiation, or UV radiation provided by irradiating through a patterned mask, thereby resulting in patterned radiation. Exposure to such radiation can alter the film itself such that it is radiation-sensitive or photosensitive. In certain embodiments, the precursor is an organometallic compound containing at least one metal center.

[0058] The precursor can have any useful number and type of ligands. In some embodiments, the ligands can be characterized by their ability to react in the presence of a counter-reactant or in the presence of patterned radiation. For example, the precursor can include a ligand that reacts with a counter-reactant, thereby introducing a bond (e.g., an -O- bond) between the metal centers. In another example, the precursor can include a ligand that disappears in the presence of patterned radiation.

[0059] The precursor should have a large patterning radiation absorption cross section (e.g., 1 × 10 7 cm 2 M may include a metal or metalloid or atom having an EUV absorption cross section (EUV absorption cross section that is 1 / mol or greater). In some embodiments, M is tin (Sn), bismuth (Bi), tellurium (Te), cesium (Cs), antimony (Sb), indium (In), molybdenum (Mo), hafnium (Hf), iodine (I), zirconium (Zr), iron (Fe), cobalt (Co), nickel (Ni), copper (Cu), zinc (Zn), silver (Ag), platinum (Pt), and lead (Pb).

[0060] In certain embodiments, the precursor comprises tin. Non-limiting tin precursors include SnF, SnH, SnBr, SnCl, SnI, tetramethyltin (SnMe), tetraethyltin (SnEt), trimethyltin chloride (SnMeCl), dimethyltin dichloride (SnMeCl), methyltin trichloride (SnMeCl), tetraallyltin, tetravinyltin, hexaphenylditin(IV) (PhSn-SnPh, where Ph is phenyl), dibutyldiphenyltin (SnBuPh), and the like. 2), trimethyl(phenyl)tin (SnMe3Ph), trimethyl(phenylethynyl)tin, tricyclohexyltin hydride, tributyltin hydride (SnBu3H), dibutyltin diacetate (SnBu2(CH3COO)2), tin(II) acetylacetonate (Sn(acac)2), tributyltin ethoxide (SnBu3(OEt)), dibutyltin dimethoxide (SnBu2(OMe)2), tributyltin methoxide (SnBu3(OMe)), Tin(IV) tert-butoxide (Sn(t-BuO)4), n-butyltin tributoxide (Sn(n-Bu)(t-BuO)3), tetrakis(dimethylamino)tin (Sn(NMe2)4), tetrakis(ethylmethylamino)tin (Sn(NMeEt)4), tetrakis(diethylamino)tin(IV) (Sn(NEt2)4), (dimethylamino)trimethyltin(IV) (Sn(Me)3(NMe2), Sn(i-Pr)(NMe2)3, Sn(n-Bu) (NMe2)3, Sn(s-Bu)(NMe2)3, Sn(i-Bu)(NMe2)3, Sn(t-Bu)(NMe2)3, Sn(t-Bu)2(NMe2)2, Sn(t-Bu)(NEt2)3, Sn(tbba), Sn(II) (1,3-bis(1,1-dimethylethyl)-4,5-dimethyl-(4R,5R)-1,3,2-diazastannolidin-2-ylidene), or bis[bis(trimethylsilyl)amino]tin (Sn[N(SiMe3)2]2).

[0061] Exemplary deposition techniques (e.g., for films) include any of those described herein, such as discontinuous ALD-like processes in which precursors and counter reactants are separated in time or space, such as ALD with a CVD component, such as ALD (e.g., thermal ALD and plasma-enhanced ALD), spin-coat deposition, PVD including PVD co-sputtering, CVD (e.g., PE-CVD or LP-CVD), sputter deposition, e-beam deposition including e-beam co-evaporation, etc., or combinations thereof.

[0062] Further description of precursors and deposition methods for EUV photoresist films applicable to the present disclosure can be found in International Application No. PCT / US19 / 31618, entitled "METHODS FOR MAKING EUV PATTERNABLE HARD MASKS," published as International Publication No. WO 2019 / 217749 and filed May 9, 2019. The films may include optional materials in addition to the precursors and counter reactants to modify the film's chemical or physical properties, such as to alter the film's sensitivity to EUV or to enhance etch resistance. Such optional materials may be introduced during vapor formation prior to deposition on the substrate, during deposition on the substrate, and / or by doping after film deposition. In some embodiments, a mild remote H plasma may be introduced to, for example, replace some Sn-L bonds with Sn-H, thereby enhancing the reactivity of the resist under EUV. In other embodiments, CO2 may be introduced to replace some Sn-O bonds with Sn-CO3 bonds, which can improve resistance to wet development.

[0063] The various atoms present in the precursor and / or counter reactant can be provided in a capping layer disposed on any useful layer or structure. The capping layer can be of any useful thickness (e.g., any thickness described herein, including from about 0.1 nm to about 5 nm).

[0064] Furthermore, two or more different precursors can be employed within each layer (e.g., a film or capping layer). For example, two or more of any metal-containing precursors herein can be employed to form an alloy. Further exemplary EUV-sensitive materials, as well as processing methods and apparatus, are described in U.S. Pat. No. 9,996,004, International Patent Publication No. WO2020 / 102085, and International Patent Publication No. WO2019 / 217749, each of which is incorporated herein by reference in its entirety.

[0065] In block 104 of process 100, the backside or bevel of the substrate can be optionally cleaned and / or the edge bead of photoresist deposited in a previous step can be removed. Such cleaning or removal steps can be useful to remove particles that may be present after depositing a photoresist layer. The removal step can include treating the wafer with a wet metal oxide (MeOx) edge bead removal (EBR) step.

[0066] Block 106 of process 100 optionally includes a post-apply bake (PAB) or post-apply treatment. Such treatment can improve the etch resistance of unexposed materials to aqueous or non-aqueous solutions. In one example, such treatment can increase the chemical composition difference (or contrast) between unexposed and exposed regions, and therefore a PAB operation is performed. In another example, such treatment can decrease the chemical composition difference (or contrast) between unexposed and exposed regions, and therefore a PAB operation is not performed. In yet another example, the PAB is used to remove residual moisture from the layer, forming a hardened resist film. PAB can include some combination of thermal treatment, chemical exposure, and / or moisture to improve the EUV sensitivity of the film, thereby reducing the EUV dose required to develop a pattern in the film. In certain embodiments, the PAB step is performed at a temperature above about 100°C, or between about 100°C and about 200°C, or between about 100°C and about 250°C. In other embodiments, the PAB process is carried out in the absence of an O-containing gas at a temperature of about 190° C. to about 350° C. In another example, the post-application treatment includes exposing the film to an inert gas or CO, which can optionally include cooling or heating. The use of an inert gas can provide metal-oxygen-metal species, and the use of CO can provide metal carbonate species in the film.

[0067] In block 108 of process 100, the film is exposed to EUV radiation to develop the pattern. Generally, EUV exposure causes a change in the chemical composition of the film, creating a contrast in etch selectivity that can be used to remove portions of the film. Such contrast can provide a positive resist. However, it will be understood that EUV exposure can alternatively cause a contrast such that unexposed areas are selectively removed. Such contrast can provide a negative resist, as described herein. EUV exposure can include, for example, exposure having a wavelength in the range of about 10 nm to about 20 nm (e.g., about 13.5 nm in a vacuum atmosphere) in a vacuum atmosphere.

[0068] In block 110 of process 100, the exposed film is subjected to a post-exposure bake (PEB) to further remove residual moisture, promote chemical condensation within the film, or increase the contrast in the etch selectivity of the exposed film. Alternatively, the film is post-treated in any useful manner. In one example, such treatment may reduce the chemical composition difference (or contrast) between the unexposed and exposed regions, so a PEB operation is not performed. In another example, the exposed film can be thermally treated (e.g., at low temperature and / or optionally in the presence of various chemical species) to promote reactivity within the EUV-exposed or unexposed portions of the resist upon exposure to a stripper or positive-tone developer (e.g., a halide-based aqueous acid such as HCl, HBr, HI, or a combination thereof). In another example, the exposed film can be thermally treated (e.g., at low temperature) to further crosslink ligands within the EUV-unexposed portions of the resist, thereby providing EUV-exposed portions that can be selectively removed upon exposure to a stripper (e.g., a positive-tone developer). In yet another example, the PEB is omitted.

[0069] In block 112 of process 100, the photoresist pattern is developed by positive-tone or negative-tone development methods. In various development embodiments, unexposed areas are selectively removed (to provide a pattern in the negative resist). These steps may be wet processes using one or more developers or solutions, followed by optional rinsing operations (e.g., using deionized water or another solvent) or optional dry operations (e.g., in air or under inert conditions, with optional heating). In certain embodiments, the development step is a wet process applied to tin-based films. In other embodiments, the development step is a dry process applied to tin-based films. For example, the dry process includes halide-containing chemistries.

[0070] After block 112, a post-development inspection may be performed, and if necessary, reprocessing may be performed by returning to repeat operation 102.

[0071] In block 114 of process 100, the photoresist undergoes a treatment prior to pattern transfer. This treatment can be a thermal treatment, a plasma treatment, a chemical treatment, a selective deposition treatment, or a combination of the aforementioned treatments. Thermal treatments can expose the photoresist to high temperatures, such as about 200°C to about 300°C, to reduce defects and line width roughness (LWR). Plasma treatments can expose the photoresist to plasma, such as direct (in-situ) or remote plasma, to densify the photoresist and reduce line width roughness (LWR). Chemical treatments can expose the photoresist to reactive species, such as halide-based species (e.g., tungsten hexafluoride) or carbon-containing precursors (e.g., carbon monoxide, metal organic precursors), to improve etch resistance, reduce outgassing, and increase line CD. Selective deposition treatments can expose the photoresist to chemical precursors to selectively deposit a protective coating on the photoresist to reduce DtS, improve etch resistance, reduce outgassing, and increase line CD. Any one or more of the aforementioned treatments can be applied to the developed photoresist to improve the photoresist's performance during pattern transfer.

[0072] In block 116 of process 100, one or more substrate layers are etched using a pattern transfer photoresist mask. Such substrate layers may be underlying the photoresist mask and removable by lithographic etching. Pattern transfer etching allows etching of material to a desired depth to form multiple patterned features. In some embodiments, the one or more substrate layers may include amorphous carbon (aC), amorphous silicon (a-Si), tin oxide (e.g., SnO), or other suitable materials. x ), silicon oxide (e.g., SiO2), silicon oxynitride (e.g., SiO x N y ), silicon oxycarbide (e.g., SiO x C y ), silicon nitride (e.g., Si3N4), titanium oxide (e.g., TiO2), titanium nitride (e.g., TiN), tungsten (e.g., W), doped carbon (e.g., W-doped C), tungsten oxide (e.g., WOx ), hafnium oxide (e.g., HfO2), zirconium oxide (e.g., ZrO2), and aluminum oxide (e.g., Al2O3). Any defects or CD variations in the photoresist mask will be reproduced in the material being patterned during pattern transfer etching. Furthermore, poor etch resistance adversely affects the pattern transfer to the underlying substrate layer during etching. Post-development processing of the photoresist mask mitigates the aforementioned issues to ensure successful pattern transfer during pattern transfer etching.

[0073] After pattern transfer, post-etch inspection may be performed, and if necessary, reprocessing may be performed by returning to repeat operation 102.

[0074] 2A-2C show cross-sectional schematic diagrams providing an overview of the various processing steps, including photoresist development and processing. As shown in FIG. 2A, wafer 200 includes substrate 202 and substrate layer 204 to be etched. The patterning structure can include any useful substrate. For example, the incoming wafer can be prepared with a substrate surface of the desired material, with the top material being the layer to which the resist pattern will be transferred. While the choice of material can vary depending on the integration level, it is generally desirable to select a material that can be etched with high selectivity (i.e., can etch much faster) relative to the EUV resist or imaging layer.

[0075] In some embodiments, the substrate is a hard mask, which is used in the lithographic etching of the underlying semiconductor material. Hard masks can be made of amorphous carbon (aC), tin oxide (e.g., SnO), x ), silicon oxide (e.g., including SiO2, SiO x ), silicon oxynitride (e.g., SiO x N y ), silicon oxycarbide (e.g., SiO x C y), silicon nitride (e.g., Si3N4), titanium oxide (e.g., TiO2), titanium nitride (e.g., TiN), tungsten (e.g., W), doped carbon (e.g., W-doped C), tungsten oxide (e.g., WO x ), hafnium oxide (e.g., HfO), zirconium oxide (e.g., ZrO), and aluminum oxide (e.g., AlO). Suitable substrate materials include various carbon-based films (e.g., ashable hard masks (AHMs), silicon-based films (e.g., SiO x , SiC x , SiO x C y , SiO x N y , SiO x C y N z ), a-Si:H, poly-Si, or SiN), or any other (typically sacrificial) film applied to facilitate the patterning process. For example, the substrate may preferably be a SnO film, such as SnO2. x In various embodiments, the layer thickness is between 1 nm and 100 nm, or between 2 nm and 10 nm.

[0076] In some embodiments, the substrate layer 204 comprises an ashable hard mask such as amorphous carbon, spin-on carbon, or other materials, such as silicon, silicon oxide, silicon nitride, or silicon carbide. In some embodiments, the substrate layer 204 may be a layer stack disposed on the substrate 202. The wafer 200 further includes a photopatterned metal-containing EUV resist film 206. For example, the photopatterned metal-containing EUV resist film 206 may be an organometallic-containing layer disposed on the substrate layer 204 to be etched. The thickness of the photopatterned metal-containing EUV resist film 206 may be from about 5 nm to about 50 nm, or from about 10 nm to about 30 nm. The photopatterned metal-containing EUV resist film 206 may be provided in a process chamber after photopatterning in an EUV scanner and / or after a PEB process. The photopatterned metal-containing EUV resist film 206 includes non-EUV-exposed regions 206a and EUV-exposed regions 206b.

[0077] As shown in FIG. 2B, the non-EUV-exposed regions 206a of the photopatterned metal-containing EUV resist film 206 are removed in a development step. Development may use wet or dry development chemistry. If dry development chemistry is applied, dry development may proceed with or without plasma exposure. In some embodiments, the dry development chemistry may include a halide-containing chemistry. A photoresist mask of the photopatterned metal-containing EUV resist film 206 is formed by removing the non-EUV-exposed regions 206a after development. While FIGS. 2A-2C illustrate negative tone development, it will be understood that positive tone development may alternatively be applied in the present disclosure.

[0078] As shown in FIG. 2C , the photoresist mask 208 is used to etch the substrate layer 204 to form recessed features in the wafer 200 defined by the photoresist mask 208. The wafer 200 is then subjected to a pattern transfer etch such that an etchant selectively removes the substrate layer 204 relative to the chemically modified photoresist mask 208. The pattern transfer etch can be a dry etch or a wet etch. For example, the dry etch may utilize a fluorine-based plasma etch process or an oxygen-based plasma etch process. The pattern transfer etch can etch the substrate layer 204 according to the pattern defined by the photoresist mask 208. In some embodiments, the photoresist mask 208 retains, or at least substantially retains, the increased line CD after the pattern transfer etch.

[0079] 1, the steps of process 100 represented by blocks 112, 114, and 116 are traditionally performed in separate chambers and therefore involve transferring wafers from one process chamber to the next for subsequent operations. To improve process efficiency and throughput, the methods disclosed herein may reduce the number of steps and / or chambers for various operations.

[0080] In particular, the efficiency of conventional process 100 as shown in FIG. 1 can be improved by performing the steps represented by blocks 112 and 116 in the same process chamber in a manner that does not require a dry post-develop bake 114 .

[0081] Integrated Method As described above, the present disclosure provides methods for films on semiconductor substrates that can be patterned using EUV or other next-generation lithography techniques. The methods include generating a polymerized organometallic material in vapor form and depositing it on a substrate. In some embodiments, the dry deposition can employ any useful precursor (e.g., a metal halide, capping agent, or organometallic agent described herein). In other embodiments, a spin-on formulation can be used. The deposition process can include applying an EUV-sensitive material as a resist film or an EUV-sensitive film.

[0082] Such EUV-sensitive films contain materials that undergo changes upon exposure to EUV, such as the loss of bulky pendant ligands attached to metal atoms. If the unexposed regions contain a high concentration of MOM-rich material, EUV-induced cleavage can produce intermediates that are more easily removed by positive-tone developers.

[0083] EUV patterning creates regions of the film with altered physical or chemical properties compared to unexposed regions. These properties can be exploited in subsequent processing, such as dissolving either the unexposed or exposed regions, or selectively depositing material in either the exposed or unexposed regions. In some embodiments, under the conditions under which such subsequent processing occurs, the unexposed film has a hydrophobic surface, and the exposed film has a hydrophilic surface (it being understood that the hydrophilic properties of the exposed and unexposed regions are relative to one another). For example, material removal can be achieved by exploiting differences in the film's chemical composition, density, and cross-linking. Removal can be achieved by wet or dry processing, as further described herein.

[0084] The thickness of the EUV-patternable film formed on the surface of a substrate can vary depending on the surface characteristics, materials used, and processing conditions. In various embodiments, the film thickness can range from about 0.5 nm to about 100 nm. Preferably, the film has a thickness sufficient to absorb a majority of the EUV light under EUV patterning conditions. For example, the overall absorption of the resist film may be 30% or less (e.g., 10% or less, or 5% or less), thereby fully exposing the resist material at the bottom of the resist film. In some embodiments, the film thickness is 10 nm to 20 nm. Without limiting the mechanism, function, or utility of the present disclosure, it is believed that the processes of the present disclosure are applicable to a wide variety of substrates. Furthermore, as discussed above, the deposited film can closely conform to surface features, providing advantages in forming masks over substrates, such as substrates with underlying features, without "burying" or otherwise planarizing such features.

[0085] The film can be composed of a metal oxide layer deposited by any useful method. Such a metal oxide layer can be deposited or applied using any EUV-sensitive material described herein, such as a precursor (e.g., a metal-containing precursor, a metal halide, a capping agent, or an organometallic agent) combined with a counter reactant. In an exemplary process, a polymerized organometallic material is formed in the vapor phase or in situ on a substrate surface to provide a metal oxide layer. The metal oxide layer can be employed as a film, an adhesion layer, or a capping layer.

[0086] Generally, the method can include mixing a vapor flow of a precursor (e.g., a metal-containing precursor such as an organometallic agent) with a vapor flow of an optional counter reactant to form a polymerized organometallic material, and depositing the organometallic material on a surface of a semiconductor substrate. In some embodiments, mixing the precursor with the optional counter reactant can form a polymerized organometallic material. As will be appreciated by those skilled in the art, in a substantially continuous process, the mixing and deposition aspects of the process can occur simultaneously.

[0087] In an exemplary continuous CVD process, two or more gas streams of precursors and optional counter reactant sources are introduced into a deposition chamber of a CVD apparatus through separate inlet paths, where they mix and react in the gas phase to form an aggregated polymeric material (e.g., by forming metal-oxygen-metal bonds) or a film on a substrate. The gas streams can be introduced, for example, using separate inlets or a dual plenum showerhead. The apparatus is configured so that the precursor and optional counter reactant flows mix within the chamber, and the precursor and optional counter reactant react to form a polymerized organometallic material or a film (e.g., a metal oxide coating, or an aggregated polymeric material, such as by forming metal-oxygen-metal bonds).

[0088] To deposit metal oxides, CVD processes are typically performed at reduced pressures, such as between 0.1 Torr and 10 Torr. In some embodiments, the process is performed at a pressure between 1 Torr and 2 Torr. The temperature of the substrate is preferably less than the temperature of the reactant stream. For example, the temperature of the substrate can be between 0°C and 250°C, or between ambient temperature (e.g., 23°C) and 150°C.

[0089] To deposit the aggregated polymeric material, CVD processes are typically performed at reduced pressures, such as 10 mTorr to 10 Torr. In some embodiments, the process is performed at 0.5 to 2 Torr. The substrate temperature is preferably at or below the temperature of the reactant stream. For example, the substrate temperature can be between 0°C and 250°C, or between ambient temperature (e.g., 23°C) and 150°C. In various processes, deposition of polymerized organometallic materials on the substrate occurs at a rate inversely proportional to the surface temperature. Without limiting the mechanism, function, or utility of the present disclosure, it is believed that the products from such gas-phase reactions increase in molecular weight as metal atoms are crosslinked by counter reactants and then condense or otherwise deposit on the substrate. In various embodiments, steric hindrance from bulky alkyl groups further prevents the formation of a densely packed network, producing a low-density film with increased porosity.

[0090] A potential advantage of using dry deposition techniques is the ease of tailoring the film composition as it grows. In a CVD process, this can be achieved by varying the relative flow rates of the first and second precursors during deposition. Deposition can occur at temperatures between 30°C and 200°C and pressures between 0.01 Torr and 100 Torr, but more commonly between about 0.1 Torr and 10 Torr.

[0091] Films (e.g., metal oxide coatings or aggregated polymeric materials, such as by forming metal-oxygen-metal bonds) can also be deposited by ALD processes. For example, precursor(s) and optional counter reactants are introduced at separate times, representing ALD cycles. The precursors react on the surface, forming up to a monolayer of material at a time in each cycle. This can allow for excellent control over film thickness uniformity across the surface. ALD processes are typically performed under reduced pressure, such as 0.1 Torr to 10 Torr. In some embodiments, the process is performed at 1 Torr to 2 Torr. The substrate temperature can be between 0°C and 250°C, or between ambient temperature (e.g., 23°C) and 150°C. The process can be a thermal process or, preferably, a plasma-assisted deposition.

[0092] Any deposition method herein can be modified to allow the use of two or more different precursors. In one embodiment, the precursors can contain the same metal but different ligands. In another embodiment, the precursors can contain different metals. In one non-limiting example, alternating flows of various volatile precursors can provide mixed-metal-containing layers, such as using a metal alkoxide precursor having a first metal (e.g., Sn) with a silyl-based precursor having a different second metal (e.g., Te).

[0093] The processes herein can be used to achieve surface modification. In several iterations, precursor vapors can be passed over the wafer. The wafer can be heated to provide thermal energy for the reaction to proceed. In some iterations, heating can be from about 50°C to about 250°C. In some cases, pulses of precursors can be used, separated by pumping and / or purging steps. For example, a first precursor can be pulsed between pulses of a second precursor to produce ALD or ALD-like growth. In other cases, both precursors can be flowed simultaneously. Examples of elements useful for surface modification include I, F, Sn, Bi, Sb, Te, and oxides or alloys of these compounds.

[0094] The processes herein can be used to deposit thin metal oxides or metals by ALD or CVD. Examples include tin oxide (SnO x ), bismuth oxide (BiO x ), and Te. Following deposition, the film may be prepared using a method similar to that described elsewhere herein. a R b L c The surface may be capped with an alkyl-substituted precursor in the form of SnO. A counter reactant may be used to further remove the ligand, and multiple cycles may be repeated to fully saturate the substrate surface. The surface is then ready for deposition of an EUV-sensitive film. One possible method is to deposit SnO. x The goal is to produce a thin film of SnO2. Possible chemistries include growing SnO2 by cycling tetrakis(dimethylamino)tin with a counter reactant such as water or O2 plasma. After growth, a capping agent may be used; for example, isopropyltris(dimethylamino)tin vapor may be flowed over the surface.

[0095] The deposition process can be employed on any useful surface. As used herein, a "surface" refers to a surface on which the film of the present technology is deposited or a surface that is exposed to EUV during processing. Such a surface can be on a substrate (e.g., on which a film is deposited) or on a film (e.g., on which a capping layer can be deposited).

[0096] Such underlying localized features may include areas where material has been removed (e.g., by etching) or where material has been added (e.g., by deposition) during processing prior to performing the methods of the present technology. Such pre-processing may include methods of the present technology or other processing methods in an iterative process in which two or more layers of features are formed on a substrate. Without limiting the mechanism, function, or utility of the present disclosure, in some embodiments, it is believed that the methods of the present disclosure provide advantages such as conforming of the disclosed films to underlying features without "burying" or otherwise planarizing such features, and the ability to deposit films on a wide variety of material surfaces.

[0097] Exposure of metal-containing resist materials The photoresist film can be exposed to radiation according to a desired pattern to form exposed and unexposed regions of the photoresist film. The exposure changes the chemical composition and crosslinking of the photoresist film, creating a contrast in etch selectivity that can be utilized for subsequent development.

[0098] EUV exposure of the membrane provides EUV-exposed regions with activated reactive centers containing metal atoms (M) generated by EUV-mediated cleavage events, which may include dangling metal bonds, M-H groups, cleaved M-ligand groups, dimerized M-M bonds, or M-O-M bridges.

[0099] The EUV exposure can have a wavelength in the range of about 10 nm to about 20 nm, such as a wavelength of 10 nm to 15 nm, e.g., 13.5 nm, in a vacuum atmosphere. In particular, patterning can provide EUV-exposed and non-EUV-exposed regions to form a pattern. In some embodiments, such patterning can have a wavelength of about 1 to 50 mJ / cm. 2 , 1 to 40 mJ / cm 2 , 1-30mJ / cm 2 , 1-20mJ / cm 2 , or 1 to 10 mJ / cm 2 Includes radiation exposure.

[0100] The present disclosure can include patterning using EUV and DUV or e-beam. In such patterning, radiation is focused on one or more regions of the imaging layer. Exposure can be performed such that the imaging layer film includes one or more regions that are not exposed to radiation. The resulting imaging layer can include multiple exposed and unexposed regions, creating a pattern consistent with the creation of transistors or other features of a semiconductor device formed by adding or removing material from the substrate during subsequent substrate processing. EUV, DUV, and e-beam radiation methods and apparatus useful herein include methods and apparatus known in the art.

[0101] In some EUV lithography techniques, an organic hard mask (e.g., a PECVD amorphous hydrogenated carbon ashable hard mask) is patterned using a photoresist process. During photoresist exposure, EUV radiation is absorbed by the resist and the underlying substrate, generating high-energy photoelectrons (e.g., approximately 100 eV) and a cascade of lower-energy secondary electrons (e.g., approximately 10 eV) that diffuse laterally for several nanometers. These electrons increase the extent of chemical reactions in the resist, thereby enhancing its EUV dose sensitivity. However, a random secondary electron pattern is superimposed on the optical image. This unwanted secondary electron exposure causes reduced resolution of the patterned resist, observable line edge roughness (LER), and linewidth variations. These defects are then reproduced in the patterned material during subsequent pattern-transfer etching.

[0102] In various embodiments described herein, a deposition (e.g., condensation) process (e.g., ALD or MOCVD performed in a PECVD tool) can be used to form a thin film of a metal-containing film, such as a photosensitive metal salt or metal-containing organic compound (organometallic compound), that has strong absorption at EUV (e.g., wavelengths on the order of 10 nm to 20 nm), e.g., the wavelength of an EUVL light source (e.g., 13.5 nm = 91.8 eV). The film photolyzes upon EUV exposure to form a metal mask that becomes a pattern transfer layer during subsequent etching (e.g., in a conductor etching tool).

[0103] After deposition, the EUV-patternable thin film is patterned by exposure to a beam of EUV light, possibly under a relatively high vacuum. For EUV exposure, the metal-containing film can then be deposited in a chamber integrated with the lithography platform (e.g., a wafer stepper) and transferred under vacuum to prevent reaction prior to exposure. Integration with lithography tools is facilitated by the fact that EUVL also requires significantly reduced pressure given the strong optical absorption of incident photons by ambient gases such as HO, O, etc. In other embodiments, deposition of the photosensitive metal film and EUV exposure may occur in the same chamber.

[0104] Photolithography processes can include one or more bake steps to promote the chemical reactions necessary to create a chemical contrast between exposed and unexposed areas of the photoresist. For high volume manufacturing (HVM), these bake steps can be performed on a track where wafers are baked on a hotplate at a preset temperature under ambient air or, in some cases, under N2 flow. During these bake steps, more careful control of the bake environment and the introduction of additional reactive gas components into the environment can help further reduce dose requirements and / or improve pattern fidelity.

[0105] According to various aspects of the present disclosure, one or more post-treatments of metal and / or metal oxide-based photoresists after deposition (e.g., post-apply bake (PAB) or another post-apply treatment), exposure (e.g., optional post-exposure bake (PEB) or another post-exposure treatment), and / or development (e.g., post-develop bake (PDB) or another post-development treatment) can increase the difference in material properties between exposed and unexposed photoresists, thereby reducing dose-to-size (DtS), improving PR profile, and enhancing line edge roughness and line width roughness (LER / LWR) after subsequent dry development. Such treatments can include thermal treatments involving temperature, gas atmosphere, and moisture control, resulting in improved dry development performance in subsequent processing. In some cases, remote plasma may be used. However, in some cases, PAB and / or PEB and / or PDB are not performed.

[0106] For post-application treatments (e.g., PAB), thermal processes involving control of temperature (e.g., heating or cooling), gas atmosphere (e.g., air, HO, CO, CO, O, O, CH, CHOH, N, H, NH, NO, NO, Ar, He, or mixtures thereof) or vacuum, and moisture can be used to alter the composition of unexposed metal and / or metal oxide photoresists after deposition and before exposure. This alteration can increase the EUV sensitivity of the material, thereby reducing dose-to-size and edge roughness after exposure and dry development.

[0107] For post-exposure treatment (e.g., PEB), a thermal process involving control of temperature, gas atmosphere (e.g., air, HO, CO, CO, O, O, CH, CHOH, N, H, NH, NO, NO, Ar, He, or mixtures thereof) or vacuum, and moisture can be used to change the composition of both the unexposed and exposed photoresist. This change can increase the difference in composition / material properties between the unexposed and exposed photoresist and the difference in the etch rate of the dry development etch gas between the unexposed and exposed photoresist. This can achieve higher etch selectivity. Increased selectivity can result in improved surface roughness and / or less photoresist residue / scum, resulting in a more perpendicular PR profile. In certain embodiments, PEB can be performed in air and, optionally, in the presence of moisture and CO. In other embodiments, PEB can be omitted.

[0108] For post-development treatments (e.g., post-develop bake or PDB), thermal processes involving control of temperature, gas atmosphere (e.g., air, H2, CO2, CO, O2, O3, CH4, CH3OH, N2, H2, NH3, NO, NO, Ar, He, or mixtures thereof) or under vacuum (e.g., with UV), and moisture can be used to alter the composition of the unexposed photoresist. In certain embodiments, conditions also include the use of plasma (e.g., with O2, O3, Ar, He, or mixtures thereof). This alteration can increase the hardness of the material, which can be beneficial when using the film as a resist mask for etching an underlying substrate.

[0109] In such cases, in another embodiment, the thermal process can be replaced with a remote plasma process to increase the reactive species, lower the energy barrier for the reaction, and increase productivity. Remote plasma can generate more reactive radicals, which reduces the reaction temperature / time of the process, leading to increased productivity.

[0110] Therefore, the photoresist itself may be modified using one or more processes to enhance the selectivity of wet or dry development. This thermal or radical modification can increase the contrast between the unexposed and exposed materials, thus enhancing the selectivity of the subsequent development step. The resulting difference in material properties between the unexposed and exposed materials can be adjusted by adjusting process conditions, including temperature, gas flow, moisture, pressure, and / or RF power.

[0111] For wet-developed or dry-developed resist films, the treatment temperature in PAB or PEB can be changed to adjust and optimize the treatment process, for example, about 90°C to 250°C for PAB and about 170°C to 250°C or higher for PEB.

[0112] In certain embodiments, the PAB and / or PEB processes can be performed at ambient gas flow rates ranging from 100 sccm to 10,000 sccm, with moisture contents ranging from a few percent to 100% (e.g., 20% to 50%), at pressures between atmospheric and vacuum, and for durations ranging from about 30 seconds to 15 minutes, e.g., about 1 to 2 minutes. In certain embodiments, the PEB is omitted.

[0113] Depending on the selectivity requirements / constraints of the semiconductor processing operation, thermal treatments such as those described herein can be used to lower the required EUV dose, or, if higher selectivity is required and a higher dose can be tolerated, much higher selectivity can be achieved, up to 100 times higher exposed over unexposed.

[0114] Still other processes can include in-situ metrology that can evaluate physical and structural properties (e.g., critical dimensions, film thickness, etc.) during the photolithography process. Modules that implement in-situ metrology include, for example, scatterometry, ellipsometry, downstream mass spectrometry, and / or downstream plasma-enhanced optical emission spectroscopy modules.

[0115] A substrate may be provided in the process chamber, where the substrate is a semiconductor substrate including a substrate layer and a developed photoresist mask on the substrate layer. The substrate layer may be an underlying layer of the developed photoresist mask and may include any suitable material to facilitate the patterning process. The substrate layer may be etched with high selectivity to the developed photoresist mask. In some embodiments, the substrate layer may include a material such as spin-on carbon (SoC), spin-on glass (SOG), amorphous carbon (aC), tin oxide (e.g., SnO x ), silicon (e.g., a-Si), silicon oxide (e.g., SiO x ), silicon oxynitride (e.g., SiO x N y ), silicon oxycarbide (e.g., SiO x C y ), silicon nitride (Si3N4), silicon carbide (SiC x ), titanium oxide (e.g., TiO2), titanium nitride (e.g., TiN), tungsten (e.g., W), doped carbon (e.g., W-doped C), tungsten oxide (e.g., WO x ), hafnium oxide (HfO2), zirconium oxide (e.g., ZrO2), or aluminum oxide (Al2O3).

[0116] The metal-containing photoresist can be dry- or wet-deposited on the substrate layer. The metal-containing photoresist can be provided as a positive- or negative-tone resist having EUV-exposed and non-EUV-exposed regions after EUV exposure. After deposition, the metal-containing photoresist can be photopatterned in an EUV lithography chamber (scanner). After exposure and optional PEB treatment, the metal-containing photoresist can be developed to selectively remove portions of the metal-containing photoresist (e.g., non-EUV-exposed portions) to form a patterned photoresist mask on the substrate layer. In some embodiments, the metal-containing photoresist is a metal-containing EUV photoresist, and the metal-containing EUV photoresist is an organometallic oxide or organometallic film. For example, the metal-containing EUV photoresist can include Sn, O, and C atoms.

[0117] The process chamber may provide an enclosed space for processing the substrate after development. The chamber walls within the process chamber may be fabricated from stainless steel, aluminum, plastic, or other suitable materials. In some embodiments, the chamber walls are coated with a corrosion-resistant film, such as a polymer or inorganic coating. The process chamber may include a substrate support (e.g., a pedestal or electrostatic chuck) on which the substrate is supported. In some embodiments, the process chamber for post-development processing may be a deposition chamber, a bevel edge and / or backside cleaning chamber, a PAB processing chamber, a PEB processing chamber, a development chamber, or an etch chamber. In this way, the process chamber for post-development processing may be the same chamber used in a previous operation of photoresist processing or the same chamber used in a subsequent operation of photoresist processing, thereby minimizing substrate transfer and reducing exposure to air gaps between operations. The process chamber may include one or more heating elements for exposing the substrate to high temperatures. In some embodiments, the one or more heating elements may include one or more infrared (IR) lamps or one or more light-emitting diodes (LEDs) disposed within the substrate support to control the temperature of the substrate. The process chamber may include one or more gas lines for delivering gases into the process chamber. For example, the one or more gas lines may include a showerhead for delivering reactive gases toward the substrate in the process chamber. In some embodiments, the process chamber may be a plasma generation chamber or may be coupled to a plasma generation chamber separate from the process chamber. The plasma generation chamber may be an inductively coupled plasma (ICP) reactor, a transformer coupled plasma (TCP) reactor, or a capacitively coupled plasma (CCP) reactor. In some cases, the process chamber further includes one or more gas outlets for exhausting gases, which may or may not be connected to a vacuum pump for maintaining a desired pressure in the process chamber.

[0118] The developed metal-containing photoresist mask is treated using one or more of the following operations: (i) thermally annealing the developed metal-containing photoresist mask, (ii) exposing the developed metal-containing photoresist mask to a plasma, (iii) exposing the developed metal-containing photoresist mask to one or more reactive gases, and (iv) selectively depositing a protective layer on the developed metal-containing photoresist mask. The post-development treatment of the substrate may utilize one of the aforementioned thermal annealing, plasma, chemical, or selective deposition treatment operations, or a combination of the aforementioned treatments. The post-development treatment improves the performance of the metal-containing photoresist mask during pattern transfer etching. The aforementioned thermal annealing, plasma, chemical, and selective deposition treatment techniques are described in detail below.

[0119] The developed metal-containing photoresist mask is used to etch the substrate layer to form recessed features. This process may be referred to as pattern transfer or pattern transfer etching. This etching allows for selective removal of portions of the substrate layer without removing the developed metal-containing photoresist mask. Wet or dry etchants may be used to etch portions of the substrate layer exposed by the developed metal-containing photoresist mask. The metal-containing photoresist mask may define a pattern in which the features will be etched. The features are etched through the substrate layer according to the pattern defined by the metal-containing photoresist mask. After post-development processing, the metal-containing photoresist mask may have increased line CD and / or improved etch resistance during pattern transfer etching. The etched features may maintain or substantially maintain the line CD provided by the metal-containing photoresist mask. In some cases, the metal-containing photoresist mask may have reduced defects and / or reduced roughness. As a result, defects and roughness are not transferred to the features formed after pattern transfer etching.

[0120] Heat Treatment In some embodiments, the substrate can be heat-treated by heating the substrate to an elevated temperature. Heat-treating the substrate can serve to reduce defects and roughness from the metal-containing photoresist mask prior to pattern transfer etching. In particular, heat-treating the substrate can improve the chemical contrast of the metal-containing photoresist mask by removing scum.

[0121] After wet or dry development, residue or scum can remain on the substrate. Residue or scum can remain in areas of the photoresist mask that have been removed by development. Residue or scum can include residual etch by-products that adsorb to the surface of the substrate. For example, halogen vapors used in certain development chemistries can react with moisture or oxygen to form residual etch by-products that are difficult to remove. Wet processing techniques often employ moisture and / or oxygen, which can contribute to the formation of scum and residue. In some cases, the residue can contain high concentrations of metals or metal oxides (e.g., SnO x ) particles or clusters, which can lead to a loss of chemical contrast during pattern transfer and contribute to contamination of downstream processing tools.

[0122] After wet or dry development, roughness can form on the sidewalls of etched features in the developed pattern of the photoresist mask. Some of this can be due to stochastic or non-optimal Gaussian light distribution, resulting in partially or fully exposed material in areas where the photoresist should remain unexposed, or vice versa. Additionally, the occurrence of scum on the sidewalls of the etched features of the photoresist mask can exacerbate the roughness.

[0123] During the thermal treatment, the substrate may be heated to an elevated temperature of about 50°C to about 500°C, about 100°C to about 400°C, about 100°C to about 300°C, or about 100°C to about 250°C. The substrate may be heated to the elevated temperature using one or more temperature-controllable elements within the process chamber. The pressure may be maintained at about 0.1 Torr to about 760 Torr, for example, in some cases about 0.1 Torr to about 1 Torr. The substrate may be exposed to the elevated temperature for a duration of about 1 minute to about 10 minutes, for example, in some cases about 2 minutes to about 5 minutes. In some embodiments, the thermal treatment is performed using one or more inert gases. For example, the thermal treatment may be performed using a flow of nitrogen (N), helium (He), neon (Ne), argon (Ar), or xenon (Xe). In some embodiments, the thermal treatment is performed in air.

[0124] Increasing the temperature of the post-development thermal treatment can lead to increased scum removal, reduced defectivity, and reduced roughness. However, higher temperatures can also result in a decrease in line CD. Higher temperatures during thermal annealing have been shown to cause lateral photoresist shrinkage and vertical photoresist shrinkage. The decrease in line CD increases dose-to-size. Post-development thermal treatments can result in a trade-off between reduced defects and roughness and increased dose-to-size. Therefore, limiting the thermal treatment to a desired temperature range and desired treatment time optimizes the benefit of reduced defects and roughness while minimizing the increase in dose-to-size.

[0125] Plasma treatment In some embodiments, the substrate can be exposed to plasma for post-development treatment. Plasma treatment can serve to densify and reduce roughness of the metal-containing photoresist mask prior to pattern transfer etching. In some cases, plasma treatment can further improve the chemical contrast of the metal-containing photoresist mask by removing scum. The plasma treatment can employ a plasma of an inert gas species or a plasma of a reactive gas species. The reactive gas species can chemically react with the metal-containing photoresist mask or selectively deposit a protective film on the metal-containing photoresist mask.

[0126] The plasma exposure can be facilitated by generating the plasma in a remote plasma generator or in the process chamber where the substrate is being processed. One or more gases are flowed into a plasma generation region, which can be a remote plasma generator or a process chamber, and a plasma is ignited. The plasma generation chamber can be an inductively coupled plasma (ICP), transformer coupled plasma (TCP), or capacitively coupled plasma (CCP) reactor. Plasma energy is provided to activate the one or more gases into ions, radicals, neutral species, and other plasma-activated species. The ions, radicals, neutral species, and other plasma-activated species can interact with the metal-containing photoresist mask to improve its performance during pattern transfer etching.

[0127] The one or more gases may include oxygen-containing species such as oxygen (O), carbon dioxide (CO), and carbon monoxide (CO). Additionally or alternatively, the one or more gases may include halogen-containing species such as boron trichloride (BCl), silicon tetrachloride (SiCl), tin tetrachloride (SnCl), tungsten hexafluoride (WF), and difluoromethane (CHF). Additionally or alternatively, the one or more gases may include inert gas species such as nitrogen (N), helium (He), neon (Ne), argon (Ar), and xenon (Xe). Other gases may include hydrogen (H), ammonia (NH), hydrogen halides (HCl, HBr, HF, HI), and various hydrocarbons (C), such as methane (CH). x H y ) may be included. In some cases, the plasma may be an oxygen-based plasma, a nitrogen-based plasma, an inert gas plasma, and / or a carbon-based plasma. In some embodiments, the plasma is a remote plasma. In some other embodiments, the plasma is an in-situ plasma.

[0128] The process conditions of the plasma treatment can be adjusted to achieve the desired results. Such process conditions include, but are not limited to, plasma power, plasma frequency, plasma exposure time, bias voltage, duty cycle, temperature (e.g., pedestal temperature), pressure (e.g., chamber pressure), and flow rate of one or more gases. In operation, the plasma can be generated at a plasma power of less than about 6 kW, such as from about 50 W to about 4000 W, from about 50 W to about 1000 W, or from about 100 W to about 500 W. In some cases, the plasma can be provided at a low plasma power and high ion energy. The directionality of the plasma can be controlled by the bias voltage. In some embodiments, the bias voltage can be applied at about 1 V to about 500 V, from about 10 V to about 400 V, or from about 30 V to about 300 V. The plasma treatment can be applied for a duration of about 0.5 seconds to about 120 seconds, from about 1 second to about 60 seconds, or from about 2 seconds to about 40 seconds. The plasma process can modulate the duty cycle of the plasma during operation to achieve a desired result, and the RF power source can provide the plasma at any suitable duty cycle, such as from about 1% to about 99%, or from about 10% to about 90%. In some embodiments, the chamber pressure can be from about 0.1 Torr to about 760 Torr, or in some cases from about 0.1 Torr to about 1 Torr. In some embodiments, the substrate temperature can be from about 0°C to about 400°C, from about 50°C to about 300°C, or from about 100°C to about 250°C.

[0129] As described below, the plasma treatment may involve reactive gas species. The plasma of the reactive gas species may induce chemical reactions in the metal-containing photoresist mask to improve mask properties such as etch resistance. The plasma of the reactive gas species may selectively deposit a protective film on the metal-containing photoresist mask to increase line CD and reduce dose-to-size.

[0130] Chemical treatment In some embodiments, the metal-containing photoresist mask can be exposed to one or more reactive gas species. The reactive gas species can chemically react with the metal-containing photoresist mask. Indeed, certain reactive gas species can react with the metal-containing photoresist mask but not with the substrate layer of the substrate. In some embodiments, the reactive gas species can change the entire or substantially entire metal-containing photoresist mask from a first material to a second material. The chemical change of the metal-containing photoresist mask can change one or more properties of the metal-containing photoresist mask. In some embodiments, the reactive gas species can change only the outer portion of the metal-containing photoresist mask from a first material to a second material, which can be used as a protective film, as further described below.

[0131] The reactive gas species may react with the metal-containing photoresist mask to increase the line CD and reduce the dose-to-size. The reactive gas species may react with the metal-containing photoresist mask to reduce roughness (e.g., LWR / LER) or at least maintain the same roughness. The reactive gas species may densify the metal-containing photoresist mask. In some cases, the reactive gas species may react with the metal-containing photoresist mask to reduce defects (e.g., scum formation). Furthermore, the reactive gas species may reduce outgassing, such as tin outgassing, from the metal-containing photoresist mask. In some cases, the reactive gas species may react with the metal-containing photoresist mask to increase the etch resistance of the photoresist mask during a subsequent etching operation. As an example, the reactive gas species may increase the line CD and at least substantially maintain the increased line CD of the photoresist mask after the pattern transfer etch.

[0132] The reactive gas species may be more reactive with the metal-containing photoresist compared to the underlying substrate layer(s). In certain embodiments, the chemical treatment using the reactive gas species takes advantage of the chemistry of the EUV photoresist mask. The EUV photoresist mask may be comprised of an organometallic oxide film, such as an organotin oxide film, having Sn, O, and C atoms. The organotin oxide film may be comprised of a network of Sn-Sn bonds, Sn-H bonds, Sn-C bonds, Sn-OH bonds, Sn-O bonds, Sn-O-Sn bonds, and Sn-O-C bonds. The reactive gas species may react with one or more components of the organotin oxide film by oxidation, reduction, insertion, extraction, or other chemical reaction mechanisms to induce a chemical change in the EUV photoresist mask. In some cases, the reactive gas species may include carbon monoxide (CO), where tin species may undergo a catalytic reaction with carbon monoxide. Without being limited to any theory, SnOC x The compound reacts with CO to form SnOC x (CO) y This chemical reaction induces a change in the EUV photoresist mask, widening the line CD. In some embodiments, the new compound in the EUV photoresist mask improves the etch resistance.

[0133] Reactive gas species other than CO may be used to induce chemical reactions within the EUV photoresist mask. Examples of useful reactive gas species may include, but are not limited to, air, water vapor (HO), hydrogen peroxide (HO), carbon dioxide (CO), oxygen (O), ozone (O), methane (CH), methanol (CHOH), ethanol (CHCHOH), nitrogen (N), hydrogen (H), ammonia (NH), nitrous oxide (NO), nitric oxide (NO), nitrogen dioxide (NO), acetylacetone (CHO), formic acid (CHO), acetic acid (CHCOOH), hydrogen cyanide (HCN), boron trichloride (BC1), silicon tetrachloride (SiCl), chlorine (Cl), bromine (Br), hydrogen chloride (HCl), hydrogen bromide (HBr), hydrogen iodide (HI), hydrogen fluoride (HF), fluoromethane (CHF), difluoromethane (CHF), and combinations thereof. In some cases, the reactive gas species may include an oxygen-containing gas, a carbon-containing gas, a hydrogen-containing gas, a nitrogen-containing gas, a halogen-containing gas, or a combination thereof. Other reactive gas species may include metal precursors such as tungsten hexafluoride (WF), tin tetrachloride (SnCl), molybdenum hexafluoride (MoF), molybdenum dioxide dichloride (MoOCl), and molybdenum chloride (MoCl). Other reactive gas species include tin tetrakis(dimethylamido) (Sn(N(CH))), hafnium tetrakis(dimethylamido) (Hf(N(CH)), dimethylaluminum ((CH)Al), trimethylaluminum ((CH)Al), titanium isopropoxide (Ti(OCH(CH)), tungsten carbonyl (W(CO)). x )), molybdenum carbonyl (Mo(CO) x ), ruthenium carbonyl (Ru(CO) x ), iron carbonyl (Fe(CO) x), and combinations thereof. Thus, in some cases, the reactive gas species may include metal halide or organometallic precursors, such as metal carbonyl precursors. While conventional polymer-based photoresist materials may not react with metal halides or certain organometallic precursors, the metal-containing or metal oxide-containing photoresist materials of the present disclosure may be susceptible to reaction with metal halides and organometallic precursors. Without being limited to any theory, when there is an M-OH bond in an organometallic photoresist, an MO-M' bridge may form, where M' is derived from the metal precursor (e.g., the metal halide or organometallic precursor).

[0134] Reactive gas species may be flowed with other gases. In some embodiments, reactive gas species may be flowed with inert gas species such as helium, neon, argon, and xenon. In some embodiments, combinations of reactive gas species may be flowed with each other. As an example, a halogen-containing gas such as boron trichloride may be flowed with a carbon-containing gas such as methane. In another example, a metal precursor such as tungsten hexafluoride may be flowed with a carbon-containing gas such as difluoromethane. Reactive gas species, alone or in combination with other reactive gas species, may convert a photoresist mask to another material or selectively deposit a protective film on a photoresist mask.

[0135] In some embodiments, reactive gas species may be supplied to the process chamber from a gas source fluidly coupled to the process chamber. The gas source, such as a gas storage tank, may be fluidly coupled to the process chamber via a gas supply line. The gas reactants may be premixed before entering the process chamber or mixed upon entering the process chamber. In some embodiments, the reactive gas species may be generated in situ within the process chamber. The gas reactants may react with each other to form reaction products that react with a metal-containing photoresist mask to induce a chemical change. Alternatively, the gas reactants may react with one or more chamber components (e.g., metal-based chamber lines) to form reaction products that react with a metal-containing photoresist mask to induce a chemical change. The gas reactant may be a carbon-containing precursor that reacts with a metal chamber component to form an organometallic precursor. This reaction may be thermally accelerated to produce an organometallic precursor. For example, carbon monoxide supplied into the process chamber may react with iron-containing chamber lines to form iron carbonyl (Fe(CO)), which readily reacts with an EUV photoresist mask. x ), which increases the line CD of the EUV photoresist mask. Without being limited to any theory, iron carbonyl causes the deposition of iron oxide on the EUV photoresist mask. In another example, carbon monoxide or carbon dioxide supplied into the process chamber reacts with tungsten-containing chamber lines (e.g., hot wires) to form tungsten carbonyl (W(CO)), which readily reacts with the EUV photoresist mask. x ) may be formed.

[0136] Chemical treatment of a metal-containing photoresist mask containing one or more reactive gas species may be combined with one or both of a thermal treatment and a plasma treatment. While thermal or plasma treatment alone may result in tradeoffs, applying a chemical treatment to the metal-containing photoresist mask may offset these tradeoffs. Specifically, a chemical treatment may be combined with a thermal treatment to flow one or more reactive gas species through the metal-containing photoresist mask at an elevated temperature. While the elevated temperature may decrease the line CD, the one or more reactive gas species may increase the line CD of the metal-containing photoresist mask. In fact, the increase in line CD due to the one or more reactive gas species may exceed the decrease in line CD due to the elevated temperature. This reduces the dose-to-size ratio while reducing defects and roughness in the metal-containing photoresist mask. In some embodiments, a chemical treatment may be combined with a plasma treatment to flow radicals and / or ions of reactive gas species through the metal-containing photoresist mask. The radicals and / or ions may increase the reactivity of the reactive gas species with the metal-containing photoresist mask. The metal-containing photoresist mask may be exposed to one or more reactive gas species in a plasma, which can alter the chemical composition of the metal-containing photoresist mask and increase line CD and density. This can be done without necessarily damaging the defects or roughness of the metal-containing photoresist mask. The plasma may be applied at a power that avoids damage to the substrate.

[0137] Inducing a surface or bulk reaction in a metal-containing photoresist mask can occur by adding energy to the reaction. Some energy, such as from thermal and / or plasma exposure, can be sufficient to induce a surface or bulk reaction. Therefore, process conditions, such as temperature and plasma power, can be adjusted to achieve the desired results. In some embodiments, the substrate temperature can be from about 0°C to about 400°C, from about 50°C to about 300°C, or from about 100°C to about 250°C during chemical treatment with one or more reactive gas species. In some embodiments, the plasma power can be less than about 6 kW, from about 50 W to about 4000 W, from about 50 W to about 1000 W, or from about 100 W to about 500 W during chemical treatment with one or more reactive gas species.

[0138] Other process conditions, such as plasma frequency, exposure time, bias voltage, pressure, and flow rate, can be adjusted to facilitate chemical processing using one or more reactive gas species. In some embodiments, the bias voltage can be applied at less than about 800 V, between about 0 V and about 500 V, between about 10 V and about 400 V, or between about 30 V and about 300 V. In some embodiments, exposure to one or more reactive gas species can be applied for a duration of between about 1 second and about 10 minutes, between about 5 seconds and about 8 minutes, or between about 30 seconds and about 4 minutes. In some embodiments, the chamber pressure can be between about 0.1 Torr and about 760 Torr, or in some cases between about 1 mTorr and about 100 mTorr. The first reactive gas species can be flowed into the process chamber at a flow rate of between about 1 sccm and about 1000 sccm, between about 2 sccm and about 500 sccm, or between about 5 sccm and about 300 sccm. An optional second reactive gas species may be co-flowed into the process chamber at a flow rate of about 5 sccm to about 1000 sccm, about 10 sccm to about 500 sccm, or about 20 sccm to about 300 sccm. An optional inert gas species may be co-flowed into the process chamber at a flow rate of about 20 sccm to about 2000 sccm, about 30 sccm to about 1000 sccm, or about 50 sccm to about 500 sccm. As an example, carbon monoxide may be flowed into the process chamber at a flow rate of about 500 sccm for a duration of about 20 seconds to about 5 minutes at a substrate temperature of about 240°C. The carbon monoxide may react with the EUV photoresist mask to change its chemical composition. In an alternative example, tungsten hexafluoride may be used instead of carbon monoxide to react with the EUV photoresist mask to change its chemical composition. The EUV photoresist mask may exhibit improved etch resistance during subsequent pattern transfer etching.

[0139] A specific embodiment of the disclosed method is illustrated in FIG. 3. In FIG. 3, blocks 302-310 represent the same operations as blocks 102-110 in FIG. 1. The operation in block 312 represents an integrated dry development and pattern transfer (etch) operation performed in a single process chamber. Operation 312 can be performed in place of operations 112, 114, and 116 in FIG. 1. Doing so improves productivity and provides more effective control of defects, overlay, and CD. Combining the dry development and pattern transfer steps reduces metal outgassing, such as tin outgassing, without the need for an additional post-dry development bake step performed in a separate process chamber. Combining dry development and etching in a single chamber is counterintuitive because each step requires opposite process conditions, particularly with respect to pressure. These are traditionally performed in different chambers with different process tools to effectively manage pressure requirements. Thermal processes require high pressure to achieve high etch rates. High partial pressures improve selectivity. Conversely, plasma processes require low pressure to achieve anisotropic etching. When performed in a single process chamber, pressure drops of several orders of magnitude must be achieved quickly, within about 1 to about 10 seconds. Dry development can be performed at pressures of about 400 to 500 mTorr, while etching is performed at pressures of about 20 to 50 mTorr. The use of throttle valves, dedicated pumps, multiple pumps, or control of the flow of process gases can rapidly achieve pressure drops on the order of 10 seconds or less. In some embodiments, the pressure drop is achieved in 8, 7, 6, 5, 4, 3, or 2 seconds.

[0140] When the metal-containing photoresist is a metal oxide, such as tin oxide, no dry post-development bake is required and metal outgassing, such as tin outgassing, can be controlled.

[0141] For purposes of this disclosure, "metal" as used in this context means a conductor with a maximum resistivity of 500 micro-ohm-cm and should be understood to include metals and conductive metal salts, particularly conductive metal nitrides, such as TiN.

[0142] "Tin oxide" as used herein refers to Sn, including integer and non-integer values ​​of x and y. x O y For example, "tin oxide" refers to a compound having the formula SnO n where 1≦n≦2, and n can be an integer or a non-integer value. "Tin oxide" includes compounds having the formula SnO 1.8 "Tin oxide" may include substoichiometric compounds such as tin dioxide (SnO2 or tin oxide) and tin monoxide (SnO or tin oxide). "Tin oxide" includes both natural and synthetic variations and all crystalline and molecular structures. "Tin oxide" also includes amorphous tin oxide.

[0143] Exemplary methods for performing the integrated operations of block 312 are described in more detail in Figures 4 and 5. The operations of process 300 may be performed in a different order and / or with different, fewer, or additional operations. One or more operations of process 300 may be performed using the apparatus described in any one of Figures 6-9. In some embodiments, the operations of process 300 may be performed, at least in part, in accordance with software stored on one or more non-transitory computer-readable media.

[0144] FIG. 4 illustrates a process 400 for integrated dry development and etching within a single process chamber according to certain disclosed embodiments. The operation at block 410 is thermal dry development. As described herein, a dry development process can be used to process the film. Non-limiting processes can include the use of halides, such as HCl- or HBr-based processes. While this disclosure is not limited to a particular theory or mechanism of operation, it is understood that this approach leverages the chemical reactivity of dry-deposited EUV photoresist films with clean chemicals (e.g., HCl, HBr, and BCl) to form volatile products using vapor or plasma. Such volatile products can be removed by any method (e.g., by treatment with aqueous acid, as described herein). Dry-deposited EUV photoresist films can be removed at etch rates of up to 1 nm / sec. Rapid removal of dry-deposited EUV photoresist films with these chemistries is applicable to chamber cleaning, backside cleaning, bevel cleaning, and PR development. This film can be removed using steam at various temperatures (e.g., HCl or HBr at temperatures above -10°C, or BCl3 at temperatures above 80°C), but plasma can also be used to further promote or enhance reactivity.

[0145] In a thermal development process, the substrate is exposed to a dry development chemistry (e.g., a Lewis acid) in a vacuum chamber (e.g., an oven). A suitable chamber can include a vacuum line, a dry development hydrogen halide chemical gas (e.g., HBr, HCl) line, and a heater for temperature control. In some embodiments, the interior of the chamber can be coated with a corrosion-resistant film, such as an organic polymer coating or an inorganic coating. One such coating is polytetrafluoroethylene (PTFE, e.g., Teflon). Such materials can be used in the thermal processes of the present disclosure without the risk of removal by plasma exposure.

[0146] The process conditions for dry development can be reactant flow rates of 100 sccm to 500 sccm (e.g., 500 sccm HBr or HCl), temperatures of -10°C to 120°C (e.g., -10°C), pressures of 1 mTorr to 500 mTorr (e.g., 300 mTorr) without plasma, and durations of about 10 seconds to 1 minute, depending on the photoresist film and its composition and properties. In some embodiments, the pressure is 400 to 500 mTorr, with durations of 10 to 20 seconds.

[0147] Flow path 415 between blocks 410 and 420 represents the rapid pressure change procedure that occurs within the chamber. The necessary pressure drop is achieved within the process chamber, allowing both high-pressure and low-pressure processes to occur within the same chamber. The pressure change can be managed by a throttle valve, a dedicated pump, multiple pumps, controlling the flow of process gases, or a combination of these techniques. When multiple pumps are used, one of the pumps can be a roughing pump and one of the pumps can be a turbo pump.

[0148] Following the thermal dry development, the operation at block 420 represents a plasma dry development step with an O flush treatment. The plasma process may include transformer-coupled plasma (TCP), inductively coupled plasma (ICP), or capacitively coupled plasma (CCP), using equipment and techniques known in the art. For example, the process may be performed at a pressure greater than 0.5 mTorr (e.g., 1 mTorr to 100 mTorr) and a power level less than 1000 W (e.g., less than 500 W). The temperature may be between 30°C and 300°C (e.g., 30°C to 120°C), with a flow rate of 100 to 1000 standard cubic centimeters per minute (sccm), e.g., about 500 sccm, for a duration of 1 to 3000 seconds (e.g., 10 to 600 seconds).

[0149] When the halide reactant flow is hydrogen gas and halide gas, remote plasma / UV radiation is used to generate radicals from H2 and Cl2 and / or Br2, and the hydrogen and halide radicals are flowed into the reaction chamber to contact the patterned EUV photoresist on the wafer substrate layer. Suitable plasma power can range from 100 W to 500 W without bias. These conditions are suitable for some processing reactors, but it should be understood that a wider range of process conditions can be used depending on the capabilities of the processing reactor.

[0150] The O2 flush process in block 420 involves delivering 1,000 sccm to 2,000 sccm of oxygen (O2) flush gas to the process chamber. In a specific embodiment, 100 to 3,000 watts of radio frequency power is applied at 13.56 MHz to convert the flush gas into a plasma. A pressure of 20 mTorr to 100 mTorr is applied. This backside cleaning process may be referred to as an "O2 flush" operation because the power is applied for a relatively fast time of about 0.5 seconds to about 4 seconds. The O2 flush operation induces pattern transfer.

[0151] After pattern transfer, an optional wet cleaning step 430 can be performed to remove metal oxides and other contaminants. The wet cleaning step is performed after the chamber is opened. The backside and bevel cleaning step limits the vapor and / or plasma to specific areas of the wafer to ensure removal of only the backside and bevel of the wafer without degrading any films on the front side of the wafer. The dry-deposited EUV photoresist film that is removed is typically composed of Sn, O, and C, but a similar cleaning approach can be extended to films of other metal oxide resists and materials. Additionally, this approach can be used for film stripping and photoresist reprocessing.

[0152] For wet cleaning, solutions include compounds such as tetramethylammonium hydroxide (TMAH), complexed amines such as ethylenediamine or diethylenetriamine, semi-aqueous fluoride strippers, or dilute hydrofluoric acid strippers. Metal oxides can be removed using acids such as citric acid, acetic acid, octanoic acid, or other available organic or inorganic acids. Additionally, very dilute (i.e., less than 0 / 1%) peroxide-containing acids, such as a mixture of sulfuric acid and peroxide, can also be used. Combinations of any of the above wet cleaning agents can also be used.

[0153] 5 illustrates an alternative process 500 for integrated dry development and etching in a single process chamber, according to certain disclosed embodiments. The operation at block 510 represents thermal dry development as described above in block 410 of FIG.

[0154] Flow path 515 between blocks 510 and 520 represents the rapid pressure change procedure that occurs within the chamber. As described above for flow path 415, the necessary pressure drop is achieved within the process chamber, allowing both high-pressure and low-pressure processes to occur within the same chamber. The pressure change can be managed by a throttle valve, a dedicated pump, multiple pumps, controlling the flow of process gases, or a combination of these techniques. When multiple pumps are used, one of the pumps can be a roughing pump and one of the pumps can be a turbo pump.

[0155] Following thermal dry development, the operation at block 520 represents a plasma descum step and pattern transfer. Scum refers to unwanted carbon-based material, such as footing, stringers, or other forms of unwanted substrate surface roughness, that remains on the substrate after lithography. Scum can be removed by a plasma or thermal atomic layer etching process.

[0156] Operation 530 is the selective deposition of a metal. Selective deposition can be used for photoresist repair, such as selective metal oxide deposition on photoresist for photoresist hardening, or to add selectivity to photoresist during pattern transfer. Metal oxides for selective deposition include SnO x Includes:

[0157] After selective deposition 530, an optional wet cleaning step 540 may be performed, similar to the operations described in block 430 of FIG. 4 above.

[0158] The above description is merely exemplary in nature and is not intended to limit the disclosure, its application, or its uses. The broad teachings of the present disclosure can be embodied in a variety of forms. Accordingly, while the present disclosure includes specific examples, other variations will become apparent upon review of the drawings, this specification, and the following claims, and the true scope of the present disclosure should not be so limited. It should be understood that one or more steps of a method may be performed in a different order (or simultaneously) without altering the principles of the present disclosure. Furthermore, although each of the embodiments is described above as having particular features, any one or more of those features described with respect to any embodiment of the present disclosure can be implemented with and / or combined with any feature of any other embodiment, even if that combination is not explicitly described. In other words, the described embodiments are not mutually exclusive, and substituting one or more embodiments for one another remains within the scope of the present disclosure.

[0159] Device The apparatus of the present disclosure is configured for post-development processing of patterned metal-containing photoresist masks. The apparatus may be configured for other processing operations such as deposition, bevel and backside cleaning, post-apply bake, EUV scan, post-exposure bake, development, etching, and other operations. In some embodiments, the apparatus is configured to perform multiple dry operations. In some embodiments, the apparatus is configured to perform a combination of wet and dry operations. The apparatus may include a single wafer chamber or multiple stations within the same process chamber. When there are multiple stations within the same process chamber, various processing operations as described in this disclosure may occur in different stations within the same process chamber. In some embodiments, the process chamber for post-development processing of the present disclosure may occur in the same chamber as development, in the same chamber as pattern transfer etch, or in the same chamber as both development and pattern transfer etch.

[0160] An apparatus configured to perform post-development treatment includes a process chamber with a substrate support. The apparatus may include at least one reactive gas source in fluid communication with the process chamber. The apparatus may include one or more gas lines for delivering one or more reactive gas species. In some embodiments, the one or more reactive gas species may include an organic gas species, an organometallic gas species, a metal-containing gas species, or a combination thereof. In some embodiments, the one or more reactive gas species may include an oxygen-containing gas, a carbon-containing gas, a hydrogen-containing gas, a nitrogen-containing gas, a halogen-containing gas, or a combination thereof. The one or more reactive gas species may be delivered to the process chamber via one or more gas lines to treat the developed metal-containing photoresist mask. The apparatus may include one or more heating elements for temperature control. Such heating elements may be provided within the process chamber and / or the substrate support. Alternatively, such heating elements may be provided external to the process chamber. In some embodiments, the apparatus may include a plasma source for generating a plasma during treatment of the developed metal-containing photoresist mask. In some embodiments, the one or more reactive species may selectively deposit a protective film on the metal-containing photoresist mask after development. The apparatus may further include one or more sensors for sensing particle counting, wafer counting, thickness counting, or other parameters for triggering an endpoint of the post-development process.

[0161] 6 illustrates a schematic diagram of an exemplary process station for maintaining an environment suitable for performing photoresist development, photoresist processing, and / or combined etching operations, according to some embodiments. For simplicity, the process station 600 is illustrated as a stand-alone process station having a process chamber body 602 for maintaining a low-pressure environment. However, it will be understood that multiple process stations 600 may be included in a common process tool environment. Furthermore, it will be understood that in some embodiments, one or more hardware parameters of the process station 600, including those described in detail below, may be programmably adjusted by one or more computer controllers.

[0162] Multiple process stations 600 may be included within a common low-pressure process tool environment. For example, Figure 7 illustrates an embodiment of a multi-station processing tool 700. In some embodiments, one or more hardware parameters of the process tool 700, including those described in detail below, may be programmatically adjusted by one or more computer controllers 750.

[0163] The process stations may be configured as modules within a cluster tool. Figure 9 illustrates a semiconductor process cluster tool architecture with vacuum-integrated deposition and patterning modules suitable for practicing the embodiments described herein. Such a cluster process tool architecture may include resist deposition, resist exposure (EUV scanner), resist development, resist rework, and etch modules, as described above and further below with reference to Figures 6 and 7.

[0164] 6 , the process station 600 is in fluid communication with a reactant delivery system 601 for delivering process gases to a showerhead 606. The reactant delivery system 601 optionally includes a mixing vessel 604 for mixing and / or conditioning the process gases delivered to the showerhead 606. One or more mixing vessel inlet valves 620 may control the introduction of process gases into the mixing vessel 604. If plasma exposure is used, the plasma may also be delivered to the showerhead 606 or may be generated within the process station 600. As noted above, in at least some embodiments, non-plasma thermal exposure is preferred.

[0165] 6 includes an optional vaporization point 603 for vaporizing a liquid reactant supplied to the mixing vessel 604. In some embodiments, a liquid flow controller (LFC) may be provided upstream of the vaporization point 603 to control the mass flow rate of the liquid being vaporized and delivered to the process station 600. For example, the LFC may include a thermal mass flow meter (MFM) located downstream of the LFC. A plunger valve of the LFC may then be adjusted in response to a feedback control signal provided by a proportional-integral-derivative (PID) controller in electrical communication with the MFM.

[0166] 6, the substrate 612 is located below the showerhead 606 and is shown resting on a pedestal 608. The showerhead 606 may have any suitable shape and may have any suitable number and arrangement of ports for distributing process gases to the substrate 612.

[0167] In some embodiments, the pedestal 608 can be raised or lowered to expose the substrate 612 to the volume 607 between the substrate 612 and the showerhead 606. It will be appreciated that in some embodiments, the height of the pedestal can be programmatically adjusted by a suitable computer controller. In some embodiments, the showerhead 606 can have multiple plenum volumes with multiple temperature controls.

[0168] In some embodiments, the pedestal 608 can be temperature controlled via a heater 610. In some embodiments, the pedestal 608 can be heated to a temperature of above 0° C. up to 300° C., for example, between 50° C. and 280° C., such as between about 100° C. and 240° C., during post-development processing as described in the disclosed embodiments. In some embodiments, the heater 610 of the pedestal 608 can include multiple independently controllable temperature control zones.

[0169] Additionally, in some embodiments, pressure control of the process station 600 may be provided by a butterfly valve 618. As shown in the embodiment of Figure 6, the butterfly valve 618 throttles the vacuum provided by a downstream vacuum pump (not shown). However, in some embodiments, pressure control of the process station 600 may also be adjusted by varying the flow rate of one or more gases introduced to the process station 600.

[0170] In some embodiments, the position of the showerhead 606 may be adjusted relative to the pedestal 608 to change the volume between the substrate 612 and the showerhead 606. Furthermore, it will be understood that the vertical position of the pedestal 608 and / or the showerhead 606 may be changed by any suitable mechanism within the scope of the present disclosure. In some embodiments, the pedestal 608 may include a rotation axis for rotating the orientation of the substrate 612. It will be understood that in some embodiments, one or more of these exemplary adjustments may be made programmatically by one or more suitable computer controllers.

[0171] When a plasma may be used, for example, in descumming, processing, deposition, or smoothing operations, the showerhead 606 and pedestal 608 are in electrical communication with a radio frequency (RF) power supply 614 and matching network 616 to power the plasma. In some embodiments, the plasma energy may be controlled by controlling one or more of the process station pressure, gas concentration, RF source power, RF source frequency, and plasma power pulse timing. For example, the RF power supply 614 and matching network 616 may be operated at any suitable power to form a plasma having a desired composition of radical species. An example of a suitable power is up to about 1000 W.

[0172] In some embodiments, instructions to a computer controller (not shown) may be provided via input / output control (IOC) sequence instructions. In one example, instructions for setting conditions for a process step may be included in a corresponding recipe step of a process recipe. In some cases, process recipe steps may be sequentially arranged so that all instructions for a process step are executed simultaneously with that process step. In some embodiments, instructions for setting one or more reactor parameters may be included in a recipe step. For example, a recipe step may include instructions for setting a flow rate of an etching gas, such as a hydrogen halide, and a time delay instruction for the recipe step. In some embodiments, the controller may include any of the features described below with respect to controller 750 of FIG. 7.

[0173] As noted above, one or more process stations may be included in a multi-station processing tool. FIG. 7 shows a schematic diagram of one embodiment of a multi-station processing tool 700 including an inbound load lock 702 and an outbound load lock 704, either or both of which may include a remote plasma source. A robot 706 is configured to move wafers from a cassette loaded through a pod 708 to the inbound load lock 702 through an atmospheric port 710 at atmospheric pressure. The wafer is placed by the robot 706 on a pedestal 712 in the inbound load lock 702, the atmospheric port 710 is closed, and the load lock is pumped down. If the inbound load lock 702 includes a remote plasma source, the wafer may be exposed to a remote plasma treatment to treat the substrate surface within the load lock before being introduced into the processing chamber 714. Additionally, the wafer may also be heated within the inbound load lock 702, for example, to remove moisture and adsorbed gases. The chamber transfer port 716 to the processing chamber 714 is then opened and another robot (not shown) places the wafer onto the reactor pedestal in the first station shown in the reactor for processing. While the embodiment shown in Figure 7 includes a load lock, it will be understood that in some embodiments the wafer may be placed directly into the process station.

[0174] The illustrated processing chamber 714 includes four processing stations, numbered 1 through 4 in the embodiment shown in FIG. 7 . Each station has a heated pedestal (shown at 718 for station 1) and a gas line inlet. It will be understood that in some embodiments, each processing station may have a different purpose or multiple purposes. For example, in some embodiments, a processing station may be switchable between a development process mode and an etch process mode. Additionally or alternatively, in some embodiments, the processing chamber 714 may include one or more corresponding pairs of development and etch process stations. While the illustrated processing chamber 714 includes four stations, it will be understood that a processing chamber according to the present disclosure may have any suitable number of stations. For example, in some embodiments, the processing chamber may have five or more stations, while in other embodiments, the processing chamber may have three or fewer stations.

[0175] FIG. 7 illustrates one embodiment of a wafer transport system 790 for transferring wafers within the processing chamber 714. In some embodiments, the wafer transport system 790 can transfer wafers between various process stations and / or between a process station and a load lock. It will be understood that any suitable wafer transport system may be employed. Non-limiting examples include a wafer carousel and a wafer transport robot. FIG. 7 also illustrates one embodiment of a controller 750 (e.g., a system controller) used to control the process conditions and hardware states of the process tool 700. The controller 750 may include one or more memory devices 756, one or more mass storage devices 754, and one or more processors 752. The processor 752 may include a CPU or computer, analog and / or digital input / output connections, stepper motor controller boards, etc.

[0176] In some embodiments, the controller 750 controls all of the functions of the process tool 700. The controller 750 executes system control software 758 stored on the mass storage device 754, loaded into the memory device 756, and executed by the processor 752. Alternatively, the control logic may be hard-coded into the controller 750. For these purposes, application-specific integrated circuits, programmable logic devices (e.g., field-programmable gate arrays, or FPGAs), or the like may be used. In the following description, whenever "software" or "code" is used, functionally equivalent hard-coded logic may be used instead. The system control software 758 may include instructions for controlling the timing, mixture of gases, gas flow rates, chamber and / or station pressure, chamber and / or station temperature, wafer temperature, target power levels, RF power levels, substrate pedestal, chuck and / or susceptor position, and other parameters of a particular process performed by the process tool 700. The system control software 758 may be configured in any suitable manner. For example, various process tool component subroutines or control objects may be written to control the operation of the process tool components used to perform the various process tool processes. System control software 758 may be coded in any suitable computer-readable programming language.

[0177] In some embodiments, the system control software 758 may include input / output control (IOC) sequence instructions for controlling the various parameters described above. In some embodiments, other computer software and / or programs stored on the mass storage device 754 and / or memory device 756 associated with the controller 750 may be employed. Examples of programs or sections of programs for this purpose include a substrate positioning program, a process gas control program, a pressure control program, a heater control program, and a plasma control program.

[0178] The substrate positioning program may include program code for process tool components used to load the substrate onto the pedestal 718 and control the spacing between the substrate and other parts of the process tool 700 .

[0179] The process gas control program may include code for controlling the composition and flow rate of the process gas to stabilize the pressure in the process station, and optionally code for flowing gas to one or more process stations prior to deposition. The pressure control program may include code for controlling the pressure in the process station, for example, by adjusting a throttle valve in the exhaust system of the process station, gas flow to the process station, etc.

[0180] The heater control program may include code for controlling the current to a heating unit used to heat the substrate, or the heater control program may control the delivery of a heat transfer gas (such as helium) to the substrate.

[0181] The plasma control program may include code for setting RF power levels applied to process electrodes of one or more process stations in accordance with embodiments herein.

[0182] The pressure control program may include code for maintaining pressure within the reaction chamber according to embodiments herein.

[0183] In some embodiments, there may be a user interface associated with the controller 750. The user interface may include a display screen, a graphical software display of equipment and / or process conditions, and user input devices such as a pointing device, keyboard, touch screen, microphone, etc.

[0184] In some embodiments, the parameters adjusted by the controller 750 may relate to process conditions. Non-limiting examples include process gas composition and flow rates, temperature, pressure, plasma conditions (such as RF bias power levels), etc. These parameters may be provided to a user in the form of a recipe or may be entered using a user interface.

[0185] Signals for monitoring the process may be provided by analog and / or digital input connections of the controller 750 from various process tool sensors. Signals for controlling the process can be output at analog and digital output connections of the process tool 700. Non-limiting examples of process tool sensors that may be monitored include mass flow controllers, pressure sensors (such as manometers), thermocouples, etc. Appropriately programmed feedback and control algorithms can be used with data from these sensors to maintain process conditions.

[0186] The controller 750 may provide program instructions for carrying out the deposition process. The program instructions may control various process parameters such as DC power levels, RF bias power levels, pressure, temperature, etc. The instructions may control parameters for operating development, cleaning, and / or etching processes according to various embodiments described herein.

[0187] Controller 750 typically includes one or more memory devices and one or more processors configured to execute instructions such that the apparatus performs methods according to the disclosed embodiments. A machine-readable medium containing instructions for controlling process operations according to the disclosed embodiments may be coupled to controller 750.

[0188] In some embodiments, the controller 750 is part of a system that may be part of the above examples. Such a system may include semiconductor processing equipment, including one or more processing tools, one or more chambers, one or more processing platforms, and / or specific processing components (such as a wafer pedestal, gas flow system, etc.). These systems may be integrated with electronics for controlling their operation before, during, and after processing of semiconductor wafers or substrates. This electronics, sometimes referred to as a “controller,” may control various components or subportions of one or more systems. The controller 750 may be programmed to control any of the processes disclosed herein, depending on the processing conditions and / or type of system, including process gas delivery, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, position and motion settings, wafer transfer into and out of the tool, and wafer transfer into and out of other transfer tools and / or load locks connected or interfaced with the particular system.

[0189] Broadly, controller 750 may be defined as electronic equipment having various integrated circuits, logic, memory, and / or software that receive instructions, issue instructions, control operations, enable cleaning operations, enable endpoint measurements, etc. Integrated circuits may include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as application-specific integrated circuits (ASICs), and / or one or more microprocessors or microcontrollers that execute program instructions (e.g., software). Program instructions may be instructions communicated to controller 750 in the form of various personalizations (or program files) that define operational parameters for performing a particular process on or for a semiconductor wafer or for a system. In some embodiments, the operational parameters may be part of a recipe defined by a process engineer to accomplish one or more processing steps during the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or dies of a wafer.

[0190] In some embodiments, the controller 750 may be part of, coupled to, or a combination of a computer integrated with or otherwise networked to the system. For example, the controller 750 may be in the “cloud” or may be all or part of a fab host computer system, thereby enabling remote access to wafer processing. The computer may enable remote access to the system to monitor the current progress of a fabrication operation, analyze the history of past fabrication operations, and analyze trends or performance metrics from multiple fabrication operations to modify parameters of a current process, set up processing steps following a current process, or initiate a new process. In some examples, a remote computer (e.g., a server) may provide process recipes to the system over a network, which may include a local network or the Internet. The remote computer may include a user interface that allows entry or programming of parameters and / or settings, which are then communicated to the system from the remote computer. In some examples, the controller 750 receives instructions in the form of data specifying parameters for each of the processing steps to be performed during one or more operations. It should be understood that the parameters may be specific to the type of process being performed and the type of tool that controller 750 is configured to interface with or control. Thus, as noted above, controller 750 may be distributed, such as by including one or more individual controllers networked together and working toward a common purpose, such as the processes and controls described herein. An example of a distributed controller for such purposes would include one or more integrated circuits on the chamber that are in communication with one or more integrated circuits located remotely (e.g., at the platform level or as part of a remote computer) and that are coupled to control the process on the chamber.

[0191] Without limitation, example systems may include a plasma etch chamber or module, a deposition chamber or module, a spin rinse chamber or module, a metal plating chamber or module, a cleaning chamber or module, a bevel edge etch chamber or module, a physical vapor deposition (PVD) chamber or module, a chemical vapor deposition (CVD) chamber or module, an ALD chamber or module, an atomic layer etch (ALE) chamber or module, an ion implantation chamber or module, a track chamber or module, an EUV lithography chamber (scanner) or module, a development chamber or module, and any other semiconductor processing system related to or that may be used in the fabrication and / or manufacturing of semiconductor wafers.

[0192] As noted above, depending on the process step or steps being performed by the tool, the controller 750 may communicate with one or more of other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, nearby tools, tools located throughout the factory, a main computer, another controller, or tools used in material transport to and from tool locations and / or load ports within the semiconductor fabrication factory to transport containers of wafers.

[0193] In particular embodiments, an ICP reactor that may be suitable for etching operations suitable for practicing some embodiments is described below. Although an ICP reactor is described herein, it should be understood that in some embodiments, a capacitively coupled plasma reactor may also be used.

[0194] 8 shows a schematic cross-sectional view of an inductively coupled plasma apparatus 800 suitable for performing certain embodiments or aspects of embodiments, such as dry development, post-development treatment, and / or etching. In other embodiments, other tools or tool types capable of performing the dry development, post-development treatment, and / or etching processes described herein may be used for the practice.

[0195] The inductively coupled plasma apparatus 800 includes an overall process chamber 824 structurally defined by a chamber wall 801 and a window 811. The chamber wall 801 may be fabricated from stainless steel, aluminum, or plastic. The window 811 may be fabricated from quartz or other dielectric materials. An optional internal plasma grid 850 divides the overall process chamber into an upper subchamber 802 and a lower subchamber 803. In most embodiments, the plasma grid 850 is removable, thereby providing access to the chamber space consisting of the subchambers 802 and 803. A chuck 817 is disposed within the lower subchamber 803 near the bottom inner surface. The chuck 817 is configured to receive and hold a semiconductor wafer 819 on which etching and deposition processes are performed. If present, the chuck 817 may be an electrostatic chuck for supporting the wafer 819. In some embodiments, an edge ring (not shown), if present on the chuck 817, surrounds the chuck 817 and has an upper surface that is approximately planar with the upper surface of the wafer 819. The chuck 817 also includes an electrostatic electrode for chucking and dechucking the wafer 819. A filter and DC clamp power supply (not shown) may be provided for this purpose. Other control systems for lifting the wafer 819 from the chuck 817 may also be provided. The chuck 817 can be electrically charged using an RF power supply 823. The RF power supply 823 is connected to a matching circuit 821 through a connection 827. The matching circuit 821 is connected to the chuck 817 through a connection 825. In this manner, the RF power supply 823 is connected to the chuck 817. In various embodiments, the bias power of the electrostatic chuck may be set to about 50 V or a different bias power depending on the process being performed according to the disclosed embodiments. For example, the bias power may be about 20 V to about 100 V, or about 30 V to about 150 V.

[0196] The elements for plasma generation include a coil 833 disposed above the window 811. In some embodiments, a coil is not used in the disclosed embodiments. The coil 833 is made of a conductive material and includes at least one full turn. The example coil 833 shown in FIG. 8 includes three turns. A cross section of the coil 833 is indicated by symbols, with the coil marked with an "X" extending into the page and the coil marked with a "●" extending out of the page. The elements for plasma generation also include an RF power supply 841 configured to provide RF power to the coil 833. Generally, the RF power supply 841 is connected to a matching circuit 839 through connection 845. The matching circuit 839 is connected to the coil 833 through connection 843. In this manner, the RF power supply 841 is connected to the coil 833. An optional Faraday shield 849 is disposed between the coil 833 and the window 811. The Faraday shield 849 may be maintained in a spaced apart relationship relative to the coil 833. In some embodiments, the Faraday shield 849 is positioned directly above the window 811. In some embodiments, the Faraday shield 849 is between the window 811 and the chuck 817. In some embodiments, the Faraday shield 849 is not maintained in a spaced apart relationship with respect to the coil 833. For example, the Faraday shield 849 may be directly below the window 811 with no gap. The coil 833, the Faraday shield 849, and the window 811 are each configured to be substantially parallel to one another. The Faraday shield 849 may prevent metals or other species from depositing on the window 811 of the process chamber 824.

[0197] Process gases may enter the process chamber through one or more main gas inlets 860 and / or one or more side gas inlets 870 located within the upper subchamber 802. Similarly, although not explicitly shown, similar gas inlets may be used to supply process gases to the capacitively coupled plasma processing chamber. A vacuum pump, e.g., a single-stage or two-stage mechanical dry pump and / or turbomolecular pump 840, may be used to draw process gases from the process chamber 824 and maintain pressure within the process chamber 824. For example, the vacuum pump may be used to evacuate the lower subchamber 803 during a purge operation. A valve-controlled conduit may be used to fluidly connect the vacuum pump to the process chamber 824 to selectively control application of the vacuum environment provided by the vacuum pump. This may be accomplished using a closed-loop controlled flow restriction device, such as a throttle valve (not shown) or a pendulum valve (not shown), during plasma processing operations. Similarly, a vacuum pump and valve-controlled fluid connection to the capacitively coupled plasma processing chamber may also be used. The wide range of pressures regulated within the process chamber for combined dry development and etching can be achieved by adjusting the flow rate of the process gases with a variable speed vacuum system, a throttle valve, or by using a two pressure regulation system.

[0198] During operation of the apparatus 800, one or more process gases may be supplied through the gas inlets 860 and / or 870. In certain embodiments, process gases may be supplied only through the main gas inlet 860 or only through the side gas inlet 870. In some cases, the illustrated gas inlets may be replaced by more complex gas inlets, such as one or more showerheads. The Faraday shield 849 and / or optional grid 850 may include internal channels and holes that allow delivery of process gases to the process chamber 824. Either or both of the Faraday shield 849 and optional grid 850 may function as showerheads for delivering process gases. In some embodiments, a liquid vaporization and delivery system may be located upstream of the process chamber 824 such that once a liquid reactant or precursor is vaporized, the vaporized reactant or precursor is introduced into the process chamber 824 via the gas inlets 860 and / or 870.

[0199] Radio frequency power is supplied from RF power supply 841 to coil 833, causing an RF current to flow through coil 833. The RF current flowing through coil 833 generates an electromagnetic field around coil 833. The electromagnetic field generates an induced current within upper subchamber 802. Physical and chemical interactions of the various generated ions and radicals with wafer 819 etch features on wafer 819 and selectively deposit layers on wafer 819.

[0200] When a plasma grid 850 is used such that both the upper subchamber 802 and the lower subchamber 803 are present, induced currents act on the gas present in the upper subchamber 802 to generate an electron-ion plasma within the upper subchamber 802. The optional internal plasma grid 850 limits the amount of hot electrons within the lower subchamber 803. In some embodiments, the apparatus 800 is designed and operated such that the plasma present in the lower subchamber 803 is an ion-ion plasma.

[0201] Both the upper electron-ion plasma and the lower ion-ion plasma can contain positive and negative ions, although the ion-ion plasma has a higher ratio of negative ions to positive ions. Volatile etching and / or deposition byproducts can be removed from the lower subchamber 803 through port 822. The chuck 817 disclosed herein can operate at elevated temperatures ranging from about 10° C. to about 250° C. The temperature is dependent on the process operation and the specific recipe.

[0202] The apparatus 800 may be coupled to equipment (not shown) when installed in a clean room or fabrication facility. The equipment includes plumbing to provide process gases, vacuum, temperature control, and environmental particle control. These equipment will be coupled to the apparatus 800 when installed in the target fabrication facility. Additionally, the apparatus 800 may be coupled to a transfer chamber that allows a robot to load and unload semiconductor wafers into and out of the apparatus 800 using typical automation.

[0203] In some embodiments, a controller 830 (which may include one or more physical or logical controllers) controls some or all of the operation of the process chamber 824. The controller 830 may include one or more memory devices and one or more processors. In some embodiments, the apparatus 800 includes a switching system for controlling flow rates and durations when the disclosed embodiments are performed. In some embodiments, the apparatus 800 may have a switching time of up to about 500 ms, or up to about 750 ms. Switching times may vary depending on the flow chemistry, the selected recipe, the reactor architecture, and other factors.

[0204] In some embodiments, the controller 830 is part of a system that may be part of the above examples. Various aspects of the controller 830 are described above.

[0205] EUVL patterning may be performed using any suitable tool, which is often referred to as a scanner. The EUVL patterning tool may be a stand-alone device through which substrates enter and exit for deposition and etching, as described herein. Alternatively, as described below, the EUVL patterning tool may be a module on a larger, multi-component tool.

[0206] 9 illustrates a semiconductor process cluster tool architecture 900 with vacuum-integrated deposition, patterning, and processing modules in conjunction with a vacuum transfer module suitable for carrying out the processes described herein. The arrangement of transfer modules for "transferring" wafers between multiple containment facilities and processing modules may be referred to as a "cluster tool architecture" system. The deposition, patterning, and processing modules are vacuum-integrated according to the requirements of the particular process. Other modules, such as for etching, may also be included in the cluster.

[0207] The vacuum transfer module (VTM) 938 interfaces with four processing modules 920a-920d, which can be individually optimized to perform various fabrication processes. By way of example, the processing modules 920a-920d can be implemented to perform deposition, evaporation, ELD, dry development, cleaning, etching, processing, stripping, and / or other semiconductor processes. For example, module 920a can be an ALD reactor that can be operated to perform non-plasma thermal atomic layer deposition as described herein. Module 920b can be a PECVD tool. It should be understood that the figures are not necessarily drawn to scale.

[0208] Airlocks 942 and 946, also known as load locks or transfer modules, interface with VTM 938 and patterning module 940. This tool architecture allows workpieces, such as semiconductor substrates or wafers, to be transferred under vacuum and left unreacted prior to exposure. Integration of the deposition module with the lithography tool is facilitated by the fact that EUVL also requires significantly lower pressures, given the strong optical absorption of incident photons by ambient gases such as H2O and O2.

[0209] As noted above, this integrated architecture is just one possible embodiment of a tool for performing the described process. The process may be performed standalone using a more conventional stand-alone EUVL scanner and deposition reactor, or integrated with other tools, such as etch, strip, etc., as modules in a cluster architecture, e.g., without an integrated patterning module, as described with reference to FIG. 9.

[0210] Airlock 942 may be an "outgoing" load lock, referring to the transfer of substrates from the VTM 938 serving deposition module 920a to the patterning module 940, and airlock 946 may be an "incoming" load lock, referring to the transfer of substrates from the patterning module 940 back to the VTM 938. Incoming airlock 946 may provide an interface to the outside of the tool for the entry and exit of substrates. Each process module has a facet connecting the module to the VTM 938. For example, deposition process module 920a has facet 936. Within each facet, sensors, such as sensors 1-18 as shown, are used to detect the passage of wafer 926 as it moves between its respective stations. Patterning module 940 and airlocks 942 and 946 may similarly include additional facets and sensors, not shown.

[0211] The main VTM robot 922 transfers wafers 926 between modules, including airlocks 942 and 946. In one embodiment, the robot 922 has one arm, and in another embodiment, the robot 922 has two arms, each arm having an end effector 924 that picks up a wafer, such as wafer 926, for transfer. The front-end robot 944 is used to transfer wafers 926 from the output airlock 942 to the patterning module 940 and from the patterning module 940 to the input airlock 946. The front-end robot 944 can also transfer wafers 926 between the input load lock and the exterior of the tool for substrate entry and exit. The input airlock module 946 has the ability to interface between atmospheric and vacuum environments, allowing wafers 926 to move between the two pressure environments without damage.

[0212] It should be noted that EUVL tools typically operate at a higher vacuum than deposition tools. In this case, it may be desirable to increase the vacuum environment of the substrate during transfer between the deposition and EUVL tools so that the substrate can be degassed before entering the patterning tool. The unloading airlock 942 may provide this function by holding the transferred wafer at a low pressure below the pressure in the patterning module 940 for a period of time while the off-gassing is vented, so that the optics of the patterning module 940 are not contaminated by off-gassing from the substrate. A suitable pressure for the unloading airlock to off-gas is 1E-8 Torr or less.

[0213] In some embodiments, a controller 950 (which may include one or more physical or logical controllers) controls some or all of the operation of the cluster tool and / or its separate modules. Note that the controller may be local to the cluster architecture or may be located outside the cluster architecture, either on the manufacturing floor or at a remote location, and connected to the cluster architecture via a network. The controller 950 may include one or more memory devices and one or more processors. The processor may include a central processing unit (CPU) or computer, analog and / or digital input / output connections, stepper motor controller boards, and other similar components. Instructions for implementing appropriate control operations are executed on the processor. These instructions may be stored on a memory device associated with the controller or provided over a network. In certain embodiments, the system controller executes system control software.

[0214] The system control software may include instructions for controlling the application timing and / or magnitude of any aspect of tool or module operation. The system control software may be configured in any suitable manner. For example, various process tool component subroutines or control objects may be written to control the operation of process tool components necessary to perform various process tool processes. The system control software may be coded in any suitable computer-readable programming language. In some embodiments, the system control software includes input / output control (IOC) sequencing instructions for controlling the various parameters described above. For example, each stage of a semiconductor fabrication process may include one or more instructions for execution by the controller. Instructions for setting process conditions for condensation, deposition, vapor deposition, patterning, and / or etching stages may be included in the corresponding recipe stages, for example.

[0215] In various embodiments, an apparatus for post-development processing is provided. The apparatus may include processing chambers for patterning, processing, deposition, and etching, and a controller including instructions for post-development processing of a patterned photoresist mask. The instructions may include code for post-development processing of the patterned metal-containing photoresist mask in the processing chamber. Such processing may include thermal treatment, plasma treatment, chemical treatment, or selective deposition of a protective layer on the patterned metal-containing photoresist mask.

[0216] It should be noted that the computer controlling the wafer movement may be local to the cluster architecture, or may be located external to the cluster architecture, either on the manufacturing floor or at a remote location, and connected to the cluster architecture via a network. A controller such as that described above with respect to any of Figures 6, 7, or 8 may be implemented in the tool of Figure 9.

[0217] Further embodiments The apparatus and processes described herein can be used in combination with lithographic patterning tools or processes, for example, for the fabrication or manufacturing of semiconductor devices, displays, LEDs, photovoltaic panels, and the like. Typically, such apparatus and processes are used or performed together in a common fabrication facility, but this is not necessarily the case. Lithographic patterning of a film typically includes some or all of the following steps, each possible with several tools: (1) applying photoresist onto a workpiece, i.e., substrate, using a spin-on or spray-on tool; (2) curing the photoresist using a hotplate or furnace or a UV curing tool; (3) exposing the photoresist to visible, UV, or X-ray light using a tool such as a wafer stepper; (4) selectively removing the resist and developing the resist to form a pattern using a tool such as a wet bench; (5) transferring the resist pattern to an underlying film or workpiece using a dry or plasma-assisted etching tool; and (6) removing the resist using a tool such as an RF or microwave plasma resist stripper.

[0218] (Conclusion) In the above description, numerous specific details are set forth to provide a thorough understanding of the presented embodiments. The disclosed embodiments may be practiced without some or all of these specific details. In other instances, well-known process operations have not been described in detail so as not to unnecessarily obscure the disclosed embodiments. While the disclosed embodiments will be described in conjunction with specific embodiments, it will be understood that they are not intended to limit the disclosed embodiments.

[0219] Although the foregoing embodiments have been described in some detail for purposes of clarity of understanding, it will be apparent that certain changes and modifications may be made within the scope of the appended claims. It should be noted that there are many alternative ways of implementing the processes, systems, and apparatus of the present embodiments. Therefore, the present embodiments should be considered illustrative rather than restrictive, and the present embodiments should not be limited to the details given herein.

[0220] The following claims are provided to further describe particular embodiments of the present disclosure, but the present disclosure is not necessarily limited to these embodiments.

Claims

1. 1. An apparatus for integrating dry development and etching semiconductor processes into a single process chamber, comprising: one or more process chambers; one or more pressure regulating devices; one or more pumps fluidly coupled to the pressure regulating device; a plasma processing system; one or more gas inlets into the process chamber and associated flow control hardware; a controller having at least one processor and a memory; the at least one processor and the memory are communicatively coupled to each other; The at least one processor is at least operatively connected to the associated flow control hardware, and the memory stores computer-executable instructions that control the at least one processor to: performing thermal dry development in the process chamber at a first pressure; performing plasma dry developing and etching in the same process chamber at a second pressure lower than the first pressure; transitioning the pressure in the same process chamber from the first pressure to the second pressure within 10 seconds; and Maintaining uniformity of one or more process parameters and at least controls the associated flow control hardware so that:

2. The apparatus of claim 1 , wherein the one or more pressure regulating devices include a pressure control valve assembly.

3. 3. The apparatus of claim 2, wherein the pressure control valve assembly includes a throttle valve.

4. The apparatus of claim 1 , wherein the one or more pumps include a roughing pump and a turbo pump.

5. 5. The apparatus of claim 4, wherein the first pressure is between 5 and 50 times greater than the second pressure.

6. The apparatus of claim 1 , wherein the one or more process parameters include pumping, gas delivery, or pumping and gas delivery.

7. 1. An apparatus for processing a metal-containing photoresist, comprising: one or more process chambers; one or more pressure regulating devices; one or more pumps fluidly coupled to the pressure regulating device; one or more gas inlets into the process chamber and associated flow control hardware; a plasma processing system; a controller having at least one processor and a memory; the at least one processor and the memory are communicatively coupled to each other; The at least one processor is at least operatively connected to the associated flow control hardware, and the memory stores computer-executable instructions that control the at least one processor to: performing thermal dry development in the process chamber at a first pressure; performing plasma dry developing and etching in the same process chamber at a second pressure lower than the first pressure; adjusting the pressure in the same process chamber from the first pressure to the second pressure within 10 seconds; After plasma dry developing and etching, returning the pressure in the same process chamber from the second pressure to the first pressure within 20 seconds; and Maintaining uniformity of one or more process parameters and at least controls the associated flow control hardware so that:

8. 8. The apparatus of claim 7, wherein the plasma processing system includes a radio frequency power amplifier.

9. 9. The apparatus of claim 8, wherein the radio frequency power amplifier operates continuously or pulsed.

10. 1. A method for processing a semiconductor substrate, comprising: providing a patterned photoresist on a semiconductor substrate in a process chamber; thermally dry developing the patterned photoresist with a process gas at a first pressure to form a thermally dry developed patterned resist; and plasma dry developing and etching the thermal dry developed patterned resist with an etchant at a second pressure to form a patterned substrate. Including, The thermal dry development, plasma dry development and etching are performed in the same process chamber; the process chamber is transitioned from the first pressure to the second pressure within 10 seconds prior to etching and returned to the first pressure within 20 seconds after etching; and The patterned photoresist is a metal-containing photoresist. A method for processing a semiconductor substrate.

11. 11. The method of claim 10, wherein the first pressure is about 200-500 mTorr and the second pressure is about 20-50 mTorr.

12. 11. The method of claim 10, wherein the metal-containing photoresist comprises a photopatterned EUV-sensitive organometallic oxide, a photopatterned EUV-sensitive metal oxide, or an organometallic-containing thin film EUV resist.

13. 13. The method of claim 12, wherein the photopatterned EUV sensitive metal oxide comprises tin oxide.

14. 14. The method of claim 13, whereby tin outgassing from the tin oxide is reduced.

15. The method of claim 10 further comprising selective metal deposition.

16. The method of claim 10 , wherein the etching comprises exposure to an etchant plasma.

17. 17. The method of claim 16, wherein the etchant plasma comprises a hard mask opening gas.

18. 20. The method of claim 17, wherein the hard mask opening gas comprises carbonyl sulfide, oxygen, carbon dioxide, nitrogen, hydrogen, or a combination thereof.

19. 20. The method of claim 18, wherein the hard mask opening gas comprises an oxygen plasma.

20. 20. The method of claim 19, wherein the exposure to the oxygen plasma is for a duration of about 0.5 to about 4 seconds.

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