Light emitting device and method for manufacturing light emitting device
The semiconductor light-emitting device addresses electrode damage and lift-off issues through a novel design and manufacturing process, enhancing lifespan and performance by using convex semiconductor layers and thinner insulating layer edges.
Patent Information
- Application Number
- JP2024118352
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-07-24
- Publication Date
- 2026-02-05
AI Technical Summary
Existing semiconductor light-emitting devices face issues such as electrode damage during dry etching and resist lift-off difficulties, leading to reduced device lifespan and electrical performance.
A light-emitting device design featuring a light-transmitting substrate with convex semiconductor layers, insulating layers with thinner edges, and electrode pads, manufactured using a photolithography and atomic layer deposition process to form insulating layers without damaging electrodes, preventing peeling and cracking.
The design enhances device lifespan and electrical performance by improving adhesion and moisture resistance, reducing the likelihood of electrode damage and cracks, thus extending the device's operational life.
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Figure 2026017592000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to a light-emitting device and a method for manufacturing the same. [Background technology]
[0002] A light-emitting element is disclosed in which a covering layer is formed to cover a semiconductor layer including a light-emitting layer. For example, Patent Document 1 discloses a semiconductor light-emitting element having a substrate, an element structure layer including a light-emitting layer formed on the substrate, a covering layer covering the upper and side surfaces of the element structure layer, and a contact electrode formed on the semiconductor layer exposed from an opening provided in the covering layer. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Japanese Patent Application Publication No. 2020-113741 Summary of the Invention [Problem to be solved by the invention]
[0004] In the semiconductor light-emitting device disclosed in Patent Document 1, a coating layer is formed by atomic layer deposition (ALD), and then dry etching is performed to form openings in the coating layer that expose the n-side electrode and p-side electrode provided in the device structure layer. During this process, for example, plasmatized etching gas may damage the n-side electrode and p-side electrode, which may deteriorate the electrical characteristics of the light-emitting device and shorten the device's lifespan.
[0005] Furthermore, in the semiconductor light-emitting device disclosed in Patent Document 1, for example, when openings are formed in the coating layer by lifting off the resist instead of dry etching, the coating layer is formed continuously on the resist and the coating target because of the good coverage achieved by the ALD method, making resist lift-off difficult. Even if the resist can be lifted off, burrs and cracks are likely to occur at the edge of the coating layer, which may shorten the device life.
[0006] The present invention has been made in view of the above-mentioned points, and has as its object to provide a light-emitting element capable of improving the device life and a method for manufacturing the light-emitting element. [Means for solving the problem]
[0007] The light-emitting device of the present invention comprises a light-transmitting flat substrate, a first semiconductor layer of a first conductivity type formed on the upper surface of the substrate and having a plurality of convex portions protruding upward, a plurality of light-emitting layers formed on the plurality of convex portions of the first semiconductor layer, and a plurality of second semiconductor layers of a second conductivity type opposite to the first conductivity type formed on each of the plurality of light-emitting layers, a first electrode formed on the bottom of a concave portion between each of the plurality of convex portions on the upper surface of the first semiconductor layer, a second electrode formed on the second semiconductor layer, and The semiconductor device has a first opening exposing the electrode and a second opening exposing the second electrode, and an insulating layer covering the convex portion of the first semiconductor layer and the side surfaces of the light-emitting layer and the second semiconductor layer on the substrate, a first electrode pad formed on the insulating layer so as to cover the first opening, and a second electrode pad formed on the insulating layer so as to cover the second opening and spaced apart from the first electrode pad, and is characterized in that the thickness of the insulating layer at each of the ends forming the first opening and the second opening is thinner than the thickness of the portion other than the ends.
[0008] Furthermore, a method for manufacturing a light-emitting element according to the present invention includes a semiconductor structure layer forming step of forming a first semiconductor layer having a first conductivity type on an upper surface of a flat substrate having light transmission, forming a light-emitting layer on the first semiconductor layer, and forming a second semiconductor layer having a second conductivity type on the light-emitting layer to form a semiconductor structure layer; an electrode forming step of forming a first electrode connected to the first semiconductor layer and a second electrode connected to the second semiconductor layer; an insulating layer forming step of forming an insulating layer on the substrate, the insulating layer having a first opening exposing the first electrode and a second opening exposing the second electrode; and a first electrode connected to the first electrode through the first opening on the insulating layer. and an electrode pad forming step of forming a first electrode pad on the insulating layer, the first electrode pad being spaced apart from the first electrode pad and connected to the second electrode through a second opening. The insulating layer forming step includes a photolithography step of sequentially applying a lift-off resist and a photoresist to cover the first electrode and the second electrode, and removing the lift-off resist and the photoresist so that they remain in portions corresponding to the openings in the insulating layer, and a lift-off step of forming an insulating layer by atomic layer deposition, and lifting off the remaining lift-off resist and the photoresist in the openings. [Brief explanation of the drawings]
[0009] [Figure 1] FIG. 1 is a perspective view of a light emitting device according to an embodiment. [Figure 2] FIG. 2 is a cross-sectional view of a light emitting device according to an embodiment. [Figure 3] FIG. 2 is a cross-sectional view of a light emitting device according to an embodiment. [Figure 4] FIG. 2 is an enlarged cross-sectional view of a light emitting device according to an example. [Figure 5] FIG. 10 is a cross-sectional view of a light emitting device according to a modified example of the embodiment. [Figure 6] FIG. 10 is a cross-sectional view of a light emitting device according to a modified example of the embodiment. [Figure 7] 5A to 5C are cross-sectional views showing an example of a manufacturing process for the light emitting device according to the example. [Figure 8] 5A to 5C are cross-sectional views showing an example of a manufacturing process for the light emitting device according to the example. [Figure 9] 5A to 5C are cross-sectional views showing an example of a manufacturing process for the light emitting device according to the example. [Figure 10] 5A to 5C are cross-sectional views showing an example of a manufacturing process for the light emitting device according to the example. [Figure 11] 5A to 5C are cross-sectional views showing an example of a manufacturing process for the light emitting device according to the example. [Figure 12] 1A to 1C are enlarged views showing a part of the manufacturing process of the light emitting device according to the example. [Figure 13] 5A to 5C are cross-sectional views showing an example of a manufacturing process for the light emitting device according to the example. [Figure 14] 5A to 5C are cross-sectional views showing an example of a manufacturing process for the light emitting device according to the example. DETAILED DESCRIPTION OF THE INVENTION
[0010] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the drawings, the same components are designated by the same reference numerals, and the description of the same components will be omitted. [Example]
[0011] [Outline of the light-emitting element 100] The configuration of a light-emitting element 100 according to Example 1 will be described with reference to Figs. 1 to 3. Fig. 1 is a perspective view of the light-emitting element 100 according to Example 1. Fig. 2 is a cross-sectional view of the light-emitting element 100 shown in Fig. 1 taken along line 2-2. Fig. 3 is a cross-sectional view of the light-emitting element 100 shown in Fig. 1 taken along line 3-3. In Figs. 2 and 3, the up-down direction in the drawings corresponds to the height direction of the light-emitting element 100, and the left-right direction in the drawings corresponds to the width direction of the light-emitting element 100.
[0012] The light-emitting element 100 is a light-emitting diode (LED) comprising an element substrate 11, a semiconductor structure layer 13 formed on the upper surface of the element substrate 11, a first insulating layer 15 covering the semiconductor structure layer 13, a second insulating layer 17 covering the first insulating layer 15, and a first electrode pad 21 and a second electrode pad 22, each of which covers the second insulating layer 17 and is electrically connected to the semiconductor structure layer 13.
[0013] [Element substrate 11] First, the element substrate 11 will be described. The element substrate 11 is a transparent plate-like body having a rectangular upper surface shape and having insulating or conductive properties. The element substrate 11 is made of a material that is translucent to light emitted from a light-emitting layer of the semiconductor structure layer 13, which will be described later, such as aluminum nitride (AlN). Hereinafter, in a plan view of the light-emitting element 100 seen from above, a pair of widthwise sides of the element substrate 11 will be referred to as sides 11A, and a pair of front-rear sides will be referred to as sides 11B.
[0014] [Semiconductor structure layer 13] Next, we will explain the configuration of the semiconductor structure layer 13 and the electrodes formed on the semiconductor structure layer 13. The semiconductor structure layer 13 is a semiconductor laminate including an n-type semiconductor layer 23, a light emitting layer 24, and a p-type semiconductor layer 25.
[0015] The semiconductor structure layer 13 has a light emitting element portion LP in the shape of a truncated quadrangular pyramid having a rectangular upper surface with the longitudinal direction along the side 11A (see FIGS. 1 to 3). In other words, in a plan view of the semiconductor structure layer 13 seen from above, the light emitting element portion LP has a strip shape. In the light emitting element 100, three light emitting element portions LP are provided in a row spaced apart from each other in the direction along the side 11B.
[0016] The n-type semiconductor layer 23 is a semiconductor layer in which carriers are electrons, and has a flat lower portion 23A formed across the upper surface of the element substrate 11 and an upper portion 23B as a convex portion that is spaced apart from the periphery of the lower portion 23A and protrudes upward from the lower portion 23A. The upper portion 23B of the n-type semiconductor layer 23 is a base portion of each of the light-emitting element portions LP described above.
[0017] The n-type semiconductor layer 23 is made of aluminum gallium nitride (AlGaN) and has a multilayer structure including a gradient composition layer in which the Al composition changes from 1.0 to 0.7 from the bottom surface side to the top surface side in FIG. 2, and a constant composition layer in which the Al composition is fixed at 0.7.
[0018] The light emitting layer 24 is formed over the upper surface of the upper portion 23B of the n-type semiconductor layer 23, and is a semiconductor layer that emits light by recombination of electrons and holes. The light emitting layer 24 emits light in the deep ultraviolet wavelength range with a peak wavelength of 265 nm, for example. The light emitting layer 24 is an intermediate portion of each of the light emitting element portions LP described above.
[0019] The light-emitting layer 24 is made of, for example, Al 0.6 Ga 0.4 A barrier layer made of N and Al 0.5 Ga 0.5 The multi-quantum well (MQW) structure is made up of three N well layers alternately stacked.
[0020] The p-type semiconductor layer 25 is a semiconductor layer in which the carriers are holes and is formed over the upper surface of the light emitting layer 24. The p-type semiconductor layer 25 is the tip portion of each of the light emitting element portions LP described above.
[0021] The p-type semiconductor layer 25 is made of AlGaN, similar to the n-type semiconductor layer 23. The p-type semiconductor layer 25 has a multilayer structure including, for example, a compositionally graded layer (electron barrier layer) in which the Al composition changes from 1.0 to 0.8 from the bottom surface side to the top surface side in Fig. 2, a constant composition layer in which the Al composition is fixed at about 0.7, and a contact layer in which the Al composition is set to about 0 to 0.05.
[0022] The light-emitting element portion LP has two pairs of side surfaces facing each other that are inclined downward. In the light-emitting element 100, the side surfaces of the upper portion 23B of the n-type semiconductor layer 23, the light-emitting layer 24, and the p-type semiconductor layer 25 are inclined at the same angle to each other.
[0023] In the light-emitting element 100, the side surface of the light-emitting element portion LP may be formed perpendicular to the upper surface of the element substrate 11, but by providing an inclination so that the side surface of the light-emitting element portion LP is visible when viewed from above, a first insulating layer 15 and a second insulating layer 17 with excellent continuity can be formed on this side surface.
[0024] An n-electrode NE is provided on the upper surface of the lower portion 23A of the n-type semiconductor layer 23 excluding the region where the upper portion 23B is formed. The n-electrode NE is a rectangular electrode whose upper surface shape is the longitudinal direction along the side 11A. The n-electrode NE is formed by laminating titanium (Ti), aluminum (Al), and gold (Au) in this order.
[0025] A p-electrode PE is formed on the upper surface (top surface) of the p-type semiconductor layer 25. The p-electrode PE is a rectangular electrode whose upper surface shape is along the direction of the side 11A as the longitudinal direction. The p-electrode PE is formed by laminating nickel (Ni) and Au in this order.
[0026] In the light-emitting element 100, when a voltage is applied to the p-electrode PE and the n-electrode NE and a current flows between the p-electrode PE and the n-electrode NE, the current flows in the light-emitting layer 24 of the light-emitting element portion LP and deep ultraviolet light is emitted. In the light-emitting element 100, the light-emitting element portions LP are electrically connected in parallel with each other with the lower portion 23A of the n-type semiconductor layer 23 serving as a common conductive layer.
[0027] In the light emitting element 100, the long sides of the p-electrode PE and the n-electrode NE have lengths approximately equal to the long sides of the p-type semiconductor layer 25 of the light emitting element section LP. The p-electrodes PE and the n-electrodes NE are also provided such that their long sides are aligned at equal intervals. This allows current to flow approximately uniformly in the longitudinal direction (direction along side 11A) and lateral direction (direction along side 11B) of the light emitting element section LP.
[0028] Light emitted from the light-emitting layer 24 by supplying a current to the light-emitting layer 24 may travel directly to the element substrate 11 or may be reflected by the p-electrode PE and then enter the element substrate 11. Therefore, in the light-emitting element 100, the lower surface of the element substrate 11 serves as the light-emitting surface of the light-emitting element 100.
[0029] The n-type semiconductor layer 23, the light-emitting layer 24, and the p-type semiconductor layer 25 may include, as appropriate for the purpose, a semiconductor layer with added impurities, a semiconductor layer without added impurities, a strain relaxation layer that relieves strain between layers, a composition gradient layer that gradually changes the crystal composition, a quantum well layer having a quantum effect, a barrier layer that suppresses carrier diffusion, a contact layer that reduces contact resistance with the p-electrode PE or the n-electrode NE, and the like.
[0030] [First insulating layer 15] Next, the first insulating layer 15 will be described. As shown in Figures 2 and 3, the first insulating layer 15 is a layer that covers the side surfaces of the light-emitting element portion LP from the upper surface of the lower portion 23A of the n-type semiconductor layer 23 to the upper surface of the p-type semiconductor layer 25. That is, the first insulating layer 15 continuously covers the side surfaces of the upper portion 23B of the n-type semiconductor layer 23, the light-emitting layer 24, and the p-type semiconductor layer 25. The first insulating layer 15 is a protective layer intended to suppress surface leakage current and improve moisture resistance.
[0031] The first insulating layer 15 is formed so as to cover the side surface and the peripheral edge of the upper surface of the n-electrode NE on the upper surface of the lower portion 23A of the n-type semiconductor layer 23. In other words, the first insulating layer 15 has an opening that exposes the region excluding the peripheral region of the upper surface of the n-electrode NE.
[0032] The first insulating layer 15 is formed on the upper surface of the p-type semiconductor layer 25 so as to cover the side surface and the periphery of the upper surface of the p-electrode PE. In other words, the first insulating layer 15 has an opening that exposes the region of the upper surface of the p-electrode PE excluding the periphery.
[0033] The first insulating layer 15 is made of an insulating and light-transmitting material such as alumina (Al2O3). In the light-emitting element 100, the first insulating layer 15 is formed by atomic layer deposition (ALD). The Al2O3 layer formed by the ALD method can form a layer with excellent continuity that conforms to the uneven shape, for example, the shape of the arranged light-emitting element components LP. Furthermore, the crystalline Al2O3 layer is denser and more moisture-resistant than an amorphous silicon dioxide (SiO2) layer.
[0034] [Second insulating layer 17] Next, the second insulating layer 17 will be described. As shown in Figures 2 and 3, the second insulating layer 17 is a layer that continuously covers the semiconductor structure layer 13 and the first insulating layer 15 from the upper surface of the lower portion 23A of the n-type semiconductor layer 23 to the upper surface of the p-type semiconductor layer 25. The second insulating layer 17 is made of a material that has insulating properties and is light-transmitting, such as SiO2.
[0035] The second insulating layer 17 has openings OP1 formed by exposing portions of each of the n-electrodes NE while covering those portions that are exposed from the openings provided in the first insulating layer 15. The openings OP1 are formed along the longitudinal direction of the n-electrodes NE (the direction along the side 11A), and have an elongated rectangular shape when viewed from above. The longitudinal length of the openings OP1 is, for example, approximately half the length of the n-electrodes NE.
[0036] The second insulating layer 17 also has openings OP2 formed by exposing portions of the p-electrodes PE while covering portions of the p-electrodes PE that are exposed through the openings provided in the first insulating layer 15. The openings OP2 are formed along the longitudinal direction of the p-electrodes PE (the direction along the side 11A), and have an elongated rectangular shape when viewed from above. The longitudinal length of the openings OP2 is, for example, approximately half the length of the p-electrodes PE.
[0037] As shown in FIG. 1, when viewed from above in a plan view of the light-emitting element 100, the openings OP1 and OP2 are formed separated into the lower and upper sides of the figure, respectively, by a line (not shown) that bisects the pair of sides 11A and is parallel to the pair of sides 11B.
[0038] Here, the configuration in the vicinity of the ends of the first insulating layer 15 formed on the n-electrode NE and the p-electrode PE will be described with reference to Fig. 4. Fig. 4 is an enlarged view of part A indicated by the dashed line in Fig. 2.
[0039] In the light-emitting element 100, the thickness of the first insulating layer 15 at the portion formed on the upper surface of the n-electrode NE becomes thinner toward the center of the upper surface of the n-electrode NE, as shown in Fig. 4. That is, the thickness of the first insulating layer 15 at the end portion forming the opening exposing the upper surface of the n-electrode NE is thinner than the thickness of the portion other than the end portion. In this way, by thinning the opening ends of the openings OP1 and OP2 in the first insulating layer 15, it is possible to suppress peeling or cracking from the opening ends, even if the first insulating layer 15 covering the n-electrode NE is made of crystalline Al2O3.
[0040] In the light-emitting element 100, the second insulating layer 17 covers the first insulating layer 15 on the upper surface of the n-electrode NE in accordance with the shape of the first insulating layer 15 described above, while forming an opening OP1 that exposes the upper surface of the n-electrode.
[0041] Although not shown, the configuration of the end of the first insulating layer 15 formed on the upper surface of the p-electrode PE is also the same as that shown in Fig. 4. That is, the thickness of the first insulating layer 15 at the end that forms the opening exposing the upper surface of the p-electrode PE is thinner than the thickness of the portion other than the end. Furthermore, the second insulating layer 17 forms an opening OP2 on the upper surface of the p-electrode PE while covering the first insulating layer 15 along the shape of the first insulating layer 15.
[0042] [First electrode pad 21] 1 to 3 again, the first electrode pad 21 is an electrode pad that has a rectangular shape on the top surface with the longitudinal direction along the side 11B, and is formed on the second insulating layer 17 along the shape of the light emitting element portion LP.
[0043] The first electrode pad 21 covers the n-electrode NE exposed from each opening OP1. That is, the first electrode pad 21 is electrically connected to the n-type semiconductor layer 23 via the n-electrode NE exposed from the opening OP1. The first electrode pad 21 is formed by laminating Ni and Au in this order on the surface of the n-electrode NE exposed from the opening OP1.
[0044] [Second electrode pad 22] Next, the second electrode pad 22 will be described. The second electrode pad 22 has a rectangular shape on the top surface with the longitudinal direction along the side 11B, and is an electrode pad formed on the second insulating layer 17 along the shape of the light emitting element portion LP while being spaced apart from the first electrode pad 21. That is, the first electrode pad 21 and the second electrode pad 22 are insulated from each other via the second insulating layer 17.
[0045] The second electrode pad 22 covers the p-electrode PE exposed from each opening OP2. That is, the second electrode pad 22 is electrically connected to the p-type semiconductor layer 25 via the p-electrode PE exposed from the opening OP2. The second electrode pad 22 is formed by laminating Ni and Au in this order on the surface of the p-electrode PE exposed from the opening OP2.
[0046] [Improvement of device life of light-emitting element 100] Here, the improvement of the device life of the light emitting device 100 in this embodiment will be described with reference to FIGS.
[0047] In the light-emitting element 100, as described above, the first insulating layer 15 made of alumina (Al2O3) is formed on each side surface of the upper portion 23B of the n-type semiconductor layer 23, the light-emitting layer 24, and the p-type semiconductor layer 25, each of which is made of AlGaN.
[0048] In the light-emitting device 100, most of at least the n-type semiconductor layer 23, the light-emitting layer 24, and the layer in contact with the light-emitting layer 24, namely the p-type semiconductor layer 25, have a high aluminum composition with an Al composition ratio of 0.5 or more. Furthermore, the first insulating layer 15 made of Al2O3 also contains a large amount of aluminum (Al), improving adhesion to the side surfaces of the first insulating layer 15 sandwiching the light-emitting layer 24, from the n-type semiconductor layer 23 to the p-type semiconductor layer 25.
[0049] Thus, in the light-emitting element 100 of this embodiment, since both the light-emitting element portion LP and the first insulating layer 15 have a high aluminum composition, the adhesion of the first insulating layer 15 to the surface (side and top surfaces) of the light-emitting element portion LP is improved.
[0050] In particular, the first insulating layer 15 in the light emitting element 100 of this embodiment is made of crystalline Al2O3, which can improve adhesion to the light emitting element portion LP and moisture resistance to the light emitting element portion LP compared to, for example, when the first insulating layer 15 is amorphous.
[0051] In addition, in the light-emitting device 100, the first insulating layer 15 is formed by the ALD method as described above, and is therefore denser than when formed by other film formation methods such as sputtering or CVD. As a result, the first insulating layer 15 functions as a protective layer that protects the semiconductor structure layer 13, particularly the light-emitting layer 24, from moisture, corrosive gases, and the like.
[0052] Therefore, according to the light-emitting device 100 of this embodiment, the first insulating layer 15 is less likely to peel off from the upper portion 23B, the light-emitting layer 24, and the p-type semiconductor layer 25, and also functions as a protective layer for the light-emitting layer 24, making the light-emitting layer 24 less likely to deteriorate. This can improve the lifespan of the device.
[0053] The first insulating layer 15 may be made of a material that has good adhesion to the semiconductor structure layer 13 having an Al composition and is excellent in moisture resistance. Examples of such materials include metal oxides such as hafnium oxide (HfO2) and zirconia (ZrO2) in addition to Al2O3.
[0054] In the light-emitting device 100, the edges of the first insulating layer 15 covering the peripheries of the n-electrode NE and the p-electrode PE are thinned to prevent peeling from the edges. Furthermore, defects such as burrs and cracks are less likely to occur at the edges, and cracks starting from burrs can be prevented from progressing. Therefore, the light-emitting device 100 can prevent phenomena that could affect the device lifespan, thereby improving the device lifespan.
[0055] In the light-emitting element 100 of this embodiment, three light-emitting element portions LP each having a truncated quadrangular pyramid shape are arranged along the side 11B of the element substrate 11, but the formation of the light-emitting element portions LP is not limited to this. For example, the number of light-emitting element portions LP may be increased or decreased. Furthermore, the light-emitting element portion LP may have a shape other than a truncated quadrangular pyramid, for example, a rectangular parallelepiped shape.
[0056] In the light emitting device 100 of this embodiment, the second insulating layer 17 is made of SiO2, but this is not limiting, and the second insulating layer 17 may also be made of Al2O3 like the first insulating layer 15.
[0057] In the light emitting element 100 of this embodiment, the first insulating layer 15 is formed in contact with the side surface of the light emitting element portion LP, but this is not limiting. For example, as shown in Figures 5 and 6, a protective layer 27 made of SiO2 may be added between the side surface of the light emitting element portion LP and the first insulating layer 15.
[0058] [Method of manufacturing the light-emitting element 100] A method for manufacturing the light-emitting element 100 will be described below with reference to Fig. 7 to Fig. 14. Fig. 7 to Fig. 11, Fig. 13, and Fig. 14 are cross-sectional views showing an example of a manufacturing process for the light-emitting element 100. Note that Fig. 7 to Fig. 11, Fig. 13, and Fig. 14 show enlarged cross sections of the light-emitting element 100 around one semiconductor structure layer 13.
[0059] The following will describe in detail the method for manufacturing the light-emitting element 100, particularly the method for forming the first insulating layer 15. Therefore, steps prior to the step of forming the first insulating layer 15, such as the step of forming the semiconductor structure layer 13 including the light-emitting element portion LP on the element substrate 11, will be briefly described without being illustrated.
[0060] First, an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer are sequentially grown on a wafer (later element substrate 11) made of AlN by MOCVD (Metal Organic Chemical Vapor Deposition). Then, an upper surface of the p-type semiconductor layer is etched by reactive ion etching (RIE) or inductively coupled plasma (ICP) to form a semiconductor structure layer 13 having a light-emitting element portion LP (Step S1: semiconductor structure layer formation step).
[0061] Next, an n-electrode NE is formed in the lower portion 23A of the n-type semiconductor layer 23 (Step S2: n-electrode formation process). Specifically, first, a resist mask having an opening in the shape of the n-electrode NE is formed between adjacent light-emitting element portions LP in the lower portion 23A, and Ti and Au are laminated in this order to predetermined thicknesses by electron beam (EB) evaporation. Thereafter, the resist mask is removed by lift-off, thereby removing the metal layer other than the n-electrode NE and forming the n-electrode NE.
[0062] Next, a p-electrode PE is formed on the upper surface of the p-type semiconductor layer 25 (Step S3: p-side electrode formation process). Specifically, first, a resist mask having an opening in the shape of the p-electrode PE is formed on the upper surface of the p-type semiconductor layer 25, and Ni and Au are laminated in this order to predetermined thicknesses by EB evaporation. Thereafter, the resist mask is removed by lift-off, thereby removing the metal layers other than the p-electrode PE and forming the p-electrode PE.
[0063] Next, a first insulating layer 15 is formed to continuously cover the side surface of the light emitting element portion LP from the lower portion 23A of the n-type semiconductor layer 23 to the upper surface of the p-type semiconductor layer 25 (step S4: first insulating layer forming step). The first insulating layer forming step is roughly divided into a photolithography step (step S4-1) in which photolithography is performed, and a lift-off step (step S4-2) in which an insulating film is formed by the ALD method and the resist is lifted off.
[0064] First, the photolithography process (step S4-1) will be described with reference to Figures 7 to 10. First, as shown in Figure 7, a lift-off resist LOR, which is a non-photosensitive organic coating film, is formed over the entire surface of the light-emitting element portion LP including the p-electrode PE and the n-electrode NE (step S4-1-1: lift-off resist formation process). As the lift-off resist LOR, for example, LOR3A manufactured by Nippon Kayaku Co., Ltd. is used.
[0065] In this process, for example, the wafer is set on a spin coater and the lift-off resist LOR is applied to the wafer surface, and then the spin coater is rotated at a predetermined speed, and the wafer is then heat-treated in an environment of 175°C for 5 minutes, thereby forming a lift-off resist LOR with a uniform thickness.
[0066] 8, a photoresist PR is formed so as to cover the entire lift-off resist LOR formed in step S4-1 (step S4-1-2: photoresist formation step). As the photoresist PR, for example, AZ5214-E manufactured by Merck Performance Materials LLC is used.
[0067] In this process, for example, the wafer is set on a spin coater and photoresist PR is applied to the surface of the lift-off resist LOR, and then the spin coater is rotated at a predetermined speed and then heat-treated in an environment of 90°C for 2 minutes, thereby forming photoresist PR with a uniform thickness.
[0068] Next, the photoresist PR formed in the previous process is exposed to light using a photomask (step S4-1-3: exposure process). Specifically, exposure is performed using a photomask having a pattern formed such that light is irradiated onto the electrode-overlying portions of the photoresist PR above the n-electrode NE and p-electrode PE. As a result, as shown in FIG. 9, light is irradiated only onto the irradiation area IA corresponding to the electrode-overlying portions of the photoresist PR, and light is not irradiated onto other areas.
[0069] Next, the wafer exposed in the previous step is immersed in a developer and rinsed with pure water to perform development (step S4-1-4: development step). As the developer, for example, AZ600MIF manufactured by Merck Electronics Co., Ltd. is used.
[0070] In this step, as shown in FIG. 10, the unexposed portions of the photoresist PR, i.e., the portions other than the portions above the electrodes, become soluble in the developer, and only the portions of the photoresist PR above the electrodes remain.
[0071] Furthermore, in this process, the lift-off resist LOR formed under the photoresist PR is soluble in a developer regardless of whether it is exposed to light or not, and therefore, in the portion of the photoresist PR above the electrode, the lift-off resist LOR is removed to the inside of the photoresist PR when viewed from above.
[0072] Next, the layer forming process (step S4-2) will be described with reference to Figures 11 and 12. First, as shown in Figure 11, an insulating film 15M made of Al2O3 is formed on the entire upper surface of the developed wafer by the ALD method (step S4-2-1: insulating film forming process).
[0073] Here, the formation of the insulating film near the electrode will be described with reference to Fig. 12. Fig. 12 is an enlarged view of part B indicated by the dashed line in Fig. 11. Note that the n-electrode NE side has the same configuration as Fig. 12, and therefore will not be shown or described here.
[0074] As described above, the lift-off resist LOR is soluble in a developer regardless of whether it is exposed to light or not, so when the portions of the photoresist PR other than the portions above the electrodes are removed by development, the portions of the lift-off resist LOR above the electrodes are removed further inward than the portions of the photoresist PR above the electrodes. In other words, the portions of the photoresist PR above the electrodes form overhanging portions that protrude laterally beyond the lift-off resist LOR.
[0075] When the insulating film 15M is formed by the ALD method with the overhanging portion formed on the photoresist PR, the raw material gas for the insulating film 15M does not reach the side surface of the lift-off resist LOR, but terminates at the lower surface of the overhanging portion of the photoresist PR and the upper surface of the p-electrode.
[0076] Therefore, the insulating film 15M formed on the electrode portion of the photoresist PR and the insulating film 15M formed on the upper surface of the p-electrode PE are discontinuous as shown in Fig. 12. In addition, at this time, the supply amount of the source gas for the insulating film 15M decreases toward the side surface of the lift-off resist LOR, and therefore the thickness of the insulating film 15M formed on the upper surface of the p-electrode PE becomes thinner toward the side surface of the lift-off resist LOR.
[0077] 12, in order to make the insulating film 15M deposited on the photoresist PR on the p-electrode PE discontinuous with the insulating film 15M deposited on the upper surface of the p-electrode PE, the length L of the overhanging portion is preferably 3 to 7 μm when the thickness T of the lift-off resist LOR is 0.3 μm. In other words, when the thickness T of the lift-off resist LOR is used as the reference, the length L of the overhanging portion is preferably 10T to 23T. Preferably, the length L of the overhanging portion is 12T to 17T.
[0078] If the length L of the overhanging portion is less than 3 μm, the upper and lower insulating films 15M will be connected and continuous on the side surfaces of the lift-off resist LOR. If the length L of the overhanging portion is more than 7 μm, the overhanging portion may sag downward during film formation, and the insulating film 15M on the side surfaces of the photoresist PR and the insulating film 15M on the upper surface of the p-electrode PE may be connected and continuous.
[0079] Next, the lift-off resist LOR and photoresist PR on the p-electrode PE and n-electrode NE, which are covered with the insulating film 15M made of Al2O3 formed in the previous step, are removed (step S4-2-2: lift-off step). In this step, the substrate on which the insulating film 15M has been formed is immersed in a stripping solution and ultrasonically cleaned at 60°C for 60 minutes. This operation is repeated three times to remove the lift-off resist LOR and photoresist PR covering the p-electrode PE and n-electrode NE. Thereafter, residues are removed by alcohol cleaning, and a first insulating layer 15 is formed with openings on the top surfaces of the p-electrode PE and n-electrode NE.
[0080] In this embodiment, the insulating film 15M formed on the upper portion of the photoresist PR is separated from the insulating film 15M formed on the upper surface of the p-electrode PE, and is therefore removed together with the lift-off resist LOR and the photoresist PR. Therefore, the first insulating layer 15 can be formed without peeling off (or damaging) the edge of the first insulating layer 15. Even if the insulating film 15M formed on the upper portion of the photoresist PR and the insulating film 15M formed on the upper surface of the p-electrode PE are connected, the edge of the first insulating layer 15 will not be peeled off (or damaged) as long as they can be removed by ultrasonic cleaning using a remover.
[0081] After the first insulating layer 15 is formed in step S4, as shown in FIG. 13, a second insulating layer 17 having openings OP1 and OP2 is formed on the first insulating layer 15 (step S5: second insulating layer forming process).
[0082] Specifically, first, a sputtering device is used to form an insulating layer made of SiO2 on the entire surface of the first insulating layer 15. Thereafter, a resist mask having openings of sizes corresponding to the openings OP1 and OP2 is formed, and the insulating layer in the openings is etched away using a buffered hydrofluoric acid solution, thereby forming the second insulating layer 17 having the openings OP1 and OP2.
[0083] Next, the first electrode pad 21 and the second electrode pad 22 are formed on the second insulating layer 17 (step S6: electrode pad forming process). Specifically, first, a resist having openings in the shapes of the first electrode pad 21 and the second electrode pad 22 is formed on the second insulating layer 17, and Ni and Au are laminated in this order to predetermined thicknesses by EB evaporation. Thereafter, the resist is removed by lift-off, and the metal layer other than the first electrode pad 21 and the second electrode pad 22 is removed together with the resist, thereby forming the first electrode pad 21 and the second electrode pad 22.
[0084] Finally, the wafer on which the plurality of light-emitting elements are formed is divided into individual light-emitting elements 100 by laser dicing or the like (step S7: dividing step). By the above-described steps S1 to S7, the light-emitting element 100 shown in this example can be obtained.
[0085] In the manufacturing method of the light emitting device 100, as described above, the lift-off resist LOR of The first insulating layer 15 can be formed by lifting off a resist in which a photoresist PR is stacked on an upper layer. For example, if the lift-off resist LOR described above is not used in the process of forming the first insulating layer 15, that is, if only the photoresist PR is formed on the electrode and the insulating film 15M is formed by the ALD method, there is a risk that the insulating film 15M formed on the photoresist PR and the insulating film 15M formed on the electrode will be continuous.
[0086] If the insulating film 15M formed on the photoresist PR and the insulating film 15M formed on the electrode are continuous, lifting off the photoresist PR itself becomes difficult. Therefore, even if lift-off is possible, there is a risk that the edges of the first insulating layer 15 may peel off or burrs may form, causing cracks in the first insulating layer 15. For example, if a crack occurs in the first insulating layer 15, moisture may enter the cracked area or current may leak, shortening the lifespan of the device.
[0087] In the light-emitting element 100 of the present invention, while dense film formation is possible by the ALD method, by using a lift-off method using lift-off resist LOR, it is possible to make the insulating film 15M formed on the electrode-overlying portion of the photoresist PR and the insulating film 15M formed on the upper surface of the p-electrode PE discontinuous.
[0088] Therefore, according to the method for manufacturing the light-emitting element 100 of the present invention, burrs and the like are less likely to occur at the end of the first insulating layer 15 during lift-off, and therefore, it is possible to prevent the occurrence of cracks and the like originating from the burrs, for example. Therefore, according to the method for manufacturing the light-emitting element 100 of the present invention, it is possible to improve the device life.
[0089] If the insulating film is formed by the ALD method and then the openings OP1 and OP2 are formed by dry etching to form the first insulating layer 15, the plasmatized etching gas may damage the n-electrode NE, the p-electrode PE, and the semiconductor structure layer 13. If the n-electrode NE, the p-electrode PE, and the semiconductor structure layer 13 are damaged, the electrical characteristics of the light-emitting element 100 may deteriorate, and the life of the device may be shortened.
[0090] In the light-emitting device 100 of this embodiment, as described above, an insulating film made of Al2O3 is formed by the ALD method, and then the resist is lifted off using a lift-off resist, so that the first insulating layer 15 can be formed without damaging the n-electrode NE, the p-electrode PE, and the semiconductor structure layer 13. Therefore, deterioration of the electrical characteristics of the light-emitting device 100 can be prevented, thereby improving the device life.
[0091] In the method for manufacturing the light-emitting element 100 of the present invention, the second insulating layer 17 having the openings OP1 and OP2 is formed on the first insulating layer 15, but the method for forming the openings OP1 and OP2 is not limited to this. For example, when forming the first insulating layer 15, the openings OP1 and OP2 may be formed by forming the insulating film 15M so as to cover half of the n-electrode NE and the p-electrode PE in the longitudinal direction while exposing the other half. [Explanation of symbols]
[0092] 100 light-emitting elements 11 Element substrate 13 Semiconductor structural layer 15 First insulating layer 17 Second insulating layer 21 First electrode pad 22 Second electrode pad 23 n-type semiconductor layer 24 Light-emitting layer 25 p-type semiconductor layer 27 Protective layer NE n electrode PE p electrode
Claims
1. a light-transmitting flat substrate; a semiconductor structure layer including: a first semiconductor layer of a first conductivity type formed on an upper surface of the substrate and having a plurality of protruding portions protruding upward; a plurality of light-emitting layers formed on the plurality of protruding portions of the first semiconductor layer, respectively; and a plurality of second semiconductor layers of a second conductivity type opposite to the first conductivity type, formed on each of the plurality of light-emitting layers, respectively; a first electrode formed on the bottom of a recess between each of the plurality of protrusions on the upper surface of the first semiconductor layer; a second electrode formed on the second semiconductor layer; an insulating layer having a first opening exposing the first electrode and a second opening exposing the second electrode, the insulating layer covering side surfaces of the protrusion of the first semiconductor layer, the light emitting layer, and the second semiconductor layer on the substrate; a first electrode pad formed on the insulating layer so as to cover the first opening; a second electrode pad formed on the insulating layer so as to cover the second opening and spaced apart from the first electrode pad; The light-emitting element, wherein the insulating layer has a thickness smaller at each of the end portions that form the first opening and the second opening than at portions other than the end portions.
2. The light-emitting device according to claim 1 , wherein the insulating layer is a crystalline metal oxide layer.
3. The first semiconductor layer, the light emitting layer, and the layer of the second semiconductor layer in contact with the light emitting layer each have an AlGaN composition, and the insulating layer is 2 O 3 The light-emitting device according to claim 2, characterized in that it comprises
4. The light-emitting device according to claim 3 , wherein the light-emitting layer emits light in a deep ultraviolet wavelength range.
5. 5. The light-emitting device according to claim 1, wherein the insulating layer is formed by atomic layer deposition.
6. a semiconductor structure layer forming step of forming a semiconductor structure layer by forming a first semiconductor layer having a first conductivity type on an upper surface of a light-transmitting flat substrate, forming a light-emitting layer on the first semiconductor layer, and forming a second semiconductor layer having a second conductivity type on the light-emitting layer; an electrode forming step of forming a first electrode connected to the first semiconductor layer and a second electrode connected to the second semiconductor layer; an insulating layer forming step of forming an insulating layer on the substrate, the insulating layer having a first opening exposing the first electrode and a second opening exposing the second electrode; an electrode pad forming step of forming a first electrode pad on the insulating layer through the first opening and connected to the first electrode, and forming a second electrode pad on the insulating layer separated from the first electrode pad and connected to the second electrode through the second opening, the insulating layer forming step includes a photolithography step of sequentially applying a lift-off resist and a photoresist to cover the first electrode and the second electrode, and removing the lift-off resist and the photoresist so that they remain in portions corresponding to openings in the insulating layer; and a lift-off step of forming an insulating film by atomic layer deposition, and lifting off the remaining lift-off resist and the photoresist in the openings to form the insulating layer.
7. 7. The method for manufacturing a light-emitting element according to claim 6, wherein after the photolithography step, the lift-off resist is removed to a position inside the photoresist in a top view of the light-emitting element.
8. 8. The method for manufacturing a light-emitting element according to claim 6, wherein in the insulating layer forming step, the insulating film is formed so that a portion formed on the surface of the photoresist and a portion formed on the first electrode and the second electrode are discontinuous.
Citation Information
Patent Citations
Semiconductor light-emitting element and manufacturing method of semiconductor light-emitting element
JP2020113741A