Amplification apparatus

Abstract

To suppress deterioration in radio characteristics.SOLUTION: Amplifying power of a first signal input via two or more amplifiers and a digital-to-analog converter (DAC) that performs output to each of the amplifiers; A clipping processing unit configured to perform, for a part of the amplifiers, clipping processing of multiplying power of the first signal by a clipping correction value in accordance with the power of the first signal so that the power of the first signal falls within a predetermined range, and a gain processing of multiplying the power of the first signal subjected to the clipping processing by a gain correction value; The gain processing unit returns the power of the first signal output from the DAC to the power before the gain processing and the clip processing are performed, and inputs the power to the amplifier.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to an amplifier device. [Background technology]

[0002] For example, in a wireless communication system compatible with fifth-generation communication, a communication device may use an amplifier device called a Doherty amplifier in order to achieve high amplification efficiency over a wide bandwidth.

[0003] A Doherty amplifier is composed of, for example, a carrier amplifier and a peaking amplifier. When the input signal level is low, only the carrier amplifier operates, and when the level is high, both the carrier amplifier and the peaking amplifier operate. When even higher power is input, the output signal level of the carrier amplifier reaches saturation power, and no amplification effect is obtained, so the signal is amplified by the peaking amplifier.

[0004] Furthermore, a signal is input to the Doherty amplifier via, for example, a digital-to-analog converter (DAC) that converts a digital signal into an analog signal. The Doherty amplifier amplifies the level of the input analog signal by passing it through a peak amplifier and a carrier amplifier.

[0005] Technologies relating to amplifier devices are described in the following prior art documents. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] WO2005 / 124994 publication [Patent Document 2] Utility Model Publication No. 58-144931(U) [Patent Document 3] Japanese Patent Application Laid-Open No. 2016-136688 Summary of the Invention [Problem to be solved by the invention]

[0007] However, the lower the DAC output is from full-scale power, the lower (deteriorating) the S / N ratio (signal-to-noise ratio).For this reason, the S / N ratio of the DAC output to a carrier amplifier that operates effectively at low power will be poor, which may lead to degradation of wireless characteristics.

[0008] Therefore, one disclosure provides an amplifier device that suppresses degradation of wireless characteristics. [Means for solving the problem]

[0009] An amplifying device having two or more amplifiers and DACs (Digital to Analog Converters) that output to each of the amplifiers, amplifying the power of a first signal input via the DACs and the amplifiers, and outputting a composite signal of the signals output by the amplifiers, the amplifying device comprising: a clipping processing unit that performs clipping processing on the power of the first signal by multiplying a clip correction value by the power of the first signal so that the power of the first signal falls within a predetermined range for some of the amplifiers; a gain processing unit that performs gain processing on the power of the clipped first signal by a gain correction value and inputs the gain to the DAC; and a power of the first signal output from the DAC that is restored to the power before the gain processing and the clipping processing were performed, and inputs the power to the amplifier. [Effects of the Invention]

[0010] One aspect of the present invention is to suppress degradation of wireless characteristics. [Brief explanation of the drawings]

[0011] [Figure 1] FIG. 1 is a diagram illustrating an example of the configuration of a wireless communication system 100. As shown in FIG. [Figure 2] FIG. 2 is a diagram illustrating an example of the configuration of the base station device 200. As shown in FIG. [Figure 3] FIG. 3 is a diagram illustrating an example of functional blocks of the amplifier device 251. [Figure 4] FIG. 4 is a diagram showing an example of functional blocks of the digital Doherty signal processing unit 13. [Figure 5] FIG. 5 is a diagram showing an example of a processing flowchart of the carrier amplifier signal processing S100. [Figure 6] FIG. 6 is a diagram showing an example of an image of a level diagram in each processing unit. DETAILED DESCRIPTION OF THE INVENTION

[0012] [First embodiment] A first embodiment will be described.

[0013] 1 is a diagram showing an example of the configuration of a wireless communication system 100. The wireless communication system 100 includes a base station device 200 and a terminal device 300. The wireless communication system 100 is a wireless communication system in which the base station device 200 and the terminal device 300 are wirelessly connected and which relays communications between the terminal device 300 and other communication devices.

[0014] The base station device 200 is a device, such as an eNodeB or gNodeB, that is wirelessly connected to and performs wireless communication with the terminal device 300. The base station device 200 relays communication between the terminal device 300 and other communication devices via a network. The base station device 200 forms a communication area (cell) A200 and is wirelessly connected to the terminal device 300 located within the communication area A200.

[0015] The terminal device 300 is a communication device that is wirelessly connected to the base station device 200 and transmits and receives data, and is, for example, a smartphone or a tablet terminal.

[0016] <Configuration Example of Base Station Device 200> 2 is a diagram showing an example of the configuration of the base station device 200. The base station device 200 includes a CPU (Central Processing Unit) 210, a storage 220, a memory 230, and a wireless communication circuit 250.

[0017] The storage 220 is an auxiliary storage device that stores programs and data, such as a flash memory, a hard disk drive (HDD), or a solid state drive (SSD). The storage 220 stores a communication control program 221.

[0018] The memory 230 is an area into which the programs stored in the storage 220 are loaded. The memory 230 may also be used as an area in which the programs store data.

[0019] The wireless communication circuit 250 is a device that performs wireless communication with the terminal device 300. The base station device 200 transmits and receives signals (messages) to and from the terminal device 300 via the wireless communication circuit 250.

[0020] The radio communication circuit 250 includes an amplifier 251. The amplifier 251 is a device that amplifies the level (power) of a signal and outputs it. When transmitting a signal, the base station device 200 amplifies the level via the amplifier 251 and transmits the signal via the radio communication circuit 250.

[0021] The CPU 210 is a processor that loads a program stored in the storage 220 into the memory 230, executes the loaded program, configures each unit, and realizes each process.

[0022] The CPU 210 executes the communication control program 221 to establish a communication control unit and perform communication control processing. The communication control processing is processing for controlling wireless connection and wireless communication with the terminal device 300. The communication control processing also includes processing for relaying signals transmitted and received by the terminal device 300.

[0023] <Amplification Device 251> 3 is a diagram showing an example of functional blocks of the amplifying device 251. The amplifying device 251 includes an FPGA (Field Programmable Gate Array) 10, an RF (Radio Frequency) transmitting circuit 20, a Doherty amplifier 30, and an RF feedback circuit 40.

[0024] The FPGA 10 is an integrated circuit capable of changing the logic of a digital circuit, and includes a digital transmission processing unit 11, a distortion compensation processing unit 12, and a digital Doherty signal processing unit 13.

[0025] The digital transmission processing unit 11 performs transmission processing on a signal received via a network, for example, and converts the signal into an I / Q (In-Phase / Quadrature-Phase) signal. The digital transmission processing unit 11 outputs the I / Q signal to the distortion compensation processing unit 12.

[0026] The distortion compensation processing unit 12 performs processing to compensate for nonlinear distortion within the carrier band, and outputs the distortion-compensated signal to the digital Doherty signal processing unit 13.

[0027] The digital Doherty signal processing unit 13 processes the signal to be output to the Doherty amplifier 30 via the RF transmission circuit 20 .

[0028] The digital Doherty signal processing unit 13 includes a clip processing unit 14 , a digital gain processing unit 15 , and a delay / phase adjustment processing unit 16 .

[0029] The signal to be output to a carrier amplifier (CA) 31 of the Doherty amplifier 30 is output via a clip processing unit 14 and a digital gain processing unit 15.

[0030] The clip processing unit 14 corrects the level of the I / Q signal using a clip threshold. The clip threshold is a value determined based on the saturated power and average power (PAPR: Peak-to-Average Power Ratio) of the carrier amplifier 31. The clip threshold is determined based on the characteristics of the carrier amplifier, such as individual differences between carrier amplifiers, and may be a different value for each individual carrier amplifier. The clip processing unit 14 outputs the clip-corrected I / Q signal to the digital gain processing unit 15.

[0031] The digital gain processing unit 15 performs digital gain processing on the input I / Q signal. The digital gain processing unit 15 multiplies the transmission signals I and Q by a constant gain. The gain amount is, for example, the difference between the full-scale power before clipping and the clip threshold. The digital gain processing unit 15 outputs the digital gain-processed signal to the RF transmission circuit 20.

[0032] The delay and phase adjustment processing unit 16 adjusts the delay and phase of the I / Q signal, and outputs the signal to be input to a peak amplifier (PA) 32 of the Doherty amplifier 30 via the RF transmission circuit 20 .

[0033] The RF transmission circuit 20 converts the digital signal into an analog signal, adjusts the transmission power level, and outputs the signal to the Doherty amplifier 30. The output has two paths, one for the peak amplifier 32 of the Doherty amplifier 30 and the other for the carrier amplifier 31.

[0034] The RF transmission circuit 20 has a DAC 21, a mixer 22, and an analog gain (AG) adjustment unit 23 on a path to a carrier amplifier 31, and has a DAC 24, a mixer 25, and an analog gain adjustment unit 26 on a path to a peak amplifier 32.

[0035] The DACs 21 and 24 convert the digital signals into analog signals and output them to the mixers 22 and 25. The mixers 22 and 25 modulate the signals onto carrier waves and output them to the analog gain adjustment units 23 and 26. The analog gain adjustment units 23 and 26 adjust the transmission power levels and output them to the Doherty amplifier 30.

[0036] The analog gain adjustment unit 23 returns the level (power) of the input signal adjusted by, for example, the above-described clipping correction or digital gain processing to the power at the time of input (the power before the clipping correction or digital gain processing was performed). In other words, the analog gain adjustment unit 23 adjusts the gain so that the transmission power level output to the Doherty amplifier 30 is equivalent to the signal power level when output to the analog gain adjustment unit 23 without the above-described clipping correction or digital gain processing being performed. Note that the analog gain adjustment unit 26 does not pass signals that have been subjected to clipping correction or digital gain processing, and therefore performs adjustment processing that is different from the adjustment performed by the analog gain adjustment unit 23.

[0037] The Doherty amplifier 30 has a carrier amplifier 31 and a peak amplifier 32. The Doherty amplifier 30 inputs signals to the path of the carrier amplifier 31 and the path of the peak amplifier 32. The Doherty amplifier 30 performs phase adjustment when combining the outputs of the carrier amplifier 31 and the peak amplifier 32 using λ / 4 lines 33 and 34. The Doherty amplifier 30 amplifies the input signal and outputs a wireless signal via, for example, an antenna included in the wireless communication circuit 250. A portion of the signal output by the Doherty amplifier 30 is input to an RF feedback circuit 40 via a coupler.

[0038] The RF feedback circuit 40 has a mixer 41 and an ADC (Analog to Digital Converter) 42. The mixer 41 demodulates the signal and outputs it to the ADC 42. The ADC 42 converts the analog signal into a digital signal and outputs it to the distortion compensation processing unit 12. The distortion compensation processing unit 12 generates a distortion compensation coefficient that corrects the amplitude and phase according to the level of the transmission signal based on the fed-back signal, and performs distortion compensation on the output signal of the Doherty amplifier 30.

[0039] <Digital Doherty signal processing unit 13> 4 is a diagram showing an example of functional blocks of the digital Doherty signal processing unit 13. The digital Doherty signal processing unit 13 has a clip processing unit 14, a digital gain processing unit 15, and a delay / phase adjustment processing unit 16. The digital gain processing unit 15 and the delay / phase adjustment processing unit 16 are as described above, and therefore description thereof will be omitted.

[0040] The clip processing unit 14 has an I / Q power measuring unit 141 and a clip correcting unit 142. The I / Q power measuring unit 141 measures the power of the input I / Q signal and outputs it. The clip correcting unit 142 performs clip correction and outputs the result to the digital gain processing unit 15. Depending on the measured power, the I / Q signal is branched into either passing through the clip correcting unit 142 or not passing through the clip correcting unit 142.

[0041] The delay and phase adjustment processing unit 16 may be placed before the clip processing unit 14 .

[0042] The following describes signal processing (hereinafter referred to as carrier amplifier signal processing S100) for signals input to the carrier amplifier in the digital Doherty signal processing unit 13. Fig. 5 is a diagram showing an example of a processing flowchart of the carrier amplifier signal processing S100.

[0043] The I / Q power measurement unit 141 measures the power (IQ power) of the input signal on a sample-by-sample basis (S100-1). The separator compares whether the IQ power is greater than the clip threshold (S100-2). If the IQ power is greater than the clip threshold (Yes in S100-2), the separator multiplies I (in-phase) and Q (quadrature-phase) by clip correction values ​​via the clip correction unit 142 (S100-3).

[0044] The clip correction value is calculated, for example, by the following equation 1.

[0045]

number

[0046] By calculating the clip correction value using Equation 1, the maximum power after clipping becomes the clip threshold value.

[0047] If the IQ power is not greater than the clip threshold (No in S100-2), the separator outputs the signal without going through the clip correction unit 142.

[0048] The digital gain processor 15 performs digital gain processing on the signal that has been subjected to clip correction or that has not been subjected to clip correction (S100-3), outputs the signal to the RF transmission circuit 20, and ends the processing.

[0049] In the digital gain processing, I and Q are each multiplied by a digital gain correction value. The digital gain correction value is calculated, for example, by the following equation 2.

[0050]

number

[0051] The digital gain correction value is, for example, the difference between the full-scale power before clipping and the clip threshold power. Fig. 6 is a diagram showing an example of an image of a level diagram in each processing unit.

[0052] The analog gain adjustment unit 23 of the RF transmission circuit 20 adjusts the signal level input to the carrier amplifier, that is, performs processing to reduce the power (level) by the amount amplified by the digital gain processing unit 15 (if clip correction is performed by the clip correction unit 142, this may include the amount amplified by the clip correction).

[0053] The amplifying device 251 in the first embodiment limits the output to the DAC 21, which outputs a signal input to the carrier amplifier 31 of the Doherty amplifier 30. This limits the power input to the carrier amplifier at the digital output stage, reduces the full-scale power of the output to the DAC 21, and increases the output level of the DAC 21 during low power consumption, thereby suppressing a decrease in the S / N ratio.

[0054] When transmitting a high-power signal, the signal input to the carrier amplifier is subjected to clipping processing by the clip correction unit 142. If a signal is input to the carrier amplifier without the above-described processing, the signal will be at the saturation power of the carrier amplifier, and no amplification effect will be obtained, so the impact of performing this processing is minor. In this case, the signal that is not subjected to clipping processing is amplified by the peak amplifier, and is therefore appropriately amplified as the Doherty amplifier output.

[0055] [Other embodiments] 3 is an example, and the Doherty amplifier 30 may have a different configuration. The Doherty amplifier 30 may be a so-called inverse Doherty amplifier, as long as it is configured with a carrier amplifier and a peak amplifier.

[0056] The following is a summary as follows:

[0057] (Appendix 1) An amplifier device having a carrier amplifier and a DAC (Digital to Analog Converter) that outputs to the carrier amplifier, amplifying and outputting power of a first signal input via the DAC and the carrier amplifier, a clipping processing unit that performs clipping processing by multiplying the power of the first signal by a clipping correction value according to the power of the first signal so that the power of the first signal falls within a predetermined range; a gain processing unit that performs gain processing by multiplying the power of the clipped first signal by a gain correction value and inputs the result to the DAC; a gain adjustment unit that restores the power of the first signal output from the DAC to the power before the gain processing and the clip processing, and inputs the restored power to the carrier amplifier. Amplification device.

[0058] (Appendix 2) The clipping processing unit does not perform the clipping process when the power of the first signal is equal to or less than a first threshold. 10. The amplifier device of claim 1.

[0059] (Appendix 3) The first threshold is determined according to the saturation power of the carrier amplifier. 1. An amplifier device as described in Appendix 2.

[0060] (Appendix 4) The clip correction value is determined according to the first threshold value. 10. The amplifier device of claim 3.

[0061] (Appendix 5) The clip correction value is determined in response to the power of the first signal. 10. The amplifier device of claim 3.

[0062] (Appendix 6) The gain correction value is determined according to the full-scale power of the carrier amplifier. 10. The amplifier device of claim 1.

[0063] (Appendix 7) The gain correction value is determined in accordance with the first threshold value. 1. An amplifier device as described in Appendix 2.

[0064] (Appendix 8) the carrier amplifier is included in a Doherty amplifier, and the Doherty amplifier further includes a peak amplifier; the clipping processing unit does not perform the clipping process on the signal input to the peak amplifier, The gain processing unit does not perform the gain processing on the signal input to the peak amplifier. 10. The amplifier device of claim 1.

[0065] (Appendix 9) An amplifier device having a carrier amplifier and a peak amplifier, a Doherty amplifier having a first input on the carrier amplifier side and a second input on the peak amplifier side, a first DAC (Digital to Analog Converter) installed before the first input, and a second DAC installed before the second input, amplifying and outputting power of an input signal, a clipping processing unit that performs clipping processing by multiplying the power of the first signal obtained by branching the signal by a clipping correction value so that the power of the first signal falls within a predetermined range, according to the power of the first signal obtained by branching the signal; a gain processing unit that performs gain processing by multiplying the power of the clipped first signal by a gain correction value and inputs the result to the first DAC; a gain adjustment unit that restores the power of the first signal output from the first DAC to the power before the gain processing and the clip processing were performed, and inputs the restored power to the carrier amplifier via the first input. Amplification device.

[0066] (Appendix 10) A second signal other than the first signal obtained by branching the signal is not subjected to the clipping process and the gain process, and is input to the peak amplifier via the second DAC. 10. The amplifier device of claim 9. [Explanation of symbols]

[0067] 10: FPGA 11: Digital transmission processing section 12: Distortion compensation processing section 13: Digital Doherty signal processing section 14: Clip processing section 15: Digital gain processing section 16: Phase adjustment processing section 20: RF transmission circuit 21:DAC 22: Mixer 23: Analog gain adjustment section 24:DAC 25: Mixer 26: Analog gain adjustment section 30: Doherty amplifier 31: Carrier amplifier 32: Peak amplifier 33:λ / 4 line 34 :λ / 4 line 40: RF feedback circuit 41: Mixer 42: ADC 100: Wireless communication system 141:I / Q power measurement section 142: Clip correction section 200:Base station equipment 210:CPU 220: Storage 221: Communication control program 230: Memory 250: Wireless communication circuit 251: Amplification equipment 300: Terminal device

Claims

1. An amplifying device having two or more amplifiers and DACs (Digital to Analog Converters) that output to the amplifiers, amplifying power of a first signal input via the DACs and the amplifiers, and outputting a composite signal of the signals output by the amplifiers, a clipping processing unit that performs clipping processing on some of the amplifiers by multiplying the power of the first signal by a clipping correction value in accordance with the power of the first signal so that the power of the first signal falls within a predetermined range; a gain processing unit that performs gain processing by multiplying the power of the clipped first signal by a gain correction value and inputs the resultant signal to the DAC; The power of the first signal output from the DAC is returned to the power before the gain processing and the clip processing, and is input to the amplifier. Amplification device.

2. The clipping processing unit does not perform the clipping process when the power of the first signal is equal to or less than a first threshold.

2. The amplifier device according to claim 1.

3. The first threshold is determined according to the saturation power of the amplifier.

3. The amplifier according to claim 2.

4. The clip correction value is determined in accordance with the first threshold value.

4. The amplifier according to claim 3.

5. The clip correction value is determined in response to the power of the first signal.

4. The amplifier according to claim 3.

6. The gain correction value is determined according to the full-scale power of the amplifier.

2. The amplifier device according to claim 1.

7. The gain correction value is determined in accordance with the first threshold value.

3. The amplifier according to claim 2.

8. The amplifier is included in a Doherty amplifier, and the Doherty amplifier includes a carrier amplifier and a peak amplifier, the clipping processing unit does not perform the clipping process on the signal input to the peak amplifier, The gain processing unit does not perform the gain processing on the signal input to the peak amplifier.

2. The amplifier device according to claim 1.

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