printed circuit board

Abstract

A printed circuit board is provided which is advantageous in controlling warpage, facilitates the realization of fine circuits, reduces the number of processes, reduces costs, and ensures process stability, and has excellent through-via reliability. [Solution] The present disclosure relates to a printed circuit board including a glass layer, a first insulating layer covering the upper and lower surfaces of the glass layer, a first conductor layer arranged on the upper surface of the first insulating layer, a second conductor layer arranged on the lower surface of the first insulating layer, a through hole penetrating between the first and second conductor layers, and a through via arranged in the through hole and including a via conductor connected to the first and second conductor layers, wherein the wall surface of the through hole has at least one step region.

Description

[Technical Field]

[0001] The present disclosure relates to printed circuit boards. [Background technology]

[0002] In recent years, there has been a demand for larger areas, more layers, and finer patterns to improve the performance of printed circuit boards. Meanwhile, copper clad laminate (CCL) is currently used as the core layer in printed circuit boards. However, due to its low modulus and high thermal expansion coefficient, it is prone to warping and has limitations in realizing fine circuits. Therefore, there is a need for a core layer made of a new material that can suppress warping and facilitate the realization of fine circuits. Furthermore, there is a need for printed circuit boards that can reduce the number of processes and costs while still ensuring process stability, even when using a core layer made of such a new material. Summary of the Invention [Problem to be solved by the invention]

[0003] One of the various objects of the present disclosure is to provide a printed circuit board that is advantageous in terms of warpage control and facilitates the realization of fine circuits.

[0004] Another of the various objects of the present disclosure is to provide a printed circuit board that allows for a reduction in the number of steps and therefore reduces costs.

[0005] Still another object of the present disclosure is to provide a printed circuit board capable of ensuring process stability and having excellent through-via reliability. [Means for solving the problem]

[0006] One of the various solutions proposed through this disclosure is to laminate an insulating layer on a glass layer, embed the glass layer in the insulating layer as a core layer, form a through hole through a single processing after embedding the glass layer, and then form a through via by filling it with a conductor, and at least one step region can be formed on the wall surface of the through hole when forming the through hole.

[0007] For example, one example of a printed circuit board includes a glass layer, a first insulating layer covering the upper and lower surfaces of the glass layer, a first conductor layer arranged on the upper surface of the first insulating layer, a second conductor layer arranged on the lower surface of the first insulating layer, a through hole penetrating between the first and second conductor layers, and a through via including a via conductor arranged in the through hole and connected to the first and second conductor layers, and the wall surface of the through hole may have at least one step region.

[0008] For example, one example of a printed circuit board includes an insulating layer, a glass layer embedded in the insulating layer, a first conductor layer arranged on an upper surface of the insulating layer, a second conductor layer arranged on a lower surface of the insulating layer, and a through via that penetrates one or more of the insulating layer and the glass layer between the first and second conductor layers and connects the first and second conductor layers to each other, and a side of the through via may have at least one step region. [Effects of the Invention]

[0009] One of the various effects of the present disclosure is that it is possible to provide a printed circuit board that is advantageous in terms of warpage control and that facilitates the realization of fine circuits.

[0010] Another advantage of the present disclosure is that it is possible to provide a printed circuit board that can reduce the number of processes, reduce costs, and ensure process stability.

[0011] Still another of the various effects of the present disclosure is that it is possible to ensure process stability and provide a printed circuit board with excellent through-via reliability. [Brief explanation of the drawings]

[0012] [Figure 1] FIG. 1 is a block diagram illustrating an example of an electronic device system. [Figure 2] FIG. 1 is a perspective view schematically illustrating an example of an electronic device. [Figure 3] FIG. 1 is a cross-sectional view schematically illustrating an example of a printed circuit board. [Figure 4a] 4A to 4C are enlarged cross-sectional views schematically illustrating various examples of through vias formed in region A of the printed circuit board of FIG. [Figure 4b] 4A to 4C are enlarged cross-sectional views schematically illustrating various examples of through vias formed in region A of the printed circuit board of FIG. [Figure 4c] 4A to 4C are enlarged cross-sectional views schematically illustrating various examples of through vias formed in region A of the printed circuit board of FIG. [Figure 4d] 4A to 4C are enlarged cross-sectional views schematically illustrating various examples of through vias formed in region A of the printed circuit board of FIG. [Figure 4e] 4A to 4C are enlarged cross-sectional views schematically illustrating various examples of through vias formed in region A of the printed circuit board of FIG. [Figure 4f] 4A to 4C are enlarged cross-sectional views schematically illustrating various examples of through vias formed in region A of the printed circuit board of FIG. [Figure 4g] 4A to 4C are enlarged cross-sectional views schematically illustrating various examples of through vias formed in region A of the printed circuit board of FIG. [Figure 4h] 4A to 4C are enlarged cross-sectional views schematically illustrating various examples of through vias formed in region A of the printed circuit board of FIG. [Figure 5] FIG. 10 is a cross-sectional view schematically showing another example of a printed circuit board. [Figure 6a] 6A to 6C are enlarged cross-sectional views schematically illustrating various examples of through vias formed in region B of the printed circuit board of FIG. 5. [Figure 6b] 6A to 6C are enlarged cross-sectional views schematically illustrating various examples of through vias formed in region B of the printed circuit board of FIG. 5. [Figure 6c]6A to 6C are enlarged cross-sectional views schematically illustrating various examples of through vias formed in region B of the printed circuit board of FIG. 5. [Figure 6d] 6A to 6C are enlarged cross-sectional views schematically illustrating various examples of through vias formed in region B of the printed circuit board of FIG. 5. [Figure 6e] 6A to 6C are enlarged cross-sectional views schematically illustrating various examples of through vias formed in region B of the printed circuit board of FIG. 5. [Figure 6f] 6A to 6C are enlarged cross-sectional views schematically illustrating various examples of through vias formed in region B of the printed circuit board of FIG. 5. [Figure 6g] 6A to 6C are enlarged cross-sectional views schematically illustrating various examples of through vias formed in region B of the printed circuit board of FIG. 5. [Figure 6h] 6A to 6C are enlarged cross-sectional views schematically illustrating various examples of through vias formed in region B of the printed circuit board of FIG. 5. DETAILED DESCRIPTION OF THE INVENTION

[0013] The present disclosure will be described below with reference to the accompanying drawings. The shapes and sizes of elements in the drawings may be enlarged or reduced (or highlighted or simplified) for clarity.

[0014] electronic equipment FIG. 1 is a block diagram illustrating an example of an electronic device system.

[0015] Referring to the drawing, an electronic device 1000 houses a main board 1010. Chip-related components 1020, network-related components 1030, and other components 1040 are physically and / or electrically connected to the main board 1010. These components are also coupled to other electronic components described below to form various signal lines 1090.

[0016] The chip-related components 1020 include, but are not limited to, memory chips such as volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), and flash memory; application processor chips such as central processors (e.g., CPU), graphics processors (e.g., GPU), digital signal processors, encryption processors, microprocessors, and microcontrollers; and logic chips such as analog-to-digital converters and ASICs (application-specific ICs). Furthermore, these chip-related components 1020 can be combined with one another. The chip-related components 1020 can also be in the form of a package including the above-mentioned chips and electronic components.

[0017] The network-related components 1030 may include, but are not limited to, Wi-Fi (e.g., IEEE 802.11 family), WiMAX (e.g., IEEE 802.16 family), IEEE 802.20, LTE (long term evolution), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM, GPS, GPRS, CDMA, TDMA, DECT, Bluetooth, 3G, 4G, 5G, and any other wireless and wired protocols designated as such, as well as any of numerous other wireless or wired standards and protocols. The network-related components 1030 may also be combined with the chip-related components 1020.

[0018] The other components 1040 may include high-frequency inductors, ferrite inductors, power inductors, ferrite beads, LTCC (low temperature co-fired ceramics), EMI (electromagnetic interference) filters, MLCC (multi-layer ceramic capacitors), etc. However, the other components 1040 may include, but are not limited to, passive elements in the form of chip components used for various other applications. The other components 1040 may also be combined with the chip-related components 1020 and / or the network-related components 1030.

[0019] Depending on the type of electronic device 1000, the electronic device 1000 may include other electronic components that may or may not be physically and / or electrically connected to the main board 1010. Examples of other electronic components include, but are not limited to, a camera module 1050, an antenna module 1060, a display 1070, and a battery 1080. Other electronic components may also include, but are not limited to, an audio codec, a video codec, a power amplifier, a compass, an accelerometer, a gyroscope, a speaker, a mass storage device (e.g., a hard disk drive), a compact disk (CD), a digital versatile disk (DVD), and the like. In addition to these, other electronic components used for various purposes may also be included depending on the type of electronic device 1000.

[0020] The electronic device 1000 may be a smartphone, a personal digital assistant, a digital video camera, a digital still camera, a network system, a computer, a monitor, a tablet, a laptop, a netbook, a television, a video game, a smart watch, an automotive part, etc. However, the electronic device 1000 is not limited to these, and may be any other electronic device that processes data.

[0021] FIG. 2 is a perspective view schematically illustrating an example of an electronic device.

[0022] Referring to the drawing, the electronic device may be, for example, a smartphone 1100. The smartphone 1100 houses a motherboard 1110, to which various components 1120 are physically and / or electrically connected. Other components, such as a camera module 1130 and / or a speaker 1140, which may or may not be physically and / or electrically connected to the motherboard 1110, are also housed inside. Some of the components 1120 may be the chip-related components described above, such as, but not limited to, a component package 1121. The component package 1121 may be in the form of a printed circuit board on which electronic components, including active and / or passive components, are mounted on a surface. Alternatively, the component package 1121 may be in the form of a printed circuit board in which active and / or passive components are embedded. Meanwhile, the electronic device is not necessarily limited to the smartphone 1100, but may be other electronic devices as described above. Furthermore, the electronic device may be a server-related product requiring a large-area board.

[0023] printed circuit board FIG. 3 is a cross-sectional view that schematically illustrates an example of a printed circuit board.

[0024] Referring to the drawings, a printed circuit board 100A according to an example may include a glass layer 110, a first insulating layer 111 covering the upper and lower surfaces of the glass layer 110, a first conductor layer 121 disposed on the upper surface of the first insulating layer 111, a second conductor layer 122 disposed on the lower surface of the first insulating layer 111, and a through via 130-1 including a through hole h penetrating the first insulating layer 111 and / or the glass layer 110 between the first conductor layer 121 and the second conductor layer 122, and a via conductor 130 disposed in the through hole h and connected to the first conductor layer 121 and the second conductor layer 122. The through hole h may penetrate the first insulating layer 111 and the glass layer 110 together. For example, the through hole h may include a first portion h1 that penetrates the glass layer 110, a second portion h2 that penetrates a region of the first insulating layer 111 that covers the upper surface of the glass layer 110, and a third portion h3 that penetrates a region of the first insulating layer 111 that covers the lower surface of the glass layer 110. At least a portion of the via conductor 130, for example, a portion of the via conductor 130 disposed in the first portion h1, may be in contact with the glass layer 110. At least another portion of the via conductor 130, for example, other portions of the via conductor 130 disposed in the second portion h2 and the third portion h3, may be in contact with the first insulating layer 111.

[0025] As described above, since the printed circuit board 100A includes the glass layer 110, it is advantageous for warpage control and it is easy to realize a fine circuit. In addition, after covering the glass layer 110 with the first insulating layer 111, through-holes h are formed through the first and second insulating layers 111 at once by drilling or the like, and the through-vias 130-1 including the first and second conductor layers 121 and 122 and the via conductors 130 connecting them are formed by a plating process or the like, which can reduce the number of processes and costs. In addition, the reliability of the through-vias 130-1 can be superior to that of stacked vias. It is also advantageous for realizing a minimum pitch of the through-vias 130-1.

[0026] Meanwhile, the glass layer 110 may be embedded in the first insulating layer 111. For example, the first insulating layer 111 may cover not only the upper and lower surfaces of the glass layer 110 but also the side surfaces of the glass layer 110. This allows the glass layer 110 to function as a core layer. This makes it easier to achieve the above-mentioned technical effects. In addition, breakage of the glass layer 110 may be more effectively prevented.

[0027] If necessary, the printed circuit board 100A may further include a frame 118 having a through-hole H. At least a portion of the glass layer 110 may be disposed within the through-hole H. The first insulating layer 111 may further cover the upper and lower surfaces of the frame 118 and fill at least a portion of the through-hole H. For example, it may fill at least a portion between the side surface of the frame 118 and the side surface of the glass layer 110. Meanwhile, warpage may be more easily controlled through the frame 118, and process handling may be easier. Furthermore, multiple through-holes H may be formed in a large-area frame 118, and multiple printed circuit boards 100A may be manufactured through the same process using this, and then the resulting products may be cut into separate pieces, thereby improving productivity.

[0028] If necessary, the printed circuit board 100A may include a second insulating layer 112 disposed on the upper surface of the first insulating layer 111 and covering at least a portion of the first conductor layer 121, a third insulating layer 113 disposed on the lower surface of the first insulating layer 111 and covering at least a portion of the second conductor layer 122, a third conductor layer 123 disposed on the upper surface of the second insulating layer 112, a fourth conductor layer 124 disposed on the lower surface of the third insulating layer 113, and first connection vias 115 extending through at least a portion of the second insulating layer 112 to connect at least a portion of the first conductor layer 121 and the third conductor layer 123 to each other. 31, second connection vias 132 penetrating at least a portion of the third insulating layer 113 and connecting at least a portion of the second conductor layer 122 and the fourth conductor layer 124 to each other, a first passivation layer 114 disposed on the upper surface of the second insulating layer 112 and having a plurality of first openings o1 exposing at least a portion of the third conductor layer 123, and / or a second passivation layer 114 disposed on the lower surface of the third insulating layer 113 and having a plurality of second openings o2 exposing at least a portion of the fourth conductor layer 124. For example, the printed circuit board 100A may have a multi-layer structure and may be used as a film-chip board (FCB), a ball-gate array (BGA), an interposer substrate, a package substrate, etc. However, the present invention is not limited thereto and may be applied to various other types of substrates.

[0029] The components of the printed circuit board 100A according to an example will be described in more detail below with reference to the drawings.

[0030] The glass layer 110 may include glass, which is an amorphous solid. Examples of glass include pure silicon dioxide (approximately 100% SiO), soda-lime glass, borosilicate glass, and aluminosilicate glass. However, alternative glass materials, such as fluoroglass, phosphate glass, and chalcogenide glass, may also be used. Furthermore, other additives may be added to form glass with specific physical properties. These additives may include calcium carbonate (e.g., lime) and sodium carbonate (e.g., soda), as well as magnesium, calcium, manganese, aluminum, lead, boron, iron, chromium, potassium, sulfur, and antimony, as well as carbonates and / or oxides of these and other elements. The glass layer 110 may be distinguished from insulating materials including glass fiber (glass cloth, glass fabric), such as copper clad laminate (CCL) and prepreg (PPG). For example, the glass layer 110 can include a glass plate (GP).

[0031] The first insulating layer 111, the second insulating layer 112, the third insulating layer 113, the first resist layer 114, and the second resist layer 115 may each include an organic insulating material. The organic insulating material may include a thermosetting resin such as an epoxy resin, a thermoplastic resin such as a polyimide, or a resin together with an inorganic filler, an organic filler, and / or glass fiber (glass fiber, glass cloth, glass fabric). For example, the organic insulating material may be, but is not limited to, PPG (Prepreg), ABF (Ajinomoto Build-up Film), PID (Photo Imageable Dielectric), SR (Solder Resist), etc. If necessary, the first insulating layer 111, the second insulating layer 112, the third insulating layer 113, the first resist layer 114, and the second resist layer 115 may each be composed of multiple layers. The first resist layer 114 and the second resist layer 115 may have a first opening o1 and a second opening o2, respectively, and the first opening o1 and the second opening o2 may be plural. The pad patterns of the third conductor layer 123 and the fourth conductor layer 124 exposed through the first opening o1 and the second opening o2 may be in the form of SMD (Solder Mask Defined) and / or NSMD (Non Solder Mask Defined).

[0032] The frame 118 may include various materials. For example, it may include an organic insulating material such as copper clad laminate (CCL). Alternatively, it may include an inorganic insulating material such as silicon or ceramic. Alternatively, it may include a metal plate such as copper (Cu), but is not limited thereto. The frame 118 may have a through portion H. The through portion H may penetrate between the upper and lower surfaces of the frame 118. The through portion H may have a shape that substantially corresponds to the glass layer 110. The through portion H may continuously surround the side surface of the glass layer 110. For example, the through portion H may have a generally rectangular shape in plan view. If necessary, the frame 118 may be composed of multiple units spaced apart from each other, and the number of units is not particularly limited.

[0033] The first conductor layer 121, the second conductor layer 122, the third conductor layer 123, and the fourth conductor layer 124 may each include a metal. The metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. Preferably, but not limited to, copper (Cu). The first conductor layer 121, the second conductor layer 122, the third conductor layer 123, and the fourth conductor layer 124 may each perform various functions according to the design. For example, they may include signal patterns, power patterns, ground patterns, etc. These patterns may each have various forms, such as lines, planes, and pads. The first conductor layer 121, the second conductor layer 122, the third conductor layer 123, and the fourth conductor layer 124 may each include a seed layer and a plating layer. The seed layer may be formed by electroless plating (e.g., chemical copper), or, if necessary, by a sputtering process. Alternatively, both may be used. The plating layer may be formed by electrolytic plating (e.g., electrolytic copper). When the first insulating layer 111, the second insulating layer 112, and the third insulating layer 113 are each composed of multiple layers, the first conductor layer 121, the second conductor layer 122, the third conductor layer 123, and the fourth conductor layer 124 may be composed of multiple layers corresponding to this. The first conductor layer 121, the second conductor layer 122, the third conductor layer 123, and the fourth conductor layer 124 may protrude above the first insulating layer 111, the second insulating layer 112, and the third insulating layer 113, respectively, or may be embedded in the first insulating layer 111, the second insulating layer 112, and the third insulating layer 113, respectively.

[0034] The through via 130-1 may include a metal. The metal may include, but is not limited to, copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or an alloy thereof. Preferably, the metal may include, but is not limited to, copper (Cu). The through via 130-1 may include a via conductor 130 filling at least a portion of the through hole h. The via conductor 130 may perform various functions depending on the design. For example, it may include a signal via, a power via, a ground via, etc. The via conductor 130 may be connected to the first conductor layer 121 and the second conductor layer 122, respectively. The through hole h and the via conductor 130 filling it may have a generally hourglass cross-sectional shape in which the width at the upper end connected to the first conductor layer 121 and the width at the lower end connected to the second conductor layer 122 are wider than the width at the center, on a cross section of the through hole h cut in the thickness direction. The center of the through hole (h) may be disposed between the upper and lower surfaces of the glass layer (110). The via conductor (130) may include a seed layer and a plating layer. The seed layer may be formed by electroless plating (e.g., chemical copper), or may be formed by a sputtering process as needed. Alternatively, both may be used. The plating layer may be formed by electrolytic plating (e.g., electrolytic copper). When there are multiple through holes (h), there may also be multiple via conductors (130).

[0035] The first connection via 131 and the second connection via 132 may each include a metal. The metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. Preferably, the metal may include, but is not limited to, copper (Cu). The first connection via 131 and the second connection via 132 may each perform various functions depending on the design. For example, they may include signal vias, power vias, and ground vias. The first connection via 131 and the second connection via 132 may each include a filled via in which a via hole is filled with metal, or, if necessary, a conformal via in which metal is disposed along the wall surface of the via hole. The first connection via 131 and the second connection via 132 may each have a tapered cross section. For example, the first connection via 131 may have a larger upper width than the lower width in cross section, and the second connection via 132 may have a larger upper width than the lower width in cross section. The first connection via 131 and the second connection via 132 may similarly include the seed layer and the plating layer included in the third conductor layer 123 and the fourth conductor layer 124, respectively. There may be a plurality of first connection vias 131 and a plurality of second connection vias 132.

[0036] 4a to 4h are enlarged cross-sectional views schematically illustrating various examples of through vias formed in region A of the printed circuit board of FIG.

[0037] Referring to the drawings, the wall surface of the through hole h may have at least one step region S. From this perspective, the side surface of the through via 130-1 may have at least one step region S. For example, as shown in FIGS. 4a to 4d, on a cross section taken along the thickness direction of the through hole h, the wall surface of the through hole h may have at least one step region S at substantially the same level as the center of the through hole h in the thickness direction. Also, as shown in FIGS. 4e to 4h, on a cross section taken along the thickness direction of the through hole h, the wall surface of the through hole h may have at least one step region S at substantially the same level as each of the boundaries between the upper and lower surfaces of the glass layer 110 and the first insulating layer 111 in the thickness direction. Meanwhile, as shown in FIGS. 4e to 4h, on a cross section taken along the thickness direction of the through hole h, the wall surface of the through hole h may have multiple inner walls with different slopes. For example, a first portion h1 of the wall surface of the through hole h may have four inner walls with different slopes. In this case, the inflection point between the two left inner walls and the inflection point between the two right inner walls may be located at different levels in the thickness direction. Therefore, multiple inner walls may be present in a variety of shapes. The inclination may be an acute angle formed by an inner wall with the upper or lower surface of the first insulating layer 111 or an acute angle formed by an inner wall with the upper or lower surface of the glass layer 110 on a cross section passing through the through hole h in the thickness direction.

[0038] When the wall surface of the through hole (h) has at least one step region (S), it can be effective in dispersing thermal and mechanical stress, for example, by alleviating stress that may occur due to the difference in thermal expansion coefficient between glass and metal, thereby preventing cracks and damage. Furthermore, it can diversify electrical signal paths, improving high-frequency signal characteristics and helping to reduce electromagnetic interference (EMI). This is therefore more beneficial for maintaining signal integrity. It can also alleviate heat generation problems by dispersing heat over a wide area rather than concentrating it in one place, thereby improving reliability at high temperatures. Furthermore, it can increase the electrical contact area, thereby reducing electrical contact resistance and enabling better current transmission. This can be an important factor, especially in applications requiring high currents. It can also provide flexibility in correcting alignment errors during the manufacturing process, thereby improving process adhesion and manufacturing reliability. These technical effects enable the through via (130-1) to be effectively used in electronic devices requiring high performance and reliability and can play an important role in improving performance and mechanical stability in high-frequency and high-current applications.

[0039] In addition, the reliability of the through via 130-1 can be further improved since the contact area between the through via 130-1 and the glass layer 110 and the contact area between the through via 130-1 and the first insulating layer 111 are increased. Meanwhile, if the wall surface of the through hole h has a plurality of inner walls with different inclinations, it is possible to prevent defects in the glass layer 110, such as cracks in the glass layer 110 or microcracks in the glass layer 110, from occurring during the process. Therefore, process safety can be ensured.

[0040] Other details may be substantially the same as those described for the printed circuit board 100A, and therefore, a duplicate description thereof will be omitted.

[0041] FIG. 5 is a cross-sectional view schematically showing another example of a printed circuit board.

[0042] Referring to the drawings, in a printed circuit board 100B according to another example, the glass layer 110 of the printed circuit board 100A according to the above example may further include a via hole v. The via hole v may penetrate between the upper and lower surfaces of the glass layer 110. The first insulating layer 111 may fill at least a portion of the via hole v. A through hole h may be formed in the region where the via hole v is formed. For example, the through hole h may include a first portion h1 penetrating the region of the first insulating layer 111 that fills at least a portion of the via hole v, a second portion h2 penetrating the region of the first insulating layer 111 disposed above the via hole v, and a third portion h3 penetrating the region of the first insulating layer 111 disposed below the via hole v. Therefore, the via conductor 130 may be in contact with the first insulating layer 111 but separated from the glass layer 110. The via hole v may have a shape that substantially corresponds to the shape of the through hole h, but is not limited thereto, and may have different shapes as needed. The printed circuit board 100B can also have substantially the same technical effects as those described above for the printed circuit board 100A. In addition, since the via conductors 130 are formed in the through holes h that penetrate the first insulating layer 111, they can have better adhesion and can be plated more easily. Therefore, the reliability of the through vias 130-2 can be further improved.

[0043] Other details may be substantially the same as those described for the printed circuit board 100A, and a duplicate description thereof will be omitted.

[0044] 6a to 6h are enlarged cross-sectional views schematically illustrating various examples of through vias formed in region B of the printed circuit board of FIG.

[0045] Referring to the drawings, the wall surface of the through hole h may have at least one step region S. From this perspective, the side surface of the through via 130-2 may have at least one step region S. Similarly, the inner wall of the via hole v may also have at least one step region, if necessary. For example, as shown in FIGS. 6a to 6d, on a cross section taken along the thickness direction of the through hole h, the wall surface of the through hole h and the wall surface of the via hole v may each have at least one step region S at substantially the same level as the center of the through hole h in the thickness direction. Also, as shown in FIGS. 6e to 6h, on a cross section taken along the thickness direction of the through hole h, the wall surface of the through hole h may have at least one step region S at substantially the same level as the boundaries between the upper and lower surfaces of the glass layer 110 and the first insulating layer 111 in the thickness direction. Meanwhile, as shown in FIGS. 6e to 6h, on a cross section taken along the thickness direction of the through hole h, the wall surface of the through hole h may have multiple inner walls with different slopes. For example, the first portion h1 of the wall surface of the through hole h may have four inner walls with different slopes. In this case, the inflection point between the two left inner walls and the inflection point between the two right inner walls may be located at different levels in the thickness direction. Therefore, multiple inner walls may be present in a variety of shapes. The slope may be an acute angle formed by an inner wall with the upper or lower surface of the first insulating layer 111 on a cross section passing through the through hole h in the thickness direction, or an acute angle formed by an inner wall with the surface of the first insulating layer 111 in the step region S.

[0046] When the wall surface of the through hole (h) has at least one step region (S), it can be effective in dispersing thermal and mechanical stresses, for example, by alleviating stress that may occur due to the difference in thermal expansion coefficient between glass and metal, thereby preventing cracks and damage. Furthermore, it can diversify electrical signal paths, improving high-frequency signal characteristics and helping to reduce electromagnetic interference (EMI). This is therefore more advantageous in maintaining signal integrity. It also allows heat to be dispersed over a wide area rather than concentrated in one place, alleviating overheating issues and improving reliability at high temperatures. Furthermore, it can increase the electrical contact area, thereby reducing electrical contact resistance and enabling better current transmission. This can be an important factor, especially in applications requiring high currents. It can also provide flexibility in correcting alignment errors during the manufacturing process, thereby improving process adhesion and manufacturing reliability. These technical effects enable the through via (130-2) to be effectively used in electronic devices requiring high performance and reliability and can play an important role in improving performance and mechanical stability in high-frequency or high-current applications.

[0047] Furthermore, the reliability of the through via 130-2 can be further improved since the contact area between the through via 130-2 and the first insulating layer 111 is increased. Meanwhile, if the wall surface of the through hole h has a plurality of inner walls with different inclinations, it is possible to prevent defects in the glass layer 110, such as cracks in the glass layer 110 or microcracks in the glass layer 110, from occurring during the process. Therefore, process safety can be ensured.

[0048] Other details may be substantially the same as those described for the printed circuit boards 100A and 100B, and therefore, a duplicate description thereof will be omitted.

[0049] In the present disclosure, the term "cover" may refer to not only completely covering but also at least partially covering, and may also refer to not only directly covering but also indirectly covering. Furthermore, the term "fill" may refer not only completely filling but also at least partially filling, and may also refer to substantially filling. For example, it may refer to the presence of some gaps or voids. Furthermore, the term "surround" may refer not only completely surrounding but also partially surrounding and substantially surrounding. Furthermore, the term "exposing" may refer not only completely exposing but also partially exposing, and "exposing" may refer to exposing a corresponding component from being buried. For example, "exposing a pad through an opening" may refer to exposing the pad from a resist layer, and a surface treatment layer or the like may be further disposed on the exposed pad.

[0050] In the present disclosure, being placed in a through-hole or a penetrating portion does not only mean that the object is placed completely in the through-hole or penetrating portion, but also that the object partially protrudes upward or downward in cross section. For example, the object can be interpreted in a broader sense when it is placed in the through-hole or penetrating portion on a plane.

[0051] In the present disclosure, "substantially" can be determined to include process errors, positional deviations, measurement errors, and the like that occur during the manufacturing process. For example, "substantially perpendicular" can include not only perfectly perpendicular but also roughly perpendicular. Furthermore, "substantially coplanar" can include not only being on the same plane but also being roughly on the same plane. Furthermore, "substantially corresponding shapes" can include not only being exactly the same shape but also being roughly the same shape.

[0052] In the present disclosure, the same insulating material may refer not only to the completely same insulating material but also to the same type of insulating material, and therefore, the compositions of the insulating materials are substantially the same, but the specific composition ratios thereof may vary slightly.

[0053] In this disclosure, for convenience, terms such as bottom, lower part, and bottom surface are used to refer to the downward direction based on the cross section of the drawing, and terms such as top, upper part, and top surface are used to refer to the opposite direction. However, this is a definition of directions for convenience of explanation, and the scope of the claims is not particularly limited by the description of these directions, and the concepts of top and bottom can be changed at any time.

[0054] In this disclosure, the term "connected" encompasses not only direct connection but also indirect connection via an adhesive layer, etc. Furthermore, the term "electrically connected" encompasses both physical connection and non-physical connection. Furthermore, terms such as "first" and "second" are used to distinguish one component from another and do not limit the order and / or importance of the components. In some cases, a first component may be referred to as a second component, and similarly, a second component may be referred to as a first component, without departing from the scope of the invention.

[0055] In the present disclosure, thickness, width, length, depth, line width, spacing, pitch, separation distance, surface roughness, etc. can be measured using a scanning microscope or optical microscope based on a cross section obtained by polishing or cutting a printed circuit board. The cut section can be a vertical or horizontal section, and each value can be measured based on the required cut section. For example, the width of the upper and / or lower ends of a via can be measured on a cross section cut along the central axis of the via. In this case, if the value is not constant, the value can be determined as the average of values ​​measured at any five points.

[0056] The term "one example" used in this disclosure does not mean the same embodiment as the other examples, but is provided to emphasize and describe the unique features that are different from each other. However, the above-described one example does not exclude being realized in combination with the features of another example. For example, even if a matter described in a particular example is not described in another example, it can be understood as being related to the other example unless there is a contrary or contradictory description with that matter in the other example.

[0057] The terms used in this disclosure are merely used to describe an example and are not intended to limit the disclosure. In this case, singular expressions include plural expressions unless the context clearly indicates otherwise. [Explanation of symbols]

[0058] 1000 electronic equipment 1010 mainboard 1020 Chip related parts 1030 Network related parts 1040 Other parts 1050 camera 1060 Antenna 1070 display 1080 battery 1090 signal line 1100 smartphones 1110 motherboard 1120 parts 1121 Parts Package 1130 Camera Module 1140 Speaker 100A, 100B printed circuit board 110 Glass Layer 111, 112, 113 Insulating layer 114, 115 Resist layer 118 frames 130 via conductor 130-1, 130-2 Through via 121, 122, 123, 124 Conductor layers 131, 132 Connection vias H Penetration h Through hole v Beer Hall o1, o2 opening

Claims

1. A glass layer; a first insulating layer covering the upper and lower surfaces of the glass layer; a first conductor layer disposed on an upper surface of the first insulating layer; a second conductor layer disposed on a lower surface of the first insulating layer; a through hole penetrating between the first conductor layer and the second conductor layer; a through via disposed in the through hole and including a via conductor connected to the first conductor layer and the second conductor layer, A printed circuit board, wherein a wall surface of the through hole has at least one stepped region.

2. On a cross section taken through the through hole in the thickness direction, a width of the through hole at an upper end connected to the first conductor layer and a width of the through hole at a lower end connected to the second conductor layer are each larger than a width of the through hole at a center portion; The printed circuit board of claim 1 , wherein a center of the through hole is disposed between the upper and lower surfaces of the glass layer.

3. The printed circuit board according to claim 2 , wherein a wall surface of the through hole has the at least one step region at the same level as the center portion with respect to the thickness direction.

4. 3. The printed circuit board according to claim 2, wherein a wall surface of the through hole has the at least one step region at the same level as a boundary between the upper surface of the glass layer and the first insulating layer and a boundary between the lower surface of the glass layer and the first insulating layer, based on the thickness direction.

5. The printed circuit board according to claim 2 , wherein the through-hole has a wall surface having a plurality of inner walls with different inclinations.

6. a portion of the wall of the through hole that penetrates between the upper surface and the lower surface of the glass layer has four inner walls having different inclinations from one another; 6. The printed circuit board of claim 5, wherein an inflection point between two left inner walls and an inflection point between two right inner walls among the four inner walls are disposed at different levels in the thickness direction.

7. The printed circuit board of claim 1 , wherein the first insulating layer further covers a side surface of the glass layer.

8. further comprising a frame having a penetration; At least a portion of the glass layer is disposed within the through-hole, the first insulating layer further covers the upper and lower surfaces of the frame; The printed circuit board of claim 7 , wherein the first insulating layer fills at least a portion of the through hole.

9. 2. The printed circuit board of claim 1, wherein the through hole includes a first portion that penetrates the glass layer, a second portion that penetrates a region of the first insulating layer that covers an upper surface of the glass layer, and a third portion that penetrates a region of the first insulating layer that covers a lower surface of the glass layer.

10. At least a portion of the via conductor is in contact with the glass layer; The printed circuit board of claim 9 , wherein at least another portion of the via conductor contacts the first insulating layer.

11. the glass layer has a via hole penetrating the glass layer; the first insulating layer fills at least a portion of the via hole; 2. The printed circuit board of claim 1, wherein the through hole includes a first portion that penetrates a region of the first insulating layer that fills at least a portion of the via hole, a second portion that penetrates a region of the first insulating layer that is located above the via hole, and a third portion that penetrates a region of the first insulating layer that is located below the via hole.

12. The printed circuit board of claim 11 , wherein the via conductor contacts the first insulating layer but is spaced apart from the glass layer.

13. a second insulating layer disposed on an upper surface of the first insulating layer and covering at least a portion of the first conductor layer; a third insulating layer disposed on a lower surface of the first insulating layer and covering at least a portion of the second conductor layer; a third conductor layer disposed on an upper surface of the second insulating layer; a fourth conductor layer disposed on the lower surface of the third insulating layer; a first connection via that penetrates at least a portion of the second insulating layer and connects at least a portion of the first and third conductor layers to each other; The printed circuit board of claim 1 , further comprising: a second connection via that penetrates at least a portion of the third insulating layer and connects at least a portion of each of the second and fourth conductor layers to each other.

14. a first passivation layer disposed on an upper surface of the second insulating layer and having a plurality of first openings each exposing at least a portion of the third conductor layer; 14. The printed circuit board of claim 13, further comprising: a second passivation layer disposed on the lower surface of the third insulating layer and having a plurality of second openings each exposing at least a portion of the fourth conductor layer.

15. an insulating layer; a glass layer embedded in the insulating layer; a first conductor layer disposed on an upper surface of the insulating layer; a second conductor layer disposed on the lower surface of the insulating layer; a through via that penetrates one or more of the insulating layer and the glass layer between the first conductor layer and the second conductor layer and connects the first conductor layer and the second conductor layer to each other, A printed circuit board, wherein a side of the through via has at least one stepped region.

16. a frame at least partially embedded in the insulating layer and having a through-hole through which at least a portion of the glass layer is disposed; 16. The printed circuit board of claim 15, wherein the insulating layer fills at least a portion of the space between the frame and the glass layer.

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