Thin film transistor manufacturing method
The UV irradiation of metal oxide semiconductor layers in an oxygen-rich atmosphere at low temperatures addresses the limitations of high-temperature heat treatment in TFT manufacturing, enabling flexible TFTs with improved electrical properties and substrate versatility.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-08-28
- Publication Date
- 2026-03-12
AI Technical Summary
Existing thin film transistor (TFT) manufacturing methods using amorphous oxide semiconductors face limitations due to the need for high-temperature heat treatment, which restricts the use of flexible plastic substrates and involves harmful gases like ozone, complicating equipment and affecting electrical properties.
A method involving the irradiation of a metal oxide semiconductor layer with ultraviolet light in an oxygen-rich atmosphere at low temperatures, eliminating the need for heat treatment and harmful gases, thereby enabling the use of plastic substrates and improving electrical properties.
This method produces TFTs with excellent electrical characteristics and flexibility, suitable for various substrates without thermal history and harmful gases, enhancing their applicability to flexible devices.
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Abstract
Description
[Technical Field]
[0001] The present disclosure relates to a method for manufacturing a thin film transistor. [Background technology]
[0002] Amorphous oxide semiconductors have attracted attention as materials for thin film transistors (TFTs) used in displays because of their high field-effect mobility and mechanical flexibility. Because this material can be produced at relatively low temperatures, it is expected to be used in flexible devices by forming it directly on a plastic substrate, particularly as a flexible TFT for flexible displays. However, immediately after deposition, atomic defects within the thin film cannot be eliminated even if the deposition conditions are precisely controlled, resulting in problems such as undesirable phenomena remaining in the electrical characteristics of the TFT, such as hysteresis and humps. To address this issue, heat treatment has traditionally been used to remove these defects, successfully achieving ideal TFT characteristics. However, because heat treatment is usually carried out at temperatures above 300°C, the substrate is limited to heat-resistant glass, and the mechanical flexibility of amorphous oxides cannot be fully utilized, which has been cited as an issue. Therefore, a method for manufacturing TFTs with high electrical properties has been reported, which combines low-temperature heat treatment at 150° C. with ultraviolet irradiation (Non-Patent Document 1). Furthermore, Patent Document 1 discloses a process of converting a metal oxide precursor film prepared from a solution into a metal oxide film by irradiating it with ultraviolet light (Patent Document 1). Similarly, Patent Document 2 also discloses a TFT manufacturing process in which a semiconductor film made from a solution is irradiated with ultraviolet light (Patent Document 2).
[0003] On the other hand, Patent Document 3 discloses a manufacturing process for a TFT in which short-wavelength light or high-energy particles are irradiated onto a desired location of an oxide semiconductor film (Patent Document 3). Furthermore, Patent Document 4 discloses a manufacturing process for a TFT in which a semiconductor layer formed by sputtering is irradiated with ultraviolet light in an ozone atmosphere. [Prior art documents] [Patent documents]
[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2015-111627 [Patent Document 2] International Publication No. 2018-074607 [Patent Document 3] Japanese Patent Application Laid-Open No. 2007-073699 [Patent Document 4] Japanese Patent Application Laid-Open No. 2013-041944 [Non-patent literature]
[0005] [Non-Patent Document 1] Yong-Hoon Kim, et al., Nature, volume 489, 128-132(2012) Summary of the Invention [Problem to be solved by the invention]
[0006] In both Patent Documents 1 and 2, the process involves a heat treatment as a prerequisite, and therefore there remains a problem that restrictions are imposed on the selection of plastic substrates for manufacturing flexible devices. In addition, in the invention described in Patent Document 3, the irradiation area is limited to the source / drain electrode area, and the purpose is to reduce the contact resistance associated with increasing the conductivity of the semiconductor film in the electrode area. Furthermore, in the invention described in Patent Document 4, ozone is harmful to the human body, and since corona discharge is used to generate ozone, the entire manufacturing equipment becomes a complicated system.
[0007] Considering the above-mentioned conventional techniques, there was a strong demand for the development of a manufacturing method for unheated TFTs that does not limit the type of flexible substrate, in order to effectively utilize the flexibility of amorphous oxide TFTs. Furthermore, there was a demand for a manufacturing method that does not use ozone and can be processed using conventional equipment configurations.
[0008] The present disclosure has been made in consideration of the above circumstances. The problem to be solved by the embodiments of the present disclosure is to provide a method for manufacturing a thin film transistor that has little thermal history, does not use gases that are harmful to the human body, and has excellent electrical properties. [Means for solving the problem]
[0009] Specific means for solving the above problems include the following aspects. <1> A method for manufacturing a thin film transistor, comprising the steps of: forming a semiconductor layer containing a metal oxide on a substrate; and irradiating the semiconductor layer with ultraviolet light in an atmosphere containing 25% or more by volume of oxygen at a substrate temperature of 50°C or lower. <2> The semiconductor layer is made of at least one metal oxide selected from the group consisting of indium oxide, boron-doped indium oxide, indium tin oxide, InGaZnO, InZnO, InGaO, InSnZnO, InSiO, ZnO, AlZnO, BZnO, tin oxide, fluorine-doped tin oxide, and titanium oxide. <1> 10. A method for manufacturing the thin film transistor according to claim 9. <3> The semiconductor layer is made of boron-doped indium oxide. <1> or <2> 10. A method for manufacturing the thin film transistor according to claim 9. <4> The substrate is a plastic substrate. <1> ~ <3> 10. A method for manufacturing a thin film transistor according to any one of claims 1 to 9. <5> The irradiation step is carried out in an atmosphere containing 50% by volume or more of oxygen. <1> ~ <4> 10. A method for manufacturing a thin film transistor according to any one of claims 1 to 9. <6> The irradiation step is carried out in an oxygen atmosphere. <1> ~ <5> 10. A method for manufacturing a thin film transistor according to any one of claims 1 to 9. <7> In the irradiation step, the irradiation is performed at a substrate temperature of 0°C to 40°C. <1> ~ <6> 10. A method for manufacturing a thin film transistor according to any one of claims 1 to 9. <8> In the irradiating step, the irradiation time is 10 minutes to 45 minutes. <1> ~ <7> 10. A method for manufacturing a thin film transistor according to any one of claims 1 to 9. <9> The concentration ratio of the metal-oxygen bond component in the semiconductor layer in the obtained thin film transistor is 30 atomic % to 80 atomic % with respect to the entire semiconductor layer. <1> ~ <8> 10. A method for manufacturing a thin film transistor according to any one of claims 1 to 9. <10> The concentration ratio of oxygen vacancy components in the semiconductor layer in the obtained thin film transistor is 20 atomic % to 50 atomic % with respect to the entire semiconductor layer. <1> ~ <9> 10. A method for manufacturing a thin film transistor according to any one of claims 1 to 9. <11> The concentration ratio of the adsorbed oxygen component in the semiconductor layer in the obtained thin film transistor is 0 atomic % to 25 atomic % with respect to the entire semiconductor layer. <1> ~ <10> 10. A method for manufacturing a thin film transistor according to any one of claims 1 to 9. <12> The film density of the semiconductor layer in the obtained thin film transistor was 6.40 g / cm 3 ~6.90g / cm 3 is <1> ~ <11> 10. A method for manufacturing a thin film transistor according to any one of claims 1 to 9. [Effects of the Invention]
[0010] According to the present disclosure, a method for manufacturing a thin film transistor with excellent electrical characteristics is provided, with little thermal history and without using gases harmful to the human body. [Brief explanation of the drawings]
[0011] [Figure 1] FIG. 1 is a schematic cross-sectional view of a TFT having a back gate structure. [Figure 2] FIG. 1 is a schematic cross-sectional view of a TFT having a top gate structure. [Figure 3] FIG. 1 is a schematic cross-sectional view of a TFT having a bottom gate structure. [Figure 4] 1 is a graph showing the transfer characteristics of the TFT fabricated in Example 1. [Figure 5] 10 is a graph showing the transfer characteristics of a TFT fabricated in Comparative Example 1. [Figure 6] 10 is a graph showing the transfer characteristics of a TFT fabricated in Comparative Example 2. [Figure 7] 10 is a graph showing the transfer characteristics of a TFT fabricated in Comparative Example 3. [Figure 8] 10 is a graph plotting changes in the width of the hysteresis window extracted from the TFT characteristics when ultraviolet light is irradiated for 0 to 60 minutes in Example 3 and Comparative Example 4. [Figure 9] 10 is a graph plotting changes in field-effect mobility extracted from TFT characteristics when ultraviolet light is irradiated for 60 minutes in Example 3 and Comparative Example 4. DETAILED DESCRIPTION OF THE INVENTION
[0012] Hereinafter, the present disclosure will be described in detail with reference to embodiments. In the present disclosure, a numerical range expressed using "to" means a range that includes the numerical values before and after "to" as the lower and upper limits. In the numerical ranges described in the present disclosure, the upper or lower limit of the numerical range may be replaced with values shown in the examples. In the present disclosure, when there are multiple substances corresponding to each component, the content of each component means the total amount of the multiple substances, unless otherwise specified. In the present disclosure, the term "process" includes not only an independent process but also a process that cannot be clearly distinguished from other processes as long as the intended purpose of the process is achieved.
[0013] (Method of manufacturing thin film transistor) A method for manufacturing a thin film transistor according to the present disclosure includes the steps of forming a semiconductor layer containing a metal oxide on a substrate, and irradiating the semiconductor layer with ultraviolet light in an atmosphere containing 25% or more by volume of oxygen at a substrate temperature of 50°C or less.
[0014] The method for manufacturing a thin film transistor according to the present disclosure includes a step of irradiating a semiconductor layer containing a metal oxide with ultraviolet light in an atmosphere containing 25% or more by volume of oxygen at a substrate temperature of 50°C or less. This presumably reduces oxygen vacancies in the metal oxide in the semiconductor layer without heating or using gases that are harmful to the human body, thereby producing a thin film transistor with excellent electrical properties. Furthermore, the method for manufacturing a thin film transistor according to the present disclosure has little thermal history, and therefore, a plastic substrate that is vulnerable to heat can be suitably used as the substrate.
[0015] <Semiconductor layer formation process> The method for manufacturing a thin film transistor according to the present disclosure includes a step of forming a semiconductor layer containing a metal oxide on a substrate (also referred to as a "semiconductor layer forming step"). The semiconductor layer containing a metal oxide may be, for example, a semiconductor layer containing indium oxide as a main component, such as indium oxide, indium tin oxide (ITO), boron-doped indium oxide (IBO), InGaZnO, InZnO, InGaO, InSnZnO, or InSiO; a semiconductor layer containing zinc oxide as a main component, such as ZnO, AlZnO, or BZnO; a semiconductor layer containing tin oxide as a main component, such as tin oxide or fluorine-doped tin oxide (FTO); or a semiconductor layer containing titanium oxide as a main component. Among these, from the viewpoint of electrical properties, those containing indium oxide as the main component (that is, containing 50 mass % or more of components other than oxygen atoms) are preferred, and boron-doped indium oxide (IBO) is particularly preferred. The semiconductor layer is preferably a semiconductor layer made of a metal oxide.
[0016] The thickness and shape of the semiconductor layer are not particularly limited and can be appropriately selected depending on the structure of the TFT to be fabricated.
[0017] Furthermore, the semiconductor layer can be formed not only from thin films prepared using a vacuum apparatus such as conventional sputtering or vacuum deposition, but also from thin films formed by solution processes such as inkjet, spin coating, or spray coating, or from thin films prepared by atomic layer deposition. In the examples, an indium oxide thin film prepared by sputtering was used, but the preparation conditions are not limited to this.
[0018] The substrate used in the present disclosure may be silicon, inorganic substrates such as glass, quartz, sapphire, and yttrium-stabilized zirconia, metal foils such as aluminum, copper, and stainless steel, resin substrates, or composite materials thereof. Among these, plastic substrates are preferred from the viewpoints of lightness and flexibility. Examples of plastic substrates that can be used include, but are not limited to, acrylic resin, polycarbonate, polystyrene, polyethylene sulfide, polyethersulfone, polyolefin, polyethylene terephthalate, polyethylene naphthalate, cycloolefin polymer, polyethersulfone, triacetyl cellulose, polyvinyl fluoride film, ethylene-tetrafluoroethylene copolymer resin, glass fiber reinforced acrylic resin film, glass fiber reinforced polycarbonate, transparent polyimide, fluorine-based resin, and cyclic polyolefin resin. These can be used alone or as composite substrates in which two or more types are laminated. Substrates having a resin layer such as a color filter on a glass or plastic substrate can also be used. If necessary, an insulating layer may be provided on the substrate, and known insulating layers can be used.
[0019] The method for manufacturing a thin film transistor according to the present disclosure may also include a step of cleaning the substrate. The method for cleaning the substrate is not limited to organic cleaning using acetone and isopropanol, but a dry cleaning method using plasma or a wet process such as RCA cleaning can also be used.
[0020] <Irradiation process> The method for manufacturing a thin film transistor according to the present disclosure includes a step of irradiating the semiconductor layer with ultraviolet light in an atmosphere containing 25% by volume or more of oxygen at a substrate temperature of 50° C. or less (also referred to as an "irradiation step"). The atmosphere in the irradiation step may contain 25% by volume or more of oxygen, but from the viewpoint of improving the electrical properties and the oxidation rate of the pores, it is preferable that it contains 50% by volume or more of oxygen, more preferably 80% by volume or more of oxygen, and particularly preferably 100% by volume of oxygen, i.e., an oxygen atmosphere. The gas other than oxygen in the atmosphere is not particularly limited, but is preferably an inert gas such as nitrogen or argon. The irradiation step may be carried out under atmospheric pressure or under reduced pressure, but is preferably carried out under atmospheric pressure from the viewpoint of improving the oxidation rate of the pores.
[0021] The substrate temperature in the irradiation step may be 50°C or less, but from the viewpoints of suppressing thermal history, convenience, and electrical properties, it is preferably 40°C or less, more preferably 0°C to 40°C, and particularly preferably 10°C to 35°C.
[0022] The irradiation time of ultraviolet light in the irradiation step is preferably 1 minute to 120 minutes, more preferably 5 minutes to 60 minutes, and particularly preferably 10 minutes to 45 minutes, from the viewpoint of electrical properties, particularly hysteresis width.
[0023] The ultraviolet light to be irradiated in the irradiation step is not particularly limited, but preferably has a wavelength of 365 nm or more. As for the ultraviolet irradiating means, for example, in the examples, a Deep UV lamp with a central wavelength of 365 nm (USHIO Spot UV Irradiation Device, SP7-250, manufactured by USHIO INC.) was used, but the present invention is not limited to this, and other lamps such as excimer lamps, deuterium lamps, low-pressure mercury lamps, high-pressure mercury lamps, ultra-high-pressure mercury lamps, metal halide lamps, helium lamps, carbon arc lamps, cadmium lamps, and electrodeless discharge lamps can also be used.
[0024] <Other processes> The method for manufacturing a thin film transistor according to the present disclosure may include other steps in addition to those described above. Examples of other steps include known steps, specifically, for example, a step of forming a gate electrode, a step of forming a source electrode, a step of forming a drain electrode, a step of forming an insulating layer, a step of forming a protective layer, etc. There are no particular limitations on the thickness and shape of the gate electrode, source electrode, drain electrode, insulating layer and protective layer, and they can be appropriately selected depending on the structure of the TFT to be fabricated.
[0025] The source and drain electrodes are not limited to Ti, but can also be made of metals such as Mo, Al, Cu, Au, Pt, Ag, and Ni, transparent conductive films such as ITO, and conductive polymers such as PEDOT:PSS (Poly(3,4-EthyleneDiOxyThiophene) / Poly(4-StyreneSulfonate)). Furthermore, the method of formation is not limited to sputtering, and it is also possible to produce it using other vacuum equipment such as a vacuum deposition method, or to form it by an inkjet method using a solution or gel-like metallic liquid.
[0026] The structure of the thin film transistor (TFT) in this disclosure is not limited to a back-gate structure using a silicon substrate as the gate electrode, and commonly known top-gate and bottom-gate TFT structures can also be used. In this case, the gate electrode can be made of metals, transparent conductive films, or conductive polymers, as described above for the source and drain electrodes. Furthermore, commonly known materials such as silicon oxide and silicon nitride can be used as the gate insulating film, as well as combinations of these materials (including stacked structures), or insulating films with a high dielectric constant, known as high-k materials. These films can be formed using conventional vacuum processes such as sputtering and vacuum deposition, as well as thin films formed by solution processes such as inkjet, spin coating, and spray coating, and thin films formed by atomic layer deposition. While the patterning for TFT fabrication was performed using a metal mask in this study, it is not limited to this method, and well-known conventional microfabrication techniques such as photolithography, etching, and lift-off can also be used.
[0027] FIG. 1 is a schematic cross-sectional view of a TFT with a back gate structure. 1, an insulating layer 12 is provided on a substrate 20, and source / drain electrodes 14 and 16 and a semiconductor layer 18 are provided thereon. A gate electrode (not shown) is provided on a part of the insulating layer 12. In the TFT 10 having such a structure, ultraviolet light can be irradiated after the semiconductor layer 18 is formed or after the source and drain electrodes 14, 16 are formed. Furthermore, ultraviolet irradiation can be carried out both after the semiconductor layer 18 is formed and after the source and drain electrodes 14, 16 are formed.
[0028] FIG. 2 is a schematic cross-sectional view of a TFT with a top gate structure. 2, source and drain electrodes 14, 16 and a semiconductor layer 18 are provided on a substrate 20, and an insulating layer 12 is provided thereon. A gate electrode 22 is provided on the insulating layer 12. In a TFT 10 having such a structure, ultraviolet irradiation can be performed after the semiconductor layer 18 is fabricated, or after the source and drain electrodes 14, 16 are formed, or after the insulating film 12 that transmits ultraviolet light is formed, or after the gate electrode 22 that transmits ultraviolet light is formed. Furthermore, ultraviolet irradiation can be carried out after a combination of two or more of the steps or after all of the steps.
[0029] FIG. 3 is a schematic cross-sectional view of a TFT having a bottom gate structure. 3, a gate electrode 22 is provided on a substrate 20, and an insulating layer 12 is provided so as to cover the upper part of the gate electrode 22. Furthermore, source and drain electrodes 14 and 16 and a semiconductor layer 18 are provided on the insulating layer 12. In a TFT 10 having such a structure, ultraviolet irradiation can be performed either after the semiconductor layer 18 is fabricated, or after the source and drain electrodes 14, 16 are formed, or after a protective layer (not shown) that transmits ultraviolet light is formed. Furthermore, ultraviolet irradiation can be carried out after a combination of two or more of the steps or after all of the steps.
[0030] In the thin film transistor obtained by the thin film transistor manufacturing method according to the present disclosure, the concentration ratio of the metal-oxygen bond component in the semiconductor layer is preferably 20 atomic % to 90 atomic %, and more preferably 30 atomic % to 80 atomic %, from the viewpoint of electrical properties. In the thin film transistor obtained by the thin film transistor manufacturing method according to the present disclosure, the concentration ratio of oxygen vacancy components in the semiconductor layer is preferably 10 atomic % to 60 atomic %, and more preferably 20 atomic % to 50 atomic %, from the viewpoint of electrical properties. In the thin film transistor obtained by the thin film transistor manufacturing method according to the present disclosure, the concentration ratio of the adsorbed oxygen component in the semiconductor layer is preferably 0 atomic % to 35 atomic %, and more preferably 0 atomic % to 25 atomic %, from the viewpoint of electrical properties.
[0031] The chemical bonding state of the semiconductor layer (concentration ratio of metal-oxygen bond components, concentration ratio of oxygen vacancy components, and concentration ratio of adsorbed oxygen components) can be measured using an X-ray photoelectron spectrometer (XPS, JEOL JPS9030 manufactured by JEOL Ltd.).
[0032] In the thin film transistor obtained by the thin film transistor manufacturing method according to the present disclosure, the film density of the semiconductor layer is 6.20 g / cm from the viewpoint of electrical properties. 3 ~7.10g / cm 3 Preferably, it is 6.40 g / cm 3 ~6.90g / cm 3 It is more preferable that:
[0033] The film density of the semiconductor layer can be measured and calculated using an X-ray reflectometer (XRR, Rigaku Smart Lab manufactured by Rigaku Corporation).
[0034] The thin-film transistor obtained by the thin-film transistor manufacturing method according to the present disclosure can be manufactured by a non-heat-treated, highly stable amorphous oxide TFT without using gases that are harmful to the human body, and therefore can provide TFTs that are not limited by the type of flexible substrate, as well as applications using such TFTs, such as displays, solar cells, touch panel sensors, image sensors, and gas sensors. Furthermore, thin-film transistors obtained by the thin-film transistor manufacturing method according to the present disclosure can be used not only for flexible devices but also in the manufacturing processes of DRAMs, CMOSs, active matrix elements, and the like, which are made using amorphous oxide semiconductors, making it possible to provide an energy-saving, environmentally friendly manufacturing method that does not involve heating. [Example]
[0035] Hereinafter, the present disclosure will be described in detail based on specific examples, but the present disclosure is not limited thereto.
[0036] Example 1 A 15-nm boron-doped indium oxide semiconductor layer was formed on a SiO2 (200 nm) / Si substrate that had been ultrasonically cleaned in acetone and isopropanol using a radio frequency (RF) magnetron sputtering system (Canon Anelva Corporation, L-332SFH) through a metal mask. The sputtering conditions were a total pressure of 0.16 Pa, an Ar flow rate of 8.5 sccm, an oxygen flow rate of 1.5 sccm, and an RF power of 100 W. Next, Ti (50 nm) was deposited as source and drain electrodes using an RF magnetron sputtering system, and a back-gate TFT was fabricated using the Si substrate as the gate electrode. The source and drain electrodes were patterned using a metal mask. The sputtering conditions were a total pressure of 0.5 Pa, an Ar flow rate of 16 sccm, and an RF power of 50 W. The fabricated TFT was sealed in a quartz tube, evacuated, and then filled with 100% oxygen by volume. The TFT was then irradiated with ultraviolet light (center wavelength 365 nm) for 15 minutes at a substrate temperature of 25°C. The TFT characteristics before and after UV irradiation were measured at room temperature, in the air, and in a light-shielded environment using a source-measure unit (Agilent B2902A, manufactured by Agilent) connected to a manual prober. The chemical bonding state of the semiconductor layer was measured using an X-ray photoelectron spectrometer (XPS, JEOL JPS9030 manufactured by JEOL Ltd.). The film density of the semiconductor layer was evaluated using an X-ray reflectometer (XRR, Rigaku Smart Lab, manufactured by Rigaku Corporation).
[0037] Figure 4 shows the transfer characteristics of the TFT fabricated by the above process. The vertical axis of Figure 4 is the drain current (I D , unit A), and the horizontal axis represents the gate voltage (V G , unit V), and V D represents the drain voltage (unit: V). The metal-oxygen bond component estimated from the O1s separated spectrum in the XPS measurement was 60 atomic %, the oxygen vacancy component was 35 atomic %, and the adsorbed oxygen component was 5 atomic %. The film density measured by XRR was 6.61 g / cm. 3 It was.
[0038] (Comparative Example 1) In the TFT manufacturing process, the irradiation step is -2 The same procedure as in Example 1 was carried out except that UV irradiation was carried out in a vacuum of 0.5 Pa for 15 minutes. Figure 5 shows the transfer characteristics of the fabricated TFT. The vertical axis of Figure 5 is the drain current (I D , unit A), and the horizontal axis represents the gate voltage (V G , unit V), and V D represents the drain voltage (unit: V). As shown in Figure 5, the gate voltage ranged from ±40V, resulting in metallic characteristics with no on / off switching.
[0039] (Comparative Example 2) The TFT fabrication process was carried out in the same manner as in Example 1, except that in the irradiation process, UV irradiation was carried out in the atmosphere for 15 minutes. Figure 6 shows the transfer characteristics of the fabricated TFT. The vertical axis of Figure 6 represents the drain current (I D , unit A), and the horizontal axis represents the gate voltage (V G , unit V), and V D represents the drain voltage (unit: V). As shown in Figure 6, although on / off operation was observed, a hump phenomenon was observed at a gate voltage of around 20V.
[0040] (Comparative Example 3) The TFT fabrication process was carried out in the same manner as in Example 1, except that in the irradiation process, UV irradiation was carried out for 15 minutes in the atmosphere using an excimer lamp (USHIOSUS713 manufactured by Ushio Inc.) with a central wavelength of 172 nm. Figure 7 shows the transfer characteristics of the fabricated TFT. The vertical axis of Figure 7 is the drain current (I D , unit A), and the horizontal axis represents the gate voltage (V G , unit V), and V D represents the drain voltage (unit: V). As shown in Figure 7, although on / off operation was observed, a significant hump phenomenon was observed at a gate voltage of around 30 V.
[0041] Example 2 A TFT was fabricated in the same manner as in Example 1, except that the substrate was changed to a polyethylene terephthalate substrate. The fabricated TFT had good electrical characteristics similar to those of Example 1.
[0042] (Example 3, Comparative Example 4) A TFT was fabricated in the same manner as in Example 1, except that the atmosphere and irradiation time were changed in the irradiation step.
[0043] FIG. 8 shows the width of the hysteresis window (V) extracted from the TFT characteristics when ultraviolet light was irradiated for 0 to 60 minutes in an oxygen atmosphere (O2, Example 3) and in the air (Air, Comparative Example 4). hys The vertical axis of Figure 8 is the width of the hysteresis window (V hys The horizontal axis represents exposure times (unit: seconds (s)). While hysteresis remains in the air, it is significantly reduced in the oxygen atmosphere. hys was estimated from the rise width of the current in the transfer characteristics.
[0044] FIG. 9 shows the field-effect mobility (μ) extracted from the TFT characteristics when ultraviolet light was irradiated for 60 minutes in an oxygen atmosphere (O2, Example 3) and in the air (Air, Comparative Example 4). FE ) is plotted on the vertical axis of FIG. FE , unit cm 2 / Vs), and the horizontal axis represents exposure times (unit: seconds (s)). In air, it was constant with respect to the irradiation time, but in oxygen atmosphere, it improved. FE was calculated using the following formula (1).
[0045]
number
[0046] In formula (1), I D is the drain current, VG is the gate current, L is the channel length, W is the channel width, C i is the gate capacitance, V D represents the drain voltage.
[0047] From the above results, when we focus on the XPSO1s spectrum of the oxide semiconductor thin film, we can see that the metal-oxygen bond component increases and the oxygen vacancy component decreases with UV irradiation, which suggests that the weakly bonded oxygen bonds that cause hysteresis are promoted. UV irradiation in a vacuum promoted the desorption of weakly bound oxygen atoms, resulting in an increase in electron density and metallic properties that did not switch on or off, which is consistent with the results of XPS measurements showing an increase in oxygen vacancies. On the other hand, the oxygen concentration contributing to oxygen bonding is low when exposed to ultraviolet light in the atmosphere, so it is thought that the amount of oxygen that forms metal-oxygen bonds is insufficient. hys Since the reduction in oxygen was insufficient, it was assumed that weakly bonded oxygen remained, and in fact, when the oxygen vacancy components of the semiconductor thin film were compared immediately after fabrication, they were found to be at the same level.
Claims
1. forming a semiconductor layer comprising a metal oxide on a substrate; and irradiating the semiconductor layer with ultraviolet light in an atmosphere containing 25% by volume or more of oxygen and at a substrate temperature of 50° C. or less. A method for manufacturing a thin film transistor.
2. 2. The method for manufacturing a thin film transistor according to claim 1, wherein the semiconductor layer is made of at least one metal oxide selected from the group consisting of indium oxide, boron-doped indium oxide, indium tin oxide, InGaZnO, InZnO, InGaO, InSnZnO, InSiO, ZnO, AlZnO, BZnO, tin oxide, fluorine-doped tin oxide, and titanium oxide.
3. 2. The method for manufacturing a thin film transistor according to claim 1, wherein the semiconductor layer is made of boron-doped indium oxide.
4. 2. The method for manufacturing a thin film transistor according to claim 1, wherein the substrate is a plastic substrate.
5. 2. The method for manufacturing a thin film transistor according to claim 1, wherein the irradiating step is carried out in an atmosphere containing 50% by volume or more of oxygen.
6. The method for manufacturing a thin film transistor according to claim 1 , wherein the irradiating step is carried out in an oxygen atmosphere.
7. 2. The method for manufacturing a thin film transistor according to claim 1, wherein the irradiation is performed at a substrate temperature of 0° C. to 40° C. in the irradiating step.
8. 2. The method for manufacturing a thin film transistor according to claim 1, wherein the irradiation time in the irradiating step is 10 minutes to 45 minutes.
9. 2. The method for producing a thin film transistor according to claim 1, wherein the concentration ratio of the metal-oxygen bond component in the semiconductor layer in the obtained thin film transistor is 30 atomic % to 80 atomic % relative to the entire semiconductor layer.
10. 2. The method for producing a thin film transistor according to claim 1, wherein the concentration ratio of oxygen vacancy components in the semiconductor layer in the obtained thin film transistor is 20 atomic % to 50 atomic % with respect to the entire semiconductor layer.
11. 2. The method for producing a thin film transistor according to claim 1, wherein the concentration ratio of the adsorbed oxygen component in the semiconductor layer in the obtained thin film transistor is 0 atomic % to 25 atomic % with respect to the entire semiconductor layer.
12. The film density of the semiconductor layer in the obtained thin film transistor was 6.40 g / cm 3 ~6.90g / cm 3 2. The method for producing a thin film transistor according to claim 1, wherein
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