Manufacturing method

Abstract

To provide a manufacturing method that can suppress adhesive residue. [Solution] The manufacturing method is a method for manufacturing multiple devices by dividing a device wafer having a device surface in which devices are formed in regions partitioned by a plurality of intersecting division lines along the division lines, comprising: a bonding step 104 in which a carrier plate is directly bonded to the device surface of the device wafer; a dividing step 106 in which, after the bonding step 104, the device wafer supported by the carrier plate is diced along the division lines to form multiple devices; and a separation step 107 in which, after the dividing step 106 is performed, the multiple devices are separated from the carrier plate.

Description

Technical Field

[0001] The present invention relates to a manufacturing method for manufacturing a plurality of devices.

Background Art

[0002] In recent years, with the high integration of devices, hybrid bonding that connects electrodes on the surface of a device wafer by aligning them has begun to be adopted.

[0003] In hybrid bonding, since the surfaces of device wafers are bonded together, if foreign matter adheres to the wafer surface, it may cause poor bonding.

[0004] Therefore, in hybrid bonding, reduction of foreign matter adhesion to the surface of the device wafer after dicing is highly desired compared to conventional bonding via bumps.

[0005] For this purpose, a method of protecting with a protective sheet and dicing has been disclosed (for example, see Patent Document 1).

Prior Art Documents

Patent Documents

[0006]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0007] However, the method disclosed in Patent Document 1 has a problem that adhesive residue remains in the protective sheet on which the adhesive layer is formed.

[0008] An object of the present invention is to provide a manufacturing method capable of suppressing adhesive residue. [[ID=�3]]

Means for Solving the Problems

[0009] To solve the above-mentioned problems and achieve the objective, the present invention provides a manufacturing method for producing a plurality of devices by dividing a device wafer having a device surface in which devices are formed in regions demarcated by a plurality of intersecting division lines along the division lines, comprising: a bonding step of directly bonding a carrier plate to the device surface of the device wafer; a dividing step of dicing the device wafer supported by the carrier plate along the division lines after the bonding step to form a plurality of devices; and a separation step of separating the plurality of devices from the carrier plate after the division step.

[0010] In the above manufacturing method, the splitting step may involve cutting the device wafer with the cutting blade while inserting the cutting blade from the device wafer side to a depth that reaches the carrier plate.

[0011] The above manufacturing method may further include a grinding step of grinding the back surface of the device wafer after performing the bonding step.

[0012] The above manufacturing method may further include a hydrophilization step in which, before performing the bonding step, the device surface of the device wafer and the surface of the carrier plate to be bonded to the device wafer are subjected to a hydrophilization treatment.

[0013] The manufacturing method includes, before performing the bonding step, an oxide film forming step in which a moisture-containing oxide film is formed on at least one of the device surface of the device wafer and the surface of the carrier plate to be bonded to the device wafer, wherein in the separation step, multiple devices may be separated from the carrier plate by heating. [Effects of the Invention]

[0014] This invention has the effect of suppressing adhesive residue. [Brief explanation of the drawing]

[0015] [Figure 1] Figure 1 is a schematic perspective view showing a device wafer to be processed by the manufacturing method according to Embodiment 1. [Figure 2] Figure 2 is a flowchart showing the flow of the manufacturing method according to Embodiment 1. [Figure 3] Figure 3 is a schematic perspective view showing a carrier plate that undergoes hydrophilization treatment in the oxide film formation step of the manufacturing method shown in Figure 2. [Figure 4] Figure 4 is a schematic cross-sectional view showing a carrier plate that has undergone hydrophilization treatment in the oxide film formation step of the manufacturing method shown in Figure 2. [Figure 5] Figure 5 is a schematic cross-sectional view showing a device wafer that has undergone hydrophilization treatment in the oxide film formation step of the manufacturing method shown in Figure 2. [Figure 6] Figure 6 is a schematic side view showing a partial cross-section of the trim step of the manufacturing method shown in Figure 2. [Figure 7] Figure 7 is a schematic cross-sectional view showing the device wafer and the like after the bonding step of the manufacturing method shown in Figure 2. [Figure 8] Figure 8 is a schematic side view showing a partial cross-section of the grinding step of the manufacturing method shown in Figure 2. [Figure 9] Figure 9 is a schematic side view showing a partial cross-section of the state in which a device wafer held on a chuck table is imaged during the splitting step of the manufacturing method shown in Figure 2. [Figure 10] Figure 10 is a schematic side view showing a partial cross-section of the cutting process of the device wafer during the splitting step of the manufacturing method shown in Figure 2. [Figure 11] Figure 11 is a schematic cross-sectional view showing the state in which dicing tape is attached to the back surface of multiple device chips during the separation step of the manufacturing method shown in Figure 2. [Figure 12] Figure 12 is a schematic cross-sectional view showing the state after the carrier wafer has been separated from the surface of the device chip in the separation step of the manufacturing method shown in Figure 2.

Best Mode for Carrying Out the Invention

[0016] A mode (embodiment) for carrying out the present invention will be described in detail with reference to the drawings. The present invention is not limited by the content described in the following embodiments. In addition, the constituent elements described below include those that can be easily assumed by those skilled in the art and substantially identical ones. Furthermore, the configurations described below can be combined as appropriate. Also, various omissions, substitutions, or changes in the configuration can be made without departing from the gist of the present invention.

[0017] 〔Embodiment 1〕 A manufacturing method according to Embodiment 1 of the present invention will be described based on the drawings. FIG. 1 is a perspective view schematically showing a device wafer to be processed in the manufacturing method according to Embodiment 1. FIG. 2 is a flowchart showing the process flow of the manufacturing method according to Embodiment 1.

[0018] (Device Wafer) The manufacturing method according to Embodiment 1 is a method for processing the device wafer 1 shown in FIG. 1. The device wafer 1 to be processed in the manufacturing method according to Embodiment 1 is, as shown in FIG. 1, for example, a disk-shaped semiconductor wafer having a base material 2 such as silicon, sapphire, gallium, or SiC, or a wafer such as an optical device wafer.

[0019] As shown in FIG. 1, the device wafer 1 has devices 5 formed in each region partitioned in a grid pattern by a plurality of division planned lines 4 intersecting each other on the surface 3 (corresponding to the device surface). Thus, the device wafer 1 has the surface 3 which is the device surface on which the devices 5 are formed.

[0020] Device 5 is, for example, an integrated circuit such as an IC (Integrated Circuit) or an LSI (Large Scale Integration), or a memory (semiconductor memory device). Device wafer 1 is divided into individual device chips 10 (corresponding to devices) along the division line 4. In the following description, the same reference numerals are used for the same parts of device wafer 1 and device chip 10.

[0021] Furthermore, in Embodiment 1, the device wafer 1 has a TEG (not shown) formed on the surface 3 of the division line 4. The TEG is made of metal and is an evaluation element for finding design and manufacturing problems that occur in the device 5, and is provided on the center of a portion of the division line 4 in the width direction. In this invention, instead of the TEG, the device wafer 1 may have metal provided on the surface of the division line 4. Also, in this invention, the device wafer 1 does not need to have metal such as a TEG formed on the surface 3 of the division line 4.

[0022] Furthermore, in Embodiment 1, the device wafer 1 has a chamfered portion 7 formed around its entire circumference. The chamfered portion 7 is formed on a flat surface 3 and extends from the outer edge of the surface 3 to the outer edge of the back surface 6, and is formed in a circular arc shape in cross-section such that the center in the thickness direction is located on the outermost side.

[0023] (Manufacturing method) The manufacturing method according to Embodiment 1 is a method for manufacturing a plurality of device chips 10 by dividing the aforementioned device wafer 1 along the division line 4. As shown in Figure 2, the manufacturing method according to Embodiment 1 comprises an oxide film formation step 101, a hydrophilization step 102, a trimming step 103, a bonding step 104, a grinding step 105, a division step 106, and a separation step 107.

[0024] (Oxide film formation step) Figure 3 is a schematic perspective view showing a carrier plate subjected to hydrophilization treatment in the oxide film formation step of the manufacturing method shown in Figure 2. Figure 4 is a schematic cross-sectional view showing a carrier plate that has been subjected to hydrophilization treatment in the oxide film formation step of the manufacturing method shown in Figure 2. Figure 5 is a schematic cross-sectional view showing a device wafer that has been subjected to hydrophilization treatment in the oxide film formation step of the manufacturing method shown in Figure 2.

[0025] The oxide film formation step 101 is a step in which a water-containing oxide film 30 (shown in Figures 4 and 5) is formed on at least one of the surface 3 of the device wafer 1 and the surface 3 of the carrier plate 20 shown in Figure 3 that is bonded to the device wafer 1, before performing the bonding step 104. In Embodiment 1, the carrier plate 20 bonded to the device wafer 1 in the oxide film formation step 101 is, for example, made of silicon, and is a disc-shaped bare silicon wafer that has the same diameter as the device wafer 1 and does not have the device 5 formed on it.

[0026] However, in this invention, the carrier plate 20 may be a glass wafer made of glass or the like. Also, in this invention, the carrier plate 20 may be a wafer coated with an insulating film. In particular, if the insulating film is made of an inorganic material such as an oxide film, nitride film, or SiC film, it is harder than an insulating film made of an organic material, and therefore the occurrence of chipping can be suppressed.

[0027] In Embodiment 1, in the oxide film formation step 101, a water-containing oxide film 30, as shown in Figures 4 and 5, is formed on the entire surface 3 of the device wafer 1 and on the entire surface 21 of the carrier plate 20 that is joined to the device wafer 1. The water-containing oxide film 30 is, for example, a silicon oxide film formed using PECVD (Plasma Enhanced Chemical Vapor Deposition).

[0028] The moisture-containing oxide film 30 is formed, for example, by supplying a gas obtained by vaporizing a liquid raw material such as liquid TEOS (Tetraethyl orthosilicate) into a chamber in which the surface 3 of the device wafer 1 and one surface 21 of the carrier plate 20 are exposed in the internal space, and then plasma-forming this gas.

[0029] Here, the ambient temperature during the deposition of the water-containing oxide film 30, that is, the temperature inside the chamber, is set so that the water content of the deposited water-containing oxide film 30 is high. For example, this temperature is set to fall within a first temperature range of 80°C to 300°C, preferably 100°C to 260°C, more preferably 120°C to 220°C, and most preferably 120°C to 180°C.

[0030] Furthermore, the moisture-containing oxide film 30 has a thin film thickness so as to suppress the sinking of the device chip 10 into the carrier plate 20 when the device chip 10 and the carrier plate 20 are joined. For example, the moisture-containing oxide film 30 has a film thickness of 1 μm or less, preferably 500 nm or less, more preferably 250 nm or less, and most preferably 125 nm or less.

[0031] Furthermore, in order to flatten the exposed surface of the water-containing oxide film 30, that is, the surface furthest from the aforementioned surface 3 and one of the surfaces 21, the exposed surface of the water-containing oxide film 30 may be subjected to a planarization treatment such as chemical mechanical polishing (CMP). In addition, after the water-containing oxide film 30 is formed to a thickness of more than 1 μm, it may be subjected to a planarization treatment so that the thickness becomes 1 μm or less and the exposed surface is flattened.

[0032] In Embodiment 1, a moisture-containing oxide film 30 was formed on both the surface 3 of the device wafer 1 and one of the surfaces 21 of the carrier plate 20. However, in the present invention, it is sufficient to form the moisture-containing oxide film 30 on at least one of the surface 3 of the device wafer 1 and one of the surfaces 21 of the carrier plate 20.

[0033] Furthermore, in the present invention, the oxide film formed on at least one of the surfaces 3 of the device wafer 1 and one of the surfaces 21 of the carrier plate 20 in the oxide film formation step 101 may be an oxide film whose surface roughness is roughened to a degree that it can be peeled off in the subsequent separation step 107. Specifically, for example, the oxide film has an arithmetic mean roughness (Ra), which is the surface roughness of the surface, of 1 nm or more and 3 nm or less.

[0034] (Hydrophilicization step) The hydrophilization step 102 is a step in which the surface 3 of the device wafer 1 and one side 21 of the carrier plate 20 that will be bonded to the device wafer 1 are subjected to a hydrophilization treatment before the bonding step 104 is carried out. In Embodiment 1, the hydrophilization step 102 is performed to activate the water-containing oxide film 30 by forming OH groups on the exposed surface.

[0035] In Embodiment 1, in the hydrophilization step 102, for example, under atmospheric pressure, a nitrogen plasma or ultraviolet light is irradiated toward the exposed surface of the water-containing oxide film 30 to perform a hydrophilization treatment on the water-containing oxide film 30 on the surface 3 of the device wafer 1 and the water-containing oxide film 30 on one surface 21 of the carrier plate 20.

[0036] In Embodiment 1, during the hydrophilization step 102, it is preferable that the water contained within the water-containing oxide film 30 does not vaporize. Therefore, it is desirable that the ambient temperature during the hydrophilization treatment be set to a lower temperature than the ambient temperature when the water-containing oxide film 30 is formed, for example, to room temperature.

[0037] (Trim step) Figure 6 is a schematic side view showing a partial cross-section of the trim step of the manufacturing method shown in Figure 2. The trim step 103 is a step in which the surface side of the chamfered portion 7 of the device wafer 1 is removed.

[0038] In Embodiment 1, in the trim step 103, the cutting device 40 shown in Figure 6 holds the back surface 6 of the device wafer 1 by suction to the holding surface of a holding table (not shown). In Embodiment 1, in the trim step 103, as shown in Figure 6, the cutting device 40 causes the annular cutting edge 43 of the cutting blade 42, which is rotated by the spindle of the cutting unit 41 around an axis parallel to the holding surface, to cut into the chamfered portion 7 from the front surface 3 side of the device wafer 1 until it reaches the center in the thickness direction, and rotates the holding table at least once around an axis perpendicular to the holding surface.

[0039] In Embodiment 1, in the trim step 103, as shown in Figure 4, the cutting edge 43 of the cutting blade 42 is made to cut into the chamfered portion 7 to a depth greater than or equal to the finished thickness of the device chip 10 from the surface 3 side, thereby removing the surface 3 side of the chamfered portion 7 over its entire circumference. In Embodiment 1, the trim step 103 is performed to prevent the formation of a sharp edge on the outer edge of the device wafer 1 after the grinding step 105. Note that in the present invention, the trim step 103 may be omitted.

[0040] (Joining step) Figure 7 is a schematic cross-sectional view showing the device wafer after the bonding step of the manufacturing method shown in Figure 2. Bonding step 104 is a step in which the carrier plate 20 is directly bonded to the surface 3 of the device wafer 1 without using an adhesive.

[0041] In Embodiment 1, in bonding step 104, first, the moisture-containing oxide film 30 on the surface 3 of the device wafer 1 and the moisture-containing oxide film 30 on one side 21 of each of the multiple device chips 10 on the carrier plate 20 are brought into contact. In Embodiment 1, in bonding step 104, the device wafer 1 and the carrier plate 20 are brought roughly close together until a load of, for example, about 10 kN is applied to them.

[0042] In Embodiment 1, in bonding step 104, as shown in Figure 7, the water-containing oxide film 30 on the surface 3 of the device wafer 1 and the water-containing oxide film 30 on one surface 21 of the carrier plate 20 overlap each other, and hydrogen bonds are formed between these water-containing oxide films 30, thereby bonding the surface 3 of the device wafer 1 and one surface 21 of the carrier plate 20 via the water-containing oxide film 30.

[0043] In Embodiment 1, the bonding step 104 may be performed under atmospheric pressure or under a reduced pressure atmosphere of 105 Pa (absolute pressure) or less. Also, in Embodiment 1, in bonding step 104, water may be supplied to the exposed surface of the water-containing oxide film 30 immediately before bonding in order to promote hydrogen bonding between the water-containing oxide films 30.

[0044] Furthermore, in Embodiment 1, it is preferable that the water contained in the water-containing oxide film 30 is not vaporized during the bonding step 104. For this reason, in Embodiment 1, the temperature of the atmosphere during bonding in bonding step 104 may be set to a lower temperature than the temperature of the atmosphere when the water-containing oxide film 30 is formed, for example, to room temperature. In addition, in the present invention, an annealing treatment may be performed after bonding the device wafer 1 and the carrier plate 20 in bonding step 104. In this case, it is preferable to perform an annealing treatment for about 2 hours at a temperature of 150°C or higher and 200°C or lower.

[0045] (Grinding step) Figure 8 is a schematic side view showing a partial cross-section of the grinding step of the manufacturing method shown in Figure 2. The grinding step 105 is a step in which the back surface 6 of the device wafer 1 is ground after the bonding step 104 has been performed.

[0046] In Embodiment 1, during the grinding step 105, the grinding apparatus 50 shown in Figure 8 holds the carrier plate 20 by suction to the holding surface 52 of the holding table 51, with the other side 22 of the back of one side 21 of the carrier plate 20 facing the holding surface 52. In Embodiment 1, during the grinding step 105, as shown in Figure 8, the grinding apparatus 50 rotates the grinding wheel 53 around its axis using the spindle 55 and rotates the holding table 51 around its axis while supplying grinding water, and brings the grinding wheel 54 into contact with the back surface 6 of the device wafer 1 and brings it closer to the holding table 51 at a predetermined feed rate, thereby grinding the back surface 6 of the device wafer 1 with the grinding wheel 54 and thinning the device wafer 1 to the finished thickness of the device chip 10. After the grinding step 105, the chamfered portion 7 is removed from the entire circumference of the device wafer 1.

[0047] (Division step) Figure 9 is a schematic side view showing a partial cross-section of the state in which the device wafer held on the chuck table is imaged during the splitting step of the manufacturing method shown in Figure 2. Figure 10 is a schematic side view showing a partial cross-section of the state in which the device wafer is cut during the splitting step of the manufacturing method shown in Figure 2.

[0048] The splitting step 106 is a step in which, after the bonding step 104, the device wafer 1 supported by the carrier plate 20 is diced along the planned splitting line 4 to form a plurality of device chips 10. In Embodiment 1, in the splitting step 106, the cutting apparatus 60 shown in Figures 9 and 10 holds the other side 22 of the carrier plate 20 by suction to the holding surface 62 of the holding table 61, which is made of an infrared-transmitting material.

[0049] In Embodiment 1, in the splitting step 106, the cutting device 60, as shown in Figure 9, uses an infrared camera 63 to image the surface 3 side of the device wafer 1 via the holding table 61 and the carrier plate 20, and performs alignment to align the planned splitting line 4 of the device wafer 1 with the cutting edge 65 of the cutting blade 64 shown in Figure 10. In Embodiment 1, in the splitting step 106, the cutting device 60 moves the cutting edge 65 of the cutting blade 64 and the device wafer 1 relative to each other along the planned splitting line 4, as shown in Figure 10, and cuts the device wafer 1 by cutting the cutting edge 65 of the cutting blade 64 into the planned splitting line 4 of the device wafer 1 until it reaches the carrier plate 20.

[0050] In Embodiment 1, in the splitting step 106, the cutting device 60 cuts along the planned splitting line 4 with the cutting edge 65 of the cutting blade 64 until it reaches the carrier plate 20, cutting all of the planned splitting lines 4 of the device wafer 1 and splitting the device wafer 1 into individual device chips 10. Thus, in Embodiment 1, in the splitting step 106, the device wafer 1 is cut with the cutting blade 64 while cutting from the device wafer 1 side to a depth that reaches the carrier plate 20, and the device wafer 1 bonded to the carrier plate 20 is split into a plurality of device chips 10.

[0051] In addition, in the present invention, in the division step 106, the device wafer 1 may be imaged from the back surface 6 side of the device wafer 1 with an infrared camera 63 to perform alignment. Furthermore, in the present invention, in the division step 106, cutting is not limited to cutting with a cutting blade 64, but for example, the device wafer 1 may be plasma-etched along the division line 4 to divide it into multiple device chips 10, or a laser beam may be irradiated along the division line 4 to divide it into multiple device chips 10.

[0052] (Separation step) Figure 11 is a schematic cross-sectional view showing the state in which dicing tape is attached to the back surface of multiple device chips during the separation step of the manufacturing method shown in Figure 2. Figure 12 is a schematic cross-sectional view showing the state in which the carrier wafer is separated from the surface of the device chip during the separation step of the manufacturing method shown in Figure 2.

[0053] The separation step 107 is a step in which the plurality of device chips 10 are separated from the carrier plate 20 after the division step 106 has been performed. In the embodiment, in the separation step 107, as shown in Figure 11, the central part of a disc-shaped dicing tape 31 with a diameter larger than the outer diameter of the device wafer 1 is attached to the back surface 6 of the plurality of device chips 10 bonded to the carrier plate 20, and an annular frame 32 with an inner diameter larger than the device wafer 1 is attached to the outer edge of the dicing tape 31.

[0054] In Embodiment 1, in separation step 107, for example, a heat treatment apparatus equipped with an infrared lamp is used to heat the multiple device chips 10 bonded to the carrier plate 20 under a nitrogen atmosphere. As a result, in Embodiment 1, in separation step 107, the water contained in the water-containing oxide film 30 is vaporized, generating gas in the water-containing oxide film 30, and the carrier plate 20 is separated from the multiple device chips 10 as shown in Figure 12.

[0055] Furthermore, in order to vaporize the water contained within the water-containing oxide film 30, the ambient temperature needs to be higher than when the water-containing oxide film 30 is formed. On the other hand, if the ambient temperature is too high when heating the multiple device chips 10 bonded to the carrier plate 20, there is a risk that siloxane bonds stronger than hydrogen bonds may form between the water-containing oxide films 30.

[0056] Therefore, in Embodiment 1, in the separation step 107, the ambient temperature when heating the multiple device chips 10 bonded to the carrier plate 20 is set to fall within a second temperature range of 200°C to 350°C, preferably 215°C to 320°C, more preferably 230°C to 290°C, and most preferably 245°C to 260°C.

[0057] Furthermore, in the present invention, if the carrier plate 20 and the device wafer 1 are joined in the separation step 107 without forming a moisture-containing oxide film 30, a blade may be inserted between the carrier plate 20 and the device chip 10 to create a starting point for peeling and physically delaminate them.

[0058] The manufacturing method according to Embodiment 1 described above protects the device 5 by directly bonding the carrier plate 20 to the device wafer 1, and therefore has the effect of suppressing adhesive residue on the device 5 of the device chip 10 after division.

[0059] Furthermore, in the manufacturing method according to Embodiment 1, a carrier plate 20 is bonded to the surface 3 of the device wafer 1, and cutting is performed while the wafer is supported by the carrier plate 20. Therefore, even if there is metal such as TEG in the area to be cut, there is no risk of burrs being generated.

[0060] Furthermore, in the manufacturing method according to Embodiment 1, the interlayer insulating film constituting the device 5 is cut while sandwiched between the substrate 2 and carrier plate 20 of the device wafer 1, so there is no risk of delamination, which is the occurrence of peeling.

[0061] Furthermore, in the manufacturing method according to Embodiment 1, since the grinding step 105 is performed before the splitting step 106, grinding before dicing is achieved by preventing grinding debris from entering the groove formed in the splitting step 106, compared to performing the grinding step 105 after the splitting step 106. In addition, in the manufacturing method according to Embodiment 1, since the grinding step 105 is performed before the splitting step 106, grinding before dicing is achieved by performing the grinding step 105 after the splitting step 106, making the groove formed in the splitting step 106 shallower, and improving the dicing quality and UPH (Unit Per Hour) at the splitting step 106 (if plasma etching is performed, the etching time can be reduced, and if cutting is done with a cutting blade 64, processing can be done with a cutting blade 64 with a finer particle size).

[0062] It should be noted that the present invention is not limited to the embodiments described above. That is, it can be implemented with various modifications without departing from the core principles of the present invention. [Explanation of Symbols]

[0063] 1 device wafer 3. Surface (device side) 4 planned division lines 5 devices 10 Device chips (devices) 20 Carrier Plates 30 Water-containing oxide film 64 cutting blades 101 Oxide film formation step 102 Hydrophilization Step 104 Joining Steps 105 Grinding Steps 106 division steps 107 Separation Step

Claims

1. A manufacturing method for producing multiple devices by dividing a device wafer, which has a device surface in which devices are formed in regions partitioned by a plurality of intersecting division lines, along the division lines, A bonding step of directly bonding a carrier plate to the device surface of the device wafer, A dividing step is performed after the bonding step, in which the device wafer supported by the carrier plate is diced along the planned dividing line to form a plurality of devices. A manufacturing method comprising: a separation step of separating the plurality of devices from the carrier plate after performing the division step.

2. The manufacturing method according to claim 1, wherein in the splitting step, the cutting blade is inserted from the device wafer side to a depth reaching the carrier plate, and the device wafer is cut and split with the cutting blade.

3. The manufacturing method according to claim 1 or claim 2, further comprising a grinding step of grinding the back surface of the device wafer after performing the bonding step.

4. The manufacturing method according to claim 1, further comprising a hydrophilization step of applying a hydrophilization treatment to the device surface of the device wafer and the surface of the carrier plate to be bonded to the device wafer, before performing the bonding step.

5. Prior to performing the bonding step, the method includes an oxide film forming step in which a moisture-containing oxide film is formed on at least one of the device surface of the device wafer and the surface of the carrier plate to be bonded to the device wafer, The manufacturing method according to claim 1, wherein the separation step involves separating multiple devices from a carrier plate by heating.

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