Wiring board, and method for manufacturing a wiring board
The two-layer seed layer structure in the wiring board addresses the adhesion and etching challenges of via conductor openings, enhancing connectivity and efficiency in conductor layer formation.
JP2026048426APending Publication Date: 2026-03-17IBIDEN CO LTD
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-09-05
- Publication Date
- 2026-03-17
Smart Images
Figure 2026048426000001_ABST
Abstract
To provide a wiring board having via conductors with good connection reliability. [Solution] The wiring board 1 of the embodiment includes a first conductor layer 12F, an insulating layer 11 covering the first conductor layer 12F, a second conductor layer 12S formed on the surface of the insulating layer 11, and a via conductor 12V formed on the inner wall surface of a through hole 11c penetrating the insulating layer 11 to connect the first conductor layer 12F and the second conductor layer 12S. The via conductor 12V is formed by a first seed layer 121, a second seed layer 122, and a plating layer 124, the second conductor layer 12S is formed by a second seed layer 122, and a plating layer 124, the second seed layer 122 is integrally formed across the inside of the through hole 11c and the surface of the insulating layer 11, and covers the first seed layer 121 inside the through hole 11c.
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Citation Information
Patent Citations
Method of forming wiring pattern and method of manufacturing wiring substrate
JP2009117437A