Multilayer ceramic capacitor with circuit board

Abstract

To provide a substrate-mounted multilayer ceramic capacitor that achieves both increased capacitance and a low profile. [Solution] The substrate-mounted multilayer ceramic capacitor 1 comprises a multilayer ceramic capacitor 10 and a substrate 50. The dimension in the second direction W of the portion of the first external electrode 30A that overlaps with the first surface F1 when viewed in the stacking direction T is smaller than the dimension in the second direction W of the portion of the first external electrode 30A that overlaps with the second surface F2 when viewed in the stacking direction T, and the dimension in the second direction W of the portion of the second external electrode 30B that overlaps with the first surface F1 when viewed in the stacking direction T is smaller than the dimension in the second direction W of the portion of the second external electrode 30B that overlaps with the second surface F2 when viewed in the stacking direction T. The first surface F1 and the second surface F2 are located on opposite sides of the first substrate surface SF1.

Description

Technical Field

[0001] The present invention relates to a multilayer ceramic capacitor with a substrate.

Background Art

[0002] Conventionally, there exists a structure comprising a multilayer ceramic capacitor and a substrate connected to the multilayer ceramic capacitor (referred to as a "multilayer ceramic capacitor with a substrate"). For example, Patent Document 1 discloses a structure in which a pair of external electrodes provided on a multilayer ceramic capacitor are respectively connected to a pair of lands provided on a substrate by soldering.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] By the way, with the miniaturization and thinning of electronic devices, it has been demanded to reduce the height of the multilayer ceramic capacitor including the substrate. Also, it has been demanded to increase the capacitance of the multilayer ceramic capacitor.

[0005] In a multilayer ceramic capacitor, for example, it is said that high capacitance can be achieved by increasing the number of layers of the dielectric ceramic layer and the internal electrodes. However, increasing the number of layers of the dielectric ceramic layer and the internal electrodes may lead to an increase in the height of the multilayer ceramic capacitor.

[0006] An object of the present invention is to provide a multilayer ceramic capacitor with a substrate capable of achieving height reduction while aiming for increased capacitance.

Means for Solving the Problems

[0007] The multilayer ceramic capacitor with a substrate of the present invention comprises: an inner layer portion including a plurality of alternately stacked dielectric layers and a plurality of internal electrodes; a laminate having a first surface and a second surface that are opposite to the stacking direction and extend parallel to the stacking direction, a third surface and a fourth surface that are opposite to the first direction perpendicular to the stacking direction, and a fifth surface and a sixth surface that are opposite to the second direction perpendicular to the stacking direction and the first direction; a first external electrode disposed on the third surface and extending onto the first surface, the second surface, the fifth surface and the sixth surface; and a second external electrode disposed on the fourth surface and extending onto the first surface, the second surface, the fifth surface and the sixth surface. The multilayer ceramic capacitor comprises a capacitor and a substrate having a first substrate surface and a second substrate surface which are opposite to each other in the stacking direction, wherein the dimension in the second direction of the portion of the first external electrode that overlaps with the first surface when viewed in the stacking direction is smaller than the dimension in the second direction of the portion of the first external electrode that overlaps with the second surface when viewed in the stacking direction, and the dimension in the second direction of the portion of the second external electrode that overlaps with the first surface when viewed in the stacking direction is smaller than the dimension in the second direction of the portion of the second external electrode that overlaps with the second surface when viewed in the stacking direction, and the first surface and the second surface are located on opposite sides of the first substrate surface. [Effects of the Invention]

[0008] According to the present invention, it is possible to provide a substrate-mounted multilayer ceramic capacitor that can achieve both high capacitance and a low profile. [Brief explanation of the drawing]

[0009] [Figure 1] This is a schematic perspective view of a multilayer ceramic capacitor with a substrate according to the first embodiment. [Figure 2] This is a schematic perspective view of a multilayer ceramic capacitor according to the first embodiment. [Figure 3] This is a cross-sectional view taken along line III-III in Figure 1. [Figure 4] This is a cross-sectional view taken along line IV-IV in Figure 1. [Figure 5]This is a cross-sectional view of VV shown in Figure 1. [Figure 6] This is a schematic perspective view of the substrate according to the first embodiment. [Figure 7] This is a diagram showing the substrate viewed in plan in the Z direction. [Figure 8] This figure corresponds to Figure 4 of the multilayer ceramic capacitor with substrate according to the second embodiment. [Modes for carrying out the invention]

[0010] (First Embodiment) Hereinafter, a multilayer ceramic capacitor 1 with a substrate according to the first embodiment of the present invention will be described with reference to Figures 1 to 7.

[0011] As shown in Figure 1, the substrate-mounted multilayer ceramic capacitor 1 comprises a multilayer ceramic capacitor 10, a substrate 50, a pair of lands 52, and a bonding material H. Note that one substrate-mounted multilayer ceramic capacitor 1 comprises, for example, one multilayer ceramic capacitor 10. The substrate-mounted multilayer ceramic capacitor 1 does not have any electronic components other than the multilayer ceramic capacitor 10.

[0012] (Multilayer ceramic capacitor) As shown in Figure 2, the multilayer ceramic capacitor 10 has, for example, a roughly rectangular prism shape overall. The multilayer ceramic capacitor 10 comprises a laminate 20, a first external electrode 30A, and a second external electrode 30B. The laminate has an inner layer portion 21 that includes a plurality of alternately stacked dielectric layers 24 and a plurality of internal electrodes 25. The first external electrode 30A and the second external electrode 30B are sometimes collectively referred to as the "external electrode 30".

[0013] In this specification, the direction in which the dielectric layer 24 and the internal electrode 25 are stacked is referred to as the "stacking direction T". The direction perpendicular to the stacking direction T is referred to as the "first direction L". The direction perpendicular to both the stacking direction T and the first direction L is referred to as the "second direction W".

[0014] The dimension of the laminated ceramic capacitor 10 in the first direction L is, for example, not less than 0.2 mm and not more than 3.2 mm. The dimension of the laminated ceramic capacitor 10 in the second direction W is, for example, not less than 0.10 mm and not more than 1.60 mm. The dimension of the laminated ceramic capacitor 10 in the lamination direction T is, for example, not less than 0.10 mm and not more than 1.60 mm. However, the external dimensions of the laminated ceramic capacitor 10 are not limited to these values.

[0015] (Stacked body) The stacked body 20 has, for example, a substantially quadrangular prism shape. The stacked body 20 has a first surface F1 and a second surface F2 that face each other in the lamination direction T, a third surface F3 and a fourth surface F4 that face each other in the first direction L, and a fifth surface F5 and a sixth surface F6 that face each other in the second direction W.

[0016] The third surface F3 is a portion of the outer surface of the stacked body 20 that is surrounded by the outer contour line of the stacked body 20 when the stacked body 20 is viewed only from one side in the first direction L. The fourth surface F4 is a portion of the outer surface of the stacked body 20 that is surrounded by the outer contour line of the stacked body 20 when the stacked body 20 is viewed only from the other side in the first direction L.

[0017] The fifth surface F5 is a portion of the outer surface of the stacked body 20 that is surrounded by the outer contour line of the stacked body 20 when the stacked body 20 is viewed only from one side in the second direction W and does not correspond to either the third surface F3 or the fourth surface F4. The sixth surface F6 is a portion of the outer surface of the stacked body 20 that is surrounded by the outer contour line of the stacked body 20 when the stacked body 20 is viewed only from the other side in the second direction W and does not correspond to either the third surface F3 or the fourth surface F4.

[0018] The first surface F1 is a portion of the outer surface of the stacked body 20 that is surrounded by the outer contour line of the stacked body 20 when the stacked body 20 is viewed only from one side in the lamination direction T and does not correspond to any of the third surface F3, the fourth surface F4, the fifth surface F5, and the sixth surface F6. The second surface F2 is a portion of the outer surface of the stacked body 20 that is surrounded by the outer contour line of the stacked body 20 when the stacked body 20 is viewed only from the other side in the lamination direction T and does not correspond to any of the third surface F3, the fourth surface F4, the fifth surface F5, and the sixth surface F6.

[0019] The laminate 20 has an inner layer portion 21 and a pair of outer layer portions 22 disposed sandwiching the inner layer portion 21 in the stacking direction T. A portion where three outer surfaces of the laminate 20 intersect is defined as a "corner portion". A portion where two outer surfaces of the laminate 20 intersect is defined as an "edge line portion". The corner portion and the edge line portion of the laminate 20 may be rounded.

[0020] (Inner layer portion) As shown in FIGS. 3 and 4, the inner layer portion 21 has a plurality of dielectric layers 24 and a plurality of internal electrodes 25. The dielectric layer 24 and the internal electrode 25 are alternately stacked.

[0021] The dielectric layer 24 preferably contains, as a main component, a perovskite-type compound such as BaTiO3, CaTiO3, SrTiO3, or CaZrO3. Since the dielectric layer 24 is formed of a high dielectric constant material such as BaTiO3, the multilayer ceramic capacitor 10 can have a higher capacitance. To the dielectric layer 24, a Mn compound, a Mg compound, a Si compound, an Fe compound, a Cr compound, a Co compound, a Ni compound, an Al compound, a V compound, or a rare earth compound, etc., may be added as sub-components to these main components.

[0022] The internal electrode 25 is formed by sintering a conductive paste containing a conductive metal powder, an organic solvent, a binder, and a dispersant on the dielectric layer 24. Examples of conductive metal powders include Ni, Cu, Ag, Pd, Ag-Pd alloys, Au, and Sn. These metals may be compounds containing these metal elements or alloys with other metals. The main component of the internal electrode 25 is preferably Ni, however, the main component is not limited to this. A solid solution layer of Sn may be formed at the interface between the internal electrode 25 and the dielectric layer 24. This can mitigate electric field concentration at the interface between the internal electrode 25 and the dielectric layer 24. The amount of displacement in the second direction W between adjacent ends of internal electrodes 25 in the stacking direction T is preferably 1.0 μm or less. This increases the facing area of ​​the internal electrodes 25, thereby increasing the capacitance.

[0023] The internal electrode 25 has a plurality of first internal electrodes 25A and a plurality of second internal electrodes 25B. The first internal electrodes 25A are exposed only on the third surface F3. The second internal electrodes 25B are exposed only on the fourth surface F4. The first internal electrodes 25A and the second internal electrodes 25B are arranged alternately.

[0024] The first internal electrode 25A has a first opposing portion 25Aa and a first leading portion 25Ab. The first opposing portion 25Aa is the part of the first internal electrode 25A that faces the adjacent second internal electrode 25B. The first leading portion 25Ab is the part of the first internal electrode 25A that is led out from the first opposing portion 25Aa toward the third surface F3.

[0025] The second internal electrode 25B has a second opposing portion 25Ba and a second leading portion 25Bb. The second opposing portion 25Ba is the part of the second internal electrode 25B that faces the adjacent first internal electrode 25A (first opposing portion 25Aa). The second leading portion 25Bb is the part of the second internal electrode 25B that is led out from the second opposing portion 25Ba toward the fourth surface F4. The opposing positions of the first opposing portion 25Aa and the second opposing portion 25Ba enable the generation of capacitance in the multilayer ceramic capacitor 10.

[0026] (outer layer) The outer layer 22 is made of the same material as the dielectric layer 24 of the inner layer 21. The outer layer 22 does not have internal electrodes 25.

[0027] (external electrode) The first external electrode 30A is located on the third surface F3, and more specifically, on the third surface F3, the first surface F1, the second surface F2, the fifth surface F5, and the sixth surface F6. The first external electrode 30A is connected to the first internal electrode 25A.

[0028] The second external electrode 30B is located on the fourth surface F4, and more specifically, on the fourth surface F4, the first surface F1, the second surface F2, the fifth surface F5, and the sixth surface F6. The second external electrode 30B is connected to the second internal electrode 25B.

[0029] The external electrode 30 includes a base electrode layer 31 disposed on the outer surface of the laminate 20 and a plating layer 32 disposed on the base electrode layer 31.

[0030] The base electrode layer 31 is, for example, a baked layer containing a conductive metal and glass. The conductive metal is, for example, a metal such as Ni, Cu, Ag, Pd, Au, Ag-Pd alloy, and preferably Cu.

[0031] The plating layer 32 is composed of, for example, one metal selected from the group consisting of Ni, Cu, Ag, Pd, Au, and Sn, or an alloy containing this metal. The plating layer 32 includes, for example, a first plating layer 321 disposed on the underlay electrode layer 31 and a second plating layer 322 disposed on the first plating layer 321. The first plating layer 321 is, for example, a Ni plating layer. The second plating layer 322 is, for example, a Sn plating layer. The plating layer 32 may also have a single-layer structure.

[0032] Furthermore, of the external electrode 30, the portion that overlaps with the first surface F1 when viewed from the direction of the stacking direction T from the first surface F1 toward the second surface F2, and that is located in front of the first surface F1, is defined as "the portion of the external electrode 30 that is placed on the first surface F1." Of the external electrode 30, the portion that overlaps with the second surface F2 when viewed from the direction of the stacking direction T from the second surface F2 toward the first surface F1, and that is located in front of the second surface F2, is defined as "the portion of the external electrode 30 that is placed on the second surface F2."

[0033] Of the external electrode 30, the portion that overlaps with the third surface F3 when viewed from the direction of the third surface F3 to the fourth surface F4 in the first direction L, and which is located in front of the third surface F3, is defined as "the portion of the external electrode 30 that is placed on the third surface F3." Of the external electrode 30, the portion that overlaps with the fourth surface F4 when viewed from the direction of the fourth surface F4 to the third surface F3 in the first direction L, and which is located in front of the fourth surface F4, is defined as "the portion of the external electrode 30 that is placed on the fourth surface F4."

[0034] Of the external electrode 30, the portion that overlaps with the fifth surface F5 when viewed from the direction of the second direction W from the fifth surface F5 to the sixth surface F6, and that is located in front of the fifth surface F5, is defined as "the portion of the external electrode 30 that is placed on the fifth surface F5." Of the external electrode 30, the portion that overlaps with the sixth surface F6 when viewed from the direction of the second direction W from the sixth surface F6 to the fifth surface F5, and that is located in front of the sixth surface F6, is defined as "the portion of the external electrode 30 that is placed on the sixth surface F6."

[0035] (substrate) As shown in Figures 5 and 6, the substrate 50 is formed from an insulating material such as resin, glass, glass epoxy, paper phenol, or ceramics. The substrate 50 is formed from a material such as a substrate made by impregnating a base material, which is a mixture of glass cloth and glass nonwoven fabric, with epoxy resin or polyimide resin, or from a ceramic substrate manufactured by firing a sheet made by mixing ceramics and glass. The shape of the substrate 50 is flat. The thickness of the substrate 50 (i.e., the dimension in the Z direction described later) is preferably 0.5 mm or more and 2.0 mm or less. The substrate 50 may be a single-layer plate or a plate composed of multiple layers. The substrate 50 has two opposing surfaces, a first substrate surface SF1 and a second substrate surface SF2.

[0036] (land) Each land 52 is a terminal connected to an external electrode 30. Each land 52 is spaced apart on the first substrate surface SF1. Wiring (not shown) is connected to each land 52. Each land 52 and each wiring are formed by depositing a highly conductive metal, such as Cu or Ag, on the first substrate surface SF1. Each land 52 has a first land 52A connected to the first external electrode 30A and a second land 52B connected to the second external electrode 30B.

[0037] Furthermore, an insulating film 53 is provided on the first substrate surface SF1. The insulating film 53 covers, for example, the portion of the first substrate surface SF1 where no lands 52 are placed and the peripheral edges of each land 52. At least a portion of the first land 52A is not covered by the insulating film 53. At least a portion of the second land 52B is not covered by the insulating film 53.

[0038] (bonding material) The bonding material H connects the multilayer ceramic capacitor 10 to the land 52. The bonding material H is, for example, solder. The bonding material H is placed on the first land 52A and on the second land 52B, respectively. The first external electrode 30A and the first land 52A are joined by the bonding material H. The second external electrode 30B and the second land 52B are joined by the bonding material H. As a result, the multilayer ceramic capacitor 10 is mounted on the substrate 50.

[0039] The direction parallel to the first substrate surface SF1 in which the lands 52 are aligned is defined as the "X direction". The direction parallel to the first substrate surface SF1 in which the direction perpendicular to the X direction is defined as the "Y direction". The direction perpendicular to the direction in which the first substrate surface SF1 extends is defined as the "Z direction".

[0040] Furthermore, the multilayer ceramic capacitor 10 is mounted on the substrate 50 in an orientation where the stacking direction T and the Z direction are parallel. The multilayer ceramic capacitor 10 is mounted on the substrate 50 in an orientation where the direction viewed from the second surface F2 to the first surface F1 and the direction viewed from the first substrate surface SF1 to the second substrate surface SF2 are the same. The first direction L coincides with the X direction. The second direction W coincides with the Y direction. The stacking direction T coincides with the Z direction. The direction in which the first substrate surface SF1 and the second substrate surface SF2 are opposite each other is the stacking direction T.

[0041] Here, the substrate 50 is provided with an opening 55 having an opening 56 that opens on the first substrate surface SF1 and an inner circumferential surface 57.

[0042] The opening 55 is the portion into which the multilayer ceramic capacitor 10 is inserted. The opening 55 is either a bottomed concave shape that opens on the first substrate surface SF1, or a hole shape that penetrates the substrate 50 in the Z direction, and more specifically, it is a hole shape that penetrates the substrate 50 in the Z direction.

[0043] The shape of the opening 56 when viewed in the Z direction is, for example, a roughly rectangular shape with the X direction as the longitudinal direction.

[0044] In cross-sectional views parallel to the X and Z directions, each portion of the inner circumferential surface 57 that is opposite to the X direction extends, for example, parallel to the Z direction. In cross-sectional views parallel to the X and Z directions, the internal space of the opening 55 is, for example, roughly rectangular in shape.

[0045] In cross-sectional views parallel to the Y and Z directions, each portion of the inner circumferential surface 57 facing the Y direction is inclined such that, for example, it approaches the center of the opening 55 in the X direction as it moves from the first substrate surface SF1 side to the second substrate surface SF2 side. In cross-sectional views parallel to the Y and Z directions, the internal space of the opening 55 has a roughly trapezoidal shape, for example, which tapers as it moves from the first substrate surface SF1 side to the second substrate surface SF2 side.

[0046] Furthermore, each land 52 is provided, for example, on the first substrate surface SF1, flanking the opening 56 in the X direction. The first land 52A extends, for example, along one side in the X direction of each pair of sides of the opening 56 in the X direction, and along one end in the X direction of each pair of sides of the opening 56 in the Y direction. The shape of the first land 52A as viewed in the Z direction is, for example, a roughly U-shape that opens toward the center of the opening 55 in the X direction. The second land 52B extends, for example, along the other side in the X direction of each pair of sides of the opening 56 in the X direction, and along the other end in the X direction of each pair of sides of the opening 56 in the Y direction. The shape of the second land 52B as viewed in the Z direction is, for example, a roughly U-shape that opens toward the center of the opening 55 in the X direction.

[0047] The dimension in the second direction W of the portion of the first external electrode 30A that is positioned on the first surface F1 is smaller than the dimension in the second direction W of the portion of the first external electrode 30A that is positioned on the second surface F2. The shape of the first external electrode 30A as seen in the first direction L is, for example, a roughly trapezoidal shape that tapers from the second surface F2 side toward the first surface F1 side.

[0048] The dimension in the second direction W of the portion of the second external electrode 30B that is positioned on the first surface F1 is smaller than the dimension in the second direction W of the portion of the second external electrode 30B that is positioned on the second surface F2. The second external electrode 30B has a roughly trapezoidal shape, for example, when viewed in the first direction L, tapering from the second surface F2 side towards the first surface F1 side.

[0049] Furthermore, the shape of the laminate 20 when viewed in the first direction L is, for example, a roughly trapezoidal shape that tapers from the second surface F2 side toward the first surface F1 side. The shape of the laminate 20 is, for example, a roughly rectangular prism with a roughly trapezoidal base where the length of the upper base and the length of the lower base are different.

[0050] The multilayer ceramic capacitor 10 is inserted into the opening 55. The first surface F1 and the second surface F2 are located on opposite sides of the first substrate surface SF1. The first surface F1 is located, for example, between the first substrate surface SF1 and the second substrate surface SF2.

[0051] The shortest distance between the first substrate surface SF1 and the first surface F1 is smaller than, for example, the shortest distance between the first substrate surface SF1 and the second surface F2. The position of the first surface F1 in the Z direction and the position of the second substrate surface SF2 in the Z direction are, for example, approximately the same. The first external electrode 30A penetrates the substrate 50 in the Z direction. The second external electrode 30B penetrates the substrate 50 in the Z direction.

[0052] The portions of the first external electrode 30A and the second external electrode 30B that are positioned on the fifth surface F5 are in contact with the substrate 50, and the portions of the first external electrode 30A and the second external electrode 30B that are positioned on the sixth surface F6 are in contact with the substrate 50.

[0053] For example, the portion of the first external electrode 30A that is positioned on the fifth surface F5 is in contact with the substrate 50 (specifically, the inner circumferential surface 57), and the portion of the first external electrode 30A that is positioned on the sixth surface F6 is in contact with the substrate 50 (specifically, the inner circumferential surface 57).

[0054] It is preferable that the portion of the first external electrode 30A that overlaps with the laminate 20 when viewed in the first direction L (in other words, the portion of the first external electrode 30A that is positioned on the third surface F3) and the substrate 50 are not in contact. This makes it possible to suppress the transmission of stress from the substrate to the laminate.

[0055] Preferably, the laminate 20 and the substrate 50 are not in contact. This suppresses the transmission of stress from the substrate to the laminate. However, it is not limited to these, and the portion of the first external electrode 30A that overlaps with the laminate 20 when viewed in the first direction L may be in contact with the substrate 50, or the laminate 20 and the substrate 50 may be in contact.

[0056] In cases where the second plating layer 322 is a Sn plating layer and the bonding material H is solder, the second plating layer 322 and the bonding material H may become integrated when the multilayer ceramic capacitor 10 is mounted on the substrate 50, making it difficult to distinguish the boundary between the external electrode 30 and the bonding material H. In such cases, if the shortest distance between the first plating layer 321 and the substrate 50 is less than or equal to the thickness of the first plating layer 321, the external electrode 30 and the substrate 50 are considered to be in contact.

[0057] The multilayer ceramic capacitor 10 has a capacitor-side opposing surface 35 that faces the inner circumferential surface 57 of the opening 55 in the Z direction, and the inner circumferential surface 57 of the opening 55 has a substrate-side opposing surface 58 that faces the capacitor-side opposing surface 35 in the Z direction.

[0058] For example, the first external electrode 30A has a first capacitor-side opposing surface 35A that faces the inner circumferential surface 57 in the Z direction, and the inner circumferential surface 57 has a first substrate-side opposing surface 58A that faces the first capacitor-side opposing surface 35A in the Z direction.

[0059] The first capacitor-side opposing surface 35A is provided on the portion of the first external electrode 30A that is located on the fifth surface F5 and the portion of the first external electrode 30A that is located on the sixth surface F6.

[0060] The first substrate-side opposing surface 58A is provided on each portion of the inner circumferential surface 57 that faces the Y direction.

[0061] In the cross-section (referred to as the "WT cross-section") of the substrate-mounted multilayer ceramic capacitor 1, parallel to the second direction W and the stacking direction T, the capacitor-side opposing surface 35 has a capacitor-side inclined surface 36 that is inclined with respect to the stacking direction T and the second direction W, and the substrate-side opposing surface 58 has a substrate-side inclined surface 59 that is inclined with respect to the stacking direction T and the second direction W.

[0062] For example, in a WT cross-section passing through the central part of the first external electrode 30A in the first direction L, the first capacitor-side opposing surface 35A has a first capacitor-side inclined surface 36A that is inclined with respect to the stacking direction T and the second direction W, and the first substrate-side opposing surface 58A has a first substrate-side inclined surface 59A that is inclined with respect to the stacking direction T and the second direction W.

[0063] The first capacitor-side opposing surface 35A is, for example, entirely the first capacitor-side opposing surface 35A. The first substrate-side opposing surface 58A is, for example, entirely the first substrate-side inclined surface 59A.

[0064] In the WT cross-section, the acute angle between the capacitor-side inclined surface 36 and the second direction W is more obtuse than the acute angle between the substrate-side inclined surface 59 and the second direction W.

[0065] For example, in a cross-section of the first external electrode 30A passing through the center in the first direction L, the acute angle ("θ11") between the first capacitor-side inclined surface 36A and the second direction W is obtuse compared to the acute angle ("θ12") between the first substrate-side inclined surface 59A and the second direction W.

[0066] In the WT cross-section, it is preferable that the obtuse angle between the portion of the external electrode 30 that is positioned on the first surface F1 and the capacitor-side inclined surface 36 is between 110° and 135°.

[0067] For example, in a cross-section of the first external electrode 30A passing through the central part in the first direction L, it is preferable that the obtuse angle ("θ13") between the portion of the first external electrode 30A that is positioned on the first surface F1 and the first capacitor-side inclined surface 36A is between 110° and 135°.

[0068] In the WT cross-section, the acute angle between the capacitor-side inclined surface 36 and the second direction W is preferably 45° or more and 70° or less, and the angle obtained by subtracting the acute angle between the substrate-side inclined surface 59 and the second direction W from the acute angle between the capacitor-side inclined surface 36 and the second direction W is preferably greater than 0° and 5° or less.

[0069] For example, in a cross-section of the first external electrode 30A passing through the center of the first direction L, the acute angle θ11 formed by the first capacitor-side inclined surface 36A and the second direction W is preferably 45° or more and 70° or less, and the angle obtained by subtracting the acute angle θ12 formed by the first substrate-side inclined surface 59A and the second direction W from the acute angle θ11 formed by the first capacitor-side inclined surface 36A and the second direction W is preferably greater than 0° and 5° or less.

[0070] The portion of the external electrode 30 that is positioned on the first surface F1 and the substrate 50 are spaced apart from each other.

[0071] For example, the portion of the first external electrode 30A that is positioned on the first surface F1 and the substrate 50 are spaced apart from each other. The entire first surface F1, when viewed in the stacking direction T, overlaps with the internal space of the opening 55.

[0072] Furthermore, the portion of the second external electrode 30B positioned on the fifth surface F5 is in contact with the substrate 50 (specifically, the inner circumferential surface 57), and the portion of the second external electrode 30B positioned on the sixth surface F6 is in contact with the substrate 50 (specifically, the inner circumferential surface 57).

[0073] Preferably, the portion of the second external electrode 30B that is positioned on the fourth surface F4 is not in contact with the substrate 50. This suppresses the transmission of stress from the substrate to the laminate.

[0074] The second external electrode 30B has a second capacitor-side opposing surface 35B that faces the inner circumferential surface 57 in a direction perpendicular to the first substrate surface SF1. The inner circumferential surface 57 has a second substrate-side opposing surface 58B that faces the second capacitor-side opposing surface 35B in a direction perpendicular to the first substrate surface SF1.

[0075] For example, in a cross-section WT passing through the central part of the second external electrode 30B in the first direction L, the second capacitor-side opposing surface 35B includes a second capacitor-side inclined surface 36B that is inclined with respect to the stacking direction T and the second direction W. The second capacitor-side opposing surface 35B is, for example, entirely the second capacitor-side opposing surface 35B.

[0076] The second substrate-side opposing surface 58B includes a second substrate-side inclined surface 59B that is inclined with respect to the stacking direction T and the second direction W. For example, the entire second substrate-side opposing surface 58B is the first substrate-side inclined surface 59A.

[0077] In the cross-section of the second external electrode 30B passing through the center of the first direction L, the acute angle ("θ21") between the second capacitor-side inclined surface 36B and the second direction W is obtuse compared to the acute angle ("θ22") between the second substrate-side inclined surface 59B and the second direction W.

[0078] In a cross-section of the second external electrode 30B passing through the central part in the first direction L, it is preferable that the obtuse angle ("θ23") between the portion of the second external electrode 30B positioned on the first surface F1 and the second capacitor-side inclined surface 36B is 110° or more and 135° or less. Furthermore, it is preferable that the obtuse angle between the second surface F2 and the second capacitor-side inclined surface 36B is 110° or more and 135° or less.

[0079] In the cross-section of the second external electrode 30B passing through the center of the first direction L, the acute angle θ21 between the second capacitor-side inclined surface 36B and the second direction W is preferably 45° or more and 70° or less, and the angle obtained by subtracting the acute angle θ22 between the second substrate-side inclined surface 59B and the second direction W from the acute angle θ21 between the second capacitor-side inclined surface 36B and the second direction W is preferably greater than 0° and 5° or less.

[0080] The portion of the second external electrode 30B that is positioned on the first surface F1 and the substrate 50 are spaced apart from each other.

[0081] Note that the first capacitor-side opposing surface 35A and the second capacitor-side opposing surface 35B correspond to the capacitor-side opposing surface 35, respectively. The first capacitor-side inclined surface 36A and the second capacitor-side inclined surface 36B correspond to the capacitor-side inclined surface 36, respectively. The first substrate-side opposing surface 58A and the second substrate-side opposing surface 58B correspond to the substrate-side opposing surface 58, respectively. The first substrate-side inclined surface 59A and the second substrate-side inclined surface 59B correspond to the substrate-side inclined surface 59, respectively.

[0082] Furthermore, each cross-section of the substrate-mounted multilayer ceramic capacitor 1 is exposed, for example, by polishing. The dimensions and angles of each part are measured by observing the exposed cross-section with an electron microscope.

[0083] (Method of manufacturing a multilayer ceramic capacitor 10) Next, a method for manufacturing the multilayer ceramic capacitor 10 of this embodiment will be described.

[0084] (Internal electrode pattern formation process) First, a ceramic green sheet is prepared, which is formed from a ceramic slurry into a sheet. The ceramic green sheet contains ceramic raw materials, including dielectric ceramic material, as well as a binder and solvent. Additives containing rare earth elements may also be added to the ceramic raw materials. A pattern of internal electrodes 25 (sometimes simply called the "internal electrode pattern") is printed onto the ceramic green sheet using a conductive paste. The shape of the internal electrode pattern, when viewed in the stacking direction T, is, for example, rectangular. This yields a ceramic green sheet for the inner layer on which the internal electrodes 25 are arranged. The internal electrode pattern is formed by printing methods such as screen printing, gravure printing, or letterpress printing.

[0085] (Lamination process) Next, ceramic green sheets for the inner layer are laminated. The ceramic green sheets for the inner layer are laminated such that the internal electrode patterns are offset by half a pitch in the length direction L between adjacent sheets. Then, on both sides of the laminated ceramic green sheets for the inner layer in the lamination direction T, ceramic green sheets for the outer layer 22 are laminated. The ceramic green sheets for the outer layer are heat-pressed onto the ceramic green sheets. This gives rise to the mother block. The mother block is pressed in the lamination direction T by means of a hydrostatic press or the like.

[0086] Each outer layer 22 may consist of multiple ceramic green sheets laminated together, or it may consist of a single ceramic green sheet. Furthermore, the ceramic green sheet for the inner layer and the ceramic green sheet for the outer layer may contain different components.

[0087] (Mother block cutting process) Next, the mother block is divided along cutting lines corresponding to the dimensions of the laminate. The mother block is cut, for example, using a cutting device having a cutting blade. The mother block is cut, for example, along a first direction L in the stacking direction T, and along a second direction W in the stacking direction T. This yields multiple rectangular blocks (referred to as "laminated chips"). It is preferable that the corners and edges of the laminated chips be rounded, for example, by barrel polishing.

[0088] When the mother block is cut along the first direction L in the stacking direction T, for example, the cutting blade is pressed against the mother block in a direction oblique to the stacking direction T and the second direction W. As a result, the fifth face F5 and the sixth face F6 of the mother block are formed obliquely to the stacking direction T and the second direction W, respectively.

[0089] (Laminate firing process) Next, the laminated chips are heated in a nitrogen atmosphere at a predetermined firing temperature for a predetermined time. This yields the laminate 20. The inclined surface of the laminate 20 may be formed by polishing the outer surface of the laminate 20. In the cutting process, the mother block does not necessarily have to be cut obliquely with respect to the lamination direction T.

[0090] (Base electrode layer formation process) Next, a base electrode layer 31 is formed on the third surface F3 and the fourth surface F4 of the laminate 20, respectively. A conductive paste containing glass and metal is applied onto the laminate 20. The base electrode layer 31 is formed to cover, for example, the entirety of either the third surface F3 or the fourth surface F4, a part of the first surface F1 or the second surface F2, and a part of the fifth surface F5 or the sixth surface F6. However, it is not limited to this, and the base electrode layer 31 may be placed only on the third surface F3. The base electrode layer 31 may be placed only on the fourth surface F4.

[0091] (Underlay electrode layer curing process) Next, the laminate 20 on which the base electrode layer 31 is formed is heated in a nitrogen atmosphere at a predetermined firing temperature for a predetermined time. This causes the base electrode layer 31 to be baked onto the laminate 20. Note that the laminate firing process and the base electrode layer baking process may be performed simultaneously after the material for the base electrode layer 31 has been placed on the laminate chip.

[0092] (Plating process) Next, a plating layer 32 is formed on the base electrode layer 31. First, a first plating layer 321 is formed on the base electrode layer 31. Then, a second plating layer 322 is formed on the first plating layer 321. The first plating layer 321 is formed, for example, by Ni plating. The second plating layer 322 is formed, for example, by Sn plating. The first plating layer 321 and the second plating layer 322 are formed sequentially, for example, by an electroplating method. This forms the external electrode 30.

[0093] Furthermore, the shape of the external electrode 30 as viewed in the first direction L is formed to be roughly identical to the shape of the laminate 20 as viewed in the first direction L, but scaled up in a similar manner. For this reason, the surface of the portion of the external electrode 30 that is positioned on the fifth surface F5 and the surface of the portion of the external electrode 30 that is positioned on the sixth surface F6 are oblique to the lamination direction T and the second direction.

[0094] However, the shape of the external electrode 30 as viewed in the first direction L can also be adjusted by adjusting the shape of the base electrode layer 31. The shape of the base electrode layer 31 can be adjusted, for example, by adjusting the shape of the conductive paste with a blade or the like during the base electrode layer formation process, or by polishing the base electrode layer 31 after firing. For this reason, surfaces that are inclined with respect to the lamination direction T do not necessarily have to be formed on the surface of the laminate 20. The shape of the external electrode 30 as viewed in the first direction L does not necessarily have to be formed to be identical to the shape obtained by similarly scaling the shape of the laminate 20 as viewed in the first direction L.

[0095] As a result of the above steps, the multilayer ceramic capacitor 10 shown in Figure 1 is obtained.

[0096] (Method of mounting the multilayer ceramic capacitor 10) Next, the method for mounting the multilayer ceramic capacitor 10 onto the substrate 50 will be described. The multilayer ceramic capacitor 10 is mounted onto the substrate 50, for example, by reflow soldering.

[0097] Prior to soldering, an insulating film 53 is placed on the first substrate surface SF1. The insulating film 53 is placed on the portion of the first substrate surface SF1 where no lands 52 are provided. The insulating film 53 may also be placed on the inner circumferential surface 57 of the opening 55.

[0098] Next, a solder paste is prepared as the bonding material H. The solder paste is placed on the land 52. Then, the multilayer ceramic capacitor 10 is placed on the substrate 50. The multilayer ceramic capacitor 10 is inserted into the opening 55. The external electrode 30, the land 52, and the solder are in contact with or close to each other in the direction in which the first substrate surface SF1 extends. Next, the substrate 50 on which the multilayer ceramic capacitor 10 is placed is heated in a reflow oven to the reflow temperature of the solder. This melts the solder and connects the external electrode 30 and the land 52.

[0099] As a result, the multilayer ceramic capacitor 10 is mounted on the substrate 50. A multilayer ceramic capacitor 1 with a substrate, as shown in Figure 1, is obtained.

[0100] (Effects according to the embodiment) According to this embodiment, the following effects can be obtained.

[0101] According to this embodiment, the substrate-mounted multilayer ceramic capacitor 1 includes an inner layer portion 21 containing a plurality of alternately stacked dielectric layers 24 and a plurality of internal electrodes 25, and a laminate 20 having a first surface F1 and a second surface F2 that are opposite to and parallel to the stacking direction T, a third surface F3 and a fourth surface F4 that are opposite to a first direction L perpendicular to the stacking direction, and a fifth surface F5 and a sixth surface F6 that are opposite to a second direction W perpendicular to the stacking direction T and the first direction L. The multilayer ceramic capacitor 10 has a first external electrode 30A positioned on the third surface F3 and extending to the first surface F1, the second surface F2, the fifth surface F5, and the sixth surface F6, and a second external electrode 30B positioned on the fourth surface F4 and extending to the first surface F1, the second surface F2, the fifth surface F5, and the sixth surface F6; and a substrate 50 having a first substrate surface SF1 and a second substrate surface SF2 which are opposing planes, on which the multilayer ceramic capacitor is mounted. The dimension in the second direction W of the portion of the first external electrode 30A that overlaps with the first surface F1 when viewed in the stacking direction T is smaller than the dimension in the second direction W of the portion of the first external electrode 30A that overlaps with the second surface F2 when viewed in the stacking direction T, and the dimension in the second direction W of the portion of the second external electrode 30B that overlaps with the first surface F1 when viewed in the stacking direction T is smaller than the dimension in the second direction W of the portion of the second external electrode 30B that overlaps with the second surface F2 when viewed in the stacking direction T. The first surface F1 and the second surface F2 are located on opposite sides of the first substrate surface SF1.

[0102] With this configuration, the multilayer ceramic capacitor 10 can be embedded in the substrate 50, thus reducing the height of the substrate-mounted multilayer ceramic capacitor 1. Since the substrate-mounted multilayer ceramic capacitor 1 can be reduced in height without reducing the height of the multilayer ceramic capacitor 10 itself, the substrate-mounted multilayer ceramic capacitor 1 can be reduced in height without reducing the number of layers of dielectric layers 24 and internal electrodes 25.

[0103] Therefore, it is possible to provide a substrate-mounted multilayer ceramic capacitor 1 that can achieve both high capacitance and a low profile.

[0104] Furthermore, it is possible to easily wrap the bonding material H around the portion of the external electrode 30 that is positioned on the fifth surface F5 and the portion of the external electrode 30 that is positioned on the sixth surface F6. This makes it easier to maintain the mounting position of the multilayer ceramic capacitor 10.

[0105] According to this embodiment, the portion of the external electrode 30 that is positioned on the fifth surface F5 (in other words, the portion of the external electrode 30 that overlaps with the laminate 20 when viewed from one side in the second direction W) is in contact with the substrate 50, and the portion of the external electrode 30 that is positioned on the sixth surface F6 (in other words, the portion of the external electrode 30 that overlaps with the laminate 20 when viewed from the other side in the second direction W) is in contact with the substrate 50.

[0106] With this configuration, it is possible to suppress the multilayer ceramic capacitor 10 from rotating around the first direction L, making it easier to maintain the mounting orientation of the multilayer ceramic capacitor 10.

[0107] According to this embodiment, the substrate 50 has an opening 55 that has an opening 56 that opens on the first substrate surface SF1 and an inner circumferential surface 57, the multilayer ceramic capacitor 10 has a capacitor-side opposing surface 35 that faces the inner circumferential surface 57 in the Z direction, and the inner circumferential surface 57 has a substrate-side opposing surface 58 that faces the capacitor-side opposing surface 35 in the Z direction.

[0108] With this configuration, the multilayer ceramic capacitor can be supported by the substrate-side opposing surface, thereby preventing the multilayer ceramic capacitor 10 from moving relative to the substrate 50 in the stacking direction T. Furthermore, it is possible to prevent the multilayer ceramic capacitor at the opening 55 from falling out of the substrate 50.

[0109] According to this embodiment, in the WT cross-section, the capacitor-side opposing surface 35 includes a capacitor-side inclined surface 36 that is inclined with respect to the stacking direction T and the second direction W, and the substrate-side opposing surface 58 includes a substrate-side inclined surface 59 that is inclined with respect to the stacking direction T and the second direction W.

[0110] With this configuration, the opening 56 of the opening 55 can be widened while the back side of the opening 55 (the side of the second substrate surface SF2) can be narrowed. By widening the opening 56, it becomes easier to insert the multilayer ceramic capacitor 10 into the opening 55. By narrowing the back side of the opening 55, it becomes easier to position the multilayer ceramic capacitor 10 in the desired location. Therefore, the manufacturing of the substrate-mounted multilayer ceramic capacitor 1 can be made easier.

[0111] Furthermore, by narrowing the back side of the opening 55, it becomes easier to maintain the mounting orientation of the multilayer ceramic capacitor 10.

[0112] According to this embodiment, in the WT cross-section, the acute angle formed by the capacitor-side inclined surface 36 and the second direction W is more obtuse than the acute angle formed by the substrate-side inclined surface 59 and the second direction W.

[0113] With this configuration, the dimension of the opening 56 in the second direction W can be made larger than the dimension of the portion of the multilayer ceramic capacitor 10 that is inserted into the opening 55 in the second direction W. This makes it easier to insert the multilayer ceramic capacitor 10 into the opening 55.

[0114] According to this embodiment, in the WT cross-section, the obtuse angle between the first surface F1 and the capacitor-side inclined surface 36 is 110° or more and 135° or less.

[0115] With this configuration, it is more preferable to make it easier to insert the multilayer ceramic capacitor 10 into the opening 55 and to make it easier to maintain the mounting position of the multilayer ceramic capacitor 10.

[0116] According to this embodiment, in the WT cross-section, the acute angle between the capacitor-side inclined surface 36 and the second direction W is 45° or more and 70° or less, and the angle obtained by subtracting the acute angle between the substrate-side inclined surface 59 and the second direction W from the acute angle between the capacitor-side inclined surface 36 and the second direction W is greater than 0° and 5° or less.

[0117] With this configuration, it is more preferable to make it easier to insert the multilayer ceramic capacitor 10 into the opening 55 and to make it easier to maintain the mounting position of the multilayer ceramic capacitor 10.

[0118] According to this embodiment, the opening 55 penetrates the substrate 50 in the Z direction.

[0119] With this configuration, it becomes easier to insert the multilayer ceramic capacitor deeper into the opening, making it easier to reduce the height of the substrate-mounted multilayer ceramic capacitor.

[0120] According to this embodiment, the portion of the external electrode 30 that is placed on the first surface F1 and the substrate 50 are spaced apart from each other.

[0121] If the expansion and contraction vibrations of the inner layer 21 are transmitted to the substrate 50, there is a risk of so-called "squeaking." When the dielectric layer 24 is formed of a high dielectric constant material such as BaTiO, the expansion and contraction of the dielectric layer 24 in response to the application of voltage becomes relatively large, making squeaking more likely to occur. However, with this configuration, the contact area between the substrate 50 and the multilayer ceramic capacitor 10 can be reduced, thereby suppressing the transmission of the expansion and contraction vibrations of the inner layer 21 to the substrate. Furthermore, by applying this configuration to a multilayer ceramic capacitor 10 in which the dielectric layer 24 is formed of a high dielectric constant material, it is possible to increase the capacitance of the multilayer ceramic capacitor 10 while suppressing the occurrence of squeaking.

[0122] Furthermore, when the substrate 50 flexes, stress may be transmitted from the substrate 50 to the multilayer ceramic capacitor 10, potentially causing structural defects such as cracks in the laminate 20. However, this configuration makes it possible to suppress the transmission of stress from the substrate 50 to the laminate 20. This suppresses the occurrence of structural defects in the laminate 20.

[0123] (Second Embodiment) Hereinafter, a multilayer ceramic capacitor 201 with a substrate according to the second embodiment of the present invention will be described with reference to Figure 8. In the following description, the differences from the multilayer ceramic capacitor 210 of the first embodiment will be explained in detail. Components that are the same as in the first embodiment are denoted by the same reference numerals, and detailed descriptions are omitted.

[0124] The shape of the opening 255 in the substrate 250 of the second embodiment is different from the shape of the opening 55 in the first embodiment.

[0125] As shown in Figure 8, the opening 255 is a bottomed recess that opens on the first substrate surface SF1 of the substrate 250. The opening 255 does not penetrate the substrate 250 in the Z direction. This prevents the multilayer ceramic capacitor 210 from slipping through the opening 255 and falling off the substrate 250. It also prevents the bonding material H from falling through the opening 255 when mounting the multilayer ceramic capacitor 210 to the substrate 250.

[0126] In a cross-section parallel to the Y and Z directions of the substrate 250, the inner circumferential surface 257 of the opening 255 has, for example, a pair of side portions 257a that extend from the opening 256 of the opening 255 to the middle of the substrate 250 in the Z direction, and that inclin to approach the center of the opening 255 in the Y direction as one moves from the first substrate surface SF1 side toward the second substrate surface SF2 side, and a bottom portion 257b that extends in the plane direction of the first substrate surface SF1 in the middle of the substrate 250 in the Z direction and connects the two side portions. The shape of the internal space of the opening 255 as seen in the X direction is a trapezoidal shape that tapers from the first substrate surface SF1 side toward the second substrate surface SF2 side.

[0127] The shape of the first external electrode 230A of the multilayer ceramic capacitor 10 in the second embodiment is different from the shape of the first external electrode 30A in the first embodiment.

[0128] The shape of the first external electrode 230A, when viewed in the first direction L, is a roughly hexagonal shape in which a rectangle is positioned on the second surface F2 side and an isosceles trapezoid that narrows towards the first surface F1 side.

[0129] The outer surface of the portion of the first external electrode 230A that is positioned on the fifth surface F5 includes two or more portions that, when viewed in the first direction L, have different angles with respect to the stacking direction T and the second direction W. The outer surface of the portion of the first external electrode 230A that is positioned on the fifth surface F5 extends, for example, parallel to the stacking direction T from the second surface F2 side toward the first surface F1 side, and further extends with an inclination that approaches the center of the laminate 220 in the second direction W as it moves from the second surface F2 side toward the first surface F1 side.

[0130] The outer surface of the portion of the first external electrode 230A that is positioned on the sixth surface F6 includes two or more portions that, when viewed in the first direction L, have different angles with respect to the stacking direction T and the second direction W. The outer surface of the portion of the first external electrode 230A that is positioned on the sixth surface F6 extends, for example, parallel to the stacking direction T from the second surface F2 side toward the first surface F1 side, and further extends with an inclination that approaches the center of the laminate 220 in the second direction W as it moves from the second surface F2 side toward the first surface F1 side.

[0131] Of the outer surface of the portion of the first external electrode 230A that is positioned on the fifth surface F5, the portion that is inclined with respect to the stacking direction T and the second direction W faces the inner circumferential surface 257 (each side portion 257a and bottom portion 257b), and more specifically, is in contact with it. Of the outer surface of the portion of the first external electrode 230A that is positioned on the sixth surface F6, the portion that is inclined with respect to the stacking direction T and the second direction W faces the inner circumferential surface 257 (each side portion 257a and bottom portion 257b), and more specifically, is in contact with it.

[0132] Therefore, the portion of the outer surface of the part of the first external electrode 230A that is positioned on the fifth surface F5, the portion of the outer surface of the part of the first external electrode 230A that is positioned on the first surface F1, and the portion of the outer surface of the part of the first external electrode 230A that is positioned on the sixth surface F6, which is inclined with respect to the stacking direction T and the second direction W, constitute the first capacitor-side opposing surface 235A. The portion of the outer surface of the part of the first external electrode 230A that is positioned on the fifth surface F5, which is inclined with respect to the stacking direction T and the second direction W, and the portion of the outer surface of the part of the first external electrode 230A that is positioned on the sixth surface F6, which is inclined with respect to the stacking direction T and the second direction W, constitute the first capacitor-side inclined surface 236A.

[0133] Furthermore, the inner circumferential surface 257 has a first substrate-side opposing surface 258A that faces the first capacitor-side opposing surface 235A in the Z direction. Each side portion 257a and the bottom portion 257b are the first substrate-side opposing surface 258A. The first substrate-side opposing surface 258A has a first substrate-side inclined surface 259A that is inclined with respect to the stacking direction T and the second direction W. Each side portion 257a is the first substrate-side inclined surface 259A.

[0134] The portion of the first external electrode 230A that is positioned on the first surface F1 is in contact with or close proximity to the substrate 250 (specifically, the bottom surface portion 257b). This makes it possible to suppress the displacement of the multilayer ceramic capacitor 210 in the Z direction.

[0135] The shape of the laminate 220 in the second embodiment, as viewed in the first direction L, is substantially the same as, for example, the shape of the first external electrode 230A as viewed in the first direction L, but scaled down in a similar manner. However, the shape of the laminate 220 as viewed in the first direction L is not limited to this and can be changed as appropriate.

[0136] Although not shown in the figures, the configuration of the second external electrode 230B in the second embodiment generally corresponds to the configuration of the first external electrode 230 in the second embodiment. However, it is not limited to this, and the configuration of the second external electrode 230B in the second embodiment can be modified as appropriate.

[0137] (Modified examples of the embodiment) Although embodiments of the present invention have been described above, the present invention is not limited to the embodiments described above, and various modifications and variations are possible.

[0138] In the embodiments described above, the shape of the laminate 20 in the WT cross-section was similar to the shape of the external electrode 30 in the WT cross-section, but this is not limited to this. In the laminate 20, the dimension of the second surface F2 in the second direction W may be greater than or equal to the dimension of the first surface F1 in the second direction W. The shape of the laminate 20 in the WT cross-section is not particularly limited and may be substantially rectangular.

[0139] In the embodiments described above, the shape of the WT cross-section of the laminate 20 was substantially the same throughout the entire area of ​​the first direction L of the laminate 20, but this is not limited to this. The dimension of the first surface F1 in the second direction W is not necessarily smaller than the dimension of the second surface F2 in the second direction W throughout the entire area of ​​the first direction L of the multilayer ceramic capacitor 10.

[0140] For example, in the portion of the laminate 20 where the external electrodes 30 are placed, the dimension of the first surface F1 in the second direction W is smaller than the dimension of the second surface F2 in the second direction W, and in the portion of the laminate 20 where the external electrodes 30 are not placed, the dimension of the first surface F1 in the second direction W is greater than or equal to the dimension of the second surface F2 in the second direction W. A laminate 20 with such a configuration can be obtained, for example, by cutting a mother block to obtain a roughly rectangular parallelepiped-shaped laminated chip, and then shaping the portion of the laminated chip near the end in the first direction L into a tapered shape by polishing or the like.

[0141] In the embodiments described above, the shape of the internal electrode 25 as viewed in the stacking direction T was, for example, substantially rectangular, but is not limited to this. For example, in the first internal electrode 25A, the minimum dimension of the first lead portion 25Ab in the second direction W may be smaller than the minimum dimension of the first opposing portion 25Aa in the second direction W. For example, in the first internal electrode 25A, the first opposing portion 25Aa may be substantially rectangular as viewed in the stacking direction T, and the first lead portion 25Ab may have a portion that is connected to the first opposing portion 25Aa and has a substantially trapezoidal shape as viewed in the stacking direction T, where the dimension in the second direction W decreases as it moves away from the first opposing portion 25Aa, and a portion that is connected to the third surface F3 and has a substantially rectangular shape as viewed in the stacking direction T, where the dimension in the second direction W is smaller than that of the first opposing portion 25Aa. Furthermore, the dimension in the second direction W of the portion of the first opposing portion 25Aa that is closer to the third surface F3 may be smaller than the dimension in the second direction W of the portion of the first opposing portion 25Aa that is further from the third surface F3.

[0142] By reducing the dimension of the first lead portion 25Ab in the second direction W, it becomes easier to secure the distance between the first lead portion 25Ab and the outer surface of the laminate 20. This suppresses the reach of moisture from the outside of the laminate 20 to the first lead portion 25Ab, thereby improving moisture resistance reliability. When a taper is formed on the outer surface of the portion of the laminate 20 where the external electrode 30 is located, it becomes easier to secure the distance between the outer surface of the laminate 20 and the first internal electrode 25A (first lead portion 25Ab). The same applies to the second internal electrode 25B.

[0143] Furthermore, by increasing the dimensions of the first opposing portion 25Aa in the second direction W and the dimensions of the second opposing portion 25Ba in the second direction W, the opposing area between the internal electrodes 25 can be increased. This increases the capacitance. Therefore, it is possible to increase the capacitance while improving moisture resistance reliability.

[0144] Furthermore, in at least one of the following portions of the laminate 20, where the position of the first lead portion 25Ab and the first direction L overlap, and where the position of the second lead portion 25Bb and the first direction L overlap, the dimension of the first surface F1 in the second direction W is made smaller than the dimension of the second surface F2 in the second direction W, while in the portion of the laminate 20 where the position of the first opposing portion 25Aa and the first direction L overlap, the dimension of the first surface F1 in the second direction W is made greater than or equal to the dimension of the second surface F2 in the second direction W. This makes it easier to increase the dimensions of the first opposing portion 25Aa and the second opposing portion 25Ba in the second direction W, while reducing at least one of the dimensions of the first lead portion 25Ab and the second lead portion 25Bb in the second direction W. This makes it easier to improve moisture resistance reliability and capacitance.

[0145] The configuration of the external electrode 30 is not limited to those of the embodiments described above. For example, the external electrode 30 may include a resin electrode layer.

[0146] The resin electrode layer is formed, for example, on the base electrode layer 31 and between the first plating layer 321. The resin electrode layer may also be formed directly on the laminate 20. The resin electrode layer is formed, for example, as a layer containing conductive particles and a thermosetting resin. The resin electrode layer may be a single layer or multiple layers.

[0147] The resin electrode layer can function as a cushion when the multilayer ceramic capacitor 10 inserted into the opening 55 is sandwiched between the substrate 50. Therefore, the resin electrode layer can mitigate the force transmitted from the substrate 50 to the multilayer ceramic capacitor 10. This can suppress the occurrence of cracks in the multilayer ceramic capacitor 10.

[0148] In each of the above embodiments, a single substrate-mounted multilayer ceramic capacitor 1 comprises one multilayer ceramic capacitor 10, but it may comprise two or more multilayer ceramic capacitors 10. The dimensions of the substrate 50 of the substrate-mounted multilayer ceramic capacitor 1 in the X and Y directions are not particularly limited. Electronic components other than the multilayer ceramic capacitor 10 may be mounted on the substrate 50 of the substrate-mounted multilayer ceramic capacitor 1, or only the multilayer ceramic capacitor 10 may be mounted on it. The substrate of the substrate-mounted multilayer ceramic capacitor may be a so-called interposer. By mounting the multilayer ceramic capacitor to a substrate different from the interposer via a substrate acting as an interposer, the transmission of vibrations of the multilayer ceramic capacitor to a substrate different from the interposer can be suppressed. This can suppress the generation of noise.

[0149] The arrangement of the lands 52 is not limited to that of the above embodiment. The lands 52 may extend into the interior of the opening 55. The arrangement of the insulating film 53 is not limited to that of the above embodiment. The insulating film 53 may extend into the interior of the opening 55. The capacitor-side opposing surface 35 may face the inner circumferential surface 57 in the Z direction via some configuration such as the lands 52 or the insulating film 53. The substrate-side opposing surface 58 may face the capacitor-side opposing surface 35 in the Z direction via some configuration such as the lands 52 or the insulating film 53.

[0150] In each of the embodiments described above, the shape of the opening 56 as viewed in the Z direction was substantially rectangular with the X direction as the longitudinal direction, but it is not limited to this.

[0151] In the embodiments described above, the portion of the inner circumferential surface 57 facing the Y direction was inclined with respect to the Y and Z directions, but it may also extend substantially parallel to the Z direction. In that case, the multilayer ceramic capacitor 10 can be fitted into the portion of the inner circumferential surface 57 facing the Y direction, thereby preventing the multilayer ceramic capacitor 10 from rotating or falling out. The portion of the inner circumferential surface 57 facing the Y direction does not need to be in contact with the multilayer ceramic capacitor 10.

[0152] In each of the above embodiments, the portion of the inner circumferential surface 57 facing the X direction extended substantially parallel to the Z direction, but it may be inclined with respect to the Y and Z directions. The portion of the inner circumferential surface 57 facing the X direction may be in contact with the multilayer ceramic capacitor 10.

[0153] Furthermore, the present invention includes the following combinations.

[0154] <1> A laminate comprising an inner layer portion including a plurality of alternately stacked dielectric layers and a plurality of internal electrodes, a first surface and a second surface extending parallel to the stacking direction, a third surface and a fourth surface facing a first direction perpendicular to the stacking direction, and a fifth surface and a sixth surface facing a second direction perpendicular to the stacking direction and the first direction, a first external electrode disposed on the third surface and extending onto the first surface, the second surface, the fifth surface and the sixth surface, and a second external electrode disposed on the fourth surface and extending onto the first surface, the second surface, the fifth surface and the sixth surface, and a multilayer ceramic capacitor comprising an inner layer portion including a plurality of alternately stacked dielectric layers and a plurality of internal electrodes, a first surface and a second surface extending parallel to the stacking direction A multilayer ceramic capacitor mounted on a substrate, comprising: a substrate having a first substrate surface and a second substrate surface on which the multilayer ceramic capacitor is mounted, wherein the dimension in the second direction of the portion of the first external electrode that overlaps with the first surface when viewed in the stacking direction is smaller than the dimension in the second direction of the portion of the first external electrode that overlaps with the second surface when viewed in the stacking direction, and the dimension in the second direction of the portion of the second external electrode that overlaps with the first surface when viewed in the stacking direction is smaller than the dimension in the second direction of the portion of the second external electrode that overlaps with the second surface when viewed in the stacking direction, and the first surface and the second surface are located on opposite sides of the first substrate surface.

[0155] <2> The portions of the first external electrode and the second external electrode that are positioned on the fifth surface are in contact with the substrate, and the portions of the first external electrode and the second external electrode that are positioned on the sixth surface are in contact with the substrate. <1> Multilayer ceramic capacitor with substrate as described above.

[0156] <3> The substrate has an opening that opens on the first substrate surface and an inner circumferential surface, the multilayer ceramic capacitor has a capacitor-side opposing surface of the opening that faces the inner circumferential surface in a direction perpendicular to the substrate, and the inner circumferential surface has a substrate-side opposing surface that faces the capacitor-side opposing surface in a direction perpendicular to the substrate. <1> or <2> Multilayer ceramic capacitor with substrate as described above.

[0157] <4> In the cross-section of the substrate-mounted multilayer ceramic capacitor parallel to the second direction and the stacking direction, the capacitor-side opposing surface includes a capacitor-side inclined surface that is inclined with respect to the stacking direction and the second direction, and the substrate-side opposing surface includes a substrate-side inclined surface that is inclined with respect to the stacking direction and the second direction. <3> Multilayer ceramic capacitor with substrate as described above.

[0158] <5> In the cross-section of the substrate-mounted multilayer ceramic capacitor in the second direction and parallel to the stacking direction, the acute angle formed by the capacitor-side inclined surface and the second direction is more obtuse than the acute angle formed by the substrate-side inclined surface and the second direction. <4> The multilayer ceramic capacitor described above.

[0159] <6> In the cross-section of the substrate-mounted multilayer ceramic capacitor in the second direction and parallel to the stacking direction, the obtuse angle between the first surface and the capacitor-side inclined surface is 110° or more and 135° or less. <4> or <5> The multilayer ceramic capacitor described above.

[0160] <7> In the cross-section of the substrate-mounted multilayer ceramic capacitor in the second direction and parallel to the stacking direction, the acute angle between the capacitor-side inclined surface and the second direction is 45° or more and 70° or less, and the angle obtained by subtracting the acute angle between the second direction and the substrate-side inclined surface from the acute angle between the capacitor-side inclined surface and the second direction is greater than 0° and 5° or less. <5> ~ <7> A multilayer ceramic capacitor as described in any one of the following:

[0161] <8> The opening penetrates the substrate in a direction perpendicular to the direction in which the first substrate surface extends. <3> ~ <7> The multilayer ceramic capacitor described above.

[0162] <9> The portions of the first external electrode and the second external electrode that are arranged on the first surface, and the substrate are spaced apart from each other. <1> ~ <8> A multilayer ceramic capacitor as described in any one of the following: [Explanation of Symbols]

[0163] 1. Multilayer ceramic capacitor with substrate 10 Multilayer ceramic capacitors 20 Laminate 30A 1st external electrode 30B 2nd external electrode 24 Dielectric layer 25 Internal electrode 35 Capacitor side opposing surface 36 Capacitor-side inclined surface 50 circuit boards 55 Opening 56 Aperture 58 Substrate-side opposing surface 59 Board side slope 67 Inner surface SF1 1st board surface SF2 2nd board surface F1 front page F2 2nd side F3 3rd page F4 4th side F5 5th page F6 6th page

Claims

1. A laminate comprising: an inner layer portion including a plurality of alternately stacked dielectric layers and a plurality of internal electrodes; a first surface and a second surface extending parallel to the stacking direction, respectively; a third surface and a fourth surface facing a first direction perpendicular to the stacking direction; and a fifth surface and a sixth surface facing a second direction perpendicular to the stacking direction and the first direction; a first external electrode disposed on the third surface and extending onto the first surface, the second surface, the fifth surface, and the sixth surface; and a second external electrode disposed on the fourth surface and extending onto the first surface, the second surface, the fifth surface, and the sixth surface; A substrate having a first substrate surface and a second substrate surface which are surfaces opposite to each other in the stacking direction, on which the multilayer ceramic capacitor is mounted, Equipped with, The dimension in the second direction of the portion of the first external electrode that overlaps with the first surface when viewed in the stacking direction is smaller than the dimension in the second direction of the portion of the first external electrode that overlaps with the second surface when viewed in the stacking direction. The dimension in the second direction of the portion of the second external electrode that overlaps with the first surface when viewed in the stacking direction is smaller than the dimension in the second direction of the portion of the second external electrode that overlaps with the second surface when viewed in the stacking direction. A multilayer ceramic capacitor with a substrate, wherein the first surface and the second surface are located on opposite sides of the first substrate surface.

2. The portions of the first external electrode and the second external electrode that are positioned on the fifth surface are in contact with the substrate. The portion of the first external electrode and the second external electrode that is positioned on the sixth surface is in contact with the substrate, as described in claim 1, a multilayer ceramic capacitor with a substrate.

3. The substrate has an opening that opens on the first substrate surface and an inner circumferential surface, The multilayer ceramic capacitor has a capacitor-side opposing surface that faces the inner circumferential surface of the opening in a direction perpendicular to the substrate, The multilayer ceramic capacitor with a substrate according to claim 1 or 2, wherein the inner circumferential surface has a substrate-side opposing surface that faces the capacitor-side opposing surface in a direction perpendicular to the substrate.

4. In the cross-section of the substrate-mounted multilayer ceramic capacitor parallel to the second direction and the stacking direction, The capacitor-side opposing surface includes a capacitor-side inclined surface that is inclined with respect to the stacking direction and the second direction, The substrate-side opposing surface includes a substrate-side inclined surface that is inclined with respect to the stacking direction and the second direction, as described in claim 3, for the multilayer ceramic capacitor with a substrate.

5. In the cross-section of the substrate-mounted multilayer ceramic capacitor parallel to the second direction and the stacking direction, The multilayer ceramic capacitor according to claim 4, wherein the acute angle formed between the capacitor-side inclined surface and the second direction is more obtuse than the acute angle formed between the substrate-side inclined surface and the second direction.

6. In the cross-section of the substrate-mounted multilayer ceramic capacitor parallel to the second direction and the stacking direction, The multilayer ceramic capacitor according to claim 4, wherein the obtuse angle between the first surface and the capacitor-side inclined surface is 110° or more and 135° or less.

7. In the cross-section of the substrate-mounted multilayer ceramic capacitor parallel to the second direction and the stacking direction, The acute angle formed between the capacitor-side inclined surface and the second direction is 45° or more and 70° or less. The multilayer ceramic capacitor according to claim 5, wherein the angle obtained by subtracting the acute angle between the second direction and the substrate-side inclined surface from the acute angle between the capacitor-side inclined surface and the second direction is greater than 0° and less than or equal to 5°.

8. The multilayer ceramic capacitor according to claim 3, wherein the opening penetrates the substrate in a direction perpendicular to the direction in which the first substrate surface extends.

9. The multilayer ceramic capacitor according to claim 1 or 2, wherein the portion of the first external electrode and the second external electrode that is arranged on the first surface and the substrate are spaced apart from each other.

Images