Multilayer ceramic capacitor and method for manufacturing the same

Abstract

This invention provides a multilayer ceramic capacitor with improved internal electrode connectivity, high capacitance, and excellent reliability, as well as a method for manufacturing the same. [Solution] A multilayer ceramic capacitor according to one embodiment includes a capacitor body comprising a dielectric layer and an internal electrode layer, and an external electrode disposed on the outside of the capacitor body, wherein the internal electrode layer comprises nickel (Ni), aluminum (Al), and silicon (Si), and the Al / Si weight ratio is 0.01 to 1.

Description

Technical Field

[0001] The present disclosure relates to a multilayer ceramic capacitor and a method for manufacturing the same.

Background Art

[0002] As electronic components using ceramic materials, there are capacitors, inductors, piezoelectric elements, varistors, or thermistors. Among such ceramic electronic components, a multilayer ceramic capacitor (MLCC) is small in size but has a high capacitance, and can be used in various electronic devices due to its advantage of being easy to mount.

[0003] For example, a multilayer ceramic capacitor (MLCC) can be used as a chip-shaped capacitor mounted on the substrates of various electronic products such as liquid crystal displays (LCDs), plasma display panels (PDPs), organic light-emitting diodes (OLEDs), computers, personal mobile terminals, and smartphones to charge or discharge electricity.

[0004] In order to realize a high-capacitance and small-size MLCC, the thicknesses of the dielectric and the internal electrodes must be reduced. As the dielectric and the internal electrodes are thinned, reliability problems such as short circuits and breakdown voltage (BDV) degradation occur together. On the other hand, in the case of MLCCs used in autonomous driving vehicles, electric vehicles, etc., high reliability is required.

Summary of the Invention

Problems to be Solved by the Invention

[0005] One embodiment provides a multilayer ceramic capacitor with improved internal electrode connectivity, excellent high capacitance, and reliability.

[0006] Another embodiment provides a method for manufacturing the multilayer ceramic capacitor. [Means for solving the problem]

[0007] One embodiment provides a multilayer ceramic capacitor comprising a capacitor body including a dielectric layer and an internal electrode layer, and an external electrode disposed on the outside of the capacitor body, wherein the internal electrode layer comprises nickel (Ni), aluminum (Al), and silicon (Si), and the Al / Si weight ratio is 0.01 to 1.

[0008] The aluminum (Al) may be present in an amount of 0.01 to 1 part by weight per 100 parts by weight of nickel (Ni).

[0009] The silicon (Si) may be present in an amount of 0.01 to 8 parts by weight per 100 parts by weight of nickel (Ni).

[0010] The internal electrode layer may further contain one or more materials selected from tin (Sn), barium (Ba), titanium (Ti), and dysprosium (Dy).

[0011] The internal electrode layer may further include an internal electrode layer interface region defined as a region extending from the interface between the dielectric layer and the internal electrode layer to a depth of 100 nm in the internal electrode layer.

[0012] The internal electrode layer interface region may include a secondary phase comprising aluminum (Al), silicon (Si), and barium (Ba).

[0013] The dielectric layer may contain a barium titanate-based compound comprising barium (Ba) and titanium (Ti).

[0014] The dielectric layer may further contain aluminum (Al) and silicon (Si).

[0015] The aluminum (Al) may be present in an amount of 0.05 to 10 moles per 100 moles of barium (Ba).

[0016] The silicon (Si) may be present in an amount of 0.05 to 10 moles per 100 moles of barium (Ba).

[0017] The dielectric layer may further include a dielectric layer interface region defined as a region extending from the interface between the dielectric layer and the internal electrode layer to a depth of 100 nm in the dielectric layer.

[0018] The dielectric layer interface region may include a secondary phase comprising aluminum (Al), silicon (Si), and barium (Ba).

[0019] The dielectric layer may include a plurality of dielectric crystal grains and grain boundaries disposed between the plurality of dielectric crystal grains.

[0020] The grain boundaries may include secondary phases containing aluminum (Al), silicon (Si), and barium (Ba).

[0021] Another embodiment involves the step of mixing nickel (Ni) and aluminum (Al)-containing compounds to produce a conductive paste, The process involves manufacturing a dielectric green sheet using a dielectric slurry, and printing the conductive paste onto the surface of the dielectric green sheet to form a conductive paste layer, The steps include: manufacturing a dielectric green sheet laminate by stacking dielectric green sheets on which the conductive paste layer is formed; The steps include: firing the dielectric green sheet laminate to manufacture a capacitor body including a dielectric layer and an internal electrode layer; The step includes forming an external electrode on the outside of the capacitor body, At least one of the conductive paste and the dielectric slurry contains a silicon (Si)-containing compound. The internal electrode layer contains nickel (Ni), aluminum (Al), and silicon (Si), A method for manufacturing a multilayer ceramic capacitor is provided, in which the aluminum (Al)-containing compound and the silicon (Si)-containing compound are included in the internal electrode layer at a content ratio such that the Al / Si weight ratio is 0.01 to 1.

[0022] The conductive paste may further contain a tin (Sn)-containing compound.

[0023] The dielectric slurry may contain a barium titanate-based compound.

[0024] The dielectric slurry may further contain a dysprosium (Dy)-containing compound.

Advantages of the Invention

[0025] The multilayer ceramic capacitor according to one embodiment not only has excellent thermal stability of the internal electrode layer, but also has improved connectivity of the internal electrode layer while having a thin thickness, and can have a high capacitance and high reliability.

Brief Description of the Drawings

[0026] [Figure 1] It is a perspective view showing a multilayer ceramic capacitor according to one embodiment. [Figure 2] It is a cross-sectional view of the multilayer ceramic capacitor cut along the line I-I' of FIG. 1. [Figure 3] It is a cross-sectional view of the multilayer ceramic capacitor cut along the line II-II' of FIG. 1. [Figure 4] It is a separated perspective view showing the laminated structure of the internal electrode layer in the capacitor body of FIG. 1. [Figure 5] It is a graph showing the thermomechanical analysis (TMA) curves for the case of Ni alone and the case of a mixture of Ni and Al2O3. [Figure 6] It is a TEM-EDS (transmission electron microscope - energy dispersive spectroscopy) mapping analysis diagram for the internal electrode layer according to Example 1. [Figure 7] This is a TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) mapping analysis diagram of the dielectric layer according to Example 1. [Figure 8] This is a TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) point analysis diagram of the internal electrode layer according to Example 1. [Figure 9] This is a TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) point analysis diagram of the internal electrode layer according to Example 2. [Figure 10] This is a TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) point analysis diagram of the internal electrode layer according to Example 3. [Figure 11] This is a TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) point analysis diagram of the internal electrode layer according to Comparative Example 2. [Modes for carrying out the invention]

[0027] Embodiments of the present invention will be described in detail below with reference to the attached drawings so that they can be easily implemented by a person with ordinary skill in the art to which the present invention pertains. In order to clearly illustrate the present invention, unnecessary parts have been omitted from the drawings, and the same or similar components are denoted by the same reference numerals throughout the specification. Furthermore, some components in the attached drawings are exaggerated, omitted, or shown schematically, and the size of each component does not fully reflect its actual size.

[0028] The accompanying drawings are provided solely to facilitate understanding of the embodiments disclosed herein, and it should be understood that the accompanying drawings do not limit the technical ideas disclosed herein and include all modifications, equivalents, or substitutions that fall within the concept and scope of the invention.

[0029] Terms including ordinal numbers, such as "first," "second," etc., can be used to describe a variety of components, but the components are not limited by such terms. These terms are used solely for the purpose of distinguishing one component from another.

[0030] Furthermore, when a part such as a layer, membrane, region, or plate is said to be "on top of" or "above" another part, this includes not only the case where it is "directly above" the other part, but also the case where there is another part in between. Conversely, when a part is said to be "directly above" another part, it means that there is no other part in between. Also, being "on top of" or "above" a reference part means being located above or below the reference part, and does not necessarily mean being located "on top of" or "above" the opposite side of gravity.

[0031] Throughout the specification, terms such as “includes” or “have” are intended to indicate the presence of features, figures, stages, operations, components, parts, or combinations thereof described in the specification, and should be understood not to preemptively exclude the presence or possibility of adding one or more other features, figures, stages, operations, components, parts, or combinations thereof. Therefore, when a part “includes” a component, this means that it may include other components rather than excluding them, unless otherwise stated.

[0032] Furthermore, throughout the specification, "on a plane" refers to the view of the subject from above, and "on a cross-section" refers to the view of a cross-section obtained by cutting the subject perpendicularly, viewed from the side.

[0033] Furthermore, throughout the specification, the term "connected" does not only mean that two or more components are directly connected, but can also mean that two or more components are indirectly connected through other components, that they are not only physically connected but also electrically connected, or that they are a single unit despite being referred to by different names depending on their position or function.

[0034] A multilayer ceramic capacitor according to one embodiment will be described below with reference to Figures 1 to 4.

[0035] Figure 1 is a perspective view showing a multilayer ceramic capacitor according to one embodiment; Figure 2 is a cross-sectional view of the multilayer ceramic capacitor cut along the line I-I' in Figure 1; Figure 3 is a cross-sectional view of the multilayer ceramic capacitor cut along the line II-II' in Figure 1; and Figure 4 is a separated perspective view showing the laminated structure of the internal electrode layers in the capacitor body of Figure 1.

[0036] The L-axis, W-axis, and T-axis shown in Figures 1 to 4 represent the length, width, and thickness directions of the capacitor body 110, respectively. Here, the thickness direction (T-axis direction) may be perpendicular to the broad surface (main surface) of the sheet-shaped component, and can be used as the same concept as the stacking direction in which the dielectric layer 111 is stacked, for example. The length direction (L-axis direction) extends parallel to the broad surface (main surface) of the sheet-shaped component and may be roughly perpendicular to the thickness direction (T-axis direction), for example, the direction in which the first external electrode 131 and the second external electrode 132 are located on both sides. The width direction (W-axis direction) extends parallel to the broad surface (main surface) of the sheet-shaped component and may be roughly perpendicular to the thickness direction (T-axis direction) and the length direction (L-axis direction), and the length in the length direction (L-axis direction) of the sheet-shaped component may be even longer than the length in the width direction (W-axis direction).

[0037] Referring to Figures 1 to 4, a multilayer ceramic capacitor 100 according to one embodiment includes a capacitor body 110 and external electrodes 131 and 132 positioned outside the capacitor body 110. The external electrodes 131 and 132 may include a first external electrode 131 and a second external electrode 132 positioned at opposite ends of the capacitor body 110 in the longitudinal direction (L-axis direction).

[0038] The capacitor body 110 may, for example, have a roughly hexahedral shape.

[0039] For the convenience of describing one embodiment, the two surfaces of the capacitor body 110 that face each other in the thickness direction (T-axis direction) are defined as the first and second surfaces, the two surfaces connected to the first and second surfaces that face each other in the length direction (L-axis direction) are defined as the third and fourth surfaces, and the two surfaces connected to the first and second surfaces and connected to the third and fourth surfaces that face each other in the width direction (W-axis direction) are defined as the fifth and sixth surfaces.

[0040] For example, the first surface, which is the bottom surface, may be the surface facing the mounting direction. Also, the first to sixth surfaces may be flat, but this is not the only embodiment. For example, the first to sixth surfaces may be curved surfaces with a convex central portion, and the corners that form the boundaries of each surface may be rounded.

[0041] The shape, dimensions, and number of dielectric layers 111 of the capacitor body 110 are not limited to those shown in the drawings of this embodiment.

[0042] The capacitor body 110 includes a plurality of dielectric layers 111 and internal electrode layers 121 and 122. Specifically, the capacitor body 110 includes a plurality of dielectric layers 111 and first internal electrode layers 121 and second internal electrode layers 122 that are alternately arranged in the thickness direction (T-axis direction) with the dielectric layers 111 in between.

[0043] At this time, the boundaries between adjacent dielectric layers 111 of the capacitor body 110 can become so integrated that they are difficult to confirm without using a scanning electron microscope (SEM).

[0044] The capacitor body 110 may include an active region and cover regions 112, 113.

[0045] The active region is a region in which the dielectric layer 111 and the internal electrode layers 121 and 122 are arranged alternately, and is the part that contributes to the formation of capacitance in the multilayer ceramic capacitor 100. Specifically, the active region may be a region in which the first internal electrode layer 121 or the second internal electrode layer 122, which are stacked along the thickness direction (T-axis direction), overlap.

[0046] The cover regions 112 and 113 are margin portions in the thickness direction and can be arranged on the first and second surfaces of the active region, respectively, in the thickness direction (T-axis direction). Such cover regions 112 and 113 may be formed by a single dielectric layer 111 or by two or more dielectric layers 111 being laminated on the upper and lower surfaces of the active region, respectively.

[0047] Furthermore, the capacitor body 110 may also include a side margin region.

[0048] The side margin region is a widthwise margin portion and can be located on both opposite ends of the active region in the widthwise direction (W-axis direction), i.e., on the fifth and sixth surfaces, respectively. The side margin region is formed when applying a conductive paste layer for the internal electrode layer to the surface of the dielectric green sheet, by applying the conductive paste layer only to a portion of the surface of the dielectric green sheet, and stacking dielectric green sheets without the conductive paste layer on both sides of the dielectric green sheet surface, and then firing, but the formation method is not limited to this.

[0049] The cover regions 112, 113 and the side margin regions serve to prevent damage to the first internal electrode layer 121 and the second internal electrode layer 122 due to physical or chemical stress.

[0050] The internal electrode layers 121 and 122, namely the first internal electrode layer 121 and the second internal electrode layer 122, are electrodes having different polarities and are arranged alternately facing each other along the T-axis direction with the dielectric layer 111 in between, with one end of each exposed through the third and fourth surfaces of the capacitor body 110.

[0051] The first internal electrode layer 121 and the second internal electrode layer 122 can be electrically insulated from each other by the dielectric layer 111 placed in between them.

[0052] The ends of the first internal electrode layer 121 and the second internal electrode layer 122, which are alternately exposed through the third and fourth surfaces of the capacitor body 110, can be electrically connected to the first external electrode 131 and the second external electrode 132, respectively.

[0053] In one embodiment, the internal electrode layers 121 and 122 may contain nickel (Ni), aluminum (Al), and silicon (Si).

[0054] Generally, achieving a thin internal electrode layer requires material miniaturization. The smaller the particle size of the material, the lower the melting point tends to be. This decrease in melting point leads to a reduction in the thermal shrinkage initiation temperature. In the case of metals, which are the materials for the internal electrode layer, the degree to which the melting point decreases is even greater compared to ceramics, which are the materials for the dielectric layer. Therefore, thinning the internal electrode layer results in an increase in sintering mismatch between the internal electrode layer and the dielectric layer during the firing process of multilayer ceramic capacitors. For example, at the point where the sintering mismatch is maximized, a difference of more than 500°C can occur at the sintering point between the dielectric layer and the internal electrode layer. As the internal electrode layer begins to sinter earlier than the dielectric layer, nearby particles aggregate and balling occurs, and in thinly printed areas, cutting occurs first, which can degrade the connectivity of the internal electrode layer.

[0055] To solve these problems, a method of adding a co-material such as barium titanate to the internal electrode layer is used. However, if the amount of co-material added increases, the film density of the internal electrode layer may decrease, and a side effect may occur in which the co-material is squeezed out in the direction of the dielectric layer, increasing the thickness of the dielectric layer.

[0056] According to one embodiment, by including aluminum (Al) and silicon (Si) along with nickel (Ni) in the internal electrode layers 121 and 122, thermal stability is improved, and the connectivity of the internal electrode layers is enhanced even when the internal electrode layers are thinned, thereby ensuring a multilayer ceramic capacitor with high capacitance and high reliability.

[0057] Nickel (Ni) may also be the main component forming the internal electrode layers 121 and 122.

[0058] Aluminum (Al) may originate from a raw material added as a by-component during the formation of the internal electrode layers 121 and 122. For example, the raw material may be an oxide, nitride, or salt compound of Al, or a compound in sol form dispersed in an organic solvent.

[0059] Aluminum (Al) may be a non-reducing substance. This results in a significant sintering delay effect and allows it to penetrate the dielectric layer during firing. Al diffused into the dielectric layer can contribute to improving sintering mismatch, thereby improving the connectivity of the internal electrode layer even when the internal electrode layer is thinned.

[0060] Silicon (Si) may originate from raw materials added as co-materials during the formation of the internal electrode layers 121 and 122, or from raw materials added as a minor component during the formation of the dielectric layer 111. For example, the raw material may be an oxide, nitride, or salt compound of Si, or a compound in sol form dispersed in an organic solvent.

[0061] In the internal electrode layers 121 and 122, the content ratio of aluminum (Al) to silicon (Si), i.e., the Al / Si weight ratio, which is the weight ratio of Al to Si, may be 0.01 to 1, for example, 0.02 to 0.9, 0.03 to 0.8, 0.04 to 0.7, or 0.05 to 0.6. When the Al / Si weight ratio in the internal electrode layers is within the above range, the connectivity of the internal electrode layers is improved, and a multilayer ceramic capacitor according to one embodiment can have high capacitance and high reliability.

[0062] Specifically, in the internal electrode layers 121 and 122, aluminum (Al) may be included in an amount of 0.01 to 1 part by weight per 100 parts by weight of nickel (Ni), for example, 0.05 to 0.95 parts by weight, 0.1 to 0.9 parts by weight, 0.15 to 0.85 parts by weight, or 0.2 to 0.8 parts by weight. When the content of aluminum (Al) in the internal electrode layers is within the above range, the connectivity of the internal electrode layers is improved, and a multilayer ceramic capacitor according to one embodiment can have high capacitance and high reliability.

[0063] In the internal electrode layers 121 and 122, silicon (Si) may be present in an amount of 0.01 to 8 parts by weight per 100 parts by weight of nickel (Ni), for example, 0.05 to 7.5 parts by weight, 0.1 to 7 parts by weight, 0.15 to 6.5 parts by weight, or 0.2 to 6 parts by weight. When the silicon (Si) content in the internal electrode layers is within the above range, the connectivity of the internal electrode layers is improved, allowing the multilayer ceramic capacitor according to one embodiment to have high capacitance and high reliability.

[0064] In addition to the elements mentioned above, the internal electrode layers 121 and 122 may further contain one or more elements selected from tin (Sn), barium (Ba), titanium (Ti), and dysprosium (Dy).

[0065] The elements and their content contained in the internal electrode layers 121 and 122 can be confirmed through TEM-EDS (transmission electron microscopy-energy dispersive spectroscopy) analysis.

[0066] Specifically, after curing the multilayer ceramic capacitor 100 in an epoxy mixture, the L-axis and T-axis surfaces (LT surfaces) of the capacitor body 110 are polished to a depth of 1 / 2 in the W-axis direction. After fixing, the capacitor is maintained in a vacuum atmosphere chamber to obtain a cross-sectional sample that allows observation of the active region where the dielectric layer 111 and the internal electrode layers 121 and 122 intersect. Next, the cross-sectional sample can be measured using a transmission electron microscope (TEM) so that at least one layer each of the dielectric layer and internal electrode layers, for example, 1 to 6 layers, is visible in the active region. For example, the TEM can be used with a focused ion beam (Xe-FIB) under conditions of an acceleration voltage of 200kV in a region of approximately 800nm ​​× 800nm ​​where at least one layer each of the dielectric layer and internal electrode layers is visible in the active region. Next, EDS (energy-dispersive spectroscopy) point analysis of the internal electrode layer is performed through the TEM image of the measured cross-sectional sample to confirm the presence and content of elements such as Ni, Al, and Si in the internal electrode layers 121 and 122. For example, in one embodiment, the content of Al and Si and the Al / Si weight ratio can be obtained by dividing the active region of the cross-sectional sample into three equal parts: upper, middle, and lower, and then specifying three points within the internal electrode layer for each region during the EDS point analysis, resulting in a total of nine points, and averaging the values ​​of these points.

[0067] In addition to Ni, which is included as the main component, the internal electrode layers 121 and 122 may further contain metals such as Cu, Ag, Pd, Au, or alloys thereof.

[0068] Furthermore, the internal electrode layers 121 and 122 may also contain dielectric particles of the same composition as the ceramic material contained in the dielectric layer 111.

[0069] The internal electrode layers 121 and 122 may further include an internal electrode layer interface region, defined as the region extending 100 nm in depth from the interface between the dielectric layer 111 and the internal electrode layers 121 and 122 in the direction of the internal electrode layers. The internal electrode layer interface region may include secondary phases containing aluminum (Al), silicon (Si), and barium (Ba).

[0070] The secondary phase can refer to a new phase deposited after the dielectric green sheet laminate has been fired. The Al, Si, and Ba contained in the secondary phase may exist in compound form, chemically bonded together.

[0071] During the manufacturing of multilayer ceramic capacitors, aluminum (Al) and silicon (Si) diffuse from the internal electrode layer into the dielectric layer during firing, forming a secondary phase of glass components containing Al, Si, and Ba, which promotes the grain growth of the dielectric. When the secondary phase is present at the interface between the dielectric layer and the internal electrode layer, specifically in the internal electrode layer interface region, the firing temperature of the dielectric decreases, promoting the diffusion of additive components such as Dy, and enabling the formation of a core-shell structure of dielectric crystal grains. This improves the connectivity of the internal electrode layer, thereby improving the capacitance characteristics and reliability of the multilayer ceramic capacitor.

[0072] The average thickness of the internal electrode layers 121 and 122 may be 0.1 μm to 2 μm. When the average thickness of the internal electrode layers 121 and 122 is within the above range, the reliability of the multilayer ceramic capacitor is excellent.

[0073] The average thickness of the internal electrode layers 121 and 122 can be measured by scanning electron microscope (SEM) analysis after the multilayer ceramic capacitor 100 has been cured in an epoxy mixture, polished, and then ion milled. For example, a Verios G4 product from Thermofisher Scientific can be used as the scanning electron microscope, with measurement conditions of 10kV and 0.2nA, and the analysis magnification may be 100x. The measurement can be performed so that at least one, three, five, or ten dielectric layers 111 are shown. The arithmetic mean of the thickness of the first internal electrode layer 121 or the second internal electrode layer 122 at 10 points separated by a predetermined interval from the reference point, using the center point in the length direction (L-axis direction) or width direction (W-axis direction) of the measured cross-sectional sample as the reference point. The spacing between the 10 points can be adjusted by the scanning electron microscope (SEM) image scale, for example, between 1 μm and 100 μm, 1 μm and 50 μm, or 1 μm and 10 μm. In this case, all 10 points must be located within the first internal electrode layer 121 or the second internal electrode layer 122. If all 10 points are not located within the first internal electrode layer 121 or the second internal electrode layer 122, the position of the reference point can be changed or the spacing between the 10 points can be adjusted.

[0074] In one embodiment, the dielectric layer 111 may mainly consist of a barium titanate-based compound containing barium (Ba) and titanium (Ti).

[0075] Barium titanate compounds are dielectric base materials that have a high dielectric constant and contribute to the formation of the dielectric constant of the multilayer ceramic capacitor 100.

[0076] As an example, barium titanate compounds may include one or more selected from BaTiO3, Ba(Ti,Zr)O3, Ba(Ti,Sn)O3, (Ba,Ca)TiO3, (Ba,Ca)(Ti,Zr)O3, (Ba,Ca)(Ti,Sn)O3, (Ba,Sr)TiO3, (Ba,Sr)(Ti,Zr)O3, and (Ba,Sr)(Ti,Sn)O3.

[0077] The dielectric layer 111 may further contain aluminum (Al) and silicon (Si).

[0078] The aluminum (Al) in the dielectric layer 111 may originate from raw materials added as by-components during the formation of the internal electrode layers 121 and 122. The aluminum (Al) diffuses from the internal electrode layers into the dielectric layer during firing, thereby improving sintering mismatch.

[0079] In the dielectric layer 111, aluminum (Al) may be present in an amount of 0.05 to 10 moles per 100 moles of barium (Ba), for example, 0.1 to 9 moles, 0.15 to 8 moles, or 0.2 to 7 moles. When the aluminum (Al) content in the dielectric layer is within the above range, the firing temperature of the dielectric can be reduced, and the diffusion of additive components such as dysprosium (Dy) can be promoted. This improves the connectivity of the internal electrode layers, ensuring a multilayer ceramic capacitor with high capacitance and high reliability.

[0080] The silicon (Si) in the dielectric layer 111 may originate from raw materials added as co-materials during the formation of the internal electrode layers 121 and 122. That is, silicon (Si) also diffuses from the internal electrode layers into the dielectric layer during firing. Furthermore, the silicon (Si) in the dielectric layer 111 may originate from raw materials added as minor components during the formation of the dielectric layer 111.

[0081] In the dielectric layer 111, silicon (Si) may be present in an amount of 0.05 to 10 moles per 100 moles of barium (Ba), for example, 0.1 to 9 moles, 0.15 to 8 moles, or 0.2 to 7 moles. When the silicon (Si) content in the dielectric layer is within the above range, the firing temperature of the dielectric can be reduced during the manufacture of the multilayer ceramic capacitor, thereby promoting the diffusion of additive components such as dysprosium (Dy). This improves the connectivity of the internal electrode layers, ensuring a multilayer ceramic capacitor with high capacitance and high reliability.

[0082] The dielectric layer 111 may further contain one or more elements selected from nickel (Ni) and dysprosium (Dy).

[0083] The dielectric layer 111 may further include a dielectric layer interface region, defined as the region extending 100 nm in depth in the dielectric layer direction from the interface between the dielectric layer 111 and the internal electrode layers 121 and 122. The dielectric layer interface region may include a secondary phase containing aluminum (Al), silicon (Si), and barium (Ba). During the manufacturing of multilayer ceramic capacitors, aluminum (Al) and silicon (Si) can diffuse from the internal electrode layer to the dielectric layer during firing to form a secondary phase of glass components containing Al, Si, and Ba. When a secondary phase is included at the interface between the dielectric layer and the internal electrode layer, specifically in the dielectric layer interface region, the firing temperature can be reduced, promoting the diffusion of additive components such as Dy. This improves the connectivity of the internal electrode layer, thereby improving the capacitance characteristics and reliability of the multilayer ceramic capacitor.

[0084] The dielectric layer 111 may include multiple dielectric grains and grain boundaries located between multiple adjacent dielectric grains. The grain boundaries may include a secondary phase containing aluminum (Al), silicon (Si), and barium (Ba). During the manufacturing of multilayer ceramic capacitors, aluminum (Al) and silicon (Si) can diffuse from the internal electrode layer into the dielectric layer during firing to form a secondary phase of glass components containing Al, Si, and Ba. When the grain boundaries contain a secondary phase, the firing temperature can be reduced, promoting the diffusion of additive components such as Dy. This improves the connectivity of the internal electrode layer and enhances the capacitance characteristics and reliability of the multilayer ceramic capacitor.

[0085] The elements contained in the dielectric layer 111 and their content can be confirmed in the same way as the TEM-EDS analysis performed on the internal electrode layers 121 and 122 described above. That is, by performing EDS (energy dispersive spectroscopy) point analysis on the dielectric layer through a TEM image of the cross-sectional sample measured by the method described above, the presence and content of elements such as Ba, Ti, Al, and Si in the dielectric layer 111 can be confirmed. For example, the content of Al and Si in the dielectric layer can be obtained by the average value of a total of nine points, when the active region of the cross-sectional sample is divided into three equal parts: upper, middle, and lower, and three points within the internal electrode layer are specified for each region during the EDS point analysis.

[0086] The average thickness (average length in the T-axis direction) of the dielectric layer 111 may be 0.1 μm to 8.0 μm, for example, 0.1 μm to 6.0 μm. When the average thickness of the dielectric layer 111 is within the above range, the reliability of the multilayer ceramic capacitor is excellent.

[0087] This is a scanning electron microscope (SEM) image of the cross-sectional sample measured as described above. The dielectric layer 111's thickness can be determined by using the arithmetic mean of the thickness of the dielectric layer 111 at 10 points located at predetermined intervals from the reference point, with the reference point being the central point in the length direction (L-axis direction) or width direction (W-axis direction). The interval between the 10 points can be adjusted by the scale of the scanning electron microscope (SEM) image, for example, between 1 μm and 100 μm, 1 μm and 50 μm, or 1 μm and 10 μm. In this case, all 10 points must be located within the dielectric layer 111. If all 10 points are not located within the dielectric layer 111, the position of the reference point can be changed or the interval between the 10 points can be adjusted.

[0088] The capacitor body 110 can be formed by firing a laminate in which multiple dielectric layers 111 and internal electrode layers 121 and 122 are stacked.

[0089] External electrodes 131 and 132, namely the first external electrode 131 and the second external electrode 132, are supplied with voltages of different polarities and can be electrically connected to the exposed portions of the first internal electrode layer 121 and the second internal electrode layer 122, respectively.

[0090] With the above configuration, when a predetermined voltage is applied to the first external electrode 131 and the second external electrode 132, charge is accumulated between the first internal electrode layer 121 and the second internal electrode layer 122, which are opposite each other. At this time, the capacitance of the multilayer ceramic capacitor 100 becomes proportional to the superimposed area of ​​the first internal electrode layer 121 and the second internal electrode layer 122, which are superimposed on each other along the T-axis in the active region.

[0091] The first external electrode 131 and the second external electrode 132 may each include a first connecting portion and a second connecting portion, which are arranged on the third and fourth surfaces of the capacitor body 110 and connected to the first internal electrode layer 121 and the second internal electrode layer 122, respectively, and a first band portion and a second band portion, which are arranged at the corners where the third and fourth surfaces of the capacitor body 110 meet the first and second surfaces or the fifth and sixth surfaces.

[0092] The first band portion and the second band portion extend from the first and second connection portions to a portion of the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110, respectively. The first band portion and the second band portion can serve to improve the adhesion strength of the first external electrode 131 and the second external electrode 132.

[0093] The first external electrode 131 and the second external electrode 132 may each include a sintered metal layer in contact with the capacitor body 110, a conductive resin layer positioned to cover the sintered metal layer, and a plating layer positioned to cover the conductive resin layer.

[0094] The sintered metal layer may contain conductive metals and glass.

[0095] The conductive metal may include one or more selected from copper (Cu), nickel (Ni), silver (Ag), palladium (Pd), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), lead (Pb), and alloys thereof. For example, copper (Cu) may include copper (Cu) alloys. If the conductive metal includes copper, other metals may be included in amounts of 5 moles or less per 100 moles of copper.

[0096] The glass may contain a composition of mixed oxides, for example, one or more selected from the group consisting of silicon oxide, boron oxide, aluminum oxide, transition metal oxide, alkali metal oxide, and alkaline earth metal oxide. The transition metal may be selected from the group consisting of zinc (Zn), titanium (Ti), copper (Cu), vanadium (V), manganese (Mn), iron (Fe), and nickel (Ni); the alkali metal may be selected from the group consisting of lithium (Li), sodium (Na), and potassium (K); and the alkaline earth metal may be one or more selected from the group consisting of magnesium (Mg), calcium (Ca), strontium (Sr), and barium (Ba).

[0097] Selectively, the conductive resin layer can be formed on top of the sintered metal layer, for example, in a form that completely covers the sintered metal layer. On the other hand, the first external electrode 131 and the second external electrode 132 do not have to include a sintered metal layer, in which case the conductive resin layer can be in direct contact with the capacitor body 110.

[0098] The conductive resin layer extends to the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110, and the length of the region where the conductive resin layer extends to the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110 (i.e., the band portion) may be longer than the length of the region where the sintered metal layer extends to the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110 (i.e., the band portion). In other words, the conductive resin layer can be formed on top of the sintered metal layer and can be formed in a manner that completely covers the sintered metal layer.

[0099] The conductive resin layer contains a resin and a conductive metal.

[0100] The resin contained in the conductive resin layer is not particularly limited as long as it has bonding and shock-absorbing properties and can be mixed with conductive metal powder to form a paste. Examples include phenolic resin, acrylic resin, silicone resin, epoxy resin, or polyimide resin.

[0101] The conductive metal contained in the conductive resin layer serves to electrically connect with the first internal electrode layer 121 and the second internal electrode layer 122 or the sintered metal layer.

[0102] The conductive metal contained in the conductive resin layer may be spherical, flake-shaped, or a combination thereof. That is, the conductive metal may consist only of flake-shaped elements, only of spherical elements, or a mixture of flake-shaped and spherical elements.

[0103] Here, spherical can include forms that are not perfectly spherical, for example, forms in which the ratio of the length of the major axis to the length of the minor axis (major axis / minor axis) is 1.45 or less. Flake powder means powder having a flat and elongated shape, and is not particularly limited, but for example, the ratio of the length of the major axis to the length of the minor axis (major axis / minor axis) may be 1.95 or more.

[0104] The first external electrode 131 and the second external electrode 132 may further include a plating layer disposed on the outside of the conductive resin layer.

[0105] The plating layer may include nickel (Ni), copper (Cu), tin (Sn), palladium (Pd), platinum (Pt), gold (Au), silver (Ag), tungsten (W), titanium (Ti), or lead (Pb), either alone or in alloys thereof. For example, the plating layer may be a nickel (Ni) plating layer or a tin (Sn) plating layer, or it may be a configuration in which nickel (Ni) plating layers and tin (Sn) plating layers are sequentially laminated, or it may be a configuration in which tin (Sn) plating layers, nickel (Ni) plating layers, and tin (Sn) plating layers are sequentially laminated. The plating layer may also include multiple nickel (Ni) plating layers and / or multiple tin (Sn) plating layers.

[0106] The plating layer can improve the mountability of the multilayer capacitor 100 on the substrate, structural reliability, durability against external elements, heat resistance, and equivalent series resistance (ESR).

[0107] The following describes a method for manufacturing a multilayer ceramic capacitor 100 according to one embodiment.

[0108] A multilayer ceramic capacitor 100 according to one embodiment is The steps involved in manufacturing the conductive paste, The process involves manufacturing a dielectric green sheet using a dielectric slurry, and printing the conductive paste onto the surface of the dielectric green sheet to form a conductive paste layer, A step of manufacturing a dielectric green sheet laminate by stacking dielectric green sheets on which conductive paste layers are formed, A step of manufacturing a capacitor body including a dielectric layer and an internal electrode layer by firing a dielectric green sheet laminate, The steps include forming external electrodes on the outside of the capacitor body, It can be manufactured through the following process.

[0109] The conductive paste can be manufactured by mixing nickel (Ni) and aluminum (Al)-containing compounds, and optionally further mixing in silicon (Si)-containing compounds.

[0110] For example, the melting point of barium titanate (BaTiO3) may be 1625°C, aluminum oxide (Al2O3) may be 2072°C, and nickel oxide (NiO) may be 1455°C. In other words, when an aluminum (Al)-containing compound is mixed into the conductive paste, it has a higher melting point and superior thermal stability than barium titanate, which is conventionally used as a co-material during internal electrode formation. This improves the connectivity of the internal electrode layer by reducing sintering mismatch.

[0111] The conductive paste may further contain a tin (Sn)-containing compound.

[0112] In addition to nickel (Ni), conductive paste can also be manufactured by further mixing one or more conductive metals selected from copper (Cu), silver (Ag), palladium (Pd), gold (Au), and their alloys.

[0113] Furthermore, the conductive paste can be manufactured by additionally mixing a binder and a solvent. Additionally, barium titanate powder may be mixed in as a co-material if necessary. The co-material can suppress the sintering of the conductive powder during the firing process.

[0114] Dielectric slurry can be manufactured by selectively mixing a barium titanate-based compound, which is the main component powder, with a secondary component powder. The secondary component powder may include, for example, a dysprosium (Dy)-containing compound. The secondary component powder may further selectively contain a silicon (Si)-containing compound.

[0115] The silicon (Si)-containing compound may be included in at least one of the conductive paste and the dielectric slurry.

[0116] Aluminum (Al)-containing compounds and silicon (Si)-containing compounds can be introduced in the internal electrode layers 121 and 122 in content ratios such that the Al / Si weight ratio is 0.01 to 1. For example, they can be introduced in content ratios such as 0.02 to 0.9, 0.03 to 0.8, 0.04 to 0.7, or 0.05 to 0.6. When aluminum (Al)-containing compounds and silicon (Si)-containing compounds are introduced within the above content ratio range, the connectivity of the internal electrode layers is improved, making it possible to obtain a multilayer ceramic capacitor with high capacity and high reliability.

[0117] Aluminum (Al)-containing compounds, silicon (Si)-containing compounds, tin (Sn)-containing compounds, and dysprosium (Dy)-containing compounds may, for example, be oxides, nitrides, salt compounds of Al, Si, Sn, and Dy, or compounds in sol form dispersed in an organic solvent.

[0118] Dielectric slurry can be manufactured by additionally mixing solvents with additives such as dispersants, binders, plasticizers, lubricants, and antistatic agents.

[0119] The dispersant may include, for example, at least one selected from phosphate ester-based dispersants and polycarboxylic acid-based dispersants. The dispersant can be mixed in an amount of 0.1 to 5 parts by weight per 100 parts by weight of the barium titanate compound, for example, 0.3 to 3 parts by weight. When the dispersant is mixed within the above content range, the dispersibility of the dielectric slurry is excellent, and the amount of impurities contained in the manufactured dielectric layer can be reduced.

[0120] The binder may be, for example, an acrylic resin, a polyvinyl butyral resin, a polyvinyl acetal resin, or an ethylcellulose resin. The binder may be added in an amount of 0.1 to 50 parts by weight per 100 parts by weight of the barium titanate compound, for example, 3 to 30 parts by weight. When the binder is mixed within the above content range, the dispersibility of the dielectric slurry is excellent, and the amount of impurities contained in the manufactured dielectric layer can be reduced.

[0121] The plasticizer may be, for example, phthalate compounds such as dioctyl phthalate, benzyl butyl phthalate, dibutyl phthalate, dihexyl phthalate, di(2-ethylhexyl) phthalate, and di(2-ethylbutyl) phthalate; adipic acid compounds such as dihexyl adipic acid and di(2-ethylhexyl) adipic acid; glycol compounds such as ethylene glycol, diethylene glycol, and triethylene glycol; or glycol ester compounds such as triethylene glycol dibutyrate, triethylene glycol di(2-ethylbutyrate), and triethylene glycol di(2-ethylhexanoate). The plasticizer may be added in an amount of 0.1 to 20 parts by weight per 100 parts by weight of the barium titanate compound, for example, 1 to 10 parts by weight. When the plasticizer is mixed within the above content range, the dispersibility of the dielectric slurry is excellent, and the amount of impurities contained in the manufactured dielectric layer can be reduced.

[0122] The solvent may be an aqueous solvent such as water; an alcohol solvent such as ethanol, methanol, benzyl alcohol, or methoxyethanol; a glycol solvent such as ethylene glycol or diethylene glycol; a ketone solvent such as acetone, methyl ethyl ketone, methyl isobutyl ketone, or cyclohexanone; an ester solvent such as butyl acetate, ethyl acetate, carbitol acetate, or butyl carbitol acetate; an ether solvent such as methyl cellosolve, ethyl cellosolve, butyl ether, or tetrahydrofuran; or an aromatic solvent such as benzene, toluene, or xylene. For example, an alcohol solvent or an aromatic solvent can be used, taking into consideration the solubility and dispersibility of the various additives contained in the dielectric slurry. The solvent may be mixed in an amount of 50 to 1000 parts by weight per 100 parts by weight of the barium titanate compound, or for example, 100 to 500 parts by weight. When the solvent is mixed within the above content range, the dielectric slurry components can be thoroughly mixed, and the solvent can be easily removed thereafter.

[0123] The aforementioned dielectric slurry can be mixed using a wet ball mill or a stirring mill. When using zirconia balls in a wet ball mill, a large number of zirconia balls with diameters from 0.1 mm to 10 mm can be used for wet mixing for 8 to 48 hours, or 10 to 24 hours.

[0124] The manufactured dielectric slurry is formed as a dielectric layer after firing.

[0125] Methods for forming the manufactured dielectric slurry into a sheet shape include tape molding methods such as the doctor blade method and the calender roll method, or, for example, an on-roll molding coater with a head discharge system. A dielectric green sheet can then be obtained by drying the molded body.

[0126] A conductive paste layer is formed on the surface of a dielectric green sheet by applying a conductive paste in a predetermined pattern using various printing methods such as screen printing or transfer methods.

[0127] Next, a dielectric green sheet laminate is manufactured by stacking multiple dielectric green sheets with internal electrode patterns formed on them in layers, and then pressing them in the stacking direction. At this time, the dielectric green sheets and internal electrode layer patterns can be stacked such that dielectric green sheets are positioned on the upper and lower surfaces of the dielectric green sheet laminate in the stacking direction.

[0128] The manufacturing dielectric green sheet laminate can be selectively cut to predetermined dimensions by dicing or other methods.

[0129] Furthermore, the dielectric green sheet laminate can be solidified and dried to remove plasticizers and other substances as needed, and after solidification and drying, it can be barrel polished using a horizontal centrifugal barrel polishing machine or the like. In barrel polishing, the dielectric green sheet laminate is placed in a barrel container along with media and polishing fluid, and rotational motion or vibration is applied to the barrel container to polish away unwanted parts such as burrs generated during cutting. After barrel polishing, the dielectric green sheet laminate is washed with a cleaning solution such as water and then dried.

[0130] Next, the dielectric green sheet laminate can be debindered (plasticized) and fired to manufacture a capacitor body.

[0131] The debinding treatment conditions can be appropriately adjusted depending on the composition of the dielectric layer and the internal electrode layer. For example, the heating rate during debinding may be 5°C / hour to 300°C / hour, the support temperature 180°C to 400°C, and the temperature maintenance time 0.5 hours to 24 hours. The atmosphere during debinding may be air or a reducing atmosphere.

[0132] The firing conditions can be appropriately adjusted depending on the main component composition of the dielectric layer and the internal electrode layer. For example, firing can be carried out at a temperature of 1100°C to 1400°C, for example, 1200°C to 1350°C. Furthermore, firing can be carried out for 0.5 hours to 8 hours, for example, 1 hour to 3 hours. Also, firing can be carried out in a reducing atmosphere, for example, a humidified atmosphere of a mixed gas of nitrogen and hydrogen, for example, under conditions of a hydrogen concentration of 1.0% or less. If the internal electrode layer contains nickel (Ni) or a nickel (Ni) alloy, the oxygen partial pressure in the firing atmosphere should be 1.0 × 10⁻⁶. -14 MPa ~ 1.0 × 10 -10 MPa is also acceptable.

[0133] After firing, annealing can be performed as needed. Annealing is a process to re-oxidize the dielectric layer, and can be performed when firing is carried out in a reducing atmosphere. The conditions for the annealing process can also be appropriately adjusted depending on the composition of the dielectric layer. For example, the temperature during annealing may be 950°C to 1150°C, the time may be 0 to 20 hours, and the heating rate may be 50°C / hour to 500°C / hour. The annealing atmosphere may be a humidified nitrogen gas (N2) atmosphere, and the oxygen partial pressure may be 1.0 × 10⁻⁶. -9 MPa ~ 1.0 × 10 -5 MPa is also acceptable.

[0134] For debinding, calcination, or annealing processes, a wetter, for example, can be used to humidify nitrogen gas or a mixed gas, in which case the water temperature may be between 5°C and 75°C. Debinding, calcination, and annealing processes can be performed continuously or independently.

[0135] Selectively, the third and fourth surfaces of the manufactured capacitor body 110 can be subjected to surface treatments such as sandblasting, laser irradiation, and barrel polishing. By performing such surface treatments, the edges of the first and second internal electrode layers are exposed on the outermost surfaces of the third and fourth surfaces, thereby improving the electrical connection between the first and second external electrodes and the first and second internal electrode layers, and potentially facilitating the formation of alloy parts.

[0136] Next, an external electrode is formed on one surface of the manufactured capacitor body 110.

[0137] As an example, a sintered metal layer can be formed by applying a paste for forming a sintered metal layer to an external electrode and then sintering it.

[0138] The paste for forming a sintered metal layer may contain conductive metals and glass. The explanation of conductive metals and glass is the same as described above, so repeated explanations will be omitted. The paste for forming a sintered metal layer may also selectively contain binders, solvents, dispersants, plasticizers, oxide powders, etc. Binders can be, for example, ethyl cellulose, acrylic, butyral, etc., and solvents can be organic solvents or aqueous solvents such as terpineol, butyl carbitol, alcohol, methyl ethyl ketone, acetone, toluene, etc.

[0139] Methods for applying the sintered metal layer-forming paste to the outer surface of the capacitor body 110 include the dip method, various printing methods such as screen printing, application methods using dispensers, and spraying methods using sprays. The sintered metal layer-forming paste is applied to at least the third and fourth surfaces of the capacitor body 110, and can also be applied to parts of the first, second, fifth, or sixth surfaces where the band portions of the first and second external electrodes are selectively formed.

[0140] Subsequently, the capacitor body 110 coated with the paste for forming a sintered metal layer is dried and sintered at a temperature of 700°C to 1000°C for 0.1 to 3 hours to form a sintered metal layer.

[0141] A conductive resin layer can be selectively formed on the outer surface of the obtained capacitor body 110 by applying a conductive resin layer-forming paste and then curing it.

[0142] The paste for forming a conductive resin layer may contain a resin and, selectively, a conductive metal or a non-conductive filler. The descriptions of conductive metals and resins are the same as those given above, so repeated explanations will be omitted. The paste for forming a conductive resin layer may also selectively contain a binder, solvent, dispersant, plasticizer, oxide powder, etc. Binders can be, for example, ethyl cellulose, acrylic, or butyral, and solvents can be organic solvents such as terpineol, butyl carbitol, alcohol, methyl ethyl ketone, acetone, or toluene, or aqueous solvents.

[0143] As an example, the conductive resin layer can be formed by dipping the capacitor body 110 into a conductive resin layer forming paste and then curing it, or by printing the conductive resin layer forming paste onto the surface of the capacitor body 110 using a screen printing method or gravure printing method, or by applying the conductive resin layer forming paste to the surface of the capacitor body 110 and then curing it.

[0144] Next, a plating layer is formed on the outside of the conductive resin layer.

[0145] For example, the plating layer can be formed by a plating method, and can also be formed by sputtering or electroplating (electric deposition).

[0146] The embodiments described above will be explained in more detail below through the examples provided. However, the following examples are for illustrative purposes only and do not limit the scope of rights. [Examples]

[0147] (Manufacturing of multilayer ceramic capacitors) [Examples 1-3] A conductive paste was prepared by mixing nickel (Ni), aluminum oxide (Al2O3), and silicon dioxide (SiO2). At this time, Al2O3 and SiO2 were mixed in such amounts that the Al / Si weight ratios throughout the final formed internal electrode layer were 0.1, 0.5, and 1, respectively, as shown in Table 1 below.

[0148] Next, a dielectric slurry was prepared using barium titanate (BaTiO3) powder. In this process, zirconia balls (ZrO2 balls) were used as the dispersion medium, and ethanol / toluene, along with a dispersant and binder, were added together and then mechanically milled.

[0149] Next, a dielectric green sheet was manufactured using a head-dispensing type on-roll molding coater with the manufactured dielectric slurry. The manufactured conductive paste was printed onto the surface of the dielectric green sheet to form a conductive paste layer.

[0150] A dielectric green sheet laminate was manufactured by laminating and pressing dielectric green sheets, each having a conductive paste layer formed on it.

[0151] The dielectric green sheet laminate was subjected to a plasticizing process at a temperature of 400°C or lower and in a nitrogen atmosphere, followed by firing at a firing temperature of 1300°C or lower and a hydrogen concentration of 1.0% H2 or lower.

[0152] Next, the multilayer ceramic capacitor was manufactured through processes such as the addition of external electrodes and plating.

[0153] [Comparative Example 1] A multilayer ceramic capacitor was manufactured in the same manner as in Example 1, except that Ni and SiO2 were mixed to produce a conductive paste. In this case, the SiO2 was mixed in such a way that the total content of Si was 0.05 parts by weight per 100 parts by weight of Ni throughout the entire internal electrode layer.

[0154] [Comparative Example 2] A multilayer ceramic capacitor was manufactured in the same manner as in Example 1, except that Al2O3 and SiO2 were mixed throughout the final internal electrode layer in a content such that the Al / Si weight ratio was 3, as shown in Table 1 below.

[0155] [Table 1]

[0156] [Evaluation 1: TMA Analysis] Thermomechanical analysis (TMA) was performed on Ni alone and on a mixture of Ni and Al2O3, and the results are shown in Figure 5.

[0157] TMA measurements were performed under conditions of H23% and a heating rate of 10K / min.

[0158] Figure 5 is a graph showing the thermomechanical analysis (TMA) curves for Ni alone and for a mixture of Ni and Al2O3.

[0159] Referring to Figure 5, comparing the temperatures at which the Ni powder has shrunk by 5%, the temperature for Ni alone was 498°C, while the temperature for the Ni and Al2O3 mixture was 639°C, indicating a shrinkage delay of 141°C. From this, it can be seen that adding Al2O3 during the formation of the internal electrode layer has a thermal shrinkage delay effect.

[0160] [Evaluation 2: TEM-EDS mapping analysis] TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) mapping analysis was performed on the multilayer ceramic capacitors manufactured in Example 1, and the results are shown in Figures 6 and 7.

[0161] Specifically, after curing the multilayer ceramic capacitor manufactured in Example 1 in an epoxy mixture, the L-axis and T-axis surfaces (LT surfaces) of the capacitor body were polished to a depth of 1 / 2 in the W-axis direction. After fixing, the sample was maintained in a vacuum atmosphere chamber to obtain a cross-sectional sample that allowed observation of the active region where the dielectric layer and the internal electrode layer intersected. Next, the cross-sectional sample was measured using a transmission electron microscope (TEM) so that at least one dielectric layer and at least one internal electrode layer were visible in the active region. The TEM was measured using a Xe-FIB (focused ion beam) at an acceleration voltage of 200kV in an approximately 800nm ​​× 800nm ​​region where at least one dielectric layer and at least one internal electrode layer were visible in the active region. Subsequently, EDS (energy-dispersive spectroscopy) mapping analysis was performed on the TEM image of the measured cross-sectional sample.

[0162] Figure 6 is a TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) mapping analysis diagram of the internal electrode layer according to Example 1.

[0163] Referring to Figure 6, it can be confirmed that Ni, Al, and Si are present in the internal electrode layer according to Example 1.

[0164] Figure 7 shows the TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) mapping analysis of the dielectric layer according to Example 1.

[0165] Referring to Figure 7, it can be confirmed that in Example 1, a secondary phase containing Al, Si, and Ba is formed in the dielectric layer interface region.

[0166] [Rating 3: TEM-EDS Point Analysis] TEM-EDS (transmission electron microscopy-energy dispersive spectroscopy) point analysis was performed on the multilayer ceramic capacitors manufactured in Examples 1-3 and Comparative Examples 1 and 2, and the results are shown in Figures 8-11.

[0167] The Al / Si weight ratio within the internal electrode layer was calculated by performing EDS (energy-dispersive spectroscopy) point analysis on the internal electrode layer through TEM images of the cross-sectional samples measured in Evaluation 2. Specifically, when the active region of the cross-sectional sample was divided into three equal parts—upper, middle, and lower—three points were selected within the internal electrode layer for each region, and the average value of the Al / Si weight ratio at a total of nine points was used to determine the Al / Si weight ratio.

[0168] Figure 8 shows the TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) point analysis diagram of the internal electrode layer according to Example 1, Figure 9 shows the TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) point analysis diagram of the internal electrode layer according to Example 2, Figure 10 shows the TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) point analysis diagram of the internal electrode layer according to Example 3, and Figure 11 shows the TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) point analysis diagram of the internal electrode layer according to Comparative Example 2.

[0169] Referring to Figures 8 to 10, it can be seen that in Examples 1 to 3, Ni, Al, and Si are present in the internal electrode layer, and the Al / Si weight ratio satisfies the range of 0.01 to 1. On the other hand, referring to Figure 11, it can be seen that in Comparative Example 2, Ni, Al, and Si are present in the internal electrode layer, but the Al / Si weight ratio does not satisfy the predetermined range.

[0170] [Rating 4: MLCC characteristics] [Evaluation 4-1: Connectivity of the internal electrode layer] The connectivity of the internal electrode layers of the multilayer ceramic capacitors manufactured in Examples 1 to 3, and Comparative Examples 1 and 2, was measured using the method described below, and the results are shown in Table 2.

[0171] After obtaining cross-sectional samples using the same method as in Evaluation 2, scanning electron microscope (SEM) measurements were taken in the central part of the active region of the cross-sectional samples so that at least six dielectric layers and internal electrode layers were visible. The SEM measurements were performed under 10kV conditions and at 10K magnification. The connectivity of the internal electrode layers was calculated from the obtained SEM images using Equation 1 below.

[0172] [Formula 1] Connectivity of internal electrode layers (%) = (Total length of multiple internal electrode layers excluding breaks / Total length of multiple internal electrode layers) × 100

[0173] [Rating 4-2: Thinning Index] The thinning index was measured for the multilayer ceramic capacitors manufactured in Examples 1 to 3, and Comparative Examples 1 and 2, using the method described below, and the results are shown in Table 2.

[0174] The thinning index was calculated from the following formula 2 using SEM images obtained in the same manner as when evaluating the connectivity of the internal electrode layer described above.

[0175] [Formula 2] Thinning index = {Thickness of internal electrode layer (nm) / Connectivity of internal electrode layer (%)} × 100 In Equation 2, the thickness of the internal electrode layer is the average thickness across 10 points in a single internal electrode layer, and the connectivity of the internal electrode layer is the value obtained from Equation 1.

[0176] [Rating 4-3: Capacity] The capacitance of the multilayer ceramic capacitors manufactured in Examples 1 to 3, and Comparative Examples 1 and 2, was measured using the method described below, and the results are shown in Table 2.

[0177] Capacitance (F) was measured under the conditions of a frequency of 1 kHz and a voltage of 0.5 V.

[0178] [Rating 4-4: Withstand Voltage Characteristics] The breakdown voltage (BDV) was measured for the multilayer ceramic capacitors manufactured in Examples 1 to 3, and Comparative Examples 1 and 2, and the results are shown in Table 2 below.

[0179] The dielectric breakdown voltage (BDV) was measured for the multilayer ceramic capacitors manufactured in Examples 1 to 3, and Comparative Examples 1 and 2, at room temperature (25°C) under a 100V / s boost condition, and was determined by the voltage value at which the insulation resistance (IR) value dropped to 10,000Ω or less.

[0180] [Rating 4-5: Reliability] The accelerated lifetime reliability (MTTF) of the multilayer ceramic capacitors manufactured in Examples 1 to 3, and Comparative Examples 1 and 2 was measured using the method described below, and the results are shown in Table 2.

[0181] The mean time to failure (MTTF) was measured under conditions of 125°C, 9.45V, and 48 hours to determine the mean time to failure (hr).

[0182] In Table 2 below, the connectivity of the internal electrode layer, thinning index, capacity, BDV, and MTTF values ​​are shown as ratios based on the results of Comparative Example 1.

[0183] [Table 2]

[0184] Table 2 confirms that the multilayer ceramic capacitors according to Examples 1 to 3 exhibit superior connectivity, capacitance, and reliability of the internal electrode layer compared to Comparative Examples 1 and 2. This demonstrates that, according to one embodiment, a multilayer ceramic capacitor in which the Al / Si weight ratio of the internal electrode layer satisfies a predetermined range has improved thermal stability and connectivity of the internal electrodes, resulting in high capacitance and high reliability.

[0185] While preferred embodiments of the present invention have been described above, the present invention is not limited thereto. It can be implemented in various ways within the scope of the claims, the detailed description of the invention, and the attached drawings, and these also naturally fall within the scope of the present invention. [Explanation of Symbols]

[0186] 100: Multilayer ceramic capacitor 110: Capacitor body 111: Dielectric layer 121: First internal electrode layer 122: Second internal electrode layer 131: 1st external electrode 132:Second external electrode

Claims

1. A capacitor body including a dielectric layer and an internal electrode layer, The capacitor body includes an external electrode disposed on the outside of the capacitor body, The internal electrode layer comprises nickel (Ni), aluminum (Al), and silicon (Si). A multilayer ceramic capacitor having an Al / Si weight ratio of 0.01 or more and 1 or less.

2. The multilayer ceramic capacitor according to claim 1, wherein the aluminum (Al) is contained in an amount of 0.01 parts by weight or more and 1 part by weight or less per 100 parts by weight of nickel (Ni).

3. The multilayer ceramic capacitor according to claim 1, wherein the silicon (Si) is contained in an amount of 0.01 parts by weight or more and 8 parts by weight or less per 100 parts by weight of nickel (Ni).

4. The multilayer ceramic capacitor according to claim 1, wherein the internal electrode layer further comprises one or more selected from tin (Sn), barium (Ba), titanium (Ti), and dysprosium (Dy).

5. The multilayer ceramic capacitor according to claim 1, wherein the internal electrode layer further includes an internal electrode layer interface region defined as the region from the interface between the dielectric layer and the internal electrode layer to a depth of 100 nm in the internal electrode layer.

6. The multilayer ceramic capacitor according to claim 5, wherein the internal electrode layer interface region includes a secondary phase comprising aluminum (Al), silicon (Si), and barium (Ba).

7. The multilayer ceramic capacitor according to claim 1, wherein the dielectric layer comprises a barium titanate-based compound containing barium (Ba) and titanium (Ti).

8. The multilayer ceramic capacitor according to claim 7, wherein the dielectric layer further comprises aluminum (Al) and silicon (Si).

9. The multilayer ceramic capacitor according to claim 8, wherein the aluminum (Al) is contained in an amount of 0.05 moles or more and 10 moles or less per 100 moles of barium (Ba).

10. The multilayer ceramic capacitor according to claim 8, wherein the silicon (Si) is contained in an amount of 0.05 moles or more and 10 moles or less per 100 moles of barium (Ba).

11. The multilayer ceramic capacitor according to claim 1, wherein the dielectric layer further includes a dielectric layer interface region defined as the region from the interface between the dielectric layer and the internal electrode layer to a depth of 100 nm in the dielectric layer.

12. The multilayer ceramic capacitor according to claim 11, wherein the dielectric layer interface region includes a secondary phase comprising aluminum (Al), silicon (Si), and barium (Ba).

13. The multilayer ceramic capacitor according to claim 1, wherein the dielectric layer includes a plurality of dielectric crystal grains and grain boundaries disposed between the plurality of dielectric crystal grains.

14. The multilayer ceramic capacitor according to claim 13, wherein the grain boundaries include a secondary phase comprising aluminum (Al), silicon (Si), and barium (Ba).

15. The steps include: mixing nickel (Ni) and aluminum (Al)-containing compounds to produce a conductive paste; The process involves manufacturing a dielectric green sheet using a dielectric slurry, and printing the conductive paste onto the surface of the dielectric green sheet to form a conductive paste layer, A step of manufacturing a dielectric green sheet laminate by stacking the dielectric green sheets on which the conductive paste layer is formed, The steps include: firing the dielectric green sheet laminate to manufacture a capacitor body including a dielectric layer and an internal electrode layer; The step includes forming an external electrode on the outside of the capacitor body, At least one of the conductive paste and the dielectric slurry contains a silicon (Si)-containing compound. The internal electrode layer comprises nickel (Ni), aluminum (Al), and silicon (Si). A method for manufacturing a multilayer ceramic capacitor, wherein the aluminum (Al)-containing compound and the silicon (Si)-containing compound are included in the internal electrode layer in a content ratio such that the Al / Si weight ratio is 0.01 or more and 1 or less.

16. The method for manufacturing a multilayer ceramic capacitor according to claim 15, wherein the conductive paste further comprises a tin (Sn)-containing compound.

17. The method for manufacturing a multilayer ceramic capacitor according to claim 15, wherein the dielectric slurry contains a barium titanate-based compound.

18. The method for manufacturing a multilayer ceramic capacitor according to claim 17, wherein the dielectric slurry further comprises a dysprosium (Dy)-containing compound.

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