Electronic devices

The electronic device integrates power and ground wiring to directly connect power supply components with a test connection, enhancing load fluctuation test accuracy by reducing parasitic effects and simplifying the setup, thus addressing the inaccuracies and complexity of existing tests.

JP2026052533APending Publication Date: 2026-03-24DENSO CORP
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-09-11
Publication Date
2026-03-24

AI Technical Summary

Technical Problem

Existing load fluctuation tests for semiconductor components lack accuracy and require complex setups due to the influence of parasitic inductance and resistance in the connection path between the power supply circuit and the load fluctuation test device.

Method used

An electronic device with a substrate that includes power and ground wiring directly connecting the power supply components to a test connection point, allowing the load fluctuation test device to be integrated without additional cables, thereby reducing parasitic effects and simplifying the test setup.

Benefits of technology

The solution improves the accuracy of load fluctuation tests by minimizing parasitic inductance and resistance, enabling precise simulation of current consumption and voltage fluctuations within the operating range of semiconductor components, while maintaining a cost-effective and simplified testing process.

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Abstract

To provide an electronic device that can improve the accuracy of load fluctuation tests. [Solution] The electronic device 10 comprises a circuit board 50, power supply components mounted on the circuit board and constituting a power supply circuit, namely a driver 31, an inductor 32, and a capacitor 33, a semiconductor component SoC 40 mounted on the circuit board 50 and operating by receiving power from the power supply circuit, and a test connection section provided on the circuit board 50 for electrically connecting to a load fluctuation test device. The test connection section includes a test land 55. The wiring 52 of the circuit board 50 includes power supply wiring 53 that electrically connects the power supply components and the test connection section, and ground wiring 54. The SoC 40 is connected to the power supply wiring 53 between the power supply components and the test connection section.
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Description

Technical Field

[0001] The disclosure in this specification relates to an electronic device.

Background Art

[0002] Patent Document 1 discloses a load test system. The description of the prior art document is incorporated herein by reference as an explanation of the technical elements in this specification.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In a configuration where power is supplied from a power supply circuit to a load, such as a semiconductor component like a SoC, a load fluctuation test is performed to ensure the electrical performance of the power supply circuit. Generally, in the load fluctuation test, a load fluctuation test device is connected via a cable to the path connecting the power supply circuit and the semiconductor component. In this connection state, the load fluctuation test device simulates the current consumption of the semiconductor component, and an oscilloscope measures whether the fluctuation of the power supply voltage at that time is within the operation guarantee range of the semiconductor component. For such a load fluctuation test, an improvement in accuracy is required. Also, a simplification of the load fluctuation test is required.

[0005] One object of the present disclosure is to provide an electronic device capable of improving the accuracy of the load fluctuation test. Another object of the present disclosure is to provide an electronic device capable of simplifying the load fluctuation test.

Means for Solving the Problems

[0006] An electronic device, which is one aspect of the disclosure, is A substrate (50) having an insulating substrate (51) and wiring (52) arranged on the insulating substrate, The power supply components (31, 32, 33) are mounted on the circuit board and constitute the power supply circuit (30), A semiconductor component (40) mounted on a circuit board and powered by a power supply circuit, In order to electrically connect the load fluctuation test device (80), test connection parts (55, 56) provided on the circuit board, Equipped with, The wiring includes power wiring (53) that electrically connects the power supply components and the test connection, and ground wiring (54) that provides a reference potential on the circuit board. The semiconductor component is connected to the power supply wiring between the power supply component and the test connection point.

[0007] According to the disclosed electronic device, a test connection is provided on the circuit board, and a load fluctuation test can be performed by connecting a load fluctuation test device to the test connection. Therefore, the influence of parasitic inductance and parasitic resistance in the path electrically connecting the load fluctuation test device to the electronic device can be reduced. Furthermore, by extending the power supply wiring from the semiconductor component to the test connection, for example, the portion of the power supply wiring directly beneath the semiconductor component can also be included in the current path of the load fluctuation test. As a result, the accuracy of the load fluctuation test can be improved. Since the load fluctuation test can be performed with the electronic device's original configuration (specifications), the load fluctuation test can be simplified.

[0008] The various embodiments disclosed in this specification employ different technical means to achieve their respective objectives. The reference numerals in parentheses in the claims are illustrative in their correspondence with the embodiments described later and are not intended to limit the technical scope. The objectives, features, and effects disclosed in this specification will become clearer by referring to the subsequent detailed description and the accompanying drawings. [Brief explanation of the drawing]

[0009] [Figure 1]This is a diagram showing an electronic device according to the first embodiment. [Figure 2] This is a plan view showing the structure of an electronic device. [Figure 3] This is a cross-sectional view along line III-III in Figure 2. [Figure 4] This is a cross-sectional view along the line IV-IV in Figure 2. [Figure 5] This is a cross-sectional view showing the load fluctuation testing device connected. [Figure 6] This is a reference example. [Figure 7] This is a reference example. [Figure 8] This is a cross-sectional view showing a modified example. [Figure 9] This is a cross-sectional view showing an electronic device according to the second embodiment. [Figure 10] This is a cross-sectional view showing the state in which a load fluctuation test device is connected to the electronic device according to the third embodiment. [Figure 11] This is a plan view showing an electronic device according to the fourth embodiment. [Modes for carrying out the invention]

[0010] Several embodiments will be described below with reference to the drawings. In each embodiment, the same reference numerals are used for corresponding components, and redundant explanations may be omitted. If only a part of the configuration is described in each embodiment, the configuration of other embodiments described earlier can be applied to the other parts of that configuration. Furthermore, in addition to the combinations of configurations explicitly stated in the description of each embodiment, configurations from multiple embodiments can be partially combined even if not explicitly stated, as long as there are no particular problems with the combination.

[0011] (First Embodiment) The electronic device according to this embodiment is applicable to, for example, a moving body. The moving body includes vehicles such as engine-driven vehicles, hybrid vehicles, motor-driven vehicles, drones, flying bodies such as eVTOLs (eVTOL is an abbreviation for electronic Vertical Take-Off and Landing aircraft), ships, construction machinery, and agricultural machinery. For example, the electronic device applied to a vehicle controls the devices mounted on the vehicle. The electronic device that provides the control function may be referred to as an electronic control unit (ECU). ECU is an abbreviation for Electronic Control Unit.

[0012] The electronic control unit may execute control related to the movement of the moving body, or may execute control separate from the movement. The electronic control unit may be, for example, an automatic driving ECU or an ADAS ECU that executes control to assist the driver's driving operation. ADAS is an abbreviation for Advanced Driving Assistant System. For example, levels 3 to 5 defined by the Society of Automotive Engineers (SAE International) in the United States correspond to the automatic driving levels, and levels 1 to 2 correspond to the driving assistance levels. The electronic control unit may also be an in-vehicle infotainment ECU or a cockpit ECU. The cockpit ECU controls a meter device, a navigation device, an air conditioner device, and the like.

[0013] <Electronic device> FIG. 1 shows an example of the electronic device according to this embodiment. The electronic device 10 is an ECU mounted on a vehicle. The electronic device 10 includes a primary power supply circuit (1st DCDC) 20, a secondary power supply circuit (2nd DCDC) 30, and a SoC 40.

[0014] The primary power supply circuit 20 is configured to be able to step down the input voltage to a predetermined voltage. The primary power supply circuit 20 is a step-down DCDC converter. For example, the primary power supply circuit 20 generates a constant voltage (for example, 5V) lower than the power supply voltage based on the power supply supplied from a battery (BATT) mounted on the vehicle.

[0015] The secondary power supply circuit 30 is also configured to step down the input voltage to a predetermined voltage and output it. The secondary power supply circuit 30 is a step-down DCDC converter. For example, the secondary power supply circuit 30 generates constant voltages (for example, around 1V) that are lower than the generated voltage of the primary power supply circuit 20 based on the output of the primary power supply circuit 20. The secondary power supply circuit 30 is sometimes referred to as a core power supply. The exemplary secondary power supply circuit 30 is a multi-phase power supply. Hereinafter, the secondary power supply circuit 30 may be referred to as a multi-phase power supply 30.

[0016] The multi-phase power supply 30 includes a plurality of drivers (DRV) 31, a plurality of inductors 32 provided corresponding to the drivers 31, a capacitor 33, and a controller (CON) 34. The multi-phase power supply 30 has a plurality of phases. A phase may be referred to as a stage, a channel, or the like.

[0017] Between the power supply line to which the input voltage Vin is input and the ground (GND) line, switching elements are connected in series in the driver 31. The input voltage Vin is the output of the primary power supply circuit 20. The switching elements constituting the series circuit may be, for example, MOSFETs or IGBTs. The switching elements may also be bipolar transistors. MOSFET is an abbreviation for Metal Oxide Semiconductor Field Effect Transistor. IGBT is an abbreviation for Insulated Gate Bipolar Transistor.

[0018] One end of the inductor 32 is connected to the connection point (midpoint) of the series circuit of the driver 31. The other end of the inductor 32 is connected to the output line. The inductor 32 is provided individually for the driver 31. The drivers 31 and inductors 32 of each phase are connected in parallel to each other. By parallelization, the output current from the multi-phase power supply 30, that is, the load current can be increased. The number of phases is not particularly limited. The exemplary multi-phase power supply 30 has four phases.

[0019] Capacitor 33 is connected to the output line. The positive terminal of capacitor 33 is connected to the output line. The negative terminal of capacitor 33 is connected to ground. Capacitor 33 may be provided individually for each phase, or it may be provided in common for multiple phases. In the example multi-phase power supply 30, capacitor 33 is provided for each phase.

[0020] The controller 34 performs voltage mode control, for example, by feedback of the output voltage Vout, to control the operation of the driver 31, i.e., the operation of the switching element. The controller 34 determines the pulse width (duty cycle) of the PWM signal based on the output voltage Vout and controls the output voltage Vout of the multiphase power supply 30. The controller 34 may perform current mode control instead of voltage mode control.

[0021] The controller 34 synchronously controls the multiple drivers 31 so that they switch in different phases from each other. By using multiple phases in this way, the switching frequency can be artificially increased even if the switching frequencies of the multiple drivers 31 are the same. This reduces the ripple component of the output voltage Vout and improves responsiveness. The controller 34 switches the number of drivers 31 to be switched, i.e., the number of drive phases, according to the current consumption of the load to which power is supplied. The controller 34 compares the current consumption with the threshold current and increases and / or decreases the number of drive phases according to the comparison result.

[0022] SoC40 is an example of a semiconductor component that operates by receiving power from a secondary power supply circuit 30. SoC40 is a single semiconductor chip on which multiple components necessary to realize the functions of a system or device are implemented. SoC stands for System on Chip. SoC40 includes a processor, memory, storage, memory controller, and communication interface (IF), which are not shown in the diagram. IF stands for Interface. SoC40 may also include a wireless communication module, analog front-end, and DSP. DSP stands for Digital Signal Processor.

[0023] For example, the processor operates by receiving power from the secondary power supply circuit 30. The processor's core voltage is around 1V (for example, less than 1V), and the load current is several tens of amperes or more (for example, 100A or more). To handle such low voltage and high current, the electronic device 10 is equipped with a multi-phase power supply as the secondary power supply circuit 30. The multi-phase power supply 30 steps down the input voltage Vin to a voltage corresponding to the processor's core voltage and outputs it. By using the multi-phase power supply 30, it is possible to handle the increased performance of the processor accompanying improvements in autonomous driving levels and advancements in infotainment functions, and especially to support autonomous driving levels 3 and above.

[0024] The processor executes predetermined control processes by running programs stored in storage while utilizing the temporary storage function of memory. Memory includes, for example, RAM. RAM is an abbreviation for Random Access Memory. Memory may also include caches and registers. Storage is, for example, ROM. ROM is an abbreviation for Read Only Memory. Storage may also be HDD, SSD, etc. Storage is a non-transitory tangible storage medium that non-temporarily stores programs and data that can be read by a computer.

[0025] The semiconductor components that operate by receiving power from the secondary power supply circuit 30 are not limited to the SoC 40. The semiconductor components may be, for example, SiPs. SiP is an abbreviation for System in Package. The semiconductor components may include multiple components to realize a function. The SoC 30 may cooperate with peripheral devices placed around the SoC 30 to extend its functionality.

[0026] As shown in Figure 1, the secondary power supply circuit 30 and the SoC 40 are electrically connected by a power supply wiring 53, which will be described later. Power is supplied to the SoC 40 through the power supply wiring 52P. The power supply wiring 53 extends from the connection point with the SoC 40. As shown in Figure 1, the electronic device 10 may also include a bypass capacitor 41. The bypass capacitor 41 is electrically connected to the power supply wiring 53. The bypass capacitor 41 is sometimes referred to as a bypass capacitor. The bypass capacitor 41 is located near the power supply terminals of the SoC 40. The bypass capacitor 41 contributes, for example, to stabilizing the power supply voltage (Vout) and removing noise.

[0027] <Load Fluctuation Testing Equipment> Figure 1 shows the electronic device with a load testing device connected to it.

[0028] The load fluctuation test device 80 is a device for performing load fluctuation tests, for example, to guarantee the electrical performance of a power supply circuit. The illustrated load fluctuation test device 80 is a load fluctuation board (LVB) on which electronic components are mounted. The load fluctuation test device 80 can arbitrarily set the magnitude of the load and draw in current (load current). The load fluctuation test device 80 is attached to the electronic device 10 when performing load fluctuation tests.

[0029] The illustrated load fluctuation test device 80 is electrically connected to the portion of the power supply wiring 53, described later, that extends from the SoC40. The load fluctuation test device 80 simulates the current consumption (load current) of the SoC40, which is a semiconductor component, while electrically connected to the power supply wiring 53. The load fluctuation test device 80 may also have a function to measure the fluctuation of the output voltage Vout when the current consumption is simulated. The load fluctuation test device 80 may also have a function to measure whether the output voltage Vout is within the operating guarantee range of the SoC40, for example, within the operating guarantee range of the processor that constitutes the SoC40.

[0030] As shown in Figure 1, the load fluctuation test apparatus 80 may include a connector 81. The illustrated load fluctuation test apparatus 80 is electrically connected to the power supply wiring 53 via the connector 81.

[0031] <Structure of electronic devices> Figure 2 shows an example of the structure of an electronic device. Figure 2 shows an example of the structure mounted on a substrate. Figure 2 shows the secondary power supply circuit, SoC, and the area around the test connection part of the electronic device. In Figure 2, the outline of the SoC is shown by a dashed line, and the solder balls of the SoC are shown by solid lines. Figure 3 is a cross-sectional view along line III-III in Figure 2. Figure 4 is a cross-sectional view along line IV-IV in Figure 4. For convenience, solder resist is omitted in Figures 2, 3, and 4. Among the wiring arranged on the insulating substrate, power wiring connecting the secondary power supply circuit and the test connection part via semiconductor components, and a part of the ground wiring are shown. Among the lands exposed from the solder resist, the lands that constitute the test connection part are shown.

[0032] In the following, the thickness direction of the substrate is referred to as the Z direction. The direction perpendicular to the Z direction is referred to as the X direction. The direction perpendicular to both the Z and X directions is referred to as the Y direction. Unless otherwise specified, the shape viewed from the Z direction, in other words, the shape along the XY plane defined by the X and Y directions, is referred to as the planar shape. The view from the Z direction is sometimes simply referred to as the planar view.

[0033] The electronic device 10 shown in Figures 2 to 4 represents the state before the load fluctuation test device 80 is connected. The electronic device 10 comprises power supply components, an SoC 40, and a circuit board 50 that constitute a secondary power supply circuit 30 (multiphase power supply). The power supply components and SoC 40 are mounted on the circuit board 50. Although not shown, the electronic device 10 also includes electronic components that provide a controller 34. These electronic components are mounted on the circuit board 50.

[0034] The substrate 50 is a so-called printed circuit board. The substrate 50 has one side 50a and one side 50b. The side 50b is the side opposite to the one side 50a in the Z direction. The substrate 50 comprises an insulating substrate 51 and wiring 52. The insulating substrate 51 is formed using an electrically insulating material such as resin. The wiring 52 is arranged on the insulating substrate 51. The wiring 52, together with components mounted on the substrate 50, constitutes a circuit.

[0035] The wiring 52 includes at least a conductor pattern 521. The conductor pattern 521 is formed, for example, by patterning metal foil. The conductor pattern 521 may be referred to as a wiring pattern, wiring layer, conductor layer, etc. The conductor pattern 521 is located on the surface layer of at least one side 50a. In addition to the surface layer of one side 50a, the conductor pattern 521 may also be located on the surface layer of the back side 50b. The conductor pattern 521 may also be located inside the insulating substrate 51. The substrate 50 may be a single-sided substrate, a double-sided substrate, or a multilayer substrate including three or more layers of wiring.

[0036] The conductor pattern 521 has lands. Lands are terminal portions (electrode portions) provided at the ends of the conductor pattern 521. Lands are portions of the conductor pattern 521 that are exposed from the solder resist (not shown) so that they can be joined to the corresponding components. Lands are connected to other parts of the conductor pattern 521.

[0037] As illustrated, the wiring 52 may include via conductors 522. The via conductors 522 are formed by placing a conductor, such as plating, in through holes (vias) formed in the insulating layer constituting the insulating substrate 51. The via conductors 522 electrically connect conductor patterns 521 of different layers. The wiring 52 includes at least a portion extending in the XY plane and may further include a portion extending in the Z direction.

[0038] The wiring 52 includes power wiring 53 and ground wiring 54. Power wiring 53 is wiring for supplying power (power) from the multiphase power supply 30 to the SoC 40. The example power wiring 53 is intentionally extended to a test connection point (test land 55) described later. Power wiring 53 electrically connects the multiphase power supply 30 and the test connection point. Power wiring 53 electrically connects the multiphase power supply 30 and the test connection point via the SoC 40. Power wiring 53 has a direct subsection 531, a relay section 532, and an extension section 533.

[0039] The area directly below 531 is the portion of the power supply wiring 53 that overlaps with the SoC 40 (semiconductor component) in a plan view. The width of the area directly below 531 is not particularly limited. In the example, the area directly below 531 extends in the X direction. The area directly below 531 includes a portion that extends in the X direction with a predetermined width.

[0040] The relay section 532 is the part of the power wiring 53 that electrically connects (relays) the multiphase power supply 30 (secondary power supply circuit) and the SoC 40. The relay section 532 is located on the multiphase power supply 30 side relative to the directly below 531. One end of the relay section 532 is connected to the directly below 531, and the other end is electrically connected to the power supply components that make up the multiphase power supply 30. The width of the relay section 532 is not particularly limited.

[0041] In the example relay section 532, the end on the multiphase power supply 30 side is branched into multiple (four) parts to accommodate multiple phases. Each of the branched parts of the relay section 532 extends in the X direction. The multiple branched parts are arranged in the Y direction with predetermined intervals. In the relay section 532, the portion within a predetermined range from the connection end with the directly lower part 531 becomes wider as it moves away from the directly lower part 531.

[0042] The extension 533 is the portion of the power wiring 53 that extends from the SoC 40. The extension 533 electrically connects the SoC 40 to the test connection (power land 551). The extension 533 is connected to the lower part 531 at a different location than the relay part 532. One end of the extension 533 is connected to the lower part 531, and the other end is connected to the test connection. The direction in which the extension 533 extends from the lower part 531 is different from that of the relay part 532. The width of the extension 533 is not particularly limited.

[0043] The illustrated extension 533 is connected to the lower section 531 at a position opposite to the relay section 532 in the X direction. The extension 533 extends from the lower section 531 in the X direction, but in the opposite direction to the relay section 532. A power supply land 551, which forms a test connection section, is provided at the end of the extension 533. In the extension 533, the portion within a predetermined range from the connection end with the lower section 531 becomes wider as it moves away from the lower section 531.

[0044] The illustrated power wiring 53 extends in the X direction in a plan view. The majority of the power wiring 53, for example, the lower part 531, the intermediate section 532, and the extension section 533, are composed of a conductor pattern 521 located on the surface layer on one side 50a. The remaining portion of the power wiring 53 consists of a conductor pattern 521 located on the back side 50b and via conductors 522. The conductor pattern 521 and via conductors 522 on the back side 50b include portions provided in correspondence with the bypass capacitor 41.

[0045] The ground wiring 54 provides a reference potential (ground potential) on the substrate 50. The ground wiring 54 includes a solid plane pattern (not shown). The solid plane pattern is a relatively large conductor pattern 521 designed to stabilize the potential. A portion of the ground wiring 54 is arranged, for example, in correspondence with a capacitor 33. The example ground wiring 54 is located on the surface layer on one side 50a. The ground wiring 54 is provided so as to sandwich the branch portion of the relay section 532 from both sides. The ground wiring 54 is arranged alternately with the branch portion of the relay section 532 in the Y direction.

[0046] Another portion of the ground wiring 54 is positioned corresponding to the bypass capacitor 41. The example ground wiring 54 is located on the surface layer on the back surface 50b. The ground wiring 54 is positioned to be aligned with the directly below 531 in the Y direction. The pair of ground wirings 54 are provided so as to sandwich the directly below 531 in the Y direction.

[0047] Another portion of the ground wiring 54 is positioned opposite the end of the extension 533, specifically the end where the power land 551 is provided. The example ground wiring 54 is positioned on the surface layer on one side 50a. The ground wiring 54 is positioned to be aligned with the extension 533 in the X direction. In the ground wiring 54, a ground land 552, which forms a test connection, is provided at the end facing the extension 533.

[0048] The electronic device 10 is equipped with a test connection. The exemplary test connection includes a test land 55. The test land 55 is provided on the substrate 50. The substrate 50 has the test land 55. The test land 55 includes a power land 551 and a ground land 552. As described above, the power land 551 is provided at the end of the extension 533 of the power wiring 53. The ground land 552 is provided at the end of the ground wiring 54 which is positioned opposite the extension 533. The exemplary power land 551 and ground land 552 are aligned in the X direction. Note that in Figure 2, the power land 551 and ground land 552 are shown in a simplified form. At least one of the power land 551 and ground land 552 may have a structure divided into multiple parts, that is, multiple land sections.

[0049] The power supply components are soldered to, for example, the pads on the circuit board 50. The power supply components include a driver 31, an inductor 32, and a capacitor 33 that constitute a multiphase power supply 30.

[0050] The driver 31 is composed of, for example, a switching device. A driver 31 is provided for each phase. One driver 31 provides a switching element for one phase. The driver 31 may be composed of one component or may include multiple components. In the example electronic device 10, four drivers 31 (switching devices) for four phases are mounted on the substrate 50. The four drivers 31 are aligned in the Y direction.

[0051] The inductor 32 is provided in correspondence with the driver 31. The multiphase power supply 30 may be configured with inductors 32 provided individually for each phase. The multiphase power supply 30 may be configured with an inductor component in which multiple inductors 32 are packaged. The multiphase power supply 30 may be configured with a coupled inductor including multiple inductors 32. In the exemplary electronic device 10, the inductors 32 are provided individually for each phase. Four inductors 32 for four phases are mounted on the substrate 50. The four inductors 32 are aligned in the Y direction.

[0052] One terminal of the inductor 32 is connected to the driver 31, specifically to the connection point of the switching elements forming a series circuit, via wiring 52 on the circuit board 50. The other terminal of the inductor 32 is electrically connected to wiring 52, specifically to power supply wiring 53. The terminals of the illustrated inductor 32 are soldered to lands (not shown) provided at the ends of the branch sections of the relay section 532. The inductors 32 are individually soldered to the four branch sections of the relay section 532.

[0053] Capacitor 33 is positioned between inductor 32 and SoC40 (semiconductor component). Capacitor 33 is, for example, a chip capacitor. One of the terminals of capacitor 33 is electrically connected to the power supply wiring 53 on the SoC40 side of inductor 32. The other terminal of capacitor 33 is electrically connected to the ground wiring 54. Capacitor 33 bridges the power supply wiring 53 and the ground wiring 54.

[0054] Multiple capacitors 33 are provided for each inductor 32. The capacitors 33 are arranged so as to straddle the branch portion of the power supply wiring 53, specifically the relay section 532. Capacitors 33 in the same phase are connected to a common branch portion. One terminal of a capacitor 33 is soldered to a land (not shown) provided in the branch portion of the relay section 532. The other terminal of a capacitor 33 is soldered to a land (not shown) provided in the ground wiring 54. Multiple capacitors 33 arranged on the same side of the branch portion are aligned in the X direction. Multiple phase capacitors 33 are aligned in the Y direction.

[0055] In the path of the power supply wiring 53, the inductor 32 is positioned between the driver 31 and the capacitor 33. In the illustrated electronic device 10, the driver 31, the inductor 32, and the capacitor 33 are aligned in the X direction. In the X direction, the inductor 32 is positioned between the driver 31 and the capacitor 33.

[0056] As described above, the SoC40 is a semiconductor component that operates by receiving power (power supply) from the multiphase power supply 30. The SoC40 is located between the multiphase power supply 30 and the test land 55 (power land 551). The example SoC40 has multiple solder balls 401 on the back side of the semiconductor chip. The solder balls 401 are terminals for external connections. The solder balls 401 are arranged, for example, in a grid pattern. In Figure 2, only the solder balls 401 connected to the power wiring 53 are shown. The solder balls 401 are bonded to a land (not shown) located directly below the power wiring 53 531. Multiple lands are provided, corresponding to the solder balls 401.

[0057] The electronic device 10 includes a bypass capacitor 41 mounted on a substrate 50. The bypass capacitor 41 is located near the SoC 40 on the substrate 50. The bypass capacitor 41 is, for example, a chip capacitor. The bypass capacitor 41 may be located on one side 50a or on the back side 50b.

[0058] The example bypass capacitor 41 is located on the back surface 50b. The bypass capacitor 41 is positioned so as to overlap with the SoC 40 in a plan view. This allows the bypass capacitor 41 to be placed closer to the SoC 40. One terminal of the bypass capacitor 41 is soldered to a land (not shown) of a conductor pattern 521 located on the surface layer on the back surface 50b side of the power supply wiring 53. The other terminal of the bypass capacitor 41 is soldered to a land (not shown) of a ground wiring 54 located opposite the conductor pattern 521 on the back surface 50b side. On the back surface 50b side, the bypass capacitor 41 bridges the power supply wiring 53 and the ground wiring 54.

[0059] The example bypass capacitors 41 are arranged so as to sandwich the directly lower part 531 in a plan view. Four bypass capacitors 41 are arranged on each side of the directly lower part 531. Multiple bypass capacitors 41 arranged on the same side of the directly lower part 531 are aligned in the X direction.

[0060] Figure 5 shows the load fluctuation test device 80 connected to the electronic device 10. Figure 5 corresponds to Figure 3. The solid arrows indicate the current path during the load fluctuation test.

[0061] The illustrated load fluctuation test device 80 (load fluctuation board) has a circuit board on which a load fluctuation test circuit is provided and a connector 81 mounted on the circuit board. By connecting the connector 81 to the test lands 55 of the circuit board 50, specifically the power lands 551 and the ground lands 552, the load fluctuation test device 80 is attached to the circuit board 50, i.e., the electronic device 10. In this attached state, the load fluctuation test device 80 performs a load fluctuation test. The load fluctuation test device 80 simulates the current consumption of the semiconductor component SoC40. The load fluctuation test device 80 measures the fluctuation of the output voltage Vout when the current consumption is simulated and measures whether the output voltage Vout is within the operating guarantee range of the SoC40, for example, within the operating guarantee range of the processor that makes up the SoC40.

[0062] The connection between the terminals of the connector 81 and the test land 55 may be made using a bonding material such as solder. The terminals may be surface-mount or through-hole mounted. By adopting a press-fit structure or the like for the terminals of the connector 81, the load fluctuation test device 80 may be made removable from the circuit board 50. With a removable configuration, the load fluctuation test device 80 can be removed from the electronic device 10 after the load fluctuation test is completed.

[0063] <Summary of the First Embodiment> Figures 6 and 7 show a reference example. In the reference example, the letter R is added to the end of the reference numerals of the relevant elements shown in this embodiment. In the reference example, as shown in Figure 6, the load fluctuation test device 80R is electrically connected to the power supply wiring 53R, specifically the relay section 532R, via cable 801R. The load fluctuation test device 80 is connected to the power supply wiring 53R at the position of the secondary power supply circuit 30R, which is further than the bypass capacitor 41R. In addition, the oscilloscope 85R is electrically connected to the power supply wiring 53R on the SoC40R side, which is further than the load fluctuation test device 80R. The load fluctuation test device 80R simulates the current consumption of the SoC40R, and the oscilloscope 85R measures whether the power supply voltage fluctuation at that time falls within the operating voltage range of the SoC40R.

[0064] High slew rates are necessary for high-frequency applications such as the SoC40R. However, in the example configuration, as shown in Figure 7, the parasitic inductance and resistance of cable 801R have a significant impact. This slows down the rise and fall of the signal, reducing the slew rate. In other words, it is not possible to reproduce the steep slew rate required for actual loads. Furthermore, the power supply wiring 53R and bypass capacitor 41R near the SoC40R are outside the current path during testing. Therefore, accurate testing is difficult.

[0065] The electronic device 10 of this embodiment comprises a substrate 50, power supply components mounted on the substrate 50, semiconductor components mounted on the substrate, and a test connection section provided on the substrate 50 for connecting a load fluctuation test device 80. The wiring 52 of the substrate 50 includes power supply wiring 53 that electrically connects the power supply components and the test connection section, and ground wiring 54. The semiconductor components are connected to the power supply wiring 53 between the power supply components and the test connection section. In the exemplary electronic device 10, the secondary power supply circuit 30 corresponds to a power supply circuit that supplies power to the semiconductor components. The driver 31, inductor 32, and capacitor 33 correspond to power supply components. The SoC 40 corresponds to a semiconductor component. The test land 55 corresponds to a test connection section.

[0066] As described above, the substrate 50 is provided with a test connection section, and the load fluctuation test device 80 can be connected to the test connection section to perform a load fluctuation test. Therefore, the influence of parasitic inductance and parasitic resistance in the path electrically connecting the load fluctuation test device 80 to the electronic device 10 can be reduced. By extending the power supply wiring 53 from the semiconductor component to the test connection section, for example, the portion of the power supply wiring 53 directly beneath the semiconductor component can also be included in the current path of the load fluctuation test. As a result, the accuracy of the load fluctuation test can be improved.

[0067] Furthermore, there is no need to customize the load fluctuation test equipment to match the specifications of the semiconductor components. Load fluctuation testing can be performed with the electronic device 10 in its original configuration (specifications). Therefore, load fluctuation testing can be simplified. For example, load fluctuation testing can be performed at a low cost.

[0068] As illustrated, the electronic device 10 may be mounted on a substrate 50 and include a bypass capacitor 41 electrically connected to a terminal connected to the power supply wiring 53 and a ground wiring 54 in the semiconductor component. For example, a solder ball 401 corresponds to the terminal. With this configuration, the bypass capacitor 41 can also be included in the current path of the load fluctuation test. As a result, the accuracy of the load fluctuation test can be further improved.

[0069] As illustrated, the test connection may include lands, specifically a power land 551 connected to the power wiring 53 and a ground land 552 connected to the ground wiring 54. The test land 55 corresponds to a land. The semiconductor component is connected to the power wiring 53 between the power component and the power land 551. Therefore, by electrically connecting the load fluctuation test device 80 to the test land 55, load fluctuation testing can be performed including the portion of the power wiring 53 directly beneath the semiconductor component and the bypass capacitor 41. In other words, the accuracy of load fluctuation testing can be improved with a simple configuration.

[0070] As illustrated, the connector 81 of the load fluctuation test device 80 may be electrically connected to the land forming the test connection. This effectively reduces the effects of parasitic inductance and parasitic resistance. The load fluctuation test device 80 makes it possible to more accurately simulate the current consumption of semiconductor components.

[0071] As illustrated, the power supply wiring 53 may extend in a predetermined direction in a plan view of the substrate 50 in the thickness direction. The semiconductor component may be positioned between the power supply component and the test connection in the predetermined direction. In the illustrated electronic device 10, the Z direction corresponds to the thickness direction of the substrate 50, and the X direction corresponds to the predetermined direction. With the above arrangement, the direction of the current during the load fluctuation test can be matched to the direction of the current when the semiconductor component actually consumes current. Therefore, the accuracy of the load fluctuation test can be further improved.

[0072] As illustrated, a multiphase power supply 30 may be used as the power supply circuit to supply power to semiconductor components. This allows for higher output power and improved responsiveness to load fluctuations. For example, it can be applied to semiconductor components that require high current, such as SoC40.

[0073] <Variation> An example of electrically connecting the terminals of the load fluctuation test device 80 to the test land 55 has been shown, but it is not limited to this. For example, as shown in Figure 8, the test components 82 that make up the load fluctuation test device 80 may be electrically connected to the test land 55 by soldering or the like. Since the load fluctuation test device 80 is connected to the electronic device 10 (substrate 50) without using a connector, the effects of parasitic inductance and parasitic resistance can be further reduced. The load fluctuation test device 80 makes it possible to more accurately simulate the current consumption of semiconductor components.

[0074] (Second Embodiment) This embodiment is a modification based on a prior embodiment, and the description of the prior embodiment can be incorporated by reference. In the prior embodiment, the test connection portion included a land provided on the substrate. Alternatively, or in addition to this, the test connection portion may include a connector mounted on the substrate.

[0075] Figure 9 is a cross-sectional view showing an electronic device according to this embodiment. Figure 9 corresponds to Figure 3. The electronic device 10 shown in Figure 9 is shown in its state before connection of the load fluctuation test device 80. The test connection part includes a test connector 56. The test connector 56 is mounted on the circuit board 50. The example test connector 56 is an SMD connector. SMD is an abbreviation for Surface Mount Device. Using an SMD connector, for example, a load fluctuation board as the load fluctuation test device 80 can be inserted into and removed from the test connector 56. Therefore, once the load fluctuation test is completed, the load fluctuation test device 80 can be removed from the electronic device 10. The test connector 56 is not limited to an SMD connector. It may also be configured to mate with the connector of the load fluctuation test device 80.

[0076] The example test connection includes a test land 55. The power terminal 561 of the test connector 56 is electrically connected to the power land 551. The ground terminal 562 of the test connector 56 is electrically connected to the ground land 552. The test connector 56 is soldered to the test land 55, for example. The other configurations are the same as those described in the prior embodiment.

[0077] <Summary of the second embodiment> As illustrated, the test connection may include a connector mounted on the circuit board 50. The connector may include a power terminal 561 electrically connected to the power wiring 53 and a ground terminal 562 electrically connected to the ground wiring 54. The test connector 56 corresponds to the connector. By providing a connector as an element of the electronic device 10 in this way, the load fluctuation test device 80 can be easily attached to the electronic device 10. In particular, by using an SMD connector, the load fluctuation test can be attached to the electronic device 10 only during load fluctuation testing. Once the load fluctuation test is completed, the load fluctuation test device 80 can be removed from the electronic device 10.

[0078] (Third embodiment) This embodiment is a modification based on a prior embodiment, and the description of the prior embodiment can be referenced. In the prior embodiment, a test connection section was provided on one side of the substrate, and a load fluctuation test device was placed on that side. Alternatively, a test connection section may be provided on the back side of the substrate, and a load fluctuation test device may be placed on the back side. In a configuration in which peripheral components that extend the functionality of an SoC (semiconductor component) are provided on the same side as the SoC, a test connection section may be provided on the back side, and a load fluctuation test device may be placed on the back side.

[0079] Figure 10 is a cross-sectional view showing an electronic device according to this embodiment. Figure 10 corresponds to Figure 5. The electronic device 10 shown in Figure 10 is shown with the load fluctuation test device 80 connected. The electronic device 10 includes peripheral components 42 mounted on a circuit board 50.

[0080] Peripheral components 42 are components that work in conjunction with the SoC40 (semiconductor component) to extend the functionality of the SoC40. Peripheral components 42 are arranged around the SoC40 on one side 50a, which is the mounting surface of the SoC40. Peripheral components 42 may include, for example, memory devices such as DDR, flash, UFS, and DRAM, and physical layer devices such as CAN transceivers (CANTr) and Ethernet PHY. DDR is an abbreviation for Double Data Rate. UFS is an abbreviation for Universal Flash Storage. DRAM is an abbreviation for Dynamic Random Access Memory. CAN is an abbreviation for Controller Area Network. PHY is an abbreviation for Physical Layer Device. CAN is a registered trademark. Ethernet is a registered trademark.

[0081] The illustrated test connection includes a test land 55. The test land 55 is located on the back surface 50b of the substrate 5OC0. The power wiring 53 includes a conductor pattern 521 located on the front surface on the one side 50a, a conductor pattern 521 located on the front surface on the back surface 50b, a conductor pattern 521 located inside the insulating substrate 51, and a via conductor 522. The power land 551 is located at the end of the conductor pattern 521 located on the front surface on the back surface 50b. The power land 551 is electrically connected to the area directly below 531 via the conductor pattern 521 located on the front surface on the back surface 50b, a via conductor 522, an inner layer conductor pattern 521, and a via conductor 522. The via conductor 522, the inner layer conductor pattern 521, the via conductor 522, and the conductor pattern 521 located on the front surface on the back surface 50b form an extension 533.

[0082] In the example electronic device 10, the power supply wiring 53 extends in the X direction in a plan view. The extension 533 extends in the X direction from the directly below 531 in a plan view, in the opposite direction to the relay section 532.

[0083] The load fluctuation test device 80 (load fluctuation board) has a connector 81, similar to the first embodiment. By connecting the connector 81 to the test lands 55 of the circuit board 50, specifically the power lands 551 and the ground lands 552, the load fluctuation test device 80 is attached to the circuit board 50, i.e., the electronic device 10. The SoC 40 and peripheral components 42 are arranged on one side 50a, and the load fluctuation test device 80 is arranged on the back side 50b. The other configurations are the same as those described in the prior embodiment.

[0084] <Summary of the third embodiment> As illustrated, the substrate 50 may include peripheral components 42 that are mounted on the substrate 50 and arranged around the semiconductor component on one side 50a of the substrate 50. In this configuration, the test connection portion may be provided on the back side 50b. This allows for suppression of interference between the peripheral components 42 and the load fluctuation test device 80 while achieving the effects described in the prior embodiment. The peripheral components 42 can be arranged on the same plane as the semiconductor component and in close proximity to the semiconductor component. This increases the mounting density.

[0085] A combination of the configuration shown in this embodiment and the configuration shown in the second embodiment is also possible. In this case, the test connector 56 is placed on the back surface 50b.

[0086] (Fourth Embodiment) This embodiment is a modification based on the prior embodiment, and the description of the prior embodiment can be referenced. In the prior embodiment, the width of the power wiring was not specifically mentioned. Instead, the width of the relay section and the width of the extension section of the power wiring may be made to satisfy a predetermined relationship.

[0087] Figure 11 is a plan view showing the electronic device of this embodiment. Figure 11 corresponds to Figure 2. In the electronic device 10, the relay section 532 of the power wiring 53 has a portion that widens as it moves away from the directly lower part 531 in a plan view. The extension section 533 also has a portion that widens as it moves away from the directly lower part 531 in a plan view. Both the relay section 532 and the extension section 533 have a portion that widens as it moves away from the directly lower part 531 within a predetermined range from the connection end to the directly lower part 531. If the width of the widened portion of the relay section 532 is L1 and the width of the widened portion of the extension section 533 is L2, then at an equidistant distance from the directly lower part 531, the width L2 is wider than the width L1. Also, the maximum value of the width L2 is wider than the maximum value of the width L1. The width of the power wiring 53 is wider in the extension section 533 than in the relay section 532. The other configurations are the same as those described in the prior embodiment.

[0088] <Summary of the fourth embodiment> As illustrated, the width of the power supply wiring 53 may be wider between the semiconductor component and the test connection than between the semiconductor component and the power supply component. This reduces the wiring impedance from the semiconductor component to the test connection (test land 55). Therefore, the measurement accuracy of the load fluctuation test can be improved.

[0089] The configuration shown in this embodiment can be combined not only with the first embodiment, but also with modifications of the first embodiment, the second embodiment, and the third embodiment. For example, in a configuration that includes a test connector 56, the width of the power supply wiring 53 may be wider between the semiconductor component and the test connection than between the semiconductor component and the power supply component.

[0090] (Other embodiments) The disclosures in this specification and drawings are not limited to the exemplary embodiments. The disclosures include the exemplary embodiments and variations thereof by those skilled in the art. For example, the disclosures are not limited to combinations of parts and / or elements shown in the embodiments. The disclosures are implementable in a variety of combinations. The disclosures may have additional parts that can be added to the embodiments. The disclosures include those in which parts and / or elements of the embodiments have been omitted. The disclosures include substitutions or combinations of parts and / or elements between one embodiment and another. The scope of the disclosed technical areas is not limited to the descriptions of the embodiments. Some of the scope of the disclosed technical areas are indicated by the claims and should be understood to include all modifications within the meaning and scope equivalent to the claims.

[0091] The disclosures in the specification and drawings are not limited by the claims. The disclosures in the specification and drawings encompass the technical ideas described in the claims and extend to a wider and more diverse range of technical ideas than those described in the claims. Therefore, a variety of technical ideas can be extracted from the disclosures in the specification and drawings without being bound by the claims.

[0092] When an element or layer is referred to as “on top of,” “connected to,” “linked to,” or “joined,” it may be directly on top of, connected to, or joined to another element or layer, and there may also be an intervening element or layer. In contrast, when an element is referred to as “directly on top of,” “directly connected to,” “directly linked to,” or “directly joined to” another element or layer, there is no intervening element or layer. Other words used to describe relationships between elements should be interpreted in a similar manner (e.g., “between” vs. “directly between,” “adjacent” vs. “directly adjacent,” etc.). As used in this specification, the term “and / or” includes any combination and all combinations relating to one or more of the enumerated items relating to each other. That is, the statement A and / or B means at least one of A and B.

[0093] Spatially relative terms such as "inside," "outside," "back," "below," "low," "above," and "high" are used here to facilitate descriptions of the relationship between one element or feature and other elements or features, as illustrated. Spatially relative terms may be intended to encompass different orientations of the device in use or operation, in addition to the orientation depicted in the drawings. For example, if the device in the drawing is turned upside down, an element described as "below" or "directly below" another element or feature will be oriented "above" the other element or feature. Thus, the term "below" can encompass both up and down orientations. The device may also be oriented in other directions (it may be rotated 90 degrees or in other directions), and the spatially relative descriptors used in this specification will be interpreted accordingly.

[0094] While an example of a power supply circuit having a primary power supply circuit 20 and a secondary power supply circuit 30 has been shown, it is not limited to this. While an example of a multiphase power supply forming the secondary power supply circuit 30 has been shown, it is not limited to this. The secondary power supply circuit 30 is not limited to a multiphase power supply.

[0095] (Disclosure of technical ideas) This specification discloses several technical concepts, as described in the following paragraphs. Some paragraphs are written in a multiple dependent form, where subsequent paragraphs optionally refer to preceding paragraphs. Furthermore, some paragraphs are written in a multiple dependent form, referring to other multiple dependent forms. These paragraphs written in multiple dependent forms define several technical concepts.

[0096] <Technical philosophy 1> A substrate (50) having an insulating substrate (51) and wiring (52) arranged on the insulating substrate, The power supply components (31, 32, 33) mounted on the aforementioned board constitute the power supply circuit (30), A semiconductor component (40) mounted on the aforementioned substrate and operating by receiving power from the aforementioned power supply circuit, In order to electrically connect the load fluctuation test device (80), the test connection parts (55, 56) provided on the circuit board, Equipped with, The wiring includes a power wiring (53) that electrically connects the power supply component and the test connection part, and a ground wiring (54) that provides a reference potential on the circuit board. The semiconductor component is connected to the power supply wiring between the power supply component and the test connection part in an electronic device.

[0097] <Technical philosophy 2> The electronic device according to technical concept 1, further comprising a bypass capacitor (41) mounted on the substrate and electrically connected to a terminal connected to the power supply wiring and the ground wiring in the semiconductor component.

[0098] <Technical philosophy 3> The aforementioned test connection includes a land (55), The electronic device according to Technical Concept 1 or Technical Concept 2, wherein the land includes a power land (551) connected to the power wiring and a ground land (552) connected to the ground wiring.

[0099] <Technical philosophy 4> The electronic device according to technical concept 3, wherein the connector (81) of the load fluctuation test device is electrically connected to the aforementioned land.

[0100] <Technical philosophy 5> The aforementioned land is electrically connected to the components constituting the load fluctuation test device, as described in technical concept 3.

[0101] <Technical philosophy 6> The aforementioned test connection includes a connector (56) mounted on the circuit board. The connector includes a power terminal (561) electrically connected to the power wiring and a ground terminal (562) electrically connected to the ground wiring, as described in any one of Technical Concepts 1 to 3.

[0102] <Technical philosophy 7> The power supply wiring extends in a predetermined direction in a plan view of the substrate in the thickness direction, The electronic device according to any one of technical concepts 1 to 6, wherein the semiconductor component is located between the power supply component and the test connection portion in the predetermined direction.

[0103] <Technical philosophy 8> The width of the power supply wiring is wider between the semiconductor component and the test connection than between the semiconductor component and the power supply component, according to any one of the technical concepts 1 to 7.

[0104] <Technical philosophy 9> The substrate is mounted and includes peripheral components (42) arranged around the semiconductor component on one surface of the substrate, The aforementioned test connection is provided on the back surface, which is the surface opposite to the aforementioned one surface, in the electronic device according to any one of the technical concepts 1 to 8.

[0105] <Technical Thought 10> The aforementioned power supply circuit is a multi-phase power supply, as described in any one of the technical concepts 1 to 9 of the electronic device. [Explanation of Symbols]

[0106] 10...Electronic device, 20...Primary power supply circuit, 30...Secondary power supply circuit (multiphase power supply), 31...Driver, 32...Inductor, 33...Capacitor, 34...Controller, 40...SoC, 401...Solder ball, 41...Bypass capacitor, 42...Peripheral components, 50...Circuit board, 50a...One side, 50b...Back side, 51...Insulating substrate, 52...Wiring, 521...Conductor pattern, 522...Via conductor, 53...Power wiring, 531...Directly below, 532...Intermediate section, 533...Extension section, 54...Ground wiring, 55...Test land, 56...Test connector, 551...Power land, 552...Ground land, 561...Power terminal, 562...Ground terminal, 80...Load fluctuation test device, 81...Connector, 82...Test component

Claims

1. A substrate (50) having an insulating substrate (51) and wiring (52) arranged on the insulating substrate, The power supply components (31, 32, 33) mounted on the aforementioned substrate constitute the power supply circuit (30), A semiconductor component (40) mounted on the aforementioned substrate and operating by receiving power from the aforementioned power supply circuit, In order to electrically connect the load fluctuation test device (80), the test connection parts (55, 56) provided on the circuit board, Equipped with, The wiring includes a power wiring (53) that electrically connects the power supply component and the test connection part, and a ground wiring (54) that provides a reference potential on the circuit board. The semiconductor component is connected to the power supply wiring between the power supply component and the test connection part in an electronic device.

2. The electronic device according to claim 1, further comprising a bypass capacitor (41) mounted on the substrate and electrically connected to a terminal connected to the power supply wiring and the ground wiring in the semiconductor component.

3. The aforementioned test connection includes a land (55), The electronic device according to claim 1 or claim 2, wherein the land includes a power land (551) connected to the power wiring and a ground land (552) connected to the ground wiring.

4. The electronic device according to claim 3, wherein the connector (81) of the load fluctuation test device is electrically connected to the land.

5. The electronic device according to claim 3, wherein the components constituting the load fluctuation test device are electrically connected to the land.

6. The aforementioned test connection includes a connector (56) mounted on the circuit board. The electronic device according to claim 1 or claim 2, wherein the connector includes a power terminal (561) electrically connected to the power wiring and a ground terminal (562) electrically connected to the ground wiring.

7. The power supply wiring extends in a predetermined direction in a plan view of the substrate in the thickness direction, The electronic device according to claim 1 or 2, wherein the semiconductor component is located between the power supply component and the test connection portion in the predetermined direction.

8. The electronic device according to claim 1 or claim 2, wherein the width of the power supply wiring is wider between the semiconductor component and the test connection than between the semiconductor component and the power supply component.

9. The substrate is mounted and includes peripheral components (42) arranged around the semiconductor component on one surface of the substrate, The electronic device according to claim 1 or claim 2, wherein the test connection portion is provided on the back surface, which is the surface opposite to the one surface.

10. The electronic device according to claim 1 or claim 2, wherein the power supply circuit is a multiphase power supply.

Citation Information

Patent Citations

  • Load test system and load test method

    JP2023032175A