Gate drive device

Abstract

The present invention provides a gate drive device that reduces the bias in short-circuit current between parallel-connected switching elements by switching the gate resistance of the switching elements. [Solution] The gate drive device includes a gate drive circuit comprising: a plurality of switching elements connected in parallel; an overcurrent detection circuit for detecting the current flowing through each switching element; a pulse generator for generating drive signals for the plurality of switching elements and outputting them to the gate terminals of the switching elements; a short-circuit current detection means for detecting when the current flowing through the switching elements when the switching elements are driven is greater than a reference current; a first transmission path having a first resistor for supplying drive signals to the gate terminals of the switching elements; a second transmission path having a second resistor with a lower resistance than the resistance value of the first resistor; and a switching means for switching the drive signal supply path from the first transmission path to the second transmission path when the short-circuit current detection means detects that the current is greater than a reference current.

Description

Technical Field

[0001] Embodiments of the present invention relate to a gate driving device.

Background Art

[0002] In recent years, with the rise of SiC, the current density per chip area of power devices such as switching elements has increased, and it has become an issue to suppress heat generation due to a large current at the time of a short circuit.

[0003] When applying a switching element to high-power and high-current applications, it is necessary to increase the current capacity, and the switching elements for driving a load are connected in parallel. At the time of a short circuit, a bias occurs in the short-circuit current between the parallel-connected switching elements. A switching element with a large short-circuit current may be at risk of thermal breakdown. Therefore, in order to prevent thermal breakdown, it is necessary to suppress the bias of the short-circuit current between the switching elements.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] The problem to be solved by the present invention is to provide a gate driving device that reduces the bias of the short-circuit current between parallel-connected switching elements by switching the gate resistance of the switching element, which is a power device.

Means for Solving the Problems

[0006] The gate drive device of this embodiment includes a gate drive circuit comprising: a plurality of switching elements connected in parallel; an overcurrent detection circuit for detecting the current flowing through each of the switching elements; a pulse generator for generating drive signals for the plurality of switching elements and outputting them to the gate terminals of the switching elements; a short-circuit current detection means for detecting that the current flowing through the switching elements when the switching elements are driven by the drive signals is greater than a reference current; a first transmission path having a first resistor for supplying the drive signals to the gate terminals of the switching elements; a second transmission path having a second resistor with a lower resistance than the resistance value of the first resistor for supplying the drive signals to the gate terminals of the switching elements; and a switching means for switching the drive signal supply path from the first transmission path to the second transmission path when the short-circuit current detection means detects that the current is greater than a reference current. [Brief explanation of the drawing]

[0007] [Figure 1] This is a circuit diagram showing the general configuration of a power conversion circuit. [Figure 2] This is a block diagram showing the configuration of a gate drive device according to the first embodiment. [Figure 3] This is an overall diagram showing the configuration of the gate drive circuit 14-1 according to the first embodiment. [Figure 4] This is a diagram showing the processing flow according to the first embodiment. [Figure 5] This is an explanatory diagram illustrating the concept of a gate drive circuit according to the first embodiment. [Figure 6] This is a block diagram showing the configuration of a gate drive device according to the second embodiment. [Figure 7] This is an overall diagram showing the configuration of the gate drive circuit according to the second embodiment. [Figure 8] This figure shows the processing flow according to the second embodiment. [Figure 9] This is a block diagram showing the configuration of a gate drive device according to the third embodiment. [Figure 10] This is an overall diagram showing the configuration of the gate drive circuit according to the third embodiment. [Figure 11] This figure shows the processing flow according to the third embodiment. [Figure 12] This is a block diagram showing the configuration of a gate drive device according to the fourth embodiment. [Figure 13] This is an overall diagram showing the configuration of the gate drive circuit according to the fourth embodiment. [Figure 14] This figure shows the processing flow according to the fourth embodiment. [Modes for carrying out the invention]

[0008] The following describes embodiments for carrying out the invention.

[0009] (First Embodiment) The gate drive device of the first embodiment will be described with reference to Figures 1 to 5. Figure 1 is a circuit diagram showing the schematic configuration of the power conversion circuit 10. Figure 2 is a block diagram showing the configuration of the gate drive device according to the first embodiment. That is, Figure 2 is a specific block diagram showing the configuration of one gate drive device of MOSFETs 1, 2, 3, 4, 5, and 6 in Figure 1. Furthermore, Figure 3 is an overall diagram showing the configuration of the gate drive circuit 14-1 according to the first embodiment shown in Figure 2.

[0010] As shown in Figure 1, the power conversion circuit 10 is an example of a circuit that converts a DC power source such as a battery into a three-phase AC power source. In Figure 1, it comprises switching elements 1, 3, and 5 forming the upper arm and switching elements 2, 4, and 6 forming the lower arm. In the first embodiment, there are six switching elements, but the number is not limited.

[0011] The switching element is connected in series between the P terminal, to which the positive terminal of the battery is connected, and the N terminal, to which the negative terminal of the battery is connected. In addition, a smoothing capacitor 7 is connected between the DC terminals between the P terminal and the N terminal.

[0012] The connection points of the switching elements 1 to 6 of the upper and lower arms are drawn out to form three-phase AC output terminals of phases U, V, and W. Loads are connected to these phases U, V, and W, and the loads are driven by selectively controlling the on / off states of the switching elements 1 to 6. Specifically, the switching elements 1 and 2 form phase U, the switching elements 3 and 4 form phase V, and the switching elements 5 and 6 form phase W. The switching elements 1 and 2, the switching elements 3 and 4, and the switching elements 5 and 6 are alternately turned on and off, respectively. Therefore, if the switching element 1 is broken, a large current will flow when the switching element 2 is turned on.

[0013] The switching element is composed of a MOSFET and a flywheel diode (FWD), and is driven by a gate drive circuit. The switching element of this embodiment is a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), but other types of switching elements such as IGBT (Insulated Gate Bipolar Transistor) may also be used.

[0014] Next, the specific configuration of the gate drive device of the MOSFET shown in FIG. 1 will be described with reference to FIG. 2. Each of the MOSFETs 1-1 to 1-6 shown in FIG. 1 has a plurality of switching elements connected in parallel to increase the power supplied to each phase. FIG. 2 is a block diagram showing the configuration of the gate drive device according to the first embodiment, and is a specific block diagram of one switching element 2 in FIG. 1.

[0015] In the power conversion circuit 10, several switching elements are often connected in parallel. As shown in FIG. 2, in the first embodiment, assume a case where n switching elements such as switching elements 11-1, 11-2, and 11-n are connected in parallel. The number of switching elements is not limited. Also, as shown in FIG. 2, overcurrent detection circuits 12-1, 12-2, and 12-n are connected to the drain terminals of each of the switching elements, and gate drive circuits 14-1, 14-2, and 14-n are connected to the gate terminals 13-1, 13-2, and 13-n. For each of the switching elements, overcurrent detection circuits 12-1, 12-2, and 12-n are provided to detect whether each phase is short-circuited from the output voltage of the overcurrent detection circuit. Specifically, the overcurrent detection circuits 12-1, 12-2, and 12-n in FIG. 2 are configured to detect whether the switching element 1 in FIG. 1 is short-circuited.

[0016] FIG. 3 is an overall view showing the configuration of the gate drive circuit 14 according to the first embodiment. In the following description, the suffix of the reference numeral may be omitted in some cases. As shown in FIG. 3, the gate drive circuit 14-1 includes a comparator 16 that compares the output voltage between the gate and source (Vgs) with a reference voltage, and a switch 17 (switching means). Also, a control circuit 18A connected to the switch 17, a control circuit 18B, a first resistor 100A connected to the control circuit 18A, a second resistor 100B having a lower resistance than the first resistor 100A connected to the control circuit 18B, and a gate terminal 13-1. Here, the control circuit 18A and the first resistor 100A constitute a first transmission path, and the control circuit 18B and the second resistor 100B constitute a second transmission path. The gate drive circuits 14-2 and 14-n have the same configuration.

[0017] Furthermore, as shown in Figure 3, the gate drive circuits 14-1, 14-2, and 14-n are connected in parallel to the pulse generator 15 for driving the switching element 11. The drive signal generated by the pulse generator 15 generates the switching timing of the switch 17. Specifically, to determine whether the current flowing through the switching element 11 is greater than or equal to the reference current, the Vgs of the switching element 11 and the reference voltage are compared by the comparator 16. This comparator constitutes the short-circuit current detection means.

[0018] This device detects when the current flowing through the switching element 11 is greater than the reference current, because if one of the switching elements 1 that make up the same phase as in Figure 1 fails and short-circuits, the other switching element 11 shown in Figure 2 will turn on, causing the current flowing through the switching element 11 to increase and potentially destroying it.

[0019] When the current flowing through the switching element 11 is greater than the reference current and the Vgs of the switching element 11 is greater than or equal to the reference voltage, the switch 17 is switched to the control circuit 18B, which is the second transmission line. As a result, a low resistor is connected to the gate of the switching element 11, so that the switching element 11-1 can be shut off at high speed.

[0020] Furthermore, if the Vgs of the switching element 11 is not equal to or greater than the reference voltage when compared with the comparator 16, the output of the comparator 16 is connected by the switch 17 to the control circuit 18A side of the first transmission line, which is the default connection destination, and the switching element 11 is shut off at the normal speed via the high-resistance first resistor 100A.

[0021] As shown in Figure 2, since multiple switching elements 11-1, 11-2, and 11-n are connected in parallel to one phase, when the Vgs of the switching elements 11 are compared by the comparator 16, all switching elements 11-1, 11-2, and 11-n whose Vgs exceeds the reference voltage will be rapidly shut off by the gate drive circuits 14-1, 14-2, and 14-n.

[0022] Next, the operation of the gate drive circuits 14-1, 14-2, and 14-n will be described with reference to Figure 4. Figure 4 is a diagram showing the processing flow according to the first embodiment.

[0023] This section explains the situation in which a large current flows through the other switching element when one of the series-connected switching elements 1 and 2 shown in Figure 1 fails.

[0024] First, the overcurrent detection circuit 12-1 determines whether an overcurrent has been detected (step f10). If an overcurrent is detected, it is determined whether the output voltage between the gate and source of the switching element 11-1 (hereinafter referred to as Vgs) has exceeded the reference voltage (step f11). The comparison of Vgs and the reference voltage is performed by the comparator 16, which is a short-circuit current detection means. If the Vgs of the switching element 11-1 exceeds the reference value, it means that a current larger than the reference current has flowed through the switching element 11-1.

[0025] By default, switch 17 is connected to the control circuit 18A, which is the first transmission line, as the supply path for the drive signal. When comparator 16 determines that Vgs exceeds the reference voltage, switch 17 switches from the control circuit 18A, which is the first transmission line, to the control circuit 18B, which is the second transmission line, and switches from the high-resistance first resistor 100A to the low-resistance second resistor 100B, thereby rapidly shutting off the switching element 11-1 (step f12). By rapidly shutting off the switching element 11-1, it is possible to suppress the losses that occur during a short circuit and prevent thermal damage to the switching element 11.

[0026] On the other hand, if the comparator 16 determines that Vgs does not exceed the reference voltage, the switching element 11-1 remains connected to the first high-resistance resistor 100A, which is the first transmission path, and switches off at the normal speed (step f13).

[0027] The reason why the first resistor 100A has high resistance and the second resistor 100B has low resistance is that when the current flowing through the switching element 11 is not very large, a high gate resistance is sufficient and a fast interruption speed for the switching element is not required. However, when the current flowing through the switching element 11 is larger than the reference current, if the switching element 11 is not interrupted at high speed, the losses generated in the switching element 11 will be large, and there is a high possibility that the switching element 11 will suffer thermal damage. For this reason, when it is detected that the current flowing through the switching element 11 is larger than the reference current, the resistor connected to the gate terminal is switched to a low resistance to interrupt it at high speed.

[0028] Next, the effects of the first embodiment will be explained with reference to Figure 5. Figure 5 is an explanatory diagram of the concept of the gate drive circuit according to the first embodiment. In each graph, the solid line represents the conventional technology (shutting off without switching while maintaining high resistance), and the dashed line represents the case when the first embodiment is applied (the gate voltage exceeds the reference voltage and switches to low resistance to shut off). From top to bottom, each graph shows the element current (Id) representing the current flowing through the switching element 11-1, the drain-source voltage (Vds), the instantaneous value of the loss obtained by multiplying the current and voltage (Id × Vds), and the gate-source output voltage (Vgs).

[0029] At time t0, a short circuit occurs in one of the switching elements, and current suddenly begins to flow to the other switching element. Consequently, as shown in Figure 5, Vgs and Id rise. Subsequently, at time t1, an overcurrent is detected, and the comparator 16 determines whether Vgs is higher than the reference voltage. In the first embodiment, if Vgs is higher than the reference voltage, at time t2, the switch 17 switches the resistance of the gate terminal to a second low-resistance resistor 100B, thereby shutting off the switching element. By switching to a low-resistance resistor, Vgs falls more steeply than the solid line representing the conventional technology, and Id can also be shut off quickly. Furthermore, the time integral of Id × Vds (called short-circuit energy; hereinafter referred to as Esc) is reduced compared to when the conventional technology is applied, indicating a reduction in losses in the switching element. The reduction in Esc suppresses heat generation in the switching element, making it possible to prevent thermal damage.

[0030] When multiple switching elements 11 are connected in parallel, variations in Vgs occur due to variations in element characteristics and conductor inductance. Short-circuit current concentrates in switching elements with high Vgs, which may lead to thermal damage due to Esc. In the first embodiment, the gate resistance of switching elements with high Vgs is switched to one with a lower resistance value, which rapidly interrupts the short-circuit current and reduces Esc.

[0031] (Second embodiment) Next, a second embodiment will be described with reference to Figures 6 to 8. In this second embodiment, parts identical to those of the gate drive device in the first embodiment shown in Figure 2 are indicated by the same reference numerals. The difference between this second embodiment and the first embodiment is that a single gate drive circuit 24 is provided in common for a plurality of switching elements 21 connected in parallel.

[0032] Figure 6 is a block diagram showing the configuration of the gate drive device according to the second embodiment. Figure 7 is an overall diagram showing the configuration of the gate drive circuit 24 according to the second embodiment. Figure 8 is a diagram showing the processing flow according to the second embodiment.

[0033] As shown in Figure 6, we assume that the switching element consists of n elements connected in parallel, such as switching element 21-1, switching element 21-2, and switching element 21-n. The number of switching elements is not limited. Also, as shown in Figure 6, each of the switching elements 21 is equipped with overcurrent detection circuits 22-1, 22-2, and 22-n, and gate terminals 23-1, 23-2, and 23-n. In Figure 6, multiple gate drive circuits 24 are shown corresponding to each of the switching elements 21-1, 21-2, and 21-n, but in reality, only one gate drive circuit 24 is provided common to all of the switching elements. The output of the gate drive circuit 24 is connected to the gate terminals 23-1, 23-2, and 23-n of the switching elements 21-1, 21-2, and 21-n.

[0034] As shown in Figure 7, the gate drive circuit according to the second embodiment includes comparators 26-1, 26-2, and 26-n that compare the Vgs of each switching element 21 with a reference voltage, an OR operation circuit 29 that calculates the logical OR of the signals output from each comparator, a switch 27, a control circuit 28A connected to the switch 27, a control circuit 28B, a first resistor 200A connected to the control circuit 29A, and a second resistor 200B connected to the control circuit 29B. Furthermore, the control circuit 28A and the first resistor 200A constitute a first transmission path, and the control circuit 28B and the second resistor 200B constitute a second transmission path.

[0035] The switching timing of the switch 27 is generated by the drive signal generated by the pulse generator 25. Specifically, the Vgs of the switching element 21 and the reference voltage are compared by the comparator 26 to determine whether the current flowing through the switching element 21 is greater than or equal to the reference current. This comparator 26 constitutes the short-circuit current detection means. When any one of the comparators 26-1, 26-2, or 26-n detects a short-circuit current, a signal is output from the OR operation circuit 29, and the switch 27 is switched to the second transmission line (control circuit 28B) side.

[0036] Next, the operation of the gate drive circuit will be explained with reference to Figure 8. Figure 8 is a diagram showing the processing flow according to the second embodiment.

[0037] First, the overcurrent detection circuit 22 determines whether an overcurrent has been detected (step f20). If an overcurrent is detected, it is determined whether the Vgs of any of the switching elements 21 has exceeded the reference voltage (step f21). The comparison of Vgs and the reference voltage is performed by the comparator 26, which is a short-circuit current detection means.

[0038] By default, switch 27 is connected to the control circuit 28A, which is the first transmission line, as the supply path for the drive signal. When the OR operation circuit 29 determines that Vgs has exceeded the reference voltage, switch 27 switches from the control circuit 28A, which is the first transmission line, to the control circuit 28B, which is the second transmission line, and switches from the high-resistance first resistor 200A to the low-resistance second resistor 200B, thereby rapidly shutting off all switching elements (21-1, 21-2, 21-n) (step f22). By shutting off at high speed, it is possible to suppress the losses that occur during a short circuit.

[0039] On the other hand, if the OR operation circuit 29 determines that all Vgs do not exceed the reference voltage, all switching elements (21-1, 21-2, 21-n) remain as the high-resistance first resistors of 200A and are switched off at the normal speed (step f23).

[0040] In the first embodiment, only the switching element 21 with a high Vgs among the parallel-connected switching elements 21 has its gate resistance switched. However, in the second embodiment, if even one switching element among the parallel-connected switching elements 21 has a Vgs higher than the reference voltage, the gate resistance of all switching elements 21 is switched to a low resistance. By switching the gate resistance to a low resistance, it is possible to quickly interrupt the short-circuit current and reduce Esc.

[0041] (Third embodiment) Next, a third embodiment will be described using Figures 9 to 11. In this third embodiment, parts identical to those of the gate drive device in the first embodiment shown in Figure 2 are indicated by the same reference numerals. The difference between this third embodiment and the first embodiment is that it determines whether the current change rate (Lxdi / dt) of the switching element 31 exceeds the reference voltage.

[0042] Figure 9 is a block diagram showing the configuration of the gate drive device according to the third embodiment. Figure 10 is an overall diagram showing the configuration of the gate drive circuit according to the third embodiment. Figure 11 is a diagram showing the processing flow according to the third embodiment.

[0043] As shown in Figure 9, we assume that the switching element consists of n elements connected in parallel, such as switching element 31-1, switching element 31-2, and switching element 31-n. The number of switching elements is not limited. Also, as shown in Figure 9, each of the switching elements 31 is equipped with parasitic inductances 301-1, 301-2, and 301-n of the wiring busbar, overcurrent detection circuits 32-1, 32-2, and 32-n, gate terminals 33-1, 33-2, and 33-n, and gate drive circuits 34-1, 34-2, and 34-n. The outputs of the gate drive circuits 34-1, 34-2, and 34-n are connected to the gate terminals 33-1, 33-2, and 33-n of the switching elements 31-1, 31-2, and 31-n.

[0044] As shown in Figure 10, the gate drive circuit according to the third embodiment includes a comparator 36 that compares the rate of change of current of each switching element (hereinafter referred to as L × di / dt) with a reference voltage, a switch 37, a control circuit 38A connected to the switch 37, a control circuit 38B, a first resistor 300A connected to the control circuit 38A, and a second resistor 300B connected to the control circuit 38B. Furthermore, the control circuit 38A and the first resistor 300A constitute a first transmission path, and the control circuit 38B and the second resistor 300B constitute a second transmission path.

[0045] The switching timing of the switch 37 is generated by the drive signal generated by the pulse generator 35. Specifically, to determine whether the current flowing through the switching element 31 is equal to or greater than the reference current, the current change rate (L × di / dt) of the switching element 31 and the reference voltage are compared by the comparator 36. This comparator 36 constitutes the short-circuit current detection means. When the comparator 36 detects a short-circuit current, the switch 37 is switched to the second transmission line (control circuit 38B) side.

[0046] The gate drive circuits 34-2 and 34-n have a similar configuration. The drive signal generated to drive the switching element 31 is output by the pulse generator 35.

[0047] Next, the operation of the gate drive circuit will be described with reference to Figure 11. Figure 11 is a diagram showing the processing flow according to the third embodiment.

[0048] First, the overcurrent detection circuit 32-1 determines whether an overcurrent has been detected (step f30). If an overcurrent is detected, it is determined whether L×di / dt of the switching element 31-1 exceeds the reference voltage (step f31). The comparison of L×di / dt and the reference voltage is performed by the comparator 36, which is a short-circuit current detection means. L×di / dt is the voltage across the parasitic inductance L, and is the product of the parasitic inductance of the wiring busbar directly below the switching element 31 and the rate of change of the element current.

[0049] By default, switch 37 is connected to the control circuit 38A, which is the first transmission line, as the supply path for the drive signal. When it is determined that L × di / dt exceeds the reference voltage, switch 37 switches from the control circuit 38A, which is the first transmission line, to the control circuit 38B, which is the second transmission line, and switches from the high-resistance first resistor 300A to the low-resistance second resistor 300B, thereby rapidly shutting off the switching element 31 (step f32). By shutting off at high speed, it is possible to suppress the losses that occur during a short circuit.

[0050] On the other hand, if it is determined that L × di / dt does not exceed the reference voltage, the switching element 31 remains as the high-resistance first resistor 300A and shuts off at the normal speed (step f33).

[0051] In the third embodiment, the gate resistance of the switching element 31 where L×di / dt is higher than the reference value is switched to one with a lower resistance value, thereby rapidly interrupting the short-circuit current. This makes it possible to achieve the effect of reducing Esc.

[0052] (Fourth embodiment) Next, a fourth embodiment will be described using Figures 12 to 14. In this fourth embodiment, parts identical to those in the load drive circuit of the first embodiment in Figure 2 are indicated by the same reference numerals. The difference between this fourth embodiment and the first embodiment is that a single gate drive circuit 44 is provided in common for a plurality of switching elements 41 connected in parallel, and a determination is made as to whether the current change rate of the switching elements 41 exceeds the reference voltage.

[0053] Figure 12 is a block diagram showing the configuration of the gate drive device according to the fourth embodiment. Figure 13 is an overall diagram showing the configuration of the gate drive circuit 44 according to the fourth embodiment. Figure 14 is a diagram showing the processing flow according to the fourth embodiment.

[0054] As shown in Figure 12, we assume that the switching element consists of n elements connected in parallel, such as switching element 41-1, switching element 41-2, and switching element 41-n. The number of switching elements is not limited.

[0055] Furthermore, as shown in Figure 12, each of the switching elements 41-1, 41-2, and 41-n is equipped with parasitic inductances 401-1, 401-2, and 401-n of the wiring busbar, overcurrent detection circuits 42-1, 42-2, and 42-n, and gate terminals 43-1, 43-2, and 43-n. In Figure 12, multiple gate drive circuits 44 are shown corresponding to each of the switching elements 41-1, 41-2, and 41-n, but in reality, only one gate drive circuit 44 is provided common to each switching element. The output of the gate drive circuit 44 is connected to the gate terminals 43-1, 43-2, and 43-n of the switching elements 41-1, 41-2, and 41-n.

[0056] As shown in Figure 13, the gate drive circuit according to the fourth embodiment includes comparators 46-1, 46-2, and 46-n that compare the L×di / dt of each switching element with a reference voltage, an OR operation circuit 49 that calculates the logical OR of the signals output from each comparator, a switch 47, a control circuit 48A connected to the switch 47, a control circuit 48B, a first resistor 400A connected to the control circuit 48A, and a second resistor 400B connected to the control circuit 48B. Furthermore, the control circuit 48A and the first resistor 400A constitute a first transmission path, and the control circuit 48B and the second resistor 400B constitute a second transmission path.

[0057] The switching timing of the switch 47 is generated by the drive signal generated by the pulse generator 45. Specifically, to determine whether the current flowing through the switching element 41 is greater than or equal to a reference current, the L × di / dt of the switching element 41 and the reference voltage are compared by the comparator 46. This comparator 46 constitutes a short-circuit current detection means. When any one of the comparators 46-1, 46-2, or 46-n detects a short-circuit current, a signal is output from the OR operation circuit 49, and the switch 47 is switched to the second transmission line (control circuit 48B) side.

[0058] Next, the operation of the gate drive circuit will be explained with reference to Figure 14. Figure 14 is a diagram showing the processing flow according to the third embodiment.

[0059] First, the overcurrent detection circuit 42 determines whether an overcurrent has been detected (step f40). If an overcurrent is detected, it is determined whether L×di / dt has exceeded the reference voltage for at least one of the switching elements 41 (step f41). The comparison of L×di / dt and the reference voltage is performed by the comparator 46, which is a short-circuit current detection means.

[0060] By default, switch 47 is connected to the control circuit 48A, which is the first transmission line, as the supply path for the drive signal. When the OR operation circuit 49 determines that L × di / dt exceeds the reference voltage, switch 47 switches from the control circuit 48A, which is the first transmission line, to the control circuit 48B, which is the second transmission line, and switches from the high-resistance first resistor 400A to the low-resistance second resistor 400B, thereby rapidly shutting off all switching elements (41-1, 41-2, 41-n) (step f42). By shutting off at high speed, it is possible to suppress the losses that occur during a short circuit.

[0061] On the other hand, if the OR operation circuit 49 determines that all L × di / dt do not exceed the reference voltage, all switching elements (41-1, 41-2, 41-n) remain as the first high-resistance resistors of 400A and are switched off at the normal speed (step f43).

[0062] In the third embodiment, only the switching element 41 with a high L×di / dt among the parallel-connected switching elements 41 has its gate resistance switched. However, in the fourth embodiment, if even one switching element among the parallel-connected switching elements 41 has an L×di / dt higher than the reference voltage, the gate resistance of all switching elements 41 is switched to a low resistance. By switching the gate resistance to a low resistance, it is possible to quickly interrupt the short-circuit current and reduce Esc.

[0063] While several embodiments of the present invention have been described, these embodiments are presented as examples only and are not intended to limit the scope of the invention. These novel embodiments can be carried out in a variety of other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims of the invention and its equivalents. [Explanation of Symbols]

[0064] 1, 2, 3, 4, 5, 6, 11, 21, 31, 41… Switching elements 10... Power conversion circuit 12, 22, 32, 42... Overcurrent detection circuits 13, 23, 33, 43… Gate terminals 14, 24, 34, 44… Gate drive circuits 15, 25, 35, 45... pulse generators 16, 26, 36, 46... Comparators 17, 27, 37, 47... Switch 18, 28, 38, 48… control circuits 29, 49... OR operation circuit 100A, 200A, 300A, 400A... First resistor 100B, 200B, 300B, 400B... Second resistor 301, 401… Parasitic inductance

Claims

1. Multiple switching elements connected in parallel, An overcurrent detection circuit for detecting the current flowing through each of the aforementioned switching elements, A pulse generator that generates drive signals for the plurality of switching elements and outputs them to the gate terminals of the switching elements, A short-circuit current detection means for detecting when the switching element is driven by the drive signal and the current flowing through the switching element is greater than a reference current, A gate drive circuit comprising: a first transmission path having a first resistor that supplies the drive signal to the gate terminal of the switching element; a second transmission path having a second resistor having a lower resistance than the resistance value of the first resistor that supplies the drive signal to the gate terminal of the switching element; and a switching means that switches the drive signal supply path from the first transmission path to the second transmission path when the short-circuit current detection means detects that the current is greater than a reference current. A gate drive device having the following features.

2. The gate drive circuit is provided corresponding to each of the switching elements, and the short-circuit current detection means detects that the current flowing through the switching element is greater than the reference current for that switching element, and the switching means switches the supply path of the drive signal from the first transmission path to the second transmission path only for that switching element. The gate drive device according to claim 1.

3. The gate drive circuit is provided in common to all of the multiple switching elements, and when the short-circuit current detection means detects that the current flowing through any of the switching elements is greater than the reference current, the switching means switches the supply path of the drive signal from the first transmission path to the second transmission path for all of the switching elements. The gate drive device according to claim 1.

4. The short-circuit current detection means detects whether the current flowing through each of the switching elements is greater than the reference current based on whether the output voltage of each switching element is greater than or equal to the reference voltage. A gate drive device according to any one of claims 1 to 3.

5. The short-circuit current detection means detects whether the current flowing through each of the switching elements is greater than the reference current based on whether the rate of change of the current flowing through each switching element is greater than or equal to the reference voltage. A gate drive device according to any one of claims 1 to 3.

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