Semiconductor equipment

Abstract

To improve surge resistance. [Solution] The semiconductor device according to this embodiment comprises a silicon carbide layer, a first electrode, a second electrode, a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of a second conductivity type, a first conductive part, and a second conductive part. The silicon carbide layer comprises a main body and a protruding part protruding from the main body. The first electrode is provided on the protruding part. The second electrode is provided on the opposite side of the main body from the first electrode. The first semiconductor region is provided within the main body and is electrically connected to the second electrode. The second semiconductor region is provided within the protruding part. The third semiconductor region is provided from the second semiconductor region to the upper end of the protruding part and has a higher impurity concentration than the second semiconductor region. The first conductive part makes Schottky contact with the first semiconductor region. The second conductive part makes ohmic contact with the third semiconductor region.

Description

[Technical Field]

[0001] Embodiments of the present invention relate to semiconductor devices. [Background technology]

[0002] In Schottky barrier diodes (SBDs), which are constructed by joining a metal and a semiconductor, it is desirable to improve their surge withstand capability. [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] Patent No. 5591151 [Patent Document 2] Japanese Patent Publication No. 2009-224603 [Patent Document 3] Patent No. 6150976 [Overview of the Initiative] [Problems that the invention aims to solve]

[0004] Embodiments of the present invention provide a semiconductor device that can improve surge withstand capability. [Means for solving the problem]

[0005] The semiconductor device according to this embodiment comprises a silicon carbide layer, a first electrode, a second electrode, a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of a second conductivity type, a first conductive part, and a second conductive part. The silicon carbide layer comprises a main body and a protruding part projecting from the main body. The first electrode is provided on the protruding part. The second electrode is provided on the opposite side of the main body from the first electrode. The first semiconductor region is provided within the main body and is electrically connected to the second electrode. The second semiconductor region is provided within the protruding part. The third semiconductor region is provided within the protruding part from the second semiconductor region to the upper end of the protruding part, and has a higher impurity concentration than the second semiconductor region. The first conductive part is in Schottky contact with the first semiconductor region and is electrically connected to the first electrode. The second conductive portion is in ohmic contact with the third semiconductor region at the upper end of the protruding portion and is electrically connected to the first electrode. [Brief explanation of the drawing]

[0006] [Figure 1] This is a cross-sectional view of the semiconductor device according to the first embodiment. [Figure 2] This is an enlarged view of a protruding portion in a semiconductor device according to the first embodiment. [Figure 3A] This is a cross-sectional view illustrating an example of the manufacturing process for a semiconductor device according to the first embodiment. [Figure 3B] This is a cross-sectional view illustrating an example of the manufacturing process for a semiconductor device according to the first embodiment, following Figure 3A. [Figure 3C] Figure 3B is a cross-sectional view illustrating an example of the manufacturing process for a semiconductor device according to the first embodiment. [Figure 3D] Figure 3C is a cross-sectional view illustrating an example of the manufacturing process for a semiconductor device according to the first embodiment. [Figure 3E] Figure 3D is a cross-sectional view illustrating an example of the manufacturing process for a semiconductor device according to the first embodiment. [Figure 3F]Figure 3E is a cross-sectional view illustrating an example of the manufacturing process for a semiconductor device according to the first embodiment. [Figure 3G] Figure 3F is a cross-sectional view illustrating an example of the manufacturing process for a semiconductor device according to the first embodiment. [Figure 3H] Figure 3G is a cross-sectional view illustrating an example of the manufacturing process for a semiconductor device according to the first embodiment. [Figure 3I] Figure 3H is a cross-sectional view illustrating an example of the manufacturing process for a semiconductor device according to the first embodiment. [Figure 3J] Figure 3I is a cross-sectional view illustrating an example of the manufacturing process for a semiconductor device according to the first embodiment. [Figure 3K] Figure 3J is a cross-sectional view illustrating an example of the manufacturing process for a semiconductor device according to the first embodiment. [Figure 3L] Figure 3K is a cross-sectional view illustrating an example of the manufacturing process for a semiconductor device according to the first embodiment. [Figure 4] This is a cross-sectional view of a semiconductor device according to a modified example of the first embodiment. [Figure 5] This is a plan view of a semiconductor device according to the second embodiment. [Figure 6] This is a cross-sectional view of a semiconductor device according to the second embodiment. [Figure 7] This is a plan view of a semiconductor device according to a modified example of the second embodiment. [Figure 8] This is a cross-sectional view of a semiconductor device according to a modified example of the second embodiment. [Figure 9] This is a cross-sectional view of the semiconductor device according to the third embodiment. [Modes for carrying out the invention]

[0007] Hereinafter, embodiments of the present invention will be described with reference to the drawings. The embodiments do not limit the present invention. The drawings are schematic or conceptual, and the ratios of each part are not necessarily the same as the actual ones. In the specification and drawings, the same reference numerals are given to the same elements as those described above with respect to the previously presented drawings, and detailed descriptions are appropriately omitted.

[0008] For convenience of explanation, as shown in FIGS. 1 and 2, an XYZ orthogonal coordinate system is adopted. The Z-axis direction is the stacking direction (thickness direction) of the semiconductor device. Also, in the Z-axis direction, the anode electrode side is also referred to as "up", and the cathode electrode side is also referred to as "down". However, this expression is for convenience and has nothing to do with the direction of gravity. The Z-axis direction is the first direction in the claims. The Y-axis direction is the second direction in the claims. The X-axis direction is the third direction in the claims.

[0009] Also, in the following description, in order to represent the relative high and low impurity concentrations in each conductivity type, notations such as n ++ , n + , n, n - , and, p ++ , p + , p, p - may be used. That is, n ++ has a relatively higher n-type impurity concentration than n + , n + has a relatively higher n-type impurity concentration than n, and n - indicates that the n-type impurity concentration is relatively lower than n. Also, p ++ has a relatively higher p-type impurity concentration than p + , p + has a relatively higher p-type impurity concentration than p, and p - indicates that the p-type impurity concentration is relatively lower than p. These notations represent the relative high and low net impurity concentrations after the impurities compensate for each other when both p-type and n-type impurities are included in each region. n-type, n ++ -type, n + -type and n - -type are an example of the first conductivity type in the claims. p-type, p++ shape, p + shape and p - The shape is an example of the second conductivity type in the claims. Note that in the following description, the n-type and p-type may be reversed. That is, the first conductivity type may be the p-type.

[0010] Furthermore, the impurity concentration in the semiconductor region can be measured, for example, by secondary ion mass spectrometry (SIMS). The relative levels of impurity concentrations can also be determined, for example, from the carrier concentrations obtained by scanning capacitance microscopy (SCM).

[0011] Furthermore, dimensions such as the width of the protruding portion can be measured by analyzing the surface and cross-section of the semiconductor device using, for example, a transmission electron microscope (TEM), energy dispersive X-ray spectroscopy (EDX), or a scanning electron microscope (SEM).

[0012] In this specification, terms such as "identical," "same," and "equal," as well as dimensions and physical property values ​​used to specify shape, geometric conditions, physical properties, and their degrees, shall not be strictly interpreted, but shall be interpreted to include a range that allows for the expectation of similar functionality.

[0013] (First Embodiment) Referring to Figure 1, the semiconductor device 1 according to the first embodiment will be described. Figure 1 is a cross-sectional view of the semiconductor device 1 according to the first embodiment.

[0014] The semiconductor device 1 according to this embodiment is a Schottky barrier diode (SBD). As shown in Figure 1, the semiconductor device 1 comprises a silicon carbide layer 2, an anode electrode 11, a cathode electrode 12, a Schottky electrode portion 61, and an ohmic electrode portion 62.

[0015] The silicon carbide layer 2 may be an epitaxial layer, a semiconductor substrate, or a semiconductor substrate with an epitaxial layer disposed thereon. The silicon carbide layer 2 is single-crystal silicon carbide (SiC). Examples of n-type impurities in the silicon carbide layer 2 include nitrogen (N), phosphorus (P), arsenic (As), or antimony (Sb), while examples of p-type impurities include aluminum (Al) or boron (B).

[0016] The silicon carbide layer 2 comprises a main body portion 3 and protruding portions 4. The main body portion 3 has an upper surface (first main surface) and a lower surface (second main surface). The protruding portions 4 protrude from the upper surface of the main body portion 3. The dotted line in Figure 1 indicates the boundary between the main body portion 3 and the protruding portions 4. The protruding portions 4 extend in the Y-axis direction, as shown in Figure 5, which will be described later. In this embodiment, multiple protruding portions 4 are provided on the upper surface of the main body portion 3. The multiple protruding portions 4 are spaced apart from each other along the X-axis direction, and the Schottky electrode portion 61 is provided between them. In this embodiment, the island-shaped portion 5, which will be described later, is not provided.

[0017] As shown in Figure 1, within the silicon carbide layer 2, there are n regions 21 and n + Region 22, p-region 23 and p + A region 24 is provided.

[0018] n region 21 is the n-type semiconductor region in the SBD. + Region 22 is n in SBD + This is a semiconductor region of the shape n region 21 and n + Region 22 is provided within the main body 3, extending from the upper surface of the main body 3 to the lower surface of the main body 3. More specifically, region n 21 is provided from the upper surface of the main body 3 to partway along the main body 3, n +Region 22 is provided from region n 21 to the lower surface of the main body 3. + Region 22 is in contact with the cathode electrode 12 and is electrically connected to the cathode electrode 12. n Region 21 and n + Region 22 constitutes an example of the first semiconductor region in the claims. The n-type impurity concentration in n-region 21 is, for example, 1 × 10⁻⁶ 15 cm -3 The above 2 x 10 16 cm -3 The following is the case: n + The concentration of n-type impurities in region 22 is higher than the concentration of n-type impurities in n-region 21. + The n-type impurity concentration in region 22 is, for example, 1 × 10⁻⁶. 18 cm -3 The above 1 x 10 21 cm -3 The following applies:

[0019] Note that n + Region 22 may not be provided. In this case, n-region 21 is provided directly on the cathode electrode 12, and the cathode electrode 12 is electrically connected to n-region 21. Alternatively, n-region 21 may not be provided. In this case, for example, n + Region 22 is also provided at the position of n region 21.

[0020] The p-region 23 is a p-type semiconductor region. The presence of the p-region 23 gives the semiconductor device 1 a so-called JBS (Junction Barrier Schottky) structure. The p-region 23 is located within the protruding portion 4. More specifically, the p-region 23 extends from within the protruding portion 4, through the upper surface of the main body portion 3, to partway along the main body portion 3. That is, the p-region 23 has a lower portion located within the main body portion 3 and an upper portion protruding from the upper surface of the main body portion 3 and extending partway along the protruding portion 4. As shown by the dotted line in Figure 1, the boundary between the main body portion 3 and the protruding portion 4 is located within the p-region 23. In other words, the p-region 23 straddles this boundary. The p-region 23 is an example of the second semiconductor region in the claims. The p-region 23 extends in the Y-axis direction. The p-type impurity concentration in the p-region 23 is p +It is lower than the p-type impurity concentration in region 24. The p-type impurity concentration in region 23 is, for example, 1 × 10⁻⁶. 16 cm -3 The above 1 x 10 19 cm -3 The following applies:

[0021] In this embodiment, multiple p-regions 23 are provided. Each p-region 23 extends from within the protruding portion 4, through the upper surface of the main body portion 3, and partway down the main body portion 3. The n-region 21 has multiple portions 21a. Each portion 21a is sandwiched between adjacent p-regions 23, and its upper end is located on the upper surface of the main body portion 3. The portions 21a are so-called mesa portions. The portions 21a are in contact with the Schottky electrode portion 61.

[0022] p + Region 24 is p + This is a semiconductor region of shape. + The presence of region 24 means that the semiconductor device 1 includes a so-called MPS (Merged PiN Schottky) structure. + Region 24 is provided within the protruding portion 4 from region p 23 to the upper end of the protruding portion 4. + Region 24 is adjacent to region p 23. + The boundary between region 24 and region p 23 is located above the upper surface of the main body 3. + Region 24 is an example of a third semiconductor region in the claims. + Region 24 extends in the Y-axis direction. + The p-type impurity concentration in region 24 is higher than that in p-region 23. + The p-type impurity concentration in region 24 is, for example, 5 × 10⁻⁶. 18 cm -3 The above 1 x 10 21 cm -3 The following applies. In this embodiment, p + Region 24 extends to the side end of the protruding portion 4.

[0023] The anode electrode 11 functions as the anode electrode of the SBD. The anode electrode 11 is provided on the upper surface of the main body 3 so as to embed the protruding portion 4. That is, a part of the anode electrode 11 is provided on the protruding portion 4, and another part of the anode electrode 11 is embedded between adjacent protruding portions 4. The anode electrode 11 is an example of the first electrode in the claims. The anode electrode 11 is made of, for example, aluminum (Al), titanium (Ti), copper (Cu), tungsten (W), etc.

[0024] The cathode electrode 12 functions as the cathode electrode of the SBD. The cathode electrode 12 is provided on the lower surface of the main body 3. That is, the cathode electrode 12 is provided on the opposite side of the main body 3 from the anode electrode 11. The cathode electrode 12 is an example of the second electrode in the claims. The cathode electrode 12 is made of, for example, aluminum (Al), titanium (Ti), copper (Cu), tungsten (W), etc.

[0025] The Schottky electrode portion 61 is a conductive portion provided on the upper surface of the main body portion 3. More specifically, the Schottky electrode portion 61 covers the upper surface of the main body portion 3 exposed between the protruding portions 4, the upper surface of the ohmic electrode portion 62, and the side surface of the ohmic electrode portion 62. The Schottky electrode portion 61 makes Schottky contact with the n region 21 on the upper surface of the main body portion 3. More specifically, the Schottky electrode portion 61 contacts portion 21a of the n region 21 in the portion of the upper surface of the main body portion 3 sandwiched between adjacent protruding portions 4, and makes Schottky contact with portion 21a of the n region 21. The Schottky electrode portion 61 is also electrically connected to the anode electrode 11. The Schottky electrode portion 61 is an example of the first conductive portion in the claims. The Schottky electrode portion 61 is made of, for example, molybdenum (Mo), titanium (Ti), vanadium (V), nickel (Ni), platinum (Pt), etc.

[0026] The ohmic electrode portion 62 is a conductive portion provided on the protruding portion 4. The ohmic electrode portion 62 is at least at the upper end of the protruding portion 4 p +It makes ohmic contact with region 24. In this embodiment, the ohmic electrode portion 62 is at the upper end and side end of the protruding portion 4. + The ohmic electrode portion 62 makes ohmic contact with region 24. The ohmic electrode portion 62 is also electrically connected to the anode electrode 11 via the Schottky electrode portion 61. The ohmic electrode portion 62 is an example of the second conductive portion in the claims. The ohmic electrode portion 62 is made of, for example, nickel silicide (NiSi), titanium silicide (TiSi), etc.

[0027] Next, with reference to Figure 2, the protruding portion 4 in the semiconductor device 1 and its surrounding configuration will be described in detail. Figure 2 is an enlarged view of the protruding portion 4 in the semiconductor device 1 according to the first embodiment.

[0028] As shown in Figure 2, the protruding portion 4 extends from the upper surface of the main body portion 3 by a height equal to the sum of heights h1 and h2. Here, height h1 is the height of the portion of the p region 23 that protrudes from the upper surface of the main body portion 3 (the upper portion), and is, for example, 0.2 μm. Height h2 is, + The height of region 24 is, for example, 0.2 μm. Therefore, in this case, the sum of heights h1 and h2 is 0.4 μm. Note that the sum of heights h1 and h2 may be any value within the range of 0.3 μm to 1.0 μm. Also, the magnitudes of heights h1 and h2 may be the same, or one of them may be larger than the other.

[0029] Height h3 is the height of the portion of p region 23 that is embedded in the main body 3 (the lower portion), and is, for example, 0.5 μm.

[0030] Width w1 is the width of the p region 23 on the upper surface of the main body 3. Width w1 is, for example, 2 μm. Width w2 is the width of portion 21a of the n region 21 on the upper surface of the main body 3. Width w2 is, for example, 2 μm. Note that widths w1 and w2 may each be any value within the range of 1 μm to 8 μm, more preferably any value within the range of 1 μm to 2 μm.

[0031] Note that in the example in Figure 2, p +The sides of region 24 and the sides of the portion of region p 23 that protrudes from the upper surface of the main body 3 are approximately perpendicular to the upper surface of the main body 3. Furthermore, p + The width of region 24 is equal to the width of the portion of region p 23 that protrudes from the upper surface of the main body 3. However, the protruding portion 4 may have a shape such that its width narrows as it approaches the upper end of the protruding portion 4.

[0032] Furthermore, in the example shown in Figure 2, the side surface of the portion of p-region 23 embedded in the main body 3 is approximately perpendicular to the top surface of the main body 3, and the width of p-region 23 within the main body 3 is approximately equal to the width w1 of p-region 23 on the top surface of the main body 3. However, this is not limited to this, and the width of p-region 23 within the main body 3 may differ from the width w1 on the top surface of the main body 3.

[0033] As shown in Figure 2, p + Within region 24, injection defects CD, such as those caused by extralattice atoms, are formed. These injection defects CD are caused by high impurity concentrations of p + When forming region 24, p + It occurs within region 24. In this embodiment, p + Region 24 is separated from region n 21 by region p 23. That is, region n 21 contains the injection defect CD. + It is not directly adjacent to region 24.

[0034] As described above, the semiconductor device 1 according to the first embodiment comprises a silicon carbide layer 2, an anode electrode 11, a cathode electrode 12, and n regions 21 and n of the first conductivity type. + Region 22, p-region 23 of the second conductivity type, and p-region 23 of the second conductivity type + The device comprises a region 24, a Schottky electrode portion 61, and an ohmic electrode portion 62. The silicon carbide layer 2 comprises a main body portion 3 and a protruding portion 4 projecting from the main body portion 3. The anode electrode 11 is provided on the protruding portion 4. The cathode electrode 12 is provided on the opposite side of the main body portion 3 from the anode electrode 11. + Region 22 is located within the main body 3 and is electrically connected to the cathode electrode 12. Region p 23 is located within the protruding portion 4. +Region 24 is provided within the protruding portion 4 from the p region 23 to the upper end of the protruding portion 4, and the impurity concentration is higher than that of the p region 23. The Schottky electrode portion 61 is in Schottky contact with the n region 21 and is electrically connected to the anode electrode 11. The ohmic electrode portion 62 is at the upper end of the protruding portion 4, p + It is in ohmic contact with region 24 and is electrically connected to the anode electrode 11.

[0035] According to this embodiment, the impurity concentration is higher than the p region 23. + A region 24 is provided, and the ohmic electrode portion 62 is p + It makes ohmic contact with region 24. As a result, p occurs at the timing when a high current (high surge current) flows. + Region 24, p-region 23, n-region 21 and n + The pn junction diode formed by region 22 is turned on, improving the current transport capability of the semiconductor device 1. As a result, the surge withstand capability of the semiconductor device 1 can be improved.

[0036] Furthermore, in this embodiment, p includes injection defect CD. + Region 24 is separated from region 21 by region p 23. This suppresses leakage current (reverse current) when semiconductor device 1 is operating in the reverse direction.

[0037] Furthermore, in this embodiment, p + Region 24 is located within the protruding portion 4 and not within the main body portion 3. As a result, p + In order to separate region 24 from region n 21, for example in the main body 3, p + This avoids the need to provide a p-shaped semiconductor region that encloses region 24. Therefore, the area of ​​n-region 21 on the upper surface of the main body 3 can be secured, and an increase in the forward voltage can be avoided.

[0038] In addition, in the present embodiment, a plurality of p regions 23 are provided, and the n region 21 has a plurality of portions 21a that are sandwiched by the p regions 23 and whose upper ends are located on the upper surface of the main body portion 3. As a result, the area where the Schottky electrode portion 61 makes Schottky contact with the n region 21 increases, and the forward voltage of the semiconductor device 1 can be reduced.

[0039] <Method for manufacturing semiconductor device 1> Next, an example of a method for manufacturing the semiconductor device 1 according to the first embodiment will be described with reference to FIGS. 3A to 3L. FIGS. 3A to 3L are cross-sectional views for explaining an example of the manufacturing process of the semiconductor device 1 according to the first embodiment.

[0040] First, as shown in FIG. 3A, a silicon carbide layer 20 having an n region 21 and an n + region 22 is prepared. The silicon carbide layer 20 includes, for example, an n + region 22 and an n region 21 provided on the n + region 22.

[0041] Next, as shown in FIG. 3B, p regions 23 are formed by performing ion implantation of p-type impurities on a part of the upper surface of the silicon carbide layer 20. In the example of FIG. 3B, a plurality of p regions 23 are formed so as to be spaced apart from each other. The ion implantation is performed by irradiating ions of p-type impurities toward a mask (not shown) formed on the upper surface of the silicon carbide layer 20 and having an opening in the planned formation region of the p region 23.

[0042] Next, as shown in FIG. 3C, p-type impurity ion implantation is performed on the upper surface of the p region 23 among the upper surface of the silicon carbide layer 2 to form a p + region 24. In the present embodiment, the p + region 24 is formed such that the width of the p + region 24 is smaller than the width of the p region 23. Note that the p + region 24 may be formed such that the width of the p + region 24 is equal to the width of the p region 23.

[0043] Next, as shown in Figure 3D, the p region 23 and p of the silicon carbide layer 20 are removed by reactive ion etching (RIE), etc. + Remove a portion of the area sandwiched between regions 24. More specifically, of the silicon carbide layer 20, p + The portion sandwiched between region 24 and a portion sandwiched between region p 23 are removed. This forms a silicon carbide layer 2 comprising a main body 3 having an upper and lower surface, and a protruding portion 4 protruding from the upper surface of the main body 3. The width of the protruding portion 4 is smaller than the width of the portion of region p 23 located within the main body 3.

[0044] Next, as shown in Figure 3E, a metallic material is deposited on the upper surface of the silicon carbide layer 2 by sputtering or the like. The metallic material is, for example, nickel or titanium. This forms a metallic layer 80 on the upper surface of the silicon carbide layer 2.

[0045] Next, as shown in Figure 3F, a mask material 70 such as a resist is formed on the upper surface of the metal layer 80.

[0046] Next, as shown in Figure 3G, the mask material 70 is patterned using photolithography or the like. This forms a mask pattern 71. The mask pattern 71 is provided above the protruding portion 4. In this embodiment, the width of the formed mask pattern 71 is greater than the width of the protruding portion 4.

[0047] Next, as shown in Figure 3H, the portion of the metal layer 80 not covered by the mask pattern 71 is removed using RIE or the like. This removes the portion of the metal layer 80 located between the protruding portions 4, forming the metal portion 81. In this embodiment, since the width of the mask pattern 71 is greater than the width of the protruding portions 4, the metal portion 81 remains not only at the upper end of the protruding portions 4 but also at the side ends of the protruding portions 4.

[0048] Next, as shown in Figure 3I, the mask pattern 71 is removed. Then, the portion of the protruding part 4 that is in contact with the metal part 81 is silicided by heat treatment such as sintering. As a result of this process, ohmic electrode portions 62 made of nickel silicide or titanium silicide are formed at the upper and side ends of the protruding part 4.

[0049] Next, as shown in Figure 3J, the metal part 81 is removed by wet etching (SH treatment) using sulfuric acid and hydrogen peroxide.

[0050] Next, as shown in Figure 3K, a conductive material is deposited on the upper surface of the silicon carbide layer 2 by sputtering or the like. The conductive material can be molybdenum, titanium, vanadium, nickel, or platinum. This forms a Schottky electrode portion 61 on the upper surface of the main body portion 3.

[0051] Next, as shown in Figure 3L, an anode electrode 11 is formed on the upper surface of the silicon carbide layer 2 so as to embed the Schottky electrode portion 61. Subsequently, although not shown, a cathode electrode 12 is formed on the lower surface of the silicon carbide layer 2.

[0052] The semiconductor device 1 is manufactured through the above process.

[0053] According to the manufacturing method of this embodiment, since the width of the mask pattern 71 is greater than the width of the protruding portion 4, the ohmic electrode portion 62 can be formed more reliably at the side end of the protruding portion 4.

[0054] (Modified version of the first embodiment) Referring to Figure 4, a modified semiconductor device 1A according to the first embodiment will be described. Figure 4 is a cross-sectional view of the modified semiconductor device 1A according to the first embodiment. One of the differences between this modified device and the first embodiment described above is the shape of the ohmic electrode portion. That is, the ohmic electrode portion 62A of this modified device differs from the ohmic electrode portion 62 of the first embodiment described above in that it is not formed on the side end of the protruding portion 4. Hereinafter, the semiconductor device 1A according to this modified device will be described, focusing on the differences from the semiconductor device 1 according to the first embodiment.

[0055] As shown in Figure 4, the ohmic electrode portion 62A of this modified example is provided at the upper end of the protruding portion 4. On the other hand, the ohmic electrode portion 62A is not provided at the side end of the protruding portion 4. The ohmic electrode portion 62A is made of the same material as, for example, the ohmic electrode portion 62 of the first embodiment. Therefore, the ohmic electrode portion 62A is provided at the upper end of the protruding portion 4. + It makes ohmic contact with region 24. Although not shown in the figures, the ohmic electrode portion 62A may be provided not only at the upper end of the protruding portion 4 but also at one side end of the protruding portion 4.

[0056] According to this modified example, the ohmic electrode portion 62A is p + Although the area in ohmic contact with region 24 is reduced, the surge withstand capability of the semiconductor device 1A can be improved, similar to the first embodiment.

[0057] The semiconductor device 1A according to this modified example can be formed in the manufacturing process of the semiconductor device 1 according to the first embodiment described above, when the width of the mask pattern 71 is formed to be less than or equal to the width of the protruding portion 4, or when the center position of the mask pattern 71 in the X-axis direction is offset from the center position of the protruding portion 4. According to this modified example, the conditions of the manufacturing process for the semiconductor device 1A can be relaxed.

[0058] (Second Embodiment) The semiconductor device 1B according to the second embodiment will be described with reference to Figures 5 and 6. Figure 5 is a plan view of the semiconductor device 1B according to the second embodiment, showing the plan view at height position I in Figure 6. Figure 6 is a cross-sectional view of the semiconductor device 1B according to the second embodiment, showing the cross-sectional view along line AA in Figure 5. Note that in Figure 5, the ohmic electrode portion 63 and Schottky electrode portion 61 provided at the side end of the island portion 5 are omitted. The semiconductor device 1B, in addition to the semiconductor device 1 according to the first embodiment described above, has dot-shaped (island-shaped) p-type semiconductor regions (p-region and p + It includes a region. Below, the semiconductor device 1B according to this embodiment will be described, focusing on the differences from the semiconductor device 1 according to the first embodiment.

[0059] As shown in FIGS. 5 and 6, in addition to the silicon carbide layer 2 of the first embodiment, the silicon carbide layer of this embodiment further includes an island portion 5 that protrudes in an island shape on the upper surface of the main body portion 3, that is, on the side of the protruding portion 4. Different from the protruding portion 4, the island portion 5 does not extend in the X-axis direction and the Y-axis direction. More specifically, the lengths of the island portion 5 in the X-axis direction and the Y-axis direction are both shorter than the length of the protruding portion 4 extending in the Y-axis direction. On the other hand, the lengths of the island portion 5 in the X-axis direction and the Y-axis direction are both longer than the length of the protruding portion 4 in the X-axis direction. As shown in FIG. 5, in this embodiment, the island portion 5 is provided so as to straddle a plurality of protruding portions 4. Further, as shown in FIG. 6, in this embodiment, the island portion 5 has the same cross-sectional structure as the protruding portion 4 and a width larger than that of the protruding portion 4.

[0060] The island portion 5 has an octagonal planar shape. Note that the planar shape of the island portion 5 may be an arbitrary shape such as a circular shape, a rectangular shape, or a polygonal shape.

[0061] Also, in the example of FIG. 5, the island portion 5 is provided so as to straddle three protruding portions 4. However, it is not limited to this, and the island portion 5 may be provided so as to straddle two protruding portions 4 or may be provided so as to straddle four or more protruding portions 4.

[0062] Also, in the example of FIG. 5, the left and right side surfaces of the island portion 5 are both parallel to the side surfaces of the protruding portion 4. However, it is not limited to this, and at least one of the left and right side surfaces of the island portion 5 may not be parallel to the side surface of the protruding portion 4.

[0063] Also, the arrangement of the island portion 5 shown in FIG. 5 is an example, and the arrangement of the island portion 5 is not limited to that shown in FIG. 5.

[0064] Also, in the example of FIG. 6, in this embodiment, the upper end of the island portion 5 is at the same height as the upper end of the protruding portion 4. Note that the upper end of the island portion 5 may be at a different height from the upper end of the protruding portion 4.

[0065] As shown in FIG. 6, the semiconductor device 1B according to this embodiment includes an island-shaped p-region 25 and an island-shaped p +It further comprises region 26 and ohmic electrode portion 63. The island portion 5 consists of island-shaped p region 25 and island-shaped p + The structure has a region 26 and an ohmic electrode portion 63 that are sequentially stacked.

[0066] The island-shaped p region 25 is a p-type semiconductor region. The island-shaped p region 25 is a semiconductor region similar to the p region 23. The island-shaped p region 25 is located within the island-shaped portion 5. More specifically, the island-shaped p region 25 extends from within the island-shaped portion 5, through the upper surface of the main body portion 3, to partway down the main body portion 3. That is, the island-shaped p region 25 has a portion located within the main body portion 3 and a portion that protrudes from the upper surface of the main body portion 3 and extends partway down the island-shaped portion 5. As shown by the dotted line in Figure 6, the boundary between the main body portion 3 and the island-shaped portion 5 is located within the island-shaped p region 25. The island-shaped p region 25 is an example of the fourth semiconductor region in the claims. The p-type impurity concentration of the island-shaped p region 25 is the island-shaped p + The p-type impurity concentration is lower than that of region 26. The p-type impurity concentration in island-like p-region 25 is, for example, about the same as that of p-region 23.

[0067] insular p + Region 26 is p + It is a semiconductor region of a certain shape. Island-shaped p + Region 26 is p + This is a semiconductor region similar to region 24. That is, island-shaped p + Region 26 is provided within the island-shaped portion 5 from island-shaped p region 25 to the upper end of island-shaped portion 5. + Region 26 is adjacent to the island-like p region 25 and is separated from region n 21 by the island-like p region 25. + Region 26 is an example of a fifth semiconductor region in the claims. Island-shaped p + The concentration of p-type impurities in region 26 is higher than the concentration of p-type impurities in island-like p-region 25. + The p-type impurity concentration in region 26 is, for example, p + The p-type impurity concentration is similar to that of region 24. In this embodiment, island-like p + Region 26 extends to the side edge of the island-like portion 5.

[0068] In the example shown in Figure 6, the upper and lower ends of the island-shaped p region 25 are located at the same height as the upper and lower ends of the p region 23. However, this is not limited to this example; at least one of the upper and lower ends of the island-shaped p region 25 may be located at a different height than at least one of the upper and lower ends of the p region 23.

[0069] Similarly, in the example in Figure 6, island-shaped p + The positions of the upper and lower ends of region 26 are p + It is at the same height as the upper and lower ends of region 24, respectively. However, it is not limited to island-shaped p + The position of at least one of the upper and lower ends of region 26 is p + It may be located at a height different from at least one of the upper and lower ends of region 24.

[0070] The ohmic electrode portion 63 is provided on the island portion 5. The ohmic electrode portion 63 is provided on the island portion p at least at the upper end of the island portion 5. + It makes ohmic contact with region 26. In this embodiment, the ohmic electrode portion 63 is located at the upper end of the island portion 5, as well as at the side end of the island portion 5. + It makes ohmic contact with region 26. Furthermore, the ohmic electrode portion 63 is electrically connected to the anode electrode 11 via the Schottky electrode portion 61. The ohmic electrode portion 63 is an example of the third conductive portion in the claims. The ohmic electrode portion 63 is made of, for example, nickel silicide (NiSi), titanium silicide (TiSi), etc. The ohmic electrode portion 63 may be made of the same material as the ohmic electrode portion 62. In addition, the ohmic electrode portion 63 has island-shaped p at the upper end of the island-shaped portion 5, as well as at a part of the side end of the island-shaped portion 5. + Region 26 may be in ohmic contact with the region.

[0071] As shown in Figure 6, the Schottky electrode portion 61 is also provided on top of the ohmic electrode portion 63.

[0072] According to the second embodiment described above, since the island-shaped portion 5 is provided, the surge withstand capability of the semiconductor device 1B can be further improved.

[0073] The semiconductor device 1B can be manufactured in the same manner as the semiconductor device 1 according to the first embodiment. More specifically, the island-shaped portion 5 is formed through the same process as the protruding portion 4, and the island-shaped p region 25 is formed through the same process as the p region 23, and the island-shaped p + Region 26 is p + The ohmic electrode portion 63 is formed through the same process as region 24, and is formed through the same process as the ohmic electrode portion 62.

[0074] Furthermore, the island-shaped portion 5 may be formed at the same time as the protruding portion 4, and the island-shaped p region 25 may be formed at the same time as the p region 23, and the island-shaped p + Region 26 is p + Region 24 may be formed at the same time, and the ohmic electrode portion 63 may be formed at the same time as the ohmic electrode portion 62. For example, by forming the island portion 5 at the same time as the protruding portion 4, the height of the upper end of the island portion 5 can be made the same as the height of the upper end of the protruding portion 4.

[0075] (Modified version of the second embodiment) A modified semiconductor device 1C of the second embodiment will be described with reference to Figures 7 and 8. Figure 7 is a plan view of the modified semiconductor device 1C of the second embodiment, showing the plan view at height position II in Figure 8. Figure 8 is a cross-sectional view of the modified semiconductor device 1C of the second embodiment, showing the cross-sectional view along line BB in Figure 7. The semiconductor device 1C is a modified semiconductor device 1B of the second embodiment described above, with dot-shaped p regions and p + This corresponds to the case where the region is located within the main body portion 3 rather than within the island-shaped portion 5. Below, the semiconductor device 1C according to this modified example will be described, focusing on the differences from the semiconductor device 1 according to the first embodiment.

[0076] As shown in Figures 7 and 8, the semiconductor device 1C according to this modified example has, in addition to the configuration of the semiconductor device 1 according to the first embodiment, an island-shaped p region 25A and an island-shaped p +The semiconductor device 1C further comprises region 26A and ohmic electrode portion 63A. In addition, the semiconductor device 1C is equipped with a Schottky electrode portion 61A in place of the Schottky electrode portion 61 of the semiconductor device 1.

[0077] The island-shaped p region 25A is a p-type semiconductor region. The island-shaped p region 25A is provided within the main body 3 of the silicon carbide layer and is located above the n region 21. The island-shaped p region 25A is an example of the sixth semiconductor region in the claims. The p-type impurity concentration of the island-shaped p region 25A is the island-shaped p + The p-type impurity concentration is lower than that of region 26A. The p-type impurity concentration of island-like p-region 25A is, for example, about the same as that of p-region 23. In the example shown in Figure 8, a portion of island-like p-region 25A includes the upper surface of the main body 3.

[0078] insular p + Region 26A is p + It is a semiconductor region of a certain shape. Island-shaped p + Region 26A is located within the main body 3 of the silicon carbide layer and is situated above the island-shaped p region 25A. + Region 26A includes the upper surface of the main body 3. Also, island-shaped p + Region 26A is adjacent to the island-like p region 25A and is separated from the n region 21 by the island-like p region 25A. In the example in Figure 8, the island-like p + The lower and side edges of region 26A are covered by island-shaped p region 25A. + Region 26A is an example of the seventh semiconductor region in the claims. Island-shaped p + The concentration of p-type impurities in region 26A is higher than the concentration of p-type impurities in island-like p-region 25A. + The p-type impurity concentration in region 26A is, for example, p + The concentration of p-type impurities is similar to that of region 24.

[0079] The ohmic electrode portion 63A is island-shaped p + It is located on region 26A. The ohmic electrode portion 63A is located on the upper surface of the main body portion 3, more specifically, on an island-shaped p + At the upper end of region 26A, island-shaped p +It makes ohmic contact with region 26A. The ohmic electrode portion 63A is also electrically connected to the anode electrode 11 via the Schottky electrode portion 61A. The ohmic electrode portion 63A is an example of the fourth conductive portion in the claims. The ohmic electrode portion 63A is made of, for example, nickel silicide (NiSi), titanium silicide (TiSi), etc. Note that the ohmic electrode portion 63A may be made of the same material as the ohmic electrode portion 62.

[0080] The Schottky electrode portion 61A is a conductive portion provided on the upper surface of the main body portion 3. More specifically, the Schottky electrode portion 61A covers the upper surface of the main body portion 3 exposed between the protruding portions 4, the upper surface of the ohmic electrode portion 62, the side surface of the ohmic electrode portion 62, and the upper surface of the ohmic electrode portion 63A. The Schottky electrode portion 61A is electrically connected to the anode electrode 11. The Schottky electrode portion 61A is made of the same material as, for example, the Schottky electrode portion 61.

[0081] According to the modified version of the second embodiment described above, the surge withstand capability of the semiconductor device 1C can be further improved.

[0082] The semiconductor device 1C can be manufactured in the same manner as the semiconductor device 1 according to the first embodiment. More specifically, the island-shaped p region 25A is formed through the same process as the p region 23, and the island-shaped p + Region 26A is p + The ohmic electrode portion 63A is formed through the same process as region 24, and is formed through the same process as the ohmic electrode portion 62.

[0083] Note that island-shaped p + Region 26A is p + Region 24 may be formed at the same time. Alternatively, island-like p + The lower end of region 26A is p + To position it below the lower edge of region 24, island-shaped p + Region 26A is p + Region 24 is formed in a separate process, or island-like p + Additional ion implantation of p-type impurities may be performed at the location of region 26A.

[0084] On the other hand, the island-shaped p-region 25A may be formed at the same time as the p-region 23, and the ohmic electrode portion 63A may be formed at the same time as the ohmic electrode portion 62.

[0085] (Third embodiment) Referring to Figure 9, the semiconductor device 1D according to the third embodiment will be described. Figure 9 is a cross-sectional view of the semiconductor device 1D according to the third embodiment. The semiconductor device 1D corresponds to the case where the semiconductor device 1 according to the first embodiment has a superjunction structure (SJ structure). Hereinafter, the semiconductor device 1D according to this embodiment will be described focusing on the differences from the semiconductor device 1 according to the first embodiment.

[0086] As shown in Figure 9, the semiconductor device 1D is the n region 21 of the semiconductor device 1 according to the first embodiment, n + Region 22, p-region 23 and p + Instead of region 24, we use n-region 21A, n ++ Area 22A, p + Regions 23A and p ++ Each has a region 24A.

[0087] n region 21A is p + The first part 21Aa located below region 23A, and adjacent p + It has a second portion 21Ab which is sandwiched between regions 23A and whose upper end is located on the upper surface of the main body 3. The upper end of the second portion 21Ab is in contact with the Schottky electrode portion 61 and makes Schottky contact with the Schottky electrode portion 61. In this embodiment, multiple second portions 21Ab are provided.

[0088] The first portion 21Aa is, for example, an n-type semiconductor region. The n-type impurity concentration in the first portion 21Aa is lower than that of the second portion 21Ab. The n-type impurity concentration in the first portion 21Aa is, for example, 3 × 10⁻⁶ 15 cm -3 The above 2 x 10 16 cm -3The following applies: The height of region n 21A, i.e., the combined length in the Z-axis direction of the first part 21Aa and the second part 21Ab, is, for example, between 5.0 μm and 30.0 μm.

[0089] The second part 21Ab is, for example, n + This is a semiconductor region of a certain type. The n-type impurity concentration in the second part 21Ab is higher than that in the first part 21Aa. The n-type impurity concentration in the second part 21Ab is, for example, 5 × 10⁻⁶. 16 cm -3 The above 5 x 10 17 cm -3 The following applies: The height of the second part 21Ab, i.e., the length in the Z-axis direction, is, for example, between 3.0 μm and 20.0 μm.

[0090] n ++ Region 22A is n ++ This is a semiconductor region of the shape n. ++ The concentration of n-type impurities in region 22A is higher than, for example, the concentration of n-type impurities in the second portion 21Ab.

[0091] p + Region 23A is p + This is a semiconductor region of a certain shape, and a pillar region in an SJ structure. + The p-type impurity concentration in region 23A is, for example, 5 × 10⁻⁶. 16 cm -3 The above 5 x 10 17 cm -3 The following is p + The height of region 23A, i.e., its length in the Z-axis direction, is, for example, between 3.0 μm and 20.0 μm. + The height of region 23A is the same as the height of the second part 21Ab. That is, p + The lower end of region 23A is at the same height as the lower end of the second portion 21Ab.

[0092] Furthermore, the second part 21Ab and p of region n 21A + The impurity concentration in region 23A is adjusted as appropriate, for example, depending on whether unipolar or bipolar operation is prioritized in semiconductor device 1D.

[0093] p ++ Region 24A is p + This is a semiconductor region of shape. ++ The p-type impurity concentration in region 24A is, for example, p + The concentration of p-type impurities is higher than that of region 23A.

[0094] According to the third embodiment described above, the semiconductor device 1D can reduce the rated forward voltage and further improve the surge withstand capability.

[0095] While several embodiments of the present invention have been described, these embodiments are presented as examples only and are not intended to limit the scope of the invention. These novel embodiments can be carried out in a variety of other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims of the invention and its equivalents. [Explanation of Symbols]

[0096] 1 Semiconductor device 11 Anode electrode 12 Cathode electrodes 2. Silicon carbide layer 21 n-region 22 n + region 23 p region 24 pages + region 25 Island-like p region 26 Island p + region 3. Main body 4. Protruding section 5 Islands 61 Schottky electrode section 62,63 Ohmic electrode section

Claims

1. A silicon carbide layer comprising a main body and a protruding portion extending from the main body, The first electrode provided on the protruding portion, A second electrode is provided on the opposite side of the main body from the first electrode, A first semiconductor region of a first conductivity type is provided within the main body and electrically connected to the second electrode, A second semiconductor region of a second conductivity type is provided within the protruding portion, Within the protruding portion, a third semiconductor region of a second conductivity type is provided from the second semiconductor region to the upper end of the protruding portion, and the impurity concentration is higher than that of the second semiconductor region. A first conductive portion that is in Schottky contact with the first semiconductor region and electrically connected to the first electrode, A second conductive portion is provided, which is in ohmic contact with the third semiconductor region at the upper end of the protruding portion and is electrically connected to the first electrode, A semiconductor device equipped with the following features.

2. Multiple second semiconductor regions are provided. The semiconductor device according to claim 1, wherein the first semiconductor region has a plurality of portions sandwiched between adjacent second semiconductor regions and whose upper ends are in contact with the first conductive portion.

3. The semiconductor device according to claim 1, wherein the third semiconductor region is separated from the first semiconductor region by the second semiconductor region.

4. The semiconductor device according to claim 1, wherein the second conductive portion makes ohmic contact with the third semiconductor region at the side end of the protruding portion.

5. The silicon carbide layer further comprises island-shaped portions that protrude in an island-like manner on the side of the main body portion that protrudes. The aforementioned semiconductor device is A fourth semiconductor region of the second conductivity type is provided within the island-shaped portion, Within the island-shaped portion, a fifth semiconductor region of a second conductivity type is provided from the fourth semiconductor region to the upper end of the island-shaped portion, and the impurity concentration is higher than that of the fourth semiconductor region. A third conductive portion is provided at the upper end of the island-shaped portion, which is in ohmic contact with the fifth semiconductor region and electrically connected to the first electrode. A semiconductor device according to any one of claims 1 to 4, further comprising:

6. The protruding portion extends in a second direction perpendicular to the first direction toward the second electrode, The semiconductor device according to claim 5, wherein the length of the island-shaped portion in the third direction perpendicular to the first and second directions is longer than the length of the protruding portion in the third direction.

7. A sixth semiconductor region of a second conductivity type is provided within the main body portion of the silicon carbide layer and located above the first semiconductor region, A seventh semiconductor region of second conductivity is provided within the main body of the silicon carbide layer, located above the sixth semiconductor region, separated from the first semiconductor region by the sixth semiconductor region, and having an impurity concentration higher than that of the sixth semiconductor region. A fourth conductive portion that is in ohmic contact with the seventh semiconductor region and electrically connected to the first electrode, A semiconductor device according to any one of claims 1 to 4, further comprising:

8. The semiconductor device according to any one of claims 1 to 4, wherein the protruding portion extends in a second direction perpendicular to the first direction toward the second electrode from the first electrode.

9. Multiple second semiconductor regions are provided. The semiconductor device according to any one of claims 1 to 4, wherein the first semiconductor region has a first portion located below the second semiconductor region and a second portion sandwiched between adjacent second semiconductor regions, the upper end of which is in contact with the first conductive portion, and which has a higher impurity concentration than the first portion.

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