Multilayer ceramic capacitor

Abstract

To provide a multilayer ceramic capacitor that improves self-alignment during mounting. [Solution] The multilayer ceramic capacitor 10 comprises a laminate 12 having first and second surfaces 12a and b opposite to the lamination direction x, third and fourth surfaces 12c and d opposite to a first direction y perpendicular to the lamination direction, and fifth and sixth surfaces 12e and f opposite to a second direction z perpendicular to the lamination direction and the first direction, a first external electrode 30a disposed on the third, fifth and first surfaces, and a second external electrode disposed on the third, sixth and first surfaces. The laminate comprises an external electrode 30b, a third external electrode 30c arranged on the fourth, sixth, and first surfaces, and a fourth external electrode 30d arranged on the fourth, fifth, and first surfaces. The laminate has a first internal electrode connected to the first and third external electrodes, and the first external electrode has a notch that opens toward the fifth surface. When the dimension in the first direction is L and the dimension in the second direction is W, the ratio 0.85 ≤ L / W ≤ 1.0.

Description

[Technical Field]

[0001] This invention relates to a multilayer ceramic capacitor. [Background technology]

[0002] In recent years, electronic devices such as mobile phones and portable music players have become smaller and thinner. Along with this, multilayer ceramic capacitors used in these smaller and thinner electronic devices have also become smaller and thinner (see Patent Document 1). In particular, multilayer ceramic capacitors that have become thinner are now being used, for example, embedded in wiring boards, or mounted on the surface of wiring boards, even in very narrow gaps. [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2021-101449 [Overview of the project] [Problems that the invention aims to solve]

[0004] As a multilayer ceramic capacitor that can accommodate such thinning, a multilayer ceramic capacitor described in Patent Document 1 is disclosed. In the square-type multilayer ceramic capacitor described in Patent Document 1 and others, external electrodes are arranged even on the edges of the sides perpendicular to the top and bottom surfaces. Therefore, when mounting such a multilayer ceramic capacitor using solder, depending on how the solder wets, if solder accumulates near the edges, the multilayer ceramic capacitor may rotate, potentially resulting in a mounting defect.

[0005] Therefore, the primary objective of this invention is to provide a multilayer ceramic capacitor that can improve self-alignment during mounting. [Means for solving the problem]

[0006] The multilayer ceramic capacitor according to this invention comprises a laminate having a first surface and a second surface facing each other in the lamination direction, a third surface and a fourth surface facing each other in a first direction perpendicular to the lamination direction, and a fifth surface and a sixth surface facing each other in a second direction perpendicular to the lamination direction and the first direction; a first external electrode disposed on the first surface, the third surface and the fifth surface; a second external electrode disposed on the first surface, the third surface and the sixth surface; and a third external electrode disposed on the first surface, the fourth surface and the sixth surface. A multilayer ceramic capacitor comprising a third external electrode and a fourth external electrode arranged on a first surface, a fourth surface, and a fifth surface, wherein the laminate has a first internal electrode exposed on the third surface and one surface other than the third surface and connected to the first external electrode and the third external electrode, the first external electrode having a notch that opens toward the fifth surface, and when the dimension in the first direction is L and the dimension in the second direction is W, the ratio 0.85 ≤ L / W ≤ 1.0.

[0007] According to the multilayer ceramic capacitor of this invention, the laminate has a third surface and one surface other than the third surface, and has a first external electrode and a first internal electrode connected to the third external electrode, the first external electrode has a notch that opens toward the fifth surface, and when the dimension in the first direction is L and the dimension in the second direction is W, 0.85 ≤ L / W ≤ 1.0, so the self-alignment performance when mounting the multilayer ceramic capacitor can be improved. [Effects of the Invention]

[0008] This invention provides a multilayer ceramic capacitor that can improve self-alignment during mounting.

[0009] The above-mentioned objectives, other objectives, features, and advantages of this invention will become even clearer from the following description of embodiments for carrying out the invention, with reference to the drawings. [Brief explanation of the drawing]

[0010] [Figure 1] It is an external perspective view from one side showing an example of a multilayer ceramic capacitor according to the first embodiment of the present invention. [Figure 2] (a) is a plan view showing an example of a multilayer ceramic capacitor according to the first embodiment of the present invention, and (b) is a bottom view thereof. [Figure 3] (a) is a rear view showing an example of a multilayer ceramic capacitor according to the first embodiment of the present invention, (b) is a front view thereof, (c) is a left side view thereof, and (d) is a right side view thereof. [Figure 4] (a) is a schematic cross-sectional view taken along line IVa-IVa in FIG. 1, and (b) is a schematic cross-sectional view taken along line IVb-IVb in FIG. 1. [Figure 5A] It is a schematic cross-sectional view taken along line VA-VA in FIG. 3(a). [Figure 5B] It is a schematic cross-sectional view taken along line VB-VB in FIG. 3(a). [Figure 6] It is an exploded perspective view of the laminate shown in FIG. 1. [Figure 7] (a) to (g) are schematic cross-sectional views showing modified examples of the internal electrodes of the multilayer ceramic capacitor according to the first embodiment of the present invention. [Figure 8] It is an external perspective view showing an example of a multilayer ceramic capacitor according to Modified Example 1-A of the first embodiment of the present invention. [Figure 9] (a) is a plan view showing an example of a multilayer ceramic capacitor according to Modified Example 1-A of the first embodiment of the present invention, and (b) is a bottom view thereof. [Figure 10] (a) is a rear view showing an example of a multilayer ceramic capacitor according to Modified Example 1-A of the first embodiment of the present invention, (b) is a front view thereof, (c) is a left side view thereof, and (d) is a right side view thereof. [Figure 11] It is an external perspective view showing an example of a multilayer ceramic capacitor according to Modified Example 1-B1 of the first embodiment of the present invention. [Figure 12](a) is a plan view showing an example of a multilayer ceramic capacitor according to Modification 1-B1 of the first embodiment of the present invention, and (b) is a bottom view thereof. [Figure 13] (a) is a rear view showing an example of a multilayer ceramic capacitor according to Modification 1-B1 of the first embodiment of the present invention, (b) is a front view thereof, (c) is a left side view thereof, and (d) is a right side view thereof. [Figure 14] This is an external perspective view showing an example of a multilayer ceramic capacitor according to Modification 1-B2 of the first embodiment of this invention. [Figure 15] (a) is a plan view showing an example of a multilayer ceramic capacitor according to Modification 1-B2 of the first embodiment of the present invention, and (b) is a bottom view thereof. [Figure 16] (a) is a rear view showing an example of a multilayer ceramic capacitor according to Modification 1-B2 of the first embodiment of the present invention, (b) is a front view thereof, (c) is a left side view thereof, and (d) is a right side view thereof. [Figure 17] This is a perspective view from one side showing an example of a multilayer ceramic capacitor according to Modification 1-C1 of the first embodiment of the present invention. [Figure 18] (a) is a plan view showing an example of a multilayer ceramic capacitor according to Modification 1-C1 of the first embodiment of the present invention, and (b) is a bottom view thereof. [Figure 19] (a) is a rear view showing an example of a multilayer ceramic capacitor according to Modification 1-C1 of the first embodiment of the present invention, (b) is a front view thereof, (c) is a left side view thereof, and (d) is a right side view thereof. [Figure 20] (a) is a schematic cross-sectional view along the line XXa-XXa in Figure 17, and (b) is a schematic cross-sectional view along the line XXb-XXb in Figure 17. [Figure 21A] This is a schematic cross-sectional view of the line XXIA-XXIA shown in Figure 19(a). [Figure 21B] This is a schematic cross-sectional view of the line XXIB-XXIB shown in Figure 19(a). [Figure 22] This is an external perspective view showing an example of a multilayer ceramic capacitor according to Modification 1-C2 of the first embodiment of this invention. [Figure 23] (a) is a plan view showing an example of a multilayer ceramic capacitor according to Modification 1-C2 of the first embodiment of the present invention, and (b) is a bottom view thereof. [Figure 24] (a) is a rear view showing an example of a multilayer ceramic capacitor according to Modification 1-C2 of the first embodiment of the present invention, (b) is a front view thereof, (c) is a left side view thereof, and (d) is a right side view thereof. [Figure 25] This is a perspective view from one side showing an example of a multilayer ceramic capacitor according to Modification 1-D1 of the first embodiment of this invention. [Figure 26] (a) is a plan view showing an example of a multilayer ceramic capacitor according to Modification 1-D1 of the first embodiment of the present invention, and (b) is a bottom view thereof. [Figure 27] (a) is a rear view showing an example of a multilayer ceramic capacitor according to Modification 1-D1 of the first embodiment of the present invention, (b) is a front view thereof, (c) is a left side view thereof, and (d) is a right side view thereof. [Figure 28] (a) is a schematic cross-sectional view along the line XXVIIIa-XXVIIIa shown in Figure 25, and (b) is a schematic cross-sectional view along the line XXVIIIb-XXVIIIb shown in Figure 25. [Figure 29A] This is a schematic cross-sectional view of the line XXIXA-XXIXA shown in Figure 27(a). [Figure 29B] This is a schematic cross-sectional view of the line XXIB-XXIB shown in Figure 27(a). [Figure 30] This is an external perspective view showing an example of a multilayer ceramic capacitor according to Modification 1-D2 of the first embodiment of this invention. [Figure 31] (a) is a plan view showing an example of a multilayer ceramic capacitor according to Modification 1-D2 of the first embodiment of the present invention, and (b) is a bottom view thereof. [Figure 32](a) is a rear view showing an example of a multilayer ceramic capacitor according to Modification 1-D2 of the first embodiment of the present invention, (b) is a front view thereof, (c) is a left side view thereof, and (d) is a right side view thereof. [Figure 33] This is a perspective view from one side showing an example of a multilayer ceramic capacitor according to a second embodiment of the present invention. [Figure 34] (a) is a plan view showing an example of a multilayer ceramic capacitor according to a second embodiment of the present invention, and (b) is a bottom view thereof. [Figure 35] (a) is a rear view showing an example of a multilayer ceramic capacitor according to a second embodiment of the present invention, (b) is a front view thereof, (c) is a left side view thereof, and (d) is a right side view thereof. [Figure 36] (a) is a schematic cross-sectional view along the line XXXVIa-XXXVIa in Figure 33, and (b) is a schematic cross-sectional view along the line XXXVIb-XXXVIb in Figure 33. [Figure 37A] This is a schematic cross-sectional view of the line XXXVIIA-XXXVIIA shown in Figure 35(a). [Figure 37B] This is a schematic cross-sectional view of the line XXXVIIB-XXXVIIB shown in Figure 35(a). [Figure 38] Figure 33 is an exploded perspective view of the laminated structure. [Figure 39] (a) and (b) are schematic cross-sectional views showing modified internal electrodes of a multilayer ceramic capacitor according to a second embodiment of the present invention. [Figure 40] This is an external perspective view showing an example of a multilayer ceramic capacitor according to Modification 2-A of the second embodiment of the present invention. [Figure 41] (a) is a plan view showing an example of a multilayer ceramic capacitor according to Modification 2-A of the second embodiment of the present invention, and (b) is a bottom view thereof. [Figure 42](a) is a rear view showing an example of a multilayer ceramic capacitor according to Modification 2-A of the second embodiment of the present invention, (b) is a front view thereof, (c) is a left side view thereof, and (d) is a right side view thereof. [Figure 43] This is an external perspective view showing an example of a multilayer ceramic capacitor according to a modified example 2-B1 of the second embodiment of the present invention. [Figure 44] (a) is a plan view showing an example of a multilayer ceramic capacitor according to Modification 2-B1 of the second embodiment of the present invention, and (b) is a bottom view thereof. [Figure 45] (a) is a rear view showing an example of a multilayer ceramic capacitor according to Modification 2-B1 of the second embodiment of the present invention, (b) is a front view thereof, (c) is a left side view thereof, and (d) is a right side view thereof. [Figure 46] This is an external perspective view showing an example of a multilayer ceramic capacitor according to a modified example 2-B2 of the second embodiment of the present invention. [Figure 47] (a) is a plan view showing an example of a multilayer ceramic capacitor according to a modified example 2-B2 of the second embodiment of the present invention, and (b) is a bottom view thereof. [Figure 48] (a) is a rear view showing an example of a multilayer ceramic capacitor according to Modification 2-B2 of the second embodiment of the present invention, (b) is a front view thereof, (c) is a left side view thereof, and (d) is a right side view thereof. [Figure 49] This is an external perspective view showing an example of a multilayer ceramic capacitor that illustrates other modifications of this invention. [Figure 50] This is a plan view showing an example of a multilayer ceramic capacitor illustrating another modified example of this invention. [Modes for carrying out the invention]

[0011] A. First Embodiment 1. Multilayer ceramic capacitor Next, an example of a multilayer ceramic capacitor 10 according to an embodiment of this invention will be described.

[0012] Figure 1 is a perspective view from one side showing an example of a multilayer ceramic capacitor according to the first embodiment of the present invention. Figure 2(a) is a plan view showing an example of a multilayer ceramic capacitor according to the first embodiment of the present invention, and Figure 2(b) is a bottom view thereof. Figure 3(a) is a rear view showing an example of a multilayer ceramic capacitor according to the first embodiment of the present invention, Figure 3(b) is a front view thereof, Figure 3(c) is a left side view thereof, and Figure 3(d) is a right side view thereof. Figure 4(a) is a schematic cross-sectional view along line IVa-IVa in Figure 1, and Figure 4(b) is a schematic cross-sectional view along line IVb-IVb in Figure 1. Figure 5A is a schematic cross-sectional view along line VA-VA in Figure 3(a). Figure 5B is a schematic cross-sectional view along line VB-VB in Figure 3(a). Figure 6 is an exploded perspective view of the laminate shown in Figure 1.

[0013] The multilayer ceramic capacitor 10 comprises a laminated body 12 and a plurality of external electrodes 30.

[0014] (Laminated structure) The laminate 12 has a first surface 12a and a second surface 12b that are opposite to the stacking direction x, a third surface 12c and a fourth surface 12d that are opposite to a first direction y that is perpendicular to the stacking direction x, and a fifth surface 12e and a sixth surface 12f that are opposite to a second direction z that is perpendicular to both the stacking direction x and the first direction y. The direction connecting the first surface 12a and the second surface 12b of the laminate 12 is the stacking direction x.

[0015] Furthermore, it is preferable that the corners and edges of the laminate 12 are rounded. A corner is defined as the point where three adjacent faces of the laminate 12 intersect, and an edge is defined as the point where two adjacent faces of the laminate 12 intersect. Additionally, some or all of the third face 12c and the fourth face 12d, and the fifth face 12e and the sixth face 12f may have irregularities or other features formed on them.

[0016] Furthermore, either the first surface 12a or the second surface 12b may have a roughened surface.

[0017] The laminate 12 includes a plurality of dielectric layers 14 and a plurality of internal electrodes 16. The dielectric layer 14 has an inner dielectric layer 14a and an outer dielectric layer 14b. The internal electrodes 16 have a first internal electrode 16a1 and a second internal electrode 16b1.

[0018] Furthermore, the laminate 12 includes an inner layer 18, a first outer layer 20a located on the first surface 12a side, and a second outer layer 20b located on the second surface 12b side.

[0019] The first outer layer 20a is located on the first surface 12a side of the laminate 12 and is an aggregate of multiple outer dielectric layers 14b located between the first surface 12a and the internal electrode 16 closest to the first surface 12a.

[0020] The second outer layer 20b is located on the second surface 12b side of the laminate 12 and is an aggregate of multiple outer dielectric layers 14b located between the second surface 12b and the internal electrode 16 closest to the second surface 12b.

[0021] The region sandwiched between the first outer layer 20a and the second outer layer 20b is the inner layer 18.

[0022] The inner layer 18 includes a first internal electrode 16a1 with one end exposed to the third surface 12c and the other end exposed to the sixth surface 12f, a second internal electrode 16b1 with one end exposed to the third surface 12c and the other end exposed to the fifth surface 12e, and an inner dielectric layer 14a.

[0023] The dielectric layer 14 can be formed from, for example, a dielectric material. Examples of dielectric materials include dielectric ceramics composed of main components such as BaTiO3, CaTiO3, SrTiO3, or CaZrO3. Alternatively, materials with minor components such as Mn compounds, Fe compounds, Cr compounds, Co compounds, or Ni compounds added to these main components may be used. Furthermore, the inner dielectric layer 14a and the outer dielectric layer 14b may be composed of the same dielectric material, or they may be composed of different dielectric materials to differentiate the functions of the inner layer 18 and the outer layers 20a and 20b. Additionally, at least one of Si, Mg, Ba, or Mn may be added as an additive.

[0024] If the inner dielectric layer 14a contains a large amount of, for example, CaTiO3 or CaZrO3 as a dielectric component, dielectric breakdown between the first internal electrode 16a1 and the second internal electrode 16b1 can be made less likely. However, it is not limited to this, and the inner dielectric layer 14a can also be mainly composed of SrTiO3 or the like. Separately, in order to increase the capacitance of the multilayer ceramic capacitor 10, it is preferable to form it with a material that has a high dielectric constant, such as BaTiO3.

[0025] The dielectric layer 14 may have multiple crystal grains containing a perovskite-type compound with BaTiO3 as its basic structure.

[0026] Since a thinner dielectric layer 14 results in a larger capacitance, a crystal grain size of 1 μm or less is preferable.

[0027] The number of dielectric layers 14 to be stacked is not particularly limited, but it is preferably 3 to 300, including the first outer layer 20a and the second outer layer 20b. Furthermore, the thickness of the inner dielectric layer 14a is preferably 0.4 μm to 2.0 μm, and the thickness of the outer dielectric layer 14b is preferably 2.0 μm to 100.0 μm.

[0028] When the direction in which the third surface 12c and the fourth surface 12d face each other is defined as the first direction y, and the direction in which the fifth surface 12e and the sixth surface 12f face each other is defined as the second direction z, the dimension L in the first direction y and the dimension W in the second direction z of the laminate 12 satisfy the condition 0.85 ≤ L / W ≤ 1.00. In other words, the laminate 12 has a substantially tetragonal shape.

[0029] (Internal electrode) The internal electrode 16 has a plurality of first internal electrodes 16a1 and a plurality of second internal electrodes 16b1. The first internal electrodes 16a1 and the second internal electrodes 16b1 are alternately stacked with a dielectric layer 14 in between.

[0030] The first internal electrode 16a1 is positioned on the surface of the inner dielectric layer 14a. The first internal electrode 16a1 has a first opposing electrode portion 22a that faces the first surface 12a and the second surface 12b and faces the second internal electrode 16b1, and is stacked in the direction connecting the first surface 12a and the second surface 12b.

[0031] The first internal electrode 16a1 is drawn out to the third surface 12c of the laminate 12 by the first extraction electrode portion 24a, and then drawn out to the sixth surface 12f of the laminate 12 by the third extraction electrode portion 24c.

[0032] The second internal electrode 16b1 is positioned on a surface of an inner dielectric layer 14a different from the inner dielectric layer 14a on which the first internal electrode 16a1 is positioned. The second internal electrode 16b1 has a second opposing electrode portion 22b that faces the first surface 12a and the second surface 12b and faces the first internal electrode 16a1, and is stacked in the direction connecting the first surface 12a and the second surface 12b.

[0033] The second internal electrode 16b1 is drawn out to the third surface 12c of the laminate 12 by the second extraction electrode portion 24b, and then drawn out to the fifth surface 12e of the laminate 12 by the fourth extraction electrode portion 24d.

[0034] Furthermore, when the multilayer ceramic capacitor 10 is viewed from the stacking direction x, it is preferable that the straight line connecting the first lead electrode portion 24a and the third lead electrode portion 24c of the first internal electrode 16a1 intersects with the straight line connecting the second lead electrode portion 24b and the fourth lead electrode portion 24d of the second internal electrode 16b1.

[0035] Here, we will describe some variations in the shape of the internal electrode 16. Figures 7(a) to 7(g) show the first internal electrodes 16a2 to 16a8, which are variations of the first internal electrode 16a1. In the multilayer ceramic capacitor 10 according to the present invention, the first internal electrodes 16a2 to 16a8 can be used.

[0036] The first internal electrode 16a2 has a radius (R) in the corner of the first opposing electrode portion 22a where the leading electrode portions 24a and 24c are not located. The first internal electrodes 16a3 and 16a4 have a triangular shape for the first opposing electrode portion 22a. The first internal electrodes 16a3 and 16a4 have different lead lengths for the lead electrode portions. The lead length of the lead electrode portion of the first internal electrode 16a4 is longer than that of the first internal electrode 16a3. In the first internal electrode 16a5, the radius (R) is provided only in the corner of the first opposing electrode portion 22a that faces the second external electrode 30b, among the corners where the leading electrode portions 24a and 24c are not located. The first internal electrode 16a6 has a first opposing electrode portion 22a that is sector-shaped, and the leading electrode portions 24a and 24c of the first internal electrode 16a6 are part of the arc of the sector shape. The first internal electrode 16a7 has a first opposing electrode portion 22a that is shaped like a right-angled isosceles triangle, and the leading electrode portions 24a and 24c of the first internal electrode 16a7 are arranged such that the corners of the right-angled isosceles triangle, excluding the right-angled corner, are exposed. The first internal electrode 16a8 has a fan-shaped corner in the first opposing electrode portion 22a where the leading electrode portions 24a and 24c are not located, and which faces the second external electrode 30b.

[0037] Furthermore, as shown in Figure 5A, the laminate 12 includes a side portion (W gap) 26a of the laminate 12 located between one end of the first opposing electrode portion 22a of the first internal electrode 16a1 in the first direction y and the third surface 12c, and a side portion (W gap) 26b of the laminate 12 located between the other end of the first opposing electrode portion 22a of the first internal electrode 16a1 in the first direction y and the fourth surface 12d.

[0038] Furthermore, as shown in Figure 5A, the laminate 12 includes an end portion (L gap) 27a of the laminate 12 located between one end of the first opposing electrode portion 22a of the first internal electrode 16a1 in the second direction z and the fifth surface 12e, and a side portion (L gap) 27b of the laminate 12 located between the other end of the first opposing electrode portion 22a of the first internal electrode 16a1 in the second direction z and the sixth surface 12f.

[0039] The first internal electrode 16a1 and the second internal electrode 16b1 can be made of a suitable conductive material, such as metals like Ni, Cu, Ag, Pd, and Au, or alloys containing at least one of these metals, such as Ni-Cu alloys and Ag-Pd alloys, but are not limited to these. Furthermore, the first internal electrode 16a1 and the second internal electrode 16b1 may be made of the same conductive material or of different conductive materials.

[0040] Furthermore, by including a Sn layer between the first internal electrode 16a1 and the second internal electrode 16b1 and the inner dielectric layer 14a, electric field concentration at the interface between the internal electrode 16 and the dielectric layer 14 can be mitigated, leading to improved high-temperature load reliability.

[0041] Furthermore, the total number of the first internal electrodes 16a1 and the second internal electrodes 16b1 is preferably 3 to 300. The thickness of the first internal electrodes 16a1 and the second internal electrodes 16b1 is not particularly limited, but is preferably, for example, 0.2 μm to 2.0 μm.

[0042] The laminated structure 12 of the multilayer ceramic capacitor 10 may have the configuration described below.

[0043] In the multilayer ceramic capacitor 10, the third surface 12c to the sixth surface 12f of the laminate 12 may be curved in a concave shape toward the center of the laminate 12 when viewed in the stacking direction x. In other words, the third surface 12c to the sixth surface 12f of the laminate 12 may be warped. In this case, it is preferable that the center of the curvature and warp is near the center of the third surface 12c to the sixth surface 12f. This makes it possible to increase the distance between adjacent external electrodes 30, as described later, and thus reduces the risk of electrical conductivity between each external electrode 30.

[0044] Furthermore, in at least one of the first direction y-view and the second direction z-view, the region where the internal electrode 16 is drawn out onto the third surface 12c to the sixth surface 12f preferably has a radius (R) from the first surface 12a to the second surface 12b. This increases the exposed area of ​​the internal electrode 16, thereby improving the contact area between the internal electrode 16 and the external electrode 30.

[0045] (external electrode) As shown in Figures 1 to 5B, external electrodes 30 are arranged on the laminate 12. The external electrode 30 has a plurality of external electrodes 30 connected to the first internal electrode 16a1 and the second internal electrode 16b1. The external electrode 30 has a first external electrode 30a, a second external electrode 30b, a third external electrode 30c, and a fourth external electrode 30d.

[0046] The first external electrode 30a is positioned on the third surface 12c so as to cover the first lead-out electrode portion 24a of the first internal electrode 16a1, and further positioned so as to cover a portion of the first surface 12a and a portion of the second surface 12b. The first external electrode 30a is electrically connected to the first lead-out electrode portion 24a of the first internal electrode 16a1.

[0047] The first external electrode 30a has notches 40a1 and 40a2 on the third surface 12c. Notch 40a1 opens toward the fifth surface 12e on the third surface 12c. Notch 40a2 opens toward the sixth surface 12f on the third surface 12c.

[0048] The second external electrode 30b is positioned on the third surface 12c so as to cover the second lead-out electrode portion 24b of the second internal electrode 16b1, and further positioned so as to cover a portion of the first surface 12a and a portion of the second surface 12b. The second external electrode 30b is electrically connected to the second lead-out electrode portion 24b of the second internal electrode 16b1.

[0049] The second external electrode 30b has notches 40b1 and 40b2 on the third surface 12c. Notch 40b1 opens toward the sixth surface 12f on the third surface 12c. Notch 40b2 opens toward the fifth surface 12e on the third surface 12c.

[0050] The third external electrode 30c is positioned on the sixth surface 12f so as to cover the third lead-out electrode portion 24c of the first internal electrode 16a1, and further positioned so as to cover a portion of the first surface 12a and a portion of the second surface 12b. The third external electrode 30c is electrically connected to the third lead-out electrode portion 24c of the first internal electrode 16a1.

[0051] The third external electrode 30c has notches 40c1 and 40c2 on the sixth surface 12f. Notch 40c1 opens toward the fourth surface 12d on the sixth surface 12f. Notch 40c2 opens toward the third surface 12c on the sixth surface 12f.

[0052] The fourth external electrode 30d is positioned on the fifth surface 12e so as to cover the fourth lead-out electrode portion 24d of the second internal electrode 16b1, and further positioned so as to cover a portion of the first surface 12a and a portion of the second surface 12b. The fourth external electrode 30d is electrically connected to the fourth lead-out electrode portion 24d of the second internal electrode 16b1.

[0053] The fourth external electrode 30d has notches 40d1 and 40d2 on the fifth surface 12e. Notch 40d1 opens toward the fourth surface 12d on the fifth surface 12e. Notch 40d2 opens toward the third surface 12c on the fifth surface 12e.

[0054] Within the laminate 12, the first opposing electrode portion 22a of the first internal electrode 16a1 and the second opposing electrode portion 22b of the second internal electrode 16b1 face each other via the inner dielectric layer 14a, thereby forming capacitance. As a result, capacitance can be obtained between the first external electrode 30a and the third external electrode 30c to which the first internal electrode 16a1 is connected, and the second external electrode 30b and the fourth external electrode 30d to which the second internal electrode 16b1 is connected, resulting in the characteristics of a capacitor.

[0055] The first external electrode 30a, the second external electrode 30b, the third external electrode 30c, and the fourth external electrode 30d each have an undercoat plating layer 32, a thin film layer 34, and a surface plating layer 36, respectively.

[0056] In other words, the first external electrode 30a has a first undercoat plating layer 32a, a first thin film layer 34a, and a first surface plating layer 36a. The second external electrode 30b has a second undercoat plating layer 32b, a second thin film layer 34b, and a second surface plating layer 36b. The third external electrode 30c has a third undercoat plating layer 32c, a third thin film layer 34c, and a third surface plating layer 36c. The fourth external electrode 30d has a fourth undercoat plating layer 32d, a fourth thin film layer 34d, and a fourth surface plating layer 36d.

[0057] (Undercoat plating layer) The undercoat plating layer 32 is positioned on the third surface 12c, the fifth surface 12e, and the sixth surface 12f. The specific configuration of the undercoat plating layer 32 will be described below.

[0058] The first undercoat plating layer 32a is positioned on the surface of the third surface 12c of the laminate 12 so as to cover the first lead-out electrode portion 24a of the first internal electrode 16a1 that is exposed from the third surface 12c of the laminate 12.

[0059] The second undercoat plating layer 32b is positioned on the surface of the third surface 12c of the laminate 12 so as to cover the second lead-out electrode portion 24b of the second internal electrode 16b1 that is exposed from the third surface 12c of the laminate 12.

[0060] The third undercoat plating layer 32c is positioned on the surface of the sixth surface 12f of the laminate 12 so as to cover the third lead-out electrode portion 24c of the first internal electrode 16a1 that is exposed from the sixth surface 12f of the laminate 12.

[0061] The fourth undercoat plating layer 32d is positioned on the surface of the fifth surface 12e of the laminate 12 so as to cover the fourth leading electrode portion 24d of the second internal electrode 16b1 that is exposed from the fifth surface 12e of the laminate 12.

[0062] (thin film layer) The thin film layer 34 has a first thin film layer 34a, a second thin film layer 34b, a third thin film layer 34c, and a fourth thin film layer 34d.

[0063] The first thin film layer 34a is positioned to cover a portion of the first surface 12a and a portion of the second surface 12b of the laminate 12 on the third surface 12c side and the fifth surface 12e side, but not to cover the third surface 12c and the fifth surface 12e of the laminate 12.

[0064] The second thin film layer 34b is positioned to cover a portion of the first surface 12a and a portion of the second surface 12b of the laminate 12 on the third surface 12c side and the sixth surface 12f side, but not to cover the third surface 12c and the sixth surface 12f.

[0065] The third thin film layer 34c is positioned to cover a portion of the first surface 12a and a portion of the second surface 12b of the laminate 12 on the fourth surface 12d side and the sixth surface 12f side, but not to cover the fourth surface 12d and the sixth surface 12f.

[0066] The fourth thin film layer 34d is positioned to cover a portion of the first surface 12a and a portion of the second surface 12b of the laminate 12 on the fourth surface 12d side and the fifth surface 12e side, but not to cover the fourth surface 12d and the fifth surface 12e.

[0067] Preferably, each of the first to fourth thin film layers 34a to 34d is formed by depositing metal particles using methods such as sputtering or vapor deposition. This allows the thickness of the first to fourth thin film layers 34a to 34d in the direction connecting the first surface 12a and the second surface 12b of the laminate 12 to be 1 μm or less, and the dimension of the multilayer ceramic capacitor 10 in the stacking direction x can be sufficiently reduced, thus enabling the multilayer ceramic capacitor 10 to be made low-profile.

[0068] Furthermore, the measurement method for the dimensions of the stacking direction x of the first thin film layer 34a to the fourth thin film layer 34d can be as follows. Specifically, when forming thin film layers by depositing metal particles, the thickness can be calculated from the concentration of a predetermined element using a calibration curve method for the relevant metal species, using an X-ray fluorescence apparatus. Alternatively, the thickness can be measured by observing the cross-section of the component using a scanning microscope and observing the actual observed image.

[0069] Furthermore, when the first thin film layer 34a to the fourth thin film layer 34d are formed by a thin film formation method, it is preferable that these thin film layers are made of metals such as Cu or Ni.

[0070] The thin film layer 34 of the multilayer ceramic capacitor 10 shown in Figure 1 is formed by depositing metal particles by sputtering. In this case, if the thickness of the thin film layer 34 is 1 μm or less, the dimension in the stacking direction x can be made sufficiently small.

[0071] The first to fourth thin film layers 34a to 34d can be constructed considering their respective functions. For example, considering adhesion to the laminate 12, it is preferable to use NiCr or NiCu as the main component. Furthermore, the first to fourth thin film layers 34a to 34d may consist of multiple layers, or they may have a two-layer structure of NiCr and NiCu.

[0072] The thin film layer 34 may be formed by screen printing or the like and contain a dielectric material and a metal component. This allows for better adhesion between the laminate 12 and the external electrode 30 by bonding the thin film layer 34 to the ceramic of the laminate 12. In this case, in addition to the metal component, it may also contain a ceramic component with the same main component as the inner dielectric layer 14a. Including a ceramic component in the thin film layer 34 reduces the difference in thermal expansion coefficients between the laminate 12 and the thin film layer 34, thereby easing the stress on the thin film layer 34. However, the metal component is not limited to Cu and Ni; other metal components may be included, and a glass component may be included separately from the ceramic component. Examples of glass components include oxides of Ba (barium), Sr (strontium), Si (silicon), Ca (calcium), Zn, Al, or B (boron). Other metal components may include, for example, Mg, Cr, Sr, Al, Na, Fe, etc. Furthermore, the thin film layer 34 may have a discontinuous shape. Discontinuity means that the structure is formed discontinuously when viewed from a direction perpendicular to the longitudinal direction.

[0073] For example, when forming a thin film layer 34 using a material containing ceramic, one method involves performing cross-sectional polishing, then obtaining cross-sectional images using a digital microscope (Keyence VHX-5000), and performing thickness calculations from these images. Alternatively, one method involves measuring the thickness and other properties from the actual observed image of the part cross-section created by FIB using a scanning microscope.

[0074] (Surface plating layer) The surface plating layer 36 includes a first surface plating layer 36a, a second surface plating layer 36b, a third surface plating layer 36c, and a fourth surface plating layer 36d.

[0075] The first surface plating layer 36a is positioned to cover the first thin film layer 34a and the first undercoat plating layer 32a which is positioned on the third surface 12c of the laminate 12. The second surface plating layer 36b is positioned to cover the second thin film layer 34b and the second underlayer plating layer 32b which is located on the third surface 12c of the laminate 12. The third surface plating layer 36c is positioned to cover the third thin film layer 34c and the third underlayer plating layer 32c which is located on the sixth surface 12f of the laminate 12. The fourth surface plating layer 36d is positioned to cover the fourth thin film layer 34d and the fourth underlayer plating layer 32d which is located on the fifth surface 12e of the laminate 12.

[0076] The surface plating layer 36 preferably includes at least one metal selected from, for example, Cu, Ni, Sn, Pb, Au, Ag, Pd, Bi, or Zn, or an alloy containing such metal. The plating layer preferably does not contain glass.

[0077] The surface plating layer 36 may be, for example, Sn plating only, or it may be a two-layer structure of Ni plating, Sn plating, or Ni plating and Cu plating.

[0078] Furthermore, the thickness of the surface plating layer 36 is preferably, for example, 0.5 μm or more and 10 μm or less.

[0079] The metal content per unit volume of the surface plating layer is preferably 99% by volume or more.

[0080] The thickness of each surface plating layer is preferably 0.5 μm or more and 10.0 μm or less.

[0081] The dimension of the multilayer ceramic capacitor 10, including the laminated body 12 and external electrodes 30, in the first direction y is defined as dimension L, the dimension of the multilayer ceramic capacitor 10, including the laminated body 12 and external electrodes 30, in the stacking direction x is defined as dimension T, and the dimension of the multilayer ceramic capacitor 10, including the laminated body 12 and external electrodes 30, in the second direction z is defined as dimension W. The dimensions of the multilayer ceramic capacitor 10 are preferably such that the L dimension in the first direction y is 0.2 mm or more and 3.2 mm or less, the T dimension in the stacking direction x is 0.04 mm or more and 0.22 mm or less, and the W dimension in the second direction z is 0.2 mm or more and 3.2 mm or less. The dimensions of the multilayer ceramic capacitor 10 are preferably such that 0.85 ≤ L / W ≤ 1.00. By doing so, the stacked body 12 becomes approximately tetragonal in shape, which improves the degree of freedom in mounting.

[0082] According to the multilayer ceramic capacitor 10 shown in Figure 1, the first external electrode 30a has notches 40a1 and 40a2 on the third surface 12c. Since the notch 40a1 opens toward the fifth surface 12e on the third surface 12c, self-alignment during mounting can be improved.

[0083] 2. Variations (1) Variation 1-A Next, an example of a multilayer ceramic capacitor 10A according to Modification 1-A of the first embodiment of this invention will be described.

[0084] Figure 8 is an external perspective view showing an example of a multilayer ceramic capacitor according to Modification 1-A of the first embodiment of the present invention. Figure 9(a) is a plan view showing an example of a multilayer ceramic capacitor according to Modification 1-A of the first embodiment of the present invention, and Figure 9(b) is a bottom view thereof. Figure 10(a) is a rear view showing an example of a multilayer ceramic capacitor according to Modification 1-A of the first embodiment of the present invention, Figure 10(b) is a front view thereof, Figure 10(c) is a left side view thereof, and Figure 10(d) is a right side view thereof. However, components identical or corresponding to those in Figures 1 to 5B are denoted by the same reference numerals, and detailed descriptions are omitted.

[0085] The multilayer ceramic capacitor 10A in Modification 1-A differs from the multilayer ceramic capacitor 10 in the first embodiment in the shape of its external electrodes 30. Furthermore, the external electrodes 30 are not located on the second surface 12b.

[0086] (Internal electrode) In the multilayer ceramic capacitor 10A according to Modification 1-A, the internal electrode 16 has the same configuration as the internal electrode 16 of the laminate 12 of the multilayer ceramic capacitor 10 according to the first embodiment of the present invention shown in Figure 1.

[0087] (external electrode) As shown in Figures 8 to 10, external electrodes 30 are arranged on the laminate 12. The external electrode 30 has a plurality of external electrodes 30 connected to the first internal electrode 16a1 and the second internal electrode 16b1. The external electrode 30 has a first external electrode 30a, a second external electrode 30b, a third external electrode 30c, and a fourth external electrode 30d.

[0088] The first external electrode 30a is positioned on the third surface 12c so as to cover the first lead-out electrode portion 24a of the first internal electrode 16a1, and further positioned so as to cover a portion of the first surface 12a. The first external electrode 30a is electrically connected to the first lead-out electrode portion 24a of the first internal electrode 16a1.

[0089] The first external electrode 30a includes a notch 40a1 and a notch 40a2 on the third surface 12c. The notch 40a1 opens on the third surface 12c toward the fifth surface 12e and the second surface 12b. The notch 40a2 opens on the third surface 12c toward the sixth surface 12f and the second surface 12b.

[0090] The second external electrode 30b is positioned on the third surface 12c so as to cover the second lead electrode portion 24b of the second internal electrode 16b1, and further positioned so as to cover a portion of the first surface 12a. The second external electrode 30b is electrically connected to the second lead electrode portion 24b of the second internal electrode 16b1.

[0091] The second external electrode 30b has notches 40b1 and 40b2 on the third surface 12c. Notch 40b1 opens on the third surface 12c toward the sixth surface 12f and the second surface 12b. Notch 40b2 opens on the third surface 12c toward the fifth surface 12e and the second surface 12b.

[0092] The third external electrode 30c is positioned on the sixth surface 12f so as to cover the third lead-out electrode portion 24c of the first internal electrode 16a1, and further positioned so as to cover a portion of the first surface 12a. The third external electrode 30c is electrically connected to the third lead-out electrode portion 24c of the first internal electrode 16a1.

[0093] The third external electrode 30c has notches 40c1 and 40c2 on the sixth surface 12f. Notch 40c1 opens on the sixth surface 12f toward the fourth surface 12d and the second surface 12b. Notch 40c2 opens on the sixth surface 12f toward the third surface 12c and the second surface 12b.

[0094] The fourth external electrode 30d is positioned on the fifth surface 12e so as to cover the fourth lead-out electrode portion 24d of the second internal electrode 16b1, and further positioned so as to cover a portion of the first surface 12a. The fourth external electrode 30d is electrically connected to the fourth lead-out electrode portion 24d of the second internal electrode 16b1.

[0095] The fourth external electrode 30d has notches 40d1 and 40d2 on the fifth surface 12e. Notch 40d1 opens on the fifth surface 12e toward the fourth surface 12d and the second surface 12b. Notch 40d2 opens on the fifth surface 12e toward the third surface 12c and the second surface 12b.

[0096] The first external electrode 30a, the second external electrode 30b, the third external electrode 30c, and the fourth external electrode 30d each have an undercoat plating layer 32, a thin film layer 34, and a surface plating layer 36, respectively.

[0097] In other words, the first external electrode 30a has a first undercoat plating layer 32a, a first thin film layer 34a, and a first surface plating layer 36a. The second external electrode 30b has a second undercoat plating layer 32b, a second thin film layer 34b, and a second surface plating layer 36b. The third external electrode 30c has a third undercoat plating layer 32c, a third thin film layer 34c, and a third surface plating layer 36c. The fourth external electrode 30d has a fourth undercoat plating layer 32d, a fourth thin film layer 34d, and a fourth surface plating layer 36d.

[0098] The multilayer ceramic capacitor 10A shown in Figure 8 provides the same effects as the multilayer ceramic capacitor 10 according to the first embodiment.

[0099] (2) Variation 1-B1 Next, an example of a multilayer ceramic capacitor 10B1 according to Modification 1-B1 of the first embodiment of this invention will be described.

[0100] Figure 11 is an external perspective view showing an example of a multilayer ceramic capacitor according to Modification 1-B1 of the first embodiment of the present invention. Figure 12(a) is a plan view showing an example of a multilayer ceramic capacitor according to Modification 1-B1 of the first embodiment of the present invention, and Figure 12(b) is a bottom view thereof. Figure 13(a) is a rear view showing an example of a multilayer ceramic capacitor according to Modification 1-B1 of the first embodiment of the present invention, Figure 13(b) is a front view thereof, Figure 13(c) is a left side view thereof, and Figure 13(d) is a right side view thereof.

[0101] The multilayer ceramic capacitor 10B1 in Modification 1-B1 differs from the multilayer ceramic capacitor 10 in the first embodiment in the shape of its external electrodes 30.

[0102] (Internal electrode) In the multilayer ceramic capacitor 10B1 according to Modification 1-B1, the internal electrode 16 has the same configuration as the internal electrode 16 of the laminate 12 of the multilayer ceramic capacitor 10 according to the first embodiment of this invention shown in Figure 1.

[0103] (external electrode) As shown in Figures 11 to 13, external electrodes 30 are arranged on the laminate 12. The external electrode 30 has a plurality of external electrodes 30 connected to the first internal electrode 16a1 and the second internal electrode 16b1. The external electrode 30 has a first external electrode 30a, a second external electrode 30b, a third external electrode 30c, and a fourth external electrode 30d.

[0104] The first external electrode 30a is positioned on the third surface 12c so as to cover the first lead-out electrode portion 24a of the first internal electrode 16a1, and further positioned so as to cover a portion of the first surface 12a and a portion of the second surface 12b. The first external electrode 30a is electrically connected to the first lead-out electrode portion 24a of the first internal electrode 16a1.

[0105] The first external electrode 30a has a notch 40a1 on the third surface 12c. The notch 40a1 opens toward the fifth surface 12e on the third surface 12c.

[0106] The second external electrode 30b is positioned on the third surface 12c so as to cover the second lead-out electrode portion 24b of the second internal electrode 16b1, and further positioned so as to cover a portion of the first surface 12a and a portion of the second surface 12b. The second external electrode 30b is electrically connected to the second lead-out electrode portion 24b of the second internal electrode 16b1.

[0107] The second external electrode 30b has a notch 40b1 on the third surface 12c. The notch 40b1 opens toward the sixth surface 12f on the third surface 12c.

[0108] The third external electrode 30c is positioned on the sixth surface 12f so as to cover the third lead-out electrode portion 24c of the first internal electrode 16a1, and further positioned so as to cover a portion of the first surface 12a and a portion of the second surface 12b. The third external electrode 30c is electrically connected to the third lead-out electrode portion 24c of the first internal electrode 16a1.

[0109] The third external electrode 30c has a notch 40c1 on the sixth surface 12f. The notch 40c5 opens toward the fourth surface 12d on the sixth surface 12f.

[0110] The fourth external electrode 30d is positioned on the fifth surface 12e so as to cover the fourth lead-out electrode portion 24d of the second internal electrode 16b1, and further positioned so as to cover a portion of the first surface 12a and a portion of the second surface 12b. The fourth external electrode 30d is electrically connected to the fourth lead-out electrode portion 24d of the second internal electrode 16b1.

[0111] The fourth external electrode 30d has a notch 40d1 on the fifth surface 12e. The notch 40d1 opens toward the fourth surface 12d on the fifth surface 12e.

[0112] The multilayer ceramic capacitor 10B1 shown in Figure 11 provides the same effects as the multilayer ceramic capacitor 10 according to the first embodiment.

[0113] (3) Modification example 1-B2 Next, an example of a multilayer ceramic capacitor 10A according to Modification 1-B2 of the first embodiment of this invention will be described.

[0114] Figure 14 is an external perspective view showing an example of a multilayer ceramic capacitor according to Modification 1-B2 of the first embodiment of the present invention. Figure 15(a) is a plan view showing an example of a multilayer ceramic capacitor according to Modification 1-B2 of the first embodiment of the present invention, and Figure 15(b) is a bottom view thereof. Figure 16(a) is a rear view showing an example of a multilayer ceramic capacitor according to Modification 1-B2 of the first embodiment of the present invention, Figure 16(b) is a front view thereof, Figure 16(c) is a left side view thereof, and Figure 16(d) is a right side view thereof. However, components identical or corresponding to those in Figures 1 to 5B are denoted by the same reference numerals, and detailed descriptions are omitted.

[0115] The multilayer ceramic capacitor 10B2 in Modification 1-B2 differs from the multilayer ceramic capacitor 10 in the first embodiment in the shape of its external electrodes 30. Furthermore, the external electrodes 30 are not located on the second surface 12b.

[0116] (Internal electrode) In the multilayer ceramic capacitor 10B2 according to Modification 1-B2, the internal electrode 16 has the same configuration as the internal electrode 16 of the laminate 12 of the multilayer ceramic capacitor 10 according to the first embodiment of this invention shown in Figure 1.

[0117] (external electrode) As shown in Figures 14 to 16, external electrodes 30 are arranged on the laminate 12. The external electrode 30 has a plurality of external electrodes 30 connected to the first internal electrode 16a1 and the second internal electrode 16b1. The external electrode 30 has a first external electrode 30a, a second external electrode 30b, a third external electrode 30c, and a fourth external electrode 30d.

[0118] The first external electrode 30a is positioned on the third surface 12c so as to cover the first lead-out electrode portion 24a of the first internal electrode 16a1, and further positioned so as to cover a portion of the first surface 12a. The first external electrode 30a is electrically connected to the first lead-out electrode portion 24a of the first internal electrode 16a1.

[0119] The first external electrode 30a has a notch 40a1 on the third surface 12c. The notch 40a1 opens toward the fifth surface 12e and the second surface 12b on the third surface 12c.

[0120] The second external electrode 30b is positioned on the third surface 12c so as to cover the second lead electrode portion 24b of the second internal electrode 16b1, and further positioned so as to cover a portion of the first surface 12a. The second external electrode 30b is electrically connected to the second lead electrode portion 24b of the second internal electrode 16b1.

[0121] The second external electrode 30b has a notch 40b1 on the third surface 12c. The notch 40b1 opens on the third surface 12c toward the sixth surface 12f and the second surface 12b.

[0122] The third external electrode 30c is positioned on the sixth surface 12f so as to cover the third lead-out electrode portion 24c of the first internal electrode 16a1, and further positioned so as to cover a portion of the first surface 12a. The third external electrode 30c is electrically connected to the third lead-out electrode portion 24c of the first internal electrode 16a1.

[0123] The third external electrode 30c has a notch 40c1 on the sixth surface 12f. The notch 40c1 opens toward the fourth surface 12d and the second surface 12b on the sixth surface 12f.

[0124] The fourth external electrode 30d is positioned on the fifth surface 12e so as to cover the fourth lead-out electrode portion 24d of the second internal electrode 16b1, and further positioned so as to cover a portion of the first surface 12a. The fourth external electrode 30d is electrically connected to the fourth lead-out electrode portion 24d of the second internal electrode 16b1.

[0125] The fourth external electrode 30d has a notch 40d1 on the fifth surface 12e. The notch 40d1 opens on the fifth surface 12e toward the fourth surface 12d and the second surface 12b.

[0126] The multilayer ceramic capacitor 10B2 shown in Figure 14 provides the same effects as the multilayer ceramic capacitor 10 according to the first embodiment.

[0127] (4) Experimental modification 1-C1 Next, an example of a multilayer ceramic capacitor 10C1 according to Modification 1-C1 of the first embodiment of this invention will be described.

[0128] Figure 17 is a perspective view from one side showing an example of a multilayer ceramic capacitor according to Modification 1-C1 of the first embodiment of the present invention. Figure 18(a) is a plan view showing an example of a multilayer ceramic capacitor according to Modification 1-C1 of the first embodiment of the present invention, and Figure 18(b) is a bottom view thereof. Figure 19(a) is a rear view showing an example of a multilayer ceramic capacitor according to Modification 1-C1 of the first embodiment of the present invention, Figure 19(b) is a front view thereof, Figure 19(c) is a left side view thereof, and Figure 19(d) is a right side view thereof. Figure 20(a) is a schematic cross-sectional view along line XXa-XXa in Figure 17, and Figure 20(b) is a schematic cross-sectional view along line XXb-XXb in Figure 17. Figure 21A is a schematic cross-sectional view along line XXIA-XXIA in Figure 19(a). Figure 21B is a schematic cross-sectional view along line XXIB-XXIB in Figure 19(a). However, components identical to or corresponding to those in Figures 1 through 5B are denoted by the same reference numerals, and detailed explanations are omitted.

[0129] The multilayer ceramic capacitor 10C1 in Modification 1-C1 differs from the multilayer ceramic capacitor 10 in the shape of its external electrodes 30 in the first embodiment.

[0130] (Internal electrode) In the multilayer ceramic capacitor 10C1 according to Modification 1-C1, the internal electrode 16 has the same configuration as the first internal electrode 16a1 among the internal electrodes 16 of the laminate 12 of the multilayer ceramic capacitor 10 according to the first embodiment of the present invention shown in Figure 1. The second internal electrode 16c is drawn out to the third surface 12c of the laminate 12 by the second extraction electrode portion 24b, and then drawn out to the fourth surface 12d of the laminate 12 by the fourth extraction electrode portion 24d.

[0131] (external electrode) As shown in Figures 17 to 21B, external electrodes 30 are arranged on the laminate 12. The external electrode 30 has a plurality of external electrodes 30 connected to the first internal electrode 16a1 and the second internal electrode 16c. The external electrode 30 has a first external electrode 30a, a second external electrode 30b, a third external electrode 30c, and a fourth external electrode 30d.

[0132] The first external electrode 30a is positioned on the third surface 12c so as to cover the first lead-out electrode portion 24a of the first internal electrode 16a1, and further positioned so as to cover a portion of the first surface 12a and a portion of the second surface 12b. The first external electrode 30a is electrically connected to the first lead-out electrode portion 24a of the first internal electrode 16a1.

[0133] The first external electrode 30a has a notch 40a1 on the third surface 12c. The notch 40a1 opens toward the fifth surface 12e on the third surface 12c.

[0134] The second external electrode 30b is positioned on the third surface 12c so as to cover the second lead electrode portion 24b of the second internal electrode 16c, and further positioned so as to cover a portion of the first surface 12a and a portion of the second surface 12b. The second external electrode 30b is electrically connected to the second lead electrode portion 24b of the second internal electrode 16c.

[0135] The second external electrode 30b has a notch 40b1 on the third surface 12c. The notch 40b1 opens toward the sixth surface 12f on the third surface 12c.

[0136] The third external electrode 30c is positioned on the sixth surface 12f so as to cover the third lead-out electrode portion 24c of the first internal electrode 16a1, and further positioned so as to cover a portion of the first surface 12a and a portion of the second surface 12b. The third external electrode 30c is electrically connected to the third lead-out electrode portion 24c of the first internal electrode 16a1.

[0137] The third external electrode 30c has a notch 40c1 on the sixth surface 12f. The notch 40c1 opens toward the fourth surface 12d on the sixth surface 12f.

[0138] The fourth external electrode 30d is positioned on the fourth surface 12d so as to cover the fourth lead-out electrode portion 24d of the second internal electrode 16c, and further positioned so as to cover a portion of the first surface 12a and a portion of the second surface 12b. The fourth external electrode 30d is electrically connected to the fourth lead-out electrode portion 24d of the second internal electrode 16c.

[0139] The fourth external electrode 30d has a notch 40d3 on the fourth surface 12d. The notch 40d3 opens toward the fifth surface 12e on the fourth surface 12d.

[0140] The multilayer ceramic capacitor 10C1 shown in Figure 17 provides the same effects as the multilayer ceramic capacitor 10 according to the first embodiment.

[0141] (5) Modification 1-C2 Next, an example of a multilayer ceramic capacitor 10C1 according to modification 1-C2 of the first embodiment of this invention will be described.

[0142] Figure 22 is an external perspective view showing an example of a multilayer ceramic capacitor according to Modification 1-C2 of the first embodiment of the present invention. Figure 23(a) is a plan view showing an example of a multilayer ceramic capacitor according to Modification 1-C2 of the first embodiment of the present invention, and Figure 23(b) is a bottom view thereof. Figure 24(a) is a rear view showing an example of a multilayer ceramic capacitor according to Modification 1-C2 of the first embodiment of the present invention, Figure 24(b) is a front view thereof, Figure 24(c) is a left side view thereof, and Figure 24(d) is a right side view thereof. However, components identical or corresponding to those in Figures 1 to 5B are denoted by the same reference numerals, and detailed descriptions are omitted.

[0143] The multilayer ceramic capacitor 10C2 in Modification 1-C2 differs from the multilayer ceramic capacitor 10 in the first embodiment in the shape of its external electrodes 30. Furthermore, the external electrodes 30 are not located on the second surface 12b.

[0144] (Internal electrode) In the multilayer ceramic capacitor 10C2 according to Modification 1-C2, the internal electrodes 16 have the same configuration as the internal electrodes 16 of the laminate 12 of the multilayer ceramic capacitor 10C1 according to Modification 1-C1 of the first embodiment of the present invention shown in Figure 1.

[0145] (external electrode) As shown in Figures 22 to 24, external electrodes 30 are arranged on the laminate 12. The external electrode 30 has a plurality of external electrodes 30 connected to the first internal electrode 16a1 and the second internal electrode 16c. The external electrode 30 has a first external electrode 30a, a second external electrode 30b, a third external electrode 30c, and a fourth external electrode 30d.

[0146] The first external electrode 30a is positioned on the third surface 12c so as to cover the first lead-out electrode portion 24a of the first internal electrode 16a1, and further positioned so as to cover a portion of the first surface 12a. The first external electrode 30a is electrically connected to the first lead-out electrode portion 24a of the first internal electrode 16a1.

[0147] The first external electrode 30a has a notch 40a1 on the third surface 12c. The notch 40a1 opens toward the fifth surface 12e and the second surface 12b on the third surface 12c.

[0148] The second external electrode 30b is positioned on the third surface 12c so as to cover the second lead electrode portion 24b of the second internal electrode 16c, and further positioned so as to cover a portion of the first surface 12a. The second external electrode 30b is electrically connected to the second lead electrode portion 24b of the second internal electrode 16c.

[0149] The second external electrode 30b has a notch 40b1 on the third surface 12c. The notch 40b1 opens on the third surface 12c toward the sixth surface 12f and the second surface 12b.

[0150] The third external electrode 30c is positioned on the sixth surface 12f so as to cover the third lead-out electrode portion 24c of the first internal electrode 16a1, and further positioned so as to cover a portion of the first surface 12a. The third external electrode 30c is electrically connected to the third lead-out electrode portion 24c of the first internal electrode 16a1.

[0151] The third external electrode 30c has a notch 40c1 on the sixth surface 12f. The notch 40c1 opens toward the fourth surface 12d and the second surface 12b on the sixth surface 12f.

[0152] The fourth external electrode 30d is positioned on the fourth surface 12d so as to cover the fourth lead-out electrode portion 24d of the second internal electrode 16c, and further positioned so as to cover a portion of the first surface 12a. The fourth external electrode 30d is electrically connected to the fourth lead-out electrode portion 24d of the second internal electrode 16c.

[0153] The fourth external electrode 30d has a notch 40d3 on the fourth surface 12d. The notch 40d3 opens toward the fifth surface 12e and the second surface 12b on the fourth surface 12d.

[0154] The multilayer ceramic capacitor 10C2 shown in Figure 22 provides the same effects as the multilayer ceramic capacitor 10 according to the first embodiment.

[0155] (6) Variation 1-D1 Next, an example of a multilayer ceramic capacitor 10D1 according to Modification 1-D1 of the first embodiment of this invention will be described.

[0156] Figure 25 is a perspective view from one side showing an example of a multilayer ceramic capacitor according to Modification 1-D1 of the first embodiment of this invention. Figure 26(a) is a plan view showing an example of a multilayer ceramic capacitor according to Modification 1-D1 of the first embodiment of this invention, and Figure 26(b) is a bottom view thereof. Figure 27(a) is a rear view showing an example of a multilayer ceramic capacitor according to Modification 1-D1 of the first embodiment of this invention, Figure 27(b) is a front view thereof, Figure 27(c) is a left side view thereof, and Figure 27(d) is a right side view thereof. Figure 28(a) is a schematic cross-sectional view along line XXVIIIa-XXVIIIa in Figure 25, and Figure 28(b) is a schematic cross-sectional view along line XXVIIIb-XXVIIIb in Figure 25. Figure 29A is a schematic cross-sectional view along line XXIXA-XXIXA in Figure 27(a). Figure 29B is a schematic cross-sectional view along line XXIB-XXIB in Figure 27(a). However, components identical to or corresponding to those in Figures 1 through 5B are denoted by the same reference numerals, and detailed explanations are omitted.

[0157] The multilayer ceramic capacitor 10D1 in Modification 1-D1 differs from the multilayer ceramic capacitor 10 in the shape of its external electrodes 30 in the first embodiment.

[0158] (Internal electrode) The internal electrode 16 has a plurality of first internal electrodes 16d and a plurality of second internal electrodes 16e. The first internal electrodes 16d and the second internal electrodes 16e are alternately stacked via a dielectric layer 14.

[0159] The first internal electrode 16d is drawn out to the third surface 12c of the laminate 12 by the first extraction electrode portion 24a, and then drawn out to the fourth surface 12d of the laminate 12 by the third extraction electrode portion 24c.

[0160] The second internal electrode 16e is drawn out to the sixth surface 12f of the laminate 12 by the second extraction electrode portion 24b, and then drawn out to the fifth surface 12e of the laminate 12 by the fourth extraction electrode portion 24d.

[0161] (external electrode) As shown in Figures 25 to 29B, external electrodes 30 are arranged on the laminate 12. The external electrode 30 has a plurality of external electrodes 30 connected to the first internal electrode 16d and the second internal electrode 16e. The external electrode 30 has a first external electrode 30a, a second external electrode 30b, a third external electrode 30c, and a fourth external electrode 30d.

[0162] The first external electrode 30a is positioned on the third surface 12c so as to cover the first lead-out electrode portion 24a of the first internal electrode 16d, and further positioned so as to cover a portion of the first surface 12a and a portion of the second surface 12b. The first external electrode 30a is electrically connected to the first lead-out electrode portion 24a of the first internal electrode 16d.

[0163] The first external electrode 30a has a notch 40a1 on the third surface 12c. The notch 40a1 opens toward the fifth surface 12e on the third surface 12c.

[0164] The second external electrode 30b is positioned on the sixth surface 12f so as to cover the second lead-out electrode portion 24b of the second internal electrode 16e, and further positioned so as to cover a portion of the first surface 12a and a portion of the second surface 12b. The second external electrode 30b is electrically connected to the second lead-out electrode portion 24b of the second internal electrode 16e.

[0165] The second external electrode 30b has a notch 40b3 on the sixth surface 12f. The notch 40b3 opens toward the third surface 12c on the sixth surface 12f.

[0166] The third external electrode 30c is positioned on the fourth surface 12d so as to cover the third lead-out electrode portion 24c of the first internal electrode 16d, and further positioned so as to cover a portion of the first surface 12a and a portion of the second surface 12b. The third external electrode 30c is electrically connected to the third lead-out electrode portion 24c of the first internal electrode 16d.

[0167] The third external electrode 30c has a notch 40c3 on the fourth surface 12d. The notch 40c3 opens toward the sixth surface 12f on the fourth surface 12d.

[0168] The fourth external electrode 30d is positioned on the fifth surface 12e so as to cover the fourth lead-out electrode portion 24d of the second internal electrode 16e, and further positioned so as to cover a portion of the first surface 12a and a portion of the second surface 12b. The fourth external electrode 30d is electrically connected to the fourth lead-out electrode portion 24d of the second internal electrode 16e.

[0169] The fourth external electrode 30d has a notch 40d1 on the fifth surface 12e. The notch 40d1 opens toward the fourth surface 12d on the fifth surface 12e.

[0170] The multilayer ceramic capacitor 10D1 shown in Figure 25 provides the same effects as the multilayer ceramic capacitor 10 according to the first embodiment.

[0171] (5) Modification example 1-D2 Next, an example of a multilayer ceramic capacitor 10D1 according to Modification 1-D2 of the first embodiment of this invention will be described.

[0172] Figure 30 is an external perspective view showing an example of a multilayer ceramic capacitor according to Modification 1-D2 of the first embodiment of the present invention. Figure 31(a) is a plan view showing an example of a multilayer ceramic capacitor according to Modification 1-D2 of the first embodiment of the present invention, and Figure 31(b) is a bottom view thereof. Figure 32(a) is a rear view showing an example of a multilayer ceramic capacitor according to Modification 1-D2 of the first embodiment of the present invention, Figure 32(b) is a front view thereof, Figure 32(c) is a left side view thereof, and Figure 32(d) is a right side view thereof. However, components identical or corresponding to those in Figures 1 to 5B are denoted by the same reference numerals, and detailed descriptions are omitted.

[0173] The multilayer ceramic capacitor 10D2 in Modification 1-D2 differs from the multilayer ceramic capacitor 10 in the first embodiment in the shape of its external electrodes 30. Furthermore, the external electrodes 30 are not located on the second surface 12b.

[0174] (Internal electrode) In the multilayer ceramic capacitor 10D2 according to Modification 1-D2, the internal electrodes 16 have the same configuration as the internal electrodes 16 of the laminate 12 of the multilayer ceramic capacitor 10D1 according to Modification 1-D1 of the first embodiment of the present invention shown in Figure 1.

[0175] (external electrode) As shown in Figures 30 to 32, external electrodes 30 are arranged on the laminate 12. The external electrode 30 has a plurality of external electrodes 30 connected to the first internal electrode 16d and the second internal electrode 16e. The external electrode 30 has a first external electrode 30a, a second external electrode 30b, a third external electrode 30c, and a fourth external electrode 30d.

[0176] The first external electrode 30a is positioned on the third surface 12c so as to cover the first lead-out electrode portion 24a of the first internal electrode 16d, and further positioned so as to cover a portion of the first surface 12a. The first external electrode 30a is electrically connected to the first lead-out electrode portion 24a of the first internal electrode 16d.

[0177] The first external electrode 30a has a notch 40a1 on the third surface 12c. The notch 40a1 opens toward the fifth surface 12e and the second surface 12b on the third surface 12c.

[0178] The second external electrode 30b is positioned on the sixth surface 12f so as to cover the second lead electrode portion 24b of the second internal electrode 16e, and further positioned so as to cover a portion of the first surface 12a. The second external electrode 30b is electrically connected to the second lead electrode portion 24b of the second internal electrode 16e.

[0179] The second external electrode 30b has a notch 40b3 on the sixth surface 12f. The notch 40b3 opens toward the third surface 12c and the second surface 12b on the sixth surface 12f.

[0180] The third external electrode 30c is positioned on the fourth surface 12d so as to cover the third lead-out electrode portion 24c of the first internal electrode 16d, and further positioned so as to cover a portion of the first surface 12a. The third external electrode 30c is electrically connected to the third lead-out electrode portion 24c of the first internal electrode 16d.

[0181] The third external electrode 30c has a notch 40c3 on the fourth surface 12d. The notch 40c3 opens toward the sixth surface 12f and the second surface 12b on the fourth surface 12d.

[0182] The fourth external electrode 30d is positioned on the fifth surface 12e so as to cover the fourth lead-out electrode portion 24d of the second internal electrode 16e, and further positioned so as to cover a portion of the first surface 12a. The fourth external electrode 30d is electrically connected to the fourth lead-out electrode portion 24d of the second internal electrode 16e.

[0183] The fourth external electrode 30d has a notch 40d1 on the fifth surface 12e. The notch 40d1 opens on the fifth surface 12e toward the fourth surface 12d and the second surface 12b.

[0184] The multilayer ceramic capacitor 10D2 shown in Figure 30 provides the same effects as the multilayer ceramic capacitor 10 according to the first embodiment.

[0185] 3. Manufacturing method of multilayer ceramic capacitors The following describes a method for manufacturing a multilayer ceramic capacitor according to the first embodiment.

[0186] First, prepare the dielectric sheet and the conductive paste for the internal electrodes. The dielectric sheet and the conductive paste for the internal electrodes contain a binder and a solvent. Known binders and solvents can be used.

[0187] Next, a conductive paste for internal electrodes is printed on the dielectric sheet in a predetermined pattern, for example, by inkjet printing, screen printing, or gravure printing. This prepares a dielectric sheet with the pattern for the first internal electrode and a dielectric sheet with the pattern for the second internal electrode. Subsequently, the sheet with the pattern for the first internal electrode and the sheet with the pattern for the second internal electrode are laminated together to form the inner layer 18.

[0188] When printing patterns using conductive pastes, the first step is to print the pattern using conductive paste for the internal electrodes.

[0189] Furthermore, for example, when forming the printed pattern of the internal electrodes by gravure printing, the desired internal electrodes can be formed by designing the gravure plate used for gravure printing as the graphic pattern for the first internal electrode, and by changing the graphic pattern for the second internal electrode to the corresponding structure.

[0190] Furthermore, when forming the printed pattern of the internal electrode by screen printing, the desired internal electrode can be formed by designing the screen printing mask as the graphic pattern of the first internal electrode and changing the graphic pattern of the second internal electrode to the corresponding structure.

[0191] Next, a predetermined number of dielectric sheets without printed internal electrode patterns are stacked to form the first outer layer portion 20a on the first surface 12a side. Then, the portion that will become the inner layer portion 18 prepared above is stacked, and a predetermined number of dielectric sheets without printed internal electrode patterns are stacked on top of this inner layer portion 18 to form the second outer layer portion 20b on the second surface 12b side. This completes the production of the laminated sheet.

[0192] Next, the laminated sheets are pressed in the lamination direction using means such as a hydrostatic press to produce a laminated block.

[0193] Next, the laminated block is cut to the specified size, and the laminated chips are cut out. At this time, the corners and edges of the laminated chips may be rounded by barrel polishing or other methods.

[0194] Next, the laminated chips are fired to produce the laminated body 12. The firing temperature depends on the ceramic and internal electrode materials, but it is preferably between 900°C and 1400°C.

[0195] Next, external electrodes 30 are formed on the laminate 12.

[0196] The laminates 12 on which the undercoat plating layer 32 is formed are aligned on a workbench, and a thin film layer 34 is formed on the first surface 12a by sputtering.

[0197] Subsequently, a surface plating layer 36 is formed on the undercoat plating layer 32 and the thin film layer 34, which are placed on the surface of the laminate 12. More specifically, a Ni plating layer and a Sn plating layer are formed as the surface plating layer 36 on the undercoat plating layer 32 and the thin film layer 34. When performing the plating process, either electrolytic plating or electroless plating may be used. However, electroless plating has the disadvantage of requiring pretreatment with a catalyst or the like to improve the plating deposition rate, which complicates the process. Therefore, electrolytic plating is usually preferred.

[0198] As described above, the multilayer ceramic capacitor 10 according to the embodiment shown in Figure 1 can be manufactured.

[0199] B. Second Embodiment 1. Multilayer ceramic capacitor An example of a multilayer ceramic capacitor 110 according to a second embodiment of this invention will be described.

[0200] Figure 33 is a perspective view from one side showing an example of a multilayer ceramic capacitor according to a second embodiment of the present invention. Figure 34(a) is a plan view showing an example of a multilayer ceramic capacitor according to a second embodiment of the present invention, and Figure 34(b) is a bottom view thereof. Figure 35(a) is a rear view showing an example of a multilayer ceramic capacitor according to a second embodiment of the present invention, Figure 35(b) is a front view thereof, Figure 35(c) is a left side view thereof, and Figure 35(d) is a right side view thereof. Figure 36(a) is a schematic cross-sectional view along line XXXVIa-XXXVIa in Figure 33, and Figure 36(b) is a schematic cross-sectional view along line XXXVIb-XXXVIb in Figure 33. Figure 37A is a schematic cross-sectional view along line XXXVIIA-XXXVIIA in Figure 35(a). Figure 37B is a schematic cross-sectional view along line XXXVIIB-XXXVIIB in Figure 35(a). Figure 38 is an exploded perspective view of the laminate shown in Figure 33.

[0201] The multilayer ceramic capacitor 110 comprises a laminated body 112 and a plurality of external electrodes 130.

[0202] (Laminated structure) In the multilayer ceramic capacitor 110 according to the second embodiment, the laminate 112 has the same configuration as the laminate 12 of the first embodiment of this invention shown in Figure 1.

[0203] (Internal electrode) The first internal electrode 116a1 is drawn out to the third surface 112c of the laminate 112 by the first extraction electrode portion 124a1, and then drawn out to the fifth surface 112e of the laminate 112 by the first extraction electrode portion 124a2. Furthermore, the first internal electrode 116a1 is drawn out to the fourth surface 112d of the laminate 112 by the third extraction electrode portion 124c1, and then drawn out to the sixth surface 112f of the laminate 112 by the third extraction electrode portion 124c2.

[0204] The second internal electrode 116b1 is drawn out to the third surface 112c of the laminate 112 by the second extraction electrode portion 124b1, and then drawn out to the sixth surface 112f of the laminate 112 by the second extraction electrode portion 124b2. Furthermore, the second internal electrode 116b1 is drawn out to the fourth surface 112d of the laminate 112 by the fourth extraction electrode portion 124d1, and then drawn out to the fifth surface 112e of the laminate 112 by the fourth extraction electrode portion 124d2.

[0205] Here, we will describe some variations in the shape of the internal electrode 116. Figures 39(a) and (b) show the first internal electrode 116a2 and 116a3, which are variations of the first internal electrode 116a1. In the multilayer ceramic capacitor 110 according to the present invention, the first internal electrodes 116a2 and 116a3 can be used.

[0206] In the first internal electrode 116a1, the shape enclosed by the first extraction electrode portion 124a1, the first extraction electrode portion 124a2, the third surface 112c, and the fifth surface 112e is rectangular in a plan view. On the other hand, in the first internal electrode 116a2, the shape enclosed by the first extraction electrode portion 124a1, the first extraction electrode portion 124a2, the third surface 112c, and the fifth surface 112e is triangular in plan view. Furthermore, in a plan view, the first internal electrode 116a3 has a shape enclosed by the first extraction electrode portion 124a1, the first extraction electrode portion 124a2, the third surface 112c, and the fifth surface 112e that is a fan shape centered on the corner of the laminate 112.

[0207] (external electrode) As shown in Figures 33 to 36, external electrodes 130 are arranged on the laminate 112. The external electrode 130 has a plurality of external electrodes 130 connected to the first internal electrode 116a1 and the second internal electrode 116b1. The external electrode 130 has a first external electrode 130a, a second external electrode 130b, a third external electrode 130c, and a fourth external electrode 130d.

[0208] The first external electrode 130a is positioned on the third surface 112c so as to cover the first lead electrode portion 124a1 of the first internal electrode 116a1, and on the fifth surface 112e so as to cover the first lead electrode portion 124a2 of the first internal electrode 116a1. Furthermore, the first external electrode 130a is positioned so as to cover a part of the first surface 112a and a part of the second surface 112b. The first external electrode 130a is electrically connected to the first lead electrode portions 124a1 and 124a2 of the first internal electrode 116a1.

[0209] The first external electrode 130a has notches 140a1 and 140a2 on the third surface 112c. Notch 140a1 opens toward the fifth surface 112e on the third surface 112c. Notch 140a2 opens toward the sixth surface 112f on the third surface 112c. Furthermore, the first external electrode 130a includes notches 140a3 and 140a4 on the fifth surface 112e. Notch 140a3 opens toward the third surface 112c on the fifth surface 112e. Notch 140a4 opens toward the fourth surface 112d on the fifth surface 112e.

[0210] The second external electrode 130b is positioned on the third surface 112c so as to cover the second lead electrode portion 124b1 of the second internal electrode 116b1, and on the sixth surface 112f so as to cover the second lead electrode portion 124b2 of the second internal electrode 116b1. Furthermore, the second external electrode 130b is positioned so as to cover a part of the first surface 112a and a part of the second surface 112b. The second external electrode 130b is electrically connected to the second lead electrode portions 124b1 and 124b2 of the second internal electrode 116b1.

[0211] The second external electrode 130b has notches 140b1 and 140b2 on the third surface 112c. Notch 140b1 opens toward the sixth surface 112f on the third surface 112c. Notch 140b2 opens toward the fifth surface 112e on the third surface 112c. Furthermore, the second external electrode 130b includes notches 140b3 and 140b4 on the sixth surface 112f. Notch 140b3 opens toward the third surface 112c on the sixth surface 112f. Notch 140b4 opens toward the fourth surface 112d on the sixth surface 112f.

[0212] The third external electrode 130c is positioned on the fourth surface 112d to cover the third lead electrode portion 124c1 of the first internal electrode 116a1, and on the sixth surface 112f to cover the third lead electrode portion 124c2 of the first internal electrode 116a1. Furthermore, the third external electrode 130c is positioned to cover a portion of the first surface 112a and a portion of the second surface 112b. The third external electrode 130c is electrically connected to the third lead electrode portions 124c1 and 124c2 of the first internal electrode 116a1.

[0213] The third external electrode 130c has notches 140c1 and 140c2 on the sixth surface 112f. Notch 140c1 opens toward the fourth surface 112d on the sixth surface 112f. Notch 140c2 opens toward the third surface 112c on the sixth surface 112f. Furthermore, the third external electrode 130c is provided with notches 140c3 and 140c4 on the fourth surface 112d. Notch 140c3 opens toward the sixth surface 112f on the fourth surface 112d. Notch 140c4 opens toward the fifth surface 112e on the fourth surface 112d.

[0214] The fourth external electrode 130d is positioned on the fourth surface 112d to cover the fourth lead electrode portion 124d1 of the second internal electrode 116b1, and on the fifth surface 112e to cover the fourth lead electrode portion 124d2 of the second internal electrode 116b1. Furthermore, the fourth external electrode 130d is positioned to cover a portion of the first surface 112a and a portion of the second surface 112b. The fourth external electrode 130d is electrically connected to the fourth lead electrode portions 124d1 and 124d2 of the second internal electrode 116b1.

[0215] The fourth external electrode 130d has notches 140d1 and 140d2 on the fifth surface 112e. Notch 140d1 opens toward the fourth surface 112d on the fifth surface 112e. Notch 140d2 opens toward the third surface 112c on the fifth surface 112e. Furthermore, the fourth external electrode 130d includes notches 140d3 and 140d4 on the fourth surface 112d. Notch 140d3 opens toward the fifth surface 112e on the fourth surface 112d. Notch 140d4 opens toward the sixth surface 112f on the fourth surface 112d.

[0216] Within the laminate 112, capacitance is formed when the first opposing electrode portion 122a of the first internal electrode 116a1 and the second opposing electrode portion 122b of the second internal electrode 116b1 face each other via the inner dielectric layer 114a. As a result, capacitance can be obtained between the first external electrode 130a and the third external electrode 130c, to which the first internal electrode 116a1 is connected, and the second external electrode 130b and the fourth external electrode 130d, to which the second internal electrode 116b1 is connected, thus exhibiting capacitor characteristics.

[0217] The multilayer ceramic capacitor 110 according to the second embodiment shown in Figure 33 provides the same effects as the multilayer ceramic capacitor 10 described above.

[0218] Furthermore, the multilayer ceramic capacitor 110 according to the second embodiment of this invention may also be combined with all or part of the above-described modifications.

[0219] 2. Variations (1) Variation 2-A Next, an example of a multilayer ceramic capacitor 110A according to Modification 2-A of the first embodiment of this invention will be described.

[0220] Figure 40 is an external perspective view showing an example of a multilayer ceramic capacitor according to Modification 2-A of the second embodiment of the present invention. Figure 41(a) is a top view showing an example of a multilayer ceramic capacitor according to Modification 2-A of the second embodiment of the present invention, and Figure 41(b) is a bottom view thereof. Figure 42(a) is a rear view showing an example of a multilayer ceramic capacitor according to Modification 2-A of the second embodiment of the present invention, Figure 42(b) is a front view thereof, Figure 42(c) is a left side view thereof, and Figure 42(d) is a right side view thereof. However, components identical or corresponding to those in Figures 33 to 37B are denoted by the same reference numerals, and detailed descriptions are omitted.

[0221] The multilayer ceramic capacitor 110A in Modification 2-A differs from the multilayer ceramic capacitor 110 in the second embodiment in the shape of its external electrodes 130. Furthermore, the external electrodes 130 are not located on the second surface 112b.

[0222] (Internal electrode) In the multilayer ceramic capacitor 110A according to Modification 2-A, the internal electrode 116 has the same configuration as the internal electrode 116 of the laminate 112 of the multilayer ceramic capacitor 110 according to the second embodiment of the present invention shown in Figure 33.

[0223] (external electrode) As shown in Figures 40 to 42, external electrodes 130 are arranged on the laminate 112. The external electrode 130 has a plurality of external electrodes 130 connected to the first internal electrode 116a1 and the second internal electrode 116b1. The external electrode 130 includes a first external electrode 130a, a second external electrode 130b, a third external electrode 130c, and a fourth external electrode 130d.

[0224] The first external electrode 130a is disposed on the third surface 112c so as to cover the first lead electrode portion 124a1 of the first internal electrode 116a1, and is disposed on the fifth surface 112e so as to cover the first lead electrode portion 124a2 of the first internal electrode 116a1. Further, the first external electrode 130a is disposed so as to cover a part of the first surface 112a. The first external electrode 130a is electrically connected to the first lead electrode portions 124a1 and 124a^{2} of the first internal electrode 116a1.

[0225] The first external electrode 130a includes a notch portion 140a1 and a notch portion 140a2 on the third surface 112c. The notch portion 140a1 opens toward the fifth surface 112e and the second surface 112b on the third surface 112c. The notch portion 140a2 opens toward the sixth surface 112f and the second surface 112b on the third surface 112c. Also, the first external electrode 130a includes a notch portion 140a3 and a notch portion 140a4 on the fifth surface 112e. The notch portion 140a3 opens toward the third surface 112c and the second surface 112b on the fifth surface 112e. The notch portion 140a4 opens toward the fourth surface 112d and the second surface 112b on the fifth surface 112e.

[0226] The second external electrode 130b is positioned on the third surface 112c so as to cover the second lead electrode portion 124b1 of the second internal electrode 116b1, and on the sixth surface 112f so as to cover the second lead electrode portion 124b2 of the second internal electrode 116b1. Furthermore, the second external electrode 130b is positioned so as to cover a portion of the first surface 112a. The second external electrode 130b is electrically connected to the second lead electrode portions 124b1 and 124b2 of the second internal electrode 116b1.

[0227] The second external electrode 130b has notches 140b1 and 140b2 on the third surface 112c. Notch 140b1 opens on the third surface 112c toward the sixth surface 112f and the second surface 112b. Notch 140b2 opens on the third surface 112c toward the fifth surface 112e and the second surface 112b. Furthermore, the second external electrode 130b includes notches 140b3 and 140b4 on the sixth surface 112f. Notch 140b3 opens on the sixth surface 112f toward the third surface 112c and the second surface 112b. Notch 140b4 opens on the sixth surface 112f toward the fourth surface 112d and the second surface 112b.

[0228] The third external electrode 130c is positioned on the fourth surface 112d so as to cover the third lead electrode portion 124c1 of the first internal electrode 116a1, and on the sixth surface 112f so as to cover the third lead electrode portion 124c2 of the first internal electrode 116a1. Furthermore, the third external electrode 130c is positioned so as to cover a portion of the first surface 112a. The third external electrode 130c is electrically connected to the third lead electrode portions 124c1 and 124c2 of the first internal electrode 116a1.

[0229] The third external electrode 130c has notches 140c1 and 140c2 on the sixth surface 112f. Notch 140c1 opens on the sixth surface 112f toward the fourth surface 112d and the second surface 112b. Notch 140c2 opens on the sixth surface 112f toward the third surface 112c and the second surface 112b. Furthermore, the third external electrode 130c has notches 140c3 and 140c4 on the fourth surface 112d. Notch 140c3 opens on the fourth surface 112d toward the sixth surface 112f and the second surface 112b. Notch 140c4 opens on the fourth surface 112d toward the fifth surface 112e and the second surface 112b.

[0230] The fourth external electrode 130d is positioned on the fourth surface 112d so as to cover the fourth lead electrode portion 124d1 of the second internal electrode 116b1, and on the fifth surface 112e so as to cover the fourth lead electrode portion 124d2 of the second internal electrode 116b1. Furthermore, the fourth external electrode 130d is positioned so as to cover a portion of the first surface 112a. The fourth external electrode 130d is electrically connected to the fourth lead electrode portions 124d1 and 124d2 of the second internal electrode 116b1.

[0231] The fourth external electrode 130d has notches 140d1 and 140d2 on the fifth surface 112e. Notch 140d1 opens on the fifth surface 112e toward the fourth surface 112d and the second surface 112b. Notch 140d2 opens on the fifth surface 112e toward the third surface 112c and the second surface 112b. Furthermore, the fourth external electrode 130d includes notches 140d3 and 140d4 on the fourth surface 112d. Notch 140d3 opens on the fourth surface 112d toward the fifth surface 112e and the second surface 112b. Notch 140d4 opens on the fourth surface 112d toward the sixth surface 112f and the second surface 112b.

[0232] The multilayer ceramic capacitor 110A shown in Figure 40 provides the same effects as the multilayer ceramic capacitor 10 according to the first embodiment.

[0233] (2) Modification example 2-B1 Next, an example of a multilayer ceramic capacitor 110B1 according to modification 2-B1 of the second embodiment of this invention will be described.

[0234] Figure 43 is an external perspective view showing an example of a multilayer ceramic capacitor according to Modification 2-B1 of the second embodiment of the present invention. Figure 44(a) is a top view showing an example of a multilayer ceramic capacitor according to Modification 2-B1 of the second embodiment of the present invention, and Figure 44(b) is a bottom view thereof. Figure 45(a) is a rear view showing an example of a multilayer ceramic capacitor according to Modification 2-B1 of the second embodiment of the present invention, Figure 45(b) is a front view thereof, (c) is a left side view thereof, and (d) is a right side view thereof. However, components identical or corresponding to those in Figures 33 to 37B are denoted by the same reference numerals, and detailed descriptions are omitted.

[0235] The multilayer ceramic capacitor 110B1 in Modification 2-B1 differs from the multilayer ceramic capacitor 110 in the shape of its external electrodes 130.

[0236] (Internal electrode) In the multilayer ceramic capacitor 110B1 according to the modified example 2-B1, the internal electrode 116 has the same configuration as the internal electrode 116 of the laminate 112 of the multilayer ceramic capacitor 110 according to the second embodiment of the present invention shown in Figure 33.

[0237] (external electrode) As shown in Figures 43 to 45, external electrodes 130 are arranged on the laminate 112. The external electrode 130 has a plurality of external electrodes 130 connected to the first internal electrode 116a1 and the second internal electrode 116b1. The external electrode 130 has a first external electrode 130a, a second external electrode 130b, a third external electrode 130c, and a fourth external electrode 130d.

[0238] The first external electrode 130a is positioned on the third surface 112c so as to cover the first lead electrode portion 124a1 of the first internal electrode 116a1, and on the fifth surface 112e so as to cover the first lead electrode portion 124a2 of the first internal electrode 116a1. Furthermore, the first external electrode 130a is positioned so as to cover a part of the first surface 112a and a part of the second surface 112b. The first external electrode 130a is electrically connected to the first lead electrode portions 124a1 and 124a2 of the first internal electrode 116a1.

[0239] The first external electrode 130a has a notch 140a1 on the third surface 112c. The notch 140a1 opens toward the fifth surface 112e on the third surface 112c. Furthermore, the first external electrode 130a has a notch 140a3 on the fifth surface 112e. The notch 140a3 opens toward the third surface 112c on the fifth surface 112e.

[0240] The second external electrode 130b is positioned on the third surface 112c so as to cover the second lead electrode portion 124b1 of the second internal electrode 116b1, and on the sixth surface 112f so as to cover the second lead electrode portion 124b2 of the second internal electrode 116b1. Furthermore, the second external electrode 130b is positioned so as to cover a part of the first surface 112a and a part of the second surface 112b. The second external electrode 130b is electrically connected to the second lead electrode portions 124b1 and 124b2 of the second internal electrode 116b1.

[0241] The second external electrode 130b has a notch 140b1 on the third surface 12c. The notch 140b1 opens toward the sixth surface 112f on the third surface 112c. Also, the second external electrode 130b has a notch 140b3 on the sixth surface 12f. The notch 140b3 opens toward the third surface 112c on the sixth surface 112f.

[0242] The third external electrode 130c is disposed on the fourth surface 112d so as to cover the third lead electrode portion 124c1 of the first internal electrode 116a1, and is disposed on the sixth surface 112f so as to cover the third lead electrode portion 124c2 of the first internal electrode 116a1. Further, the third external electrode 130c is disposed so as to cover a part of the first surface 112a and a part of the second surface 112b. The third external electrode 130c is electrically connected to the third lead electrode portions 124c1 and 124c2 of the first internal electrode 116a1.

[0243] The third external electrode 130c has a notch 140c1 on the sixth surface 112f. The notch 140c1 opens toward the fourth surface 112d on the sixth surface 112f. Also, the third external electrode 130c has a notch 140c3 on the fourth surface 112d. The notch 140c3 opens toward the sixth surface 112f on the fourth surface 112d.

[0244] The fourth external electrode 130d is disposed on the fourth surface 112d so as to cover the fourth lead electrode portion 124d1 of the second internal electrode 116b1, and is disposed on the fifth surface 112e so as to cover the fourth lead electrode portion 124d2 of the second internal electrode 116b1. Further, the fourth external electrode 130d is disposed so as to cover a part of the first surface 112a and a part of the second surface 112b. The fourth external electrode 130d is electrically connected to the fourth lead electrode portions 124d1 and 124d2 of the second internal electrode 116b1.

[0245] The fourth external electrode 130d has a notch 140d1 on the fifth surface 112e. The notch 140d1 opens toward the fourth surface 112d on the fifth surface 112e. Furthermore, the fourth external electrode 130d has a notch 140d3 on the fourth surface 112d. The notch 140d3 opens toward the fifth surface 112e on the fourth surface 112d.

[0246] The multilayer ceramic capacitor 110B1 shown in Figure 43 provides the same effects as the multilayer ceramic capacitor 10 according to the first embodiment.

[0247] (2) Modified example 2-B2 Next, an example of a multilayer ceramic capacitor 110B2 according to modification 2-B2 of the first embodiment of this invention will be described.

[0248] Figure 46 is an external perspective view showing an example of a multilayer ceramic capacitor according to Modification 1-B2 of the second embodiment of the present invention. Figure 47(a) is a top view showing an example of a multilayer ceramic capacitor according to Modification 1-B2 of the second embodiment of the present invention, and Figure 47(b) is a bottom view thereof. Figure 48(a) is a rear view showing an example of a multilayer ceramic capacitor according to Modification 1-B2 of the second embodiment of the present invention, Figure 48(b) is a front view thereof, Figure 48(c) is a left side view thereof, and Figure 48(d) is a right side view thereof. However, components identical or corresponding to those in Figures 33 to 37B are denoted by the same reference numerals, and detailed descriptions are omitted.

[0249] The multilayer ceramic capacitor 110B2 in Modification 2-B2 differs from the multilayer ceramic capacitor 110 in the second embodiment in the shape of its external electrodes 130. Furthermore, the external electrodes 130 are not located on the second surface 112b.

[0250] (Internal electrode) In the multilayer ceramic capacitor 110B2 according to Modification 2-B2, the internal electrode 116 has the same configuration as the internal electrode 116 of the laminate 112 of the multilayer ceramic capacitor 110 according to the second embodiment of the present invention shown in Figure 33.

[0251] (external electrode) As shown in Figures 46 to 48, external electrodes 130 are arranged on the laminate 112. The external electrode 130 has a plurality of external electrodes 130 connected to the first internal electrode 116a1 and the second internal electrode 116b1. The external electrode 130 has a first external electrode 130a, a second external electrode 130b, a third external electrode 130c, and a fourth external electrode 130d.

[0252] The first external electrode 130a is positioned on the third surface 112c so as to cover the first lead electrode portion 124a1 of the first internal electrode 116a1, and on the fifth surface 112e so as to cover the first lead electrode portion 124a2 of the first internal electrode 116a1. Furthermore, the first external electrode 130a is positioned so as to cover a portion of the first surface 112a. The first external electrode 130a is electrically connected to the first lead electrode portions 124a1 and 124a2 of the first internal electrode 116a1.

[0253] The first external electrode 130a has a notch 140a1 on the third surface 112c. The notch 140a1 opens on the third surface 112c toward the fifth surface 112e and the second surface 112b. Furthermore, the first external electrode 130a has a notch 140a3 on the fifth surface 112e. The notch 140a3 opens toward the third surface 112c and the second surface 112b on the fifth surface 112e.

[0254] The second external electrode 130b is positioned on the third surface 112c so as to cover the second lead electrode portion 124b1 of the second internal electrode 116b1, and on the sixth surface 112f so as to cover the second lead electrode portion 124b2 of the second internal electrode 116b1. Furthermore, the second external electrode 130b is positioned so as to cover a portion of the first surface 112a. The second external electrode 130b is electrically connected to the second lead electrode portions 124b1 and 124b2 of the second internal electrode 116b1.

[0255] The second external electrode 130b has a notch 140b1 on the third surface 112c. The notch 140b1 opens on the third surface 112c toward the sixth surface 112f and the second surface 112b. Furthermore, the second external electrode 130b has a notch 140b3 on the sixth surface 112f. The notch 140b3 opens toward the third surface 112c and the second surface 112b on the sixth surface 112f.

[0256] The third external electrode 130c is positioned on the fourth surface 112d so as to cover the third lead electrode portion 124c1 of the first internal electrode 116a1, and on the sixth surface 112f so as to cover the third lead electrode portion 124c2 of the first internal electrode 116a1. Furthermore, the third external electrode 130c is positioned so as to cover a portion of the first surface 112a. The third external electrode 130c is electrically connected to the third lead electrode portions 124c1 and 124c2 of the first internal electrode 116a1.

[0257] The third external electrode 130c has a notch 140c1 on the sixth surface 112f. The notch 140c1 opens toward the fourth surface 112d and the second surface 112b on the sixth surface 112f. Furthermore, the third external electrode 130c has a notch 140c3 on the fourth surface 112d. The notch 140c3 opens on the fourth surface 112d toward the sixth surface 112f and the second surface 112b.

[0258] The fourth external electrode 130d is positioned on the fourth surface 112d so as to cover the fourth lead electrode portion 124d1 of the second internal electrode 116b1, and on the fifth surface 112e so as to cover the fourth lead electrode portion 124d2 of the second internal electrode 116b1. Furthermore, the fourth external electrode 130d is positioned so as to cover a portion of the first surface 112a. The fourth external electrode 130d is electrically connected to the fourth lead electrode portions 124d1 and 124d2 of the second internal electrode 116b1.

[0259] The fourth external electrode 130d has a notch 140d1 on the fifth surface 112e. The notch 140d1 opens on the fifth surface 112e toward the fourth surface 112d and the second surface 112b. Furthermore, the fourth external electrode 130d has a notch 140d3 on the fourth surface 112d. The notch 140d3 opens toward the fifth surface 112e and the second surface 112b on the fourth surface 112d.

[0260] The multilayer ceramic capacitor 110B2 shown in Figure 46 provides the same effects as the multilayer ceramic capacitor 10 according to the first embodiment.

[0261] 3. Manufacturing method of multilayer ceramic capacitors The following describes a method for manufacturing a multilayer ceramic capacitor according to the second embodiment.

[0262] First, prepare the dielectric sheet and the conductive paste for the internal electrodes. The dielectric sheet and the conductive paste for the internal electrodes contain a binder and a solvent. Known binders and solvents can be used.

[0263] Next, a conductive paste for internal electrodes is printed on the dielectric sheet in a predetermined pattern, for example, by inkjet printing, screen printing, or gravure printing. This prepares a dielectric sheet with the pattern for the first internal electrode and a dielectric sheet with the pattern for the second internal electrode. Subsequently, the sheet with the pattern for the first internal electrode and the sheet with the pattern for the second internal electrode are laminated together to form the inner layer portion 118.

[0264] When printing patterns using conductive pastes, the first step is to print the pattern using conductive paste for the internal electrodes.

[0265] Furthermore, for example, when forming the printed pattern of the internal electrodes by gravure printing, the desired internal electrodes can be formed by designing the gravure plate used for gravure printing as the graphic pattern for the first internal electrode, and by changing the graphic pattern for the second internal electrode to the corresponding structure.

[0266] Furthermore, when forming the printed pattern of the internal electrode by screen printing, the desired internal electrode can be formed by designing the screen printing mask as the graphic pattern of the first internal electrode and changing the graphic pattern of the second internal electrode to the corresponding structure.

[0267] Next, a predetermined number of dielectric sheets without printed internal electrode patterns are stacked to form the first outer layer portion 120a on the first surface 112a side. Then, the portion that will become the inner layer portion 118 prepared above is stacked, and a predetermined number of dielectric sheets without printed internal electrode patterns are stacked on top of this inner layer portion 118 to form the second outer layer portion 120b on the second surface 112b side. This completes the production of the laminated sheet.

[0268] Next, the laminated sheets are pressed in the lamination direction using means such as a hydrostatic press to produce a laminated block.

[0269] Next, the laminated block is cut to the specified size, and the laminated chips are cut out. At this time, the corners and edges of the laminated chips may be rounded by barrel polishing or other methods.

[0270] Next, the laminated chips are fired to produce the laminated body 112. The firing temperature depends on the ceramic and internal electrode materials, but is preferably between 900°C and 1400°C.

[0271] Next, the external electrode 130 is formed on the laminate 112.

[0272] The laminates 112 on which the undercoat plating layer 132 is formed are aligned on a workbench, and a thin film layer 134 is formed on the first surface 112a by sputtering using a predetermined mask.

[0273] Subsequently, a surface plating layer 136 is formed on the undercoat plating layer 132 and the thin film layer 134, which are placed on the surface of the laminate 112. More specifically, a Ni plating layer and a Sn plating layer are formed as the surface plating layer 136 on the undercoat plating layer 132 and the thin film layer 134. When performing the plating process, either electrolytic plating or electroless plating may be used. However, electroless plating has the disadvantage of requiring pretreatment with a catalyst or the like to improve the plating deposition rate, which complicates the process. Therefore, electrolytic plating is usually preferred.

[0274] As described above, the multilayer ceramic capacitor 110 according to the second embodiment shown in Figure 33 can be manufactured.

[0275] According to the manufacturing method of the multilayer ceramic capacitor of this embodiment, the thickness of the external electrode 130 formed on the first surface 12a in the stacking direction x (T dimension) can be reduced, making it possible to provide a low-profile multilayer ceramic capacitor without impairing mountability during mounting.

[0276] C. Other variations Next, a multilayer ceramic capacitor 210, which is another modified example of this invention, will be described.

[0277] Figure 49 is an external perspective view showing an example of a multilayer ceramic capacitor illustrating another modification of the present invention. Figure 50 is a plan view showing an example of a multilayer ceramic capacitor illustrating another modification of the present invention. However, components identical or corresponding to those in Figures 1 to 5B are denoted by the same reference numerals, and detailed descriptions are omitted.

[0278] The multilayer ceramic capacitor 210 in this modified example differs from the multilayer ceramic capacitor 10 in the first embodiment in the shape of its external electrodes 230. Furthermore, the external electrodes 230 are not located on the second surface 12b.

[0279] (Internal electrode) In the multilayer ceramic capacitor 210 according to this modified example, the internal electrodes 16 have the same configuration as the internal electrodes 16 of the laminated body 12 of the multilayer ceramic capacitor 10 according to the first embodiment of this invention shown in Figure 1.

[0280] (external electrode) Furthermore, in the multilayer ceramic capacitor 210 according to this modified example, the external electrode 230 has the same configuration as the external electrode 30 of the laminate 12 of the multilayer ceramic capacitor 10 according to the first embodiment of this invention shown in Figure 1. The multilayer ceramic capacitor 210 according to this modified example further comprises the following configuration.

[0281] The first external electrode 230a has an edge 30 facing the second external electrode 230b on the first surface 12a. 12 And the side 30 facing the fourth external electrode 230d 14 It has the following characteristics. The second external electrode 230b has an edge 30 facing the first external electrode 230a on the first surface 12a. 21 And the side 30 facing the third external electrode 230c 23 It has the following characteristics. The third external electrode 230c has a side 30 facing the second external electrode 230b on the first surface 12a. 32 and a side 30 facing the fourth external electrode 230d. 34 It has these. The fourth external electrode 230d has a side 30 facing the first external electrode 230a on the first surface 12a. 41 and a side 30 facing the third external electrode 230c. 43 It has these.

[0282] At this time, as shown in FIG. 50, the side 30 12 and the side 30 21 and the side 30 34 and the side 30 43 are preferably inclined in the same direction with respect to the first direction y. As a result, the end portion P on the third surface 12c side of the side 30 12 is located more inward (toward the central portion) in the second direction z than the end portion P of the first internal electrode 16a1 exposed on the third surface 12c. Also, the end portion P on the fourth surface 12d side of the side 30 12 is located more inward (toward the central portion) in the second direction z than the end portion P of the second internal electrode 16b1 exposed on the third surface 12c. a Also, the end portion P on the third surface 12c side of the side 30 34 is located more outward in the second direction z than the end portion P of the second internal electrode 16b1 exposed on the third surface 12c. Also, the end portion P on the fourth surface 12d side of the side 30 34 is located more outward in the second direction z than the end portion P of the first internal electrode 16a1 exposed on the third surface 12c. b is located more outward in the second direction z.

[0283] Also, the end portion P on the third surface 12c side of the side 30 21 is located more outward in the second direction z than the end portion P of the second internal electrode 16b1 exposed on the third surface 12c. 21 Also, the end portion P on the fourth surface 12d side of the side 30 b is located more outward in the second direction z than the end portion P of the first internal electrode 16a1 exposed on the third surface 12c. 43 is located more outward in the second direction z. 43 is located more outward in the second direction z than the end portion P of the first internal electrode 16a1 exposed on the third surface 12c. a is located more outward in the second direction z. As a result, due to the self - alignment property during soldering of the multilayer ceramic capacitor 210 in the first direction y, the mounting property of the capacitor can be further improved.

[0284] Side 30 12 and side 30 43 Preferably, the inclination angles θ1 and θ2 with respect to the first direction y are 3° or more and 15° or less, and each is inclined in the same direction. This further improves the mountability of the capacitor by allowing the multilayer ceramic capacitor 210 to self-align when soldered in the first direction y.

[0285] Side 30 21 The end of side 30 on the third surface 12c is located outward in the second direction z relative to the length of the second external electrode 230b positioned on the third surface 12c, compared to the end of the second external electrode 230b positioned on the third surface 12c in the second direction z. Here, let WE1 be the distance of the second external electrode 230b in the second direction z when viewed from the stacking direction x. 21 End P on the third surface 12c side 21 Let WE2 be the distance in the second direction z from the outermost end of the second external electrode 230b in the second direction z to the first external electrode 230b. In this case, the ratio of WE2 to WE1 is preferably 54% to 98%. This allows the multilayer ceramic capacitor 210 to be stably held and adsorbed when mounted using a mounting machine or the like.

[0286] The absolute value of the difference between the distance w1 in the second direction z between the first external electrode 230a and the second external electrode 230b and the distance w2 in the second direction z between the third external electrode 230c and the fourth external electrode 230d is preferably 5 μm or less. The absolute value of the difference between the distance l1 in the first direction y between the first external electrode 230a and the fourth external electrode 230d and the distance l2 in the first direction y between the second external electrode 230b and the third external electrode 230c is preferably 5 μm or less. The absolute value of the difference between the distance w1 in the second direction z between the first external electrode 230a and the second external electrode 230b and the distance l1 in the second direction z between the first external electrode 230a and the fourth external electrode 230d is preferably 5 μm or less.

[0287] The multilayer ceramic capacitor 210 shown in Figure 49 provides the same effects as the multilayer ceramic capacitor 10 according to the first embodiment, as well as the following effects. In other words, according to the multilayer ceramic capacitor 210, side 30 12 and side 30 21 and side 30 34 and side 30 43 This is because, since each is inclined in the same direction with respect to the first direction y, and the dimension L in the first direction y and the dimension W in the second direction z of the laminate 12 satisfy the condition 0.85 ≤ L / W ≤ 1.00, the first external electrode 230a and the third external electrode 230c, which are placed on the first surface 12a, are arranged to extend towards the center along the second direction z, thereby improving the self-alignment when mounting the multilayer ceramic capacitor 210.

[0288] Furthermore, the multilayer ceramic capacitor according to this invention may have the configuration described below. In other words, in view of the stacking direction x, the external electrode 230 may have a first recess extending in a first direction y within the stacked body 12. The external electrode 230 may also have a second recess extending in a second direction z within the stacked body 12.

[0289] More specifically, when the first external electrode 230a covers the first surface 12a, the second surface 12b, the third surface 12c, and the fifth surface 12e, the first external electrode 230a may have a second recess extending in the second direction z on the third surface 12c side and a first recess extending in the first direction y on the fifth surface 12e side, when viewed in the stacking direction x from the first surface 12a side. Furthermore, if the first external electrode 230a covers the first surface 12a, the second surface 12b, the third surface 12c, and the fifth surface 12e, in a view of the stacking direction x from the second surface 12b side, the first external electrode 230a may have a second recess extending in the second direction z on the third surface 12c side and a first recess extending in the first direction y on the fifth surface 12e side.

[0290] Furthermore, the second external electrode 230b to the fourth external electrode 230d may also have the recesses described above.

[0291] As described above, embodiments of the present invention are disclosed in the above description, but the present invention is not limited thereto.

[0292] Without departing from the scope of the technical idea and objectives of the present invention, various modifications can be made to the embodiments described above in terms of mechanism, shape, material, quantity, position or arrangement, etc., and these modifications are included in the present invention.

[0293] <1> A laminate having a first surface and a second surface facing each other in the stacking direction, a third surface and a fourth surface facing each other in a first direction perpendicular to the stacking direction, and a fifth surface and a sixth surface facing each other in a second direction perpendicular to the stacking direction and the first direction, A first external electrode is disposed on the first surface, the third surface, and the fifth surface, A second external electrode is disposed on the first surface, the third surface, and the sixth surface, A third external electrode is disposed on the first surface, the fourth surface, and the sixth surface, A fourth external electrode is disposed on the first surface, the fourth surface, and the fifth surface. A multilayer ceramic capacitor comprising, The laminated body is The first internal electrode is exposed on the third surface and on one surface other than the third surface, and is connected to the first external electrode and the third external electrode, It has, The first external electrode is, It has a notch that opens toward the fifth surface, When the dimension in the first direction is L and the dimension in the second direction is W, A multilayer ceramic capacitor where 0.85 ≤ L / W ≤ 1.0.

[0294] <2> The second external electrode has a notch that opens toward the sixth surface. <1> The multilayer ceramic capacitor described above.

[0295] <3> The third external electrode is provided with a notch that opens toward the fourth surface. <1> or <2> The multilayer ceramic capacitor described above.

[0296] <4> The fourth external electrode is provided with a notch that opens toward the fourth surface. <1> or <3> A multilayer ceramic capacitor as described in any of the following.

[0297] <5> The first external electrode is, A first undercoat plating layer directly connected to the first internal electrode, A first thin film layer disposed on the first surface, A first surface plating layer is disposed on the first undercoat plating layer and the first thin film layer, Equipped with, <1> or <4> A multilayer ceramic capacitor as described in any of the following.

[0298] <6> On the first surface, The first external electrode is, The side A of the first external electrode facing the fourth external electrode, The side B of the first external electrode facing the second external electrode and Includes, The aforementioned second external electrode is, The side C of the second external electrode facing the first external electrode, The side D of the second external electrode facing the third external electrode and Includes, The aforementioned third external electrode is, The side E of the third external electrode facing the second external electrode, The side F of the third external electrode facing the fourth external electrode and Includes, The fourth external electrode is, The side G of the fourth external electrode facing the third external electrode, The side H of the fourth external electrode facing the first external electrode and Includes, The aforementioned sides B, C, F, and G are inclined in the same direction with respect to the first direction. <1> or <5> A multilayer ceramic capacitor as described in any of the following.

[0299] <7> The first external electrode is, Located inside the laminate, it has a first recess whose dimension in the first direction is longer than its dimension in the second direction, <1> or <6> A multilayer ceramic capacitor as described in any of the following. [Explanation of Symbols]

[0300] 10, 10A~10D2, 110, 110A~B2, 210 Multilayer ceramic capacitors 12-layer structure 12a, 112a First surface 12b, 112b Second face 12c, 112c Third side 12d, 112d Fourth face 12e, 112e Fifth side 12f, 112f, 6th face 14, 114 dielectric layers 14a, 114a Inner dielectric layer 14b, 114b Outer dielectric layer 16, 116 internal electrode 16a, 116a First internal electrode 16b, 116b Second internal electrode 18, 118 Inner layer 20a, 120a First outer layer 20b, 120b Second outer layer 22a, 122a First counter electrode portion 22b, 122b Second counter electrode section 24a, 124a First extraction electrode section 24b, 124b Second extraction electrode section 24c, 124c Third extraction electrode section 24d, 124d Fourth extraction electrode section 26a, 26b, 126a, 126b Side of the laminate (W gap) 27a, 27b, 127a, 127b Ends of the laminate (L-gap) 30, 130, 230 external electrode 30a, 130a, 230a First external electrode 30b, 130b, 230b Second external electrodes 30c, 130c, 230c Third external electrode 30d, 130d, 230d: Fourth external electrode 32, 132 thin film layer 32a, 132a First thin film layer 32b, 132b Second thin film layer 32c, 132c Third thin film layer 32d, 132d: Fourth thin film layer 34, 134 Lower plating layer 34a, 134a First lower plating layer 34b, 134b Second lower plating layer 34c, 134c Third lower plating layer 34d, 134d: Fourth lower plating layer 36, 136 Surface plating layer 36a, 136a First surface plating layer 36b, 136b Second surface plating layer 36c, 136c Third surface plating layer 36d, 136d: Fourth surface plating layer x stacking direction y First direction z Second direction L is the dimension of the multilayer ceramic capacitor in the first direction. W Dimensions of the second direction of the multilayer ceramic capacitor T Dimensions in the stacking direction of a multilayer ceramic capacitor

Claims

1. A laminate having a first surface and a second surface facing each other in the stacking direction, a third surface and a fourth surface facing each other in a first direction perpendicular to the stacking direction, and a fifth surface and a sixth surface facing each other in a second direction perpendicular to the stacking direction and the first direction, A first external electrode is disposed on the first surface, the third surface, and the fifth surface, A second external electrode is disposed on the first surface, the third surface, and the sixth surface, A third external electrode is disposed on the first surface, the fourth surface, and the sixth surface, A fourth external electrode is disposed on the first surface, the fourth surface, and the fifth surface. A multilayer ceramic capacitor comprising, The laminated body is The third surface and the first internal electrode, which is exposed on one surface other than the third surface and connected to the first external electrode and the third external electrode, It has, The first external electrode is, It has a notch that opens toward the fifth surface, When the dimension in the first direction is L and the dimension in the second direction is W, A multilayer ceramic capacitor where 0.85 ≤ L / W ≤ 1.

0.

2. The multilayer ceramic capacitor according to claim 1, wherein the second external electrode is provided with a notch that opens toward the sixth surface.

3. The multilayer ceramic capacitor according to claim 1, wherein the third external electrode is provided with a notch that opens toward the fourth surface.

4. The multilayer ceramic capacitor according to claim 1, wherein the fourth external electrode is provided with a notch that opens toward the fourth surface.

5. The first external electrode is, A first undercoat plating layer directly connected to the first internal electrode, A first thin film layer disposed on the first surface, A first surface plating layer is disposed on the first undercoat plating layer and the first thin film layer, A multilayer ceramic capacitor according to claim 1, comprising:

6. On the first surface, The first external electrode is, The side A of the first external electrode facing the fourth external electrode, The side B of the first external electrode facing the second external electrode and Includes, The second external electrode is, The side C of the second external electrode facing the first external electrode, The side D of the second external electrode facing the third external electrode and Includes, The third external electrode is, The side E of the third external electrode facing the second external electrode, The side F of the third external electrode facing the fourth external electrode and Includes, The fourth external electrode is, The side G of the fourth external electrode facing the third external electrode, The side H of the fourth external electrode facing the first external electrode and Includes, The multilayer ceramic capacitor according to claim 5, wherein the sides B, C, F, and G are inclined in the same direction with respect to the first direction.

7. The first external electrode is, The multilayer ceramic capacitor according to claim 5, having a first recess located inside the laminate, the dimension in the first direction being longer than the dimension in the second direction.

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