Wafer bonding structure

Abstract

This invention provides a wafer bonding structure that can improve the visibility of alignment marks. [Solution] The wafer bonding structure 1 comprises a first wafer 3 and a second wafer 4. The first wafer 3 has a first bonding surface 3s. The second wafer 4 has a second bonding surface 4s connected to the first bonding surface 3s. The first wafer 3 comprises a support layer 31, a BOX layer 32, and an active layer 33. The first bonding surface 3s is the main surface of the active layer 33 opposite to the side of the BOX layer 32. The first bonding surface 3s is provided with an alignment mark 6 and an outer peripheral portion 7. The outer peripheral portion 7 is located on the outer periphery of the first alignment mark 6. The outer peripheral portion 7 is formed by penetrating the outer peripheral portion of the active layer 33 in the thickness direction F1 of the active layer 33.

Description

Technical Field

[0001] The present disclosure generally relates to a wafer bonding structure, and more particularly to a wafer bonding structure between a wafer having a support layer, a BOX layer, and an active layer and another wafer.

Background Art

[0002] The substrate described in Patent Document 1 has alignment marks. The alignment marks are provided on the main surface of the substrate. The alignment marks are configured by arranging a plurality of structures (i.e., small holes) that scatter light vertically and horizontally in a region to be the alignment marks.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In the substrate described in Patent Document 1, for example, when the substrate is viewed through with infrared light to visually recognize the alignment marks provided on the substrate, the infrared light is scattered by the plurality of structures. Therefore, the contour of the alignment marks becomes blurred, and the visibility of the alignment marks is reduced.

[0005] An object of the present disclosure is to provide a wafer bonding structure capable of improving the visibility of alignment marks.

Means for Solving the Problems

[0006] A wafer bonding structure according to one aspect of the present disclosure comprises a first wafer and a second wafer. The first wafer has a first bonding surface. The second wafer has a second bonding surface connected to the first bonding surface. The first wafer comprises a support layer, a BOX layer, and an active layer. The BOX layer is laminated on the support layer. The active layer is laminated on the BOX layer. The first bonding surface is the main surface of the active layer opposite to the side of the BOX layer. The first bonding surface is provided with alignment marks and an outer peripheral portion. The outer peripheral portion is located on the outer periphery of the alignment marks. The outer peripheral portion is configured such that the portion of the active layer that is on the outer periphery of the alignment marks penetrates the active layer in the thickness direction. [Effects of the Invention]

[0007] This disclosure has the advantage of improving the visibility of alignment marks. [Brief explanation of the drawing]

[0008] [Figure 1] Figure 1 is an exploded cross-sectional view of a wafer bonding structure according to an embodiment. [Figure 2] Figure 2 is a plan view showing the first alignment mark and the first outer periphery of the first wafer. [Figure 3] Figure 3 is a cross-sectional view taken along line A1-A1 in Figure 2. [Figure 4] Figure 4 is a plan view showing the second alignment mark and the second outer periphery of the second wafer. [Figure 5] Figure 5 is a cross-sectional view taken along line A2-A2 in Figure 4. [Figure 6] Figure 6 is a plan view showing the state in which the first alignment mark and the second alignment mark overlap. [Figure 7] Figure 7 is an explanatory diagram illustrating the process of preparing the SOI substrate, which is the material for the first wafer. [Figure 8] Figure 8 is an explanatory diagram illustrating the process of forming the first alignment mark and the first outer periphery on the SOI substrate shown above. [Figure 9]Figure 9 is an explanatory diagram illustrating the process of preparing the silicon substrate, which is the material for the second wafer. [Figure 10] Figure 10 is an explanatory diagram illustrating the process of forming a second alignment mark and a second outer periphery on the silicon substrate shown above. [Figure 11] Figure 11 is an explanatory diagram illustrating the process of joining the first wafer and the second wafer. [Figure 12] Figure 12 is an exploded cross-sectional view of a wafer bonding structure relating to a comparative example. [Modes for carrying out the invention]

[0009] (1) Embodiment The wafer bonding structure according to this embodiment will be described below with reference to the drawings.

[0010] (1-1) Overview As shown in Figure 1, the wafer bonding structure 1 according to this embodiment includes a first wafer 3 and a second wafer 4. The first wafer 3 has a first bonding surface 3s. The second wafer 4 has a second bonding surface 4s connected to the first bonding surface 3s. The first wafer 3 includes a support layer 31, a BOX layer 32, and an active layer 33. The BOX layer 32 is laminated on the support layer 31. The active layer 33 is laminated on the BOX layer 32. The first bonding surface 3s is the main surface of the active layer 33 opposite to the side of the BOX layer 32. The first bonding surface 3s is provided with a first alignment mark 6 (alignment mark) and a first outer peripheral portion 7 (outer peripheral portion). The first outer peripheral portion 7 is located on the outer periphery of the first alignment mark 6. The first outer peripheral portion 7 is constructed by penetrating the outer peripheral portion of the active layer 33 in the thickness direction F2 of the active layer 33.

[0011] In this configuration, the first outer peripheral portion 7 is formed by the outer peripheral portion of the active layer 33 of the first alignment mark 6 penetrating the active layer 33 in the thickness direction F2. Therefore, the visibility of the first alignment mark 6 provided on the first wafer 3 can be improved, for example, by using infrared light to see through the first wafer 3.

[0012] (2) Details The wafer bonding structure 1 according to this embodiment will be described with reference to the drawings.

[0013] The wafer bonding structure 1 according to this embodiment is applicable to a device (for example, a MEMS (Micro Electro Mechanical Systems) device) formed by bonding a plurality of wafers. The above-mentioned device is, for example, a pressure sensor, a MEMS mirror, a microphone, an optical scan, etc.

[0014] As shown in FIG. 1, the wafer bonding structure 1 according to this embodiment includes a first wafer 3 and a second wafer 4.

[0015] (2-1) First Wafer As shown in FIGS. 1 and 2, the first wafer 3 is, for example, a rectangular flat substrate. The first wafer 3 has a first bonding surface 3s. The first bonding surface 3s is one of the main surfaces on both sides of the first wafer 3 (the main surface on the side of the second wafer 4). The first bonding surface 3s is a surface to be bonded to a second bonding surface 4s of the second wafer 4 described later. Various electronic components constituting the device are provided inside the first wafer 3 and on the first bonding surface 3s by MEMS technology.

[0016] The first wafer 3 is, for example, a SOI (Silicon on Insulator) wafer. The first wafer 3 has a support layer 31, a BOX layer 32, and an active layer 33.

[0017] The support layer 31 is constituted by, for example, a silicon (Si) substrate. A dopant is implanted into the support layer 31 so that the resistivity of the support layer 31 becomes a predetermined resistivity. The support layer 31 has two main surfaces 31a and 31b facing each other.

[0018] The BOX layer 32 is laminated on one main surface 31a of the support layer 31. The BOX layer 32 is an insulating layer. The BOX layer 32 is formed of, for example, an oxide film (e.g., silicon oxide (SiO2)).

[0019] The active layer 33 is provided on the main surface 32a of the BOX layer 32, opposite to the side of the support layer 31. The active layer 33 is made of, for example, a silicon (Si) substrate. A dopant is injected into the active layer 33 so that the resistivity of the active layer 33 becomes a predetermined resistivity. The resistance value of the active layer 33 is, for example, 0.001 Ωcm or more and 0.1 Ωcm or less. Preferably, the resistance value of the active layer 33 is, for example, 0.001 Ωcm or more and 0.05 Ωcm or less.

[0020] The first bonding surface 3s of the first wafer 3 is formed by the main surface 33a of the active layer 33, which is on the side opposite to the BOX layer 32.

[0021] The first joint surface 3s is provided with a first alignment mark 6 and a first outer circumference 7. In the example shown in Figure 1, two sets of first alignment marks 6 and first outer circumference 7, G1 and G2, are provided. The number of sets of first alignment marks 6 and first outer circumference 7 may be one set or three or more sets.

[0022] The first alignment mark 6 is provided on the first bonding surface 3s. As shown in Figure 2, the first alignment mark 6 is formed in a cross shape when viewed from a plan view from the thickness direction F1 of the first wafer 3. The "cross shape" is a shape in which a strip-shaped first line segment 61 and a strip-shaped second line segment 62 are perpendicular to each other. In this embodiment, it is assumed that the first line segment 61 and the second line segment 62 are of the same length, but the first line segment 61 and the second line segment 62 may be of different lengths. In a plan view from the thickness direction F1 of the first wafer 3, the length direction of the first line segment 61 is defined as the first direction D1, and the length direction of the second line segment 62 is defined as the second direction D2.

[0023] The length L1 in the first direction D1 at the first alignment mark 6 is, for example, the length of the first line segment 61 of the first alignment mark 6 (i.e., the length of the longest portion), which is, for example, 160 μm. The length L2 in the second direction D2 at the first alignment mark 6 is, for example, the length of the second line segment 62 of the first alignment mark 6 (i.e., the length of the longest portion), which is, for example, 160 μm.

[0024] The first alignment mark 6 is provided by providing the first outer peripheral portion 7, which will be described later, on the outer circumference of the first alignment mark 6.

[0025] As shown in Figures 2 and 3, the first outer periphery 7 is provided on the outer periphery of the first alignment mark 6 on the first bonding surface 3s. More specifically, the first outer periphery 7 is provided outside the contour 6r of the first alignment mark 6. The first outer periphery 7 encompasses the entire first alignment mark 6. That is, the first alignment mark 6 is located inside the first outer periphery 7, and the entire circumferential direction of the first alignment mark 6 is surrounded by the first outer periphery 7. The first outer periphery 7 is, for example, rectangular in plan view from the thickness direction F1 of the first wafer 3. The first outer periphery 7 has two first sides 7a and two second sides 7b that are opposite to each other. The first sides 7a and the second sides 7b are, for example, of different lengths. The first side 7a is, for example, the longer side, and the second side 7b is, for example, the shorter side. The first sides 7a and the second sides 7b may be of the same length.

[0026] The first outer periphery 7 is formed by the outer periphery of the first alignment mark 6 (i.e., the portion outside the contour 6r) of the active layer 33 penetrating in the thickness direction F2 of the active layer 33. In other words, the first outer periphery 7 is formed by the portion of the active layer 33 between the contour 7r of the first outer periphery 7 and the contour 6r of the first alignment mark 6 penetrating in the thickness direction F2 of the active layer 33. The first outer periphery 7 exposes the BOX layer 32, which is the layer below the active layer 33, from the first bonding surface 3s. In this embodiment, the thickness direction F2 of the active layer 33 is the same direction as the thickness direction F1 of the first wafer 3.

[0027] The length M1 of the first direction D1 in the first outer periphery 7 is, for example, the length of the first side 7a of the first outer periphery 7. Here, the first direction D1 is the length direction of the first side 7a and is an example of a predetermined direction perpendicular to the thickness direction F2 of the active layer 33. The length M1 of the first direction D1 in the first outer periphery 7 is 1.5 times or more and 5 times or less the length L1 of the first direction D1 at the first alignment mark 6. Preferably, the length M1 of the first direction D1 in the first outer periphery 7 is 2 times or more and 3 times or less the length L1 of the first direction D1 at the first alignment mark 6. In the example in Figure 2, the length M1 of the first direction D1 in the first outer periphery 7 is, for example, 540 μm.

[0028] The length M2 of the second direction D2 in the first outer periphery 7 is, for example, the length of the second side 7b of the first outer periphery 7. Here, the second direction D2 is the length direction of the second side 7b and is an example of a predetermined direction perpendicular to the thickness direction F2 of the active layer 33. The length M2 of the second direction D2 in the first outer periphery 7 is 1.5 times or more and 5 times or less the length L2 of the second direction D2 at the first alignment mark 6. Preferably, the length M2 of the second direction D2 in the first outer periphery 7 is 2 times or more and 3 times or less the length L2 of the second direction D2 at the first alignment mark 6. In the example of Figure 2, the length M2 of the second direction D2 in the first outer periphery 7 is, for example, 480 μm.

[0029] (2-2) Second wafer As shown in Figures 4 and 5, the second wafer 4 is, for example, a rectangular flat substrate. The second wafer 4 is, for example, a silicon (Si) wafer. The second wafer 4 has a second bonding surface 4s. The second bonding surface 4s is one of the main surfaces on both sides of the second wafer 4 (the main surface on the first wafer 3 side). The second bonding surface 4s is the surface that bonds with the first bonding surface 3s of the first wafer 3 (see Figure 1). Various electronic components that constitute a device are provided inside the second wafer 4 and on the second bonding surface 4s using MEMS technology.

[0030] The second joint surface 4s is provided with a second alignment mark 8 and a second outer periphery 9. In the example shown in Figure 1, two sets of second alignment marks 8 and second outer periphery 9, G3 and G4, are provided. The number of sets of second alignment marks 8 and second outer periphery 9 may be one set or three or more sets.

[0031] The two sets of second alignment marks 8 G3 and G4 on the second wafer 4 correspond one-to-one with the two sets of first alignment marks 6 G1 and G2 on the first wafer 3. The two sets of second alignment marks 8 G3 and G4 are located on the second bonding surface 4s of the second wafer 4 at positions corresponding to the corresponding first alignment marks 6. The two sets of second alignment marks 8 G3 and G4 overlap with the corresponding first alignment marks 6 at predetermined relative positions, thereby positioning the relative position between the first wafer 3 and the second wafer 4 (i.e., the position in the direction parallel to the first bonding surface 3s).

[0032] The second alignment mark 8 is provided on the second joint surface 4s. The second alignment mark 8 includes multiple (four in the example of Figure 4) rectangular regions 81-84, as shown in Figure 4, for example. The four rectangular regions 81-84 are, for example, quadrilateral regions of the same shape and size. Each of the four rectangular regions 81-84 is, for example, a square, with a side length of, for example, 50 μm. The four rectangular regions 81-84 are not limited to being of the same shape and size. The four rectangular regions 81-84 may also be rectangles. The four rectangular regions 81-84 are arranged vertically and horizontally with space between them on the second joint surface 4s. The corresponding first alignment mark 6 overlaps with a cross-shaped region 85 between the four rectangular regions 81-84. That is, the cross-shaped region 85 is formed to be, for example, slightly larger than the corresponding first alignment mark 6, and of the same shape and size.

[0033] The second alignment mark 8 (i.e., the four rectangular regions 81-84) is provided by providing the second outer periphery portion 9, described later, on the outer periphery of the second alignment mark 8.

[0034] As shown in Figures 4 and 5, the second outer periphery 9 is provided on the outer periphery of the second alignment mark 8 on the second bonding surface 4s. More specifically, the second outer periphery 9 is provided outside the contour 8r of the second alignment mark 8 (each of the four rectangular regions 81 to 84). The second outer periphery 9 encompasses the entire second alignment mark 8. That is, the second alignment mark 8 is located inside the second outer periphery 9, and the entire circumferential direction of the second alignment mark 8 (each of the rectangular regions 81 to 84) is surrounded by the second outer periphery 9. The second outer periphery 9 is, for example, rectangular in plan view from the thickness direction F3 of the second wafer 4. The second outer periphery 9 is a recess that is recessed to a certain depth from the second bonding surface 4s. In other words, the second outer periphery 9 is formed such that the region between the contour 9r of the second outer periphery 9 and the contour 8r of the second alignment mark 8 (i.e., the contours of each of the four square regions 81 to 84) on the second joining surface 4s is recessed to a certain depth from the second joining surface 4s.

[0035] The second outer periphery portions 9 of the two sets G3 and G4 are formed to be approximately the same shape and size as the corresponding first outer periphery portions 7 of the two sets G1 and G2 of the first wafer 3 (see Figure 2). That is, the second outer periphery portions 9 of the two sets G3 and G4 are provided on the second bonding surface 4s of the second wafer 4 so as to overlap with the corresponding first outer periphery portions 7 when the first wafer 3 and the second wafer 4 are bonded together.

[0036] (2-3) Manufacturing method The manufacturing method for the wafer bonding structure 1 will be described with reference to Figures 7 to 10 and Figure 1.

[0037] As shown in Figure 7, an SOI substrate 100, which will be the material for the first wafer 3, is prepared. The SOI substrate 100 has a support layer 31, a BOX layer 32, and an active layer 33. Then, as shown in Figure 8, two sets of first alignment marks 6, G1 and G2, and a first outer peripheral portion 7 are formed at predetermined locations on the main surface 100a of the SOI substrate 100 on the active layer 33 side. More specifically, the active layer 33 in a first predetermined region R1 of the main surface 100a of the SOI substrate 100 is selectively removed by etching (e.g., dry etching) to expose the BOX layer 32. Here, the first predetermined region R1 has an outer shape R11 and an inner shape R12, where the outer shape R11 constitutes the contour 7r of the first outer peripheral portion 7, and the inner shape R12 constitutes the contour 6r of the first alignment mark 6. The first outer periphery 7 is formed by the portion in which the active layer 33 is selectively removed inside the first predetermined region R1, and the first alignment mark 6 is formed by the active layer 33 inside the inner shape R12 of the first predetermined region R1. In this way, the first wafer 3 is created from the SOI substrate 100 by providing, for example, two sets of first alignment marks 6 G1 and G2 and the first outer periphery 7 on the main surface 100a of the SOI substrate 100.

[0038] Furthermore, as shown in Figure 9, a silicon substrate 200, which will be the material for the second wafer 4, is prepared. Then, as shown in Figure 10, for example, two sets of second alignment marks 8 G3 and G4 and a second outer peripheral portion 9 are formed at predetermined locations on the main surface 200a of the silicon substrate 200. More specifically, by etching (for example, dry etching), the silicon substrate 200 in a second predetermined region R2 of the main surface 200a of the silicon substrate 200 is selectively removed to a certain depth to form a recess. Here, the second predetermined region R2 has an outer shape R21 and an inner shape R22, where the outer shape R21 constitutes the contour 9r of the second outer peripheral portion 9, and the inner shape R22 constitutes the contour 8r of the second alignment mark 8 (each of the contours of the four square regions 81 to 84). A second outer periphery 9 is formed by a recess formed inside the second predetermined region R2 (i.e., a portion where the silicon substrate 200 is selectively removed to a certain depth), and a second alignment mark 8 is formed by the silicon substrate 200 inside the inner shape R22 of the second predetermined region R2. In this way, a second wafer 4 is created from the silicon substrate 200 by providing, for example, two sets of second alignment marks 8 G3 and G4 and a second outer periphery 9 on the silicon substrate 200.

[0039] Then, as shown in Figure 1, the created first wafer 3 and second wafer 4 are placed close to each other with their bonding surfaces (first bonding surface 3s and second bonding surface 4s) facing each other. Then, infrared light C1 is irradiated onto the first wafer 3 from the main surface 3b side of the support layer 31 side of the first wafer 3, for example, using an infrared microscope. Then, the first alignment mark 6 on the first wafer 3 and the second alignment mark 8 on the second wafer 4 are observed by receiving the reflected light reflected from the first wafer 3 and the second wafer 4, for example, using an infrared microscope. Then, the relative positions of the first wafer 3 and the second wafer 4 (i.e., relative positions in the direction parallel to the first bonding surface 3s) are adjusted so that the relative positions of the corresponding first alignment mark 6 and the second alignment mark 8 are at a predetermined relative position. In the example shown in Figure 6, the relative positions of the first wafer 3 and the second wafer 4 are adjusted so that the cross-shaped first alignment mark 6 falls within the cross-shaped region 85 (see Figure 4) between the four corresponding square regions 81 to 84.

[0040] Then, as shown in Figure 11, after adjusting the relative positions of the first wafer 3 and the second wafer 4, the first bonding surface 3s and the second bonding surface 4s are bonded together while maintaining the relative positions of the first wafer 3 and the second wafer 4. In this way, the wafer bonding structure 1 is manufactured.

[0041] In the above explanation, the process of forming the MEMS-structured electronic component on the first wafer 3 and the process of forming the MEMS-structured electronic component on the second wafer 4 are omitted because they are not characteristic features of the wafer bonding structure 1.

[0042] (2-4) Comparative Examples Referring to Figure 12, a wafer bonding structure 300 related to a comparative example will be described.

[0043] In the following description, components of the wafer bonding structure 300 in the comparative example that are the same as those in the wafer bonding structure 1 according to the embodiment may be denoted by the same reference numerals and their descriptions may be omitted.

[0044] As shown in Figure 12, the wafer bonding structure 300 according to the comparative example is configured similarly to the wafer bonding structure 1 according to the embodiment, except that the depth D31 of the first outer peripheral portion 307 is different. Reference numeral 307r in Figure 12 indicates the contour of the first outer peripheral portion 307.

[0045] In the comparative example, the active layer 33 is not penetrated in the first outer periphery 307, and the BOX layer 32 is not exposed from the first bonding surface 3s. The first outer periphery 307 is provided with a recess 310 that is recessed to a certain depth from the first bonding surface 3s. Between the bottom surface of the recess 310 and the BOX layer 32, there is an active layer 33 with a predetermined thickness D32.

[0046] Therefore, in the comparative example, as in the embodiment, when infrared C1 is irradiated onto the first wafer 3 from the main surface 3b side on the support layer 31 side of the first wafer 3 using, for example, an infrared microscope, and the first alignment mark 6 of the first wafer 3 is viewed through, the infrared C1 is scattered and absorbed by the active layer 33 of a predetermined thickness D32 between the recess 310 and the BOX layer 32. As a result, when the contour 6r of the first alignment mark 6 is observed with infrared C1, the contour 6r of the first alignment mark 6 (i.e., the boundary line between the first alignment mark 6 and the first outer peripheral portion 307) becomes blurred or completely invisible. Consequently, the visibility of the first alignment mark 6 is reduced. As a result, it is not possible to accurately adjust the relative position between the first alignment mark 6 and the second alignment mark 8.

[0047] In contrast, in the wafer bonding structure 1 according to the embodiment, as described above, the first outer peripheral portion 7 penetrates the active layer 33 and exposes the BOX layer 32 from the first bonding surface 3s (see, for example, Figure 1). That is, the active layer 33 is not included within the first outer peripheral portion 7. Therefore, in this embodiment, when the contour 6r of the first alignment mark 6 is observed by infrared light C1, blurring or complete inability to see the contour 6r of the first alignment mark 6, as in the comparative example, is reduced. In other words, the visibility of the first alignment mark 6 is improved. As a result, the relative position between the first alignment mark 6 and the second alignment mark 8 can be adjusted with high precision.

[0048] (2-5) Reasons why the visibility of the first alignment mark is improved in the embodiment compared to the comparative example. In the embodiments and comparative examples, the dopant concentration in the active layer 33 is relatively high in order to lower the resistivity of the active layer 33. As a result, the dopant reduces the transmittance of infrared rays and causes infrared rays to scatter in the active layer 33. Furthermore, the thermal energy of infrared rays activates the thermal motion of the dopants in the active layer 33, making the reduction in infrared transmittance and the scattering of infrared rays in the active layer 33 even more likely to occur.

[0049] In the comparative example, the thickness of the active layer 33 at the first alignment mark 6 is the same as in the embodiment, but an additional active layer 33 of a predetermined thickness D32 is provided at the first outer periphery 307. Therefore, in the comparative example, compared to the embodiment, when the contour 6r of the first alignment mark 6 (i.e., the boundary line between the first alignment mark 6 and the first outer periphery 307) is observed by infrared C1 (see Figure 12), the contrast between the first alignment mark 6 and the first outer periphery 307 is reduced. Therefore, in the comparative example, compared to the embodiment, the contour 6r of the first alignment mark 6 becomes blurred or completely invisible. In other words, the wafer bonding structure 1 according to the embodiment has a clearer contour 6r of the first alignment mark 6 compared to the comparative example. That is, the wafer bonding structure 1 according to the embodiment has improved visibility of the first alignment mark 6 compared to the comparative example.

[0050] (3) Effects The wafer bonding structure 1 according to Embodiment 1 comprises a first wafer 3 and a second wafer 4. The first wafer 3 has a first bonding surface 3s. The second wafer 4 has a second bonding surface 4s connected to the first bonding surface 3s. The first wafer 3 comprises a support layer 31, a BOX layer 32, and an active layer 33. The first bonding surface 3s is the main surface of the active layer 33 opposite to the side of the BOX layer 32. The first bonding surface 3s is provided with a first alignment mark 6 (alignment mark) and a first outer peripheral portion 7 (outer peripheral portion). The first outer peripheral portion 7 is located on the outer periphery of the first alignment mark 6. The first outer peripheral portion 7 is formed by penetrating the portion of the active layer 33 on the outer periphery of the first alignment mark 6 in the thickness direction F2 of the active layer 33.

[0051] In this configuration, the first outer peripheral portion 7 is formed by penetrating the outer peripheral portion of the active layer 33 of the first alignment mark 6 in the thickness direction F2 of the active layer 33. Therefore, for example, when viewing the first wafer 3 using infrared light C1, the visibility of the first alignment mark 6 provided on the first wafer 3 can be improved.

[0052] In the wafer bonding structure 1 according to Embodiment 1, the lengths M1 and M2 in predetermined directions (first direction D1, second direction D2) perpendicular to the thickness direction F2 of the active layer 33 in the first outer peripheral portion 7 are 1.5 times or more and 5 times or less the lengths L1 and L2 in predetermined directions (first direction D1, second direction D2) in the first alignment mark 6. With this configuration, the balance between the size of the first alignment mark 6 and the first outer peripheral portion 7 can be optimized. As a result, the visibility of the first alignment mark 6 can be improved.

[0053] In the wafer bonding structure 1 according to Embodiment 1, the resistivity of the active layer 33 is 0.1 Ωcm or less. With this configuration, when the resistivity of the active layer 33 is 0.1 Ωcm or less, the visibility of the first alignment mark 6 can be improved.

[0054] (4) Variations In the above embodiment, the visibility of the first alignment mark 6 is improved by configuring the outer periphery 7 of the first wafer 3 so that the active layer 33 penetrates through it in the thickness direction F2 of the active layer 33. However, the visibility of the first alignment mark 6 may also be improved by making the outer periphery 7 a recess without penetrating the active layer 33 in the thickness direction F2 of the active layer 33, and making the lengths M1 and M2 of the outer periphery 7 in predetermined directions (first direction D1, second direction D2) 1.5 times or more and 5 times or less the lengths L1 and L2 of the first alignment mark 6 in the above predetermined directions.

[0055] (5) Aspect This specification discloses the following aspects:

[0056] The wafer bonding structure (1) of the first embodiment comprises a first wafer (3) and a second wafer (4). The first wafer (3) has a first bonding surface (3s). The second wafer (4) has a second bonding surface (4s) connected to the first bonding surface (3s). The first wafer (3) comprises a support layer (31), a BOX layer (32), and an active layer (33). The BOX layer (32) is laminated on the support layer (31). The active layer (33) is laminated on the BOX layer (32). The first bonding surface (3s) is the main surface of the active layer (33) opposite to the side of the BOX layer (32). The first bonding surface (3s) is provided with an alignment mark (6) and an outer peripheral portion (7). The outer peripheral portion (7) is located on the outer periphery of the alignment mark (6). The outer peripheral portion (7) is formed by the outer peripheral portion of the active layer (33) of the alignment mark (6) penetrating the active layer (33) in the thickness direction (F2).

[0057] In this configuration, the outer peripheral portion (7) is constructed such that the outer peripheral portion of the active layer (33) of the alignment mark (6) penetrates the active layer (33) in the thickness direction (F2). Therefore, for example, when the alignment mark (6) provided on the first wafer (3) is viewed by using infrared light (C1) to see through the first wafer (3), the visibility of the alignment mark (6) can be improved.

[0058] In the wafer bonding structure (1) of the second embodiment, in the first embodiment, the lengths (M1, M2) in predetermined directions (D1, D2) perpendicular to the thickness direction (F2) of the active layer (33) in the outer peripheral portion (7) are 1.5 times or more and 5 times or less the lengths (L1, L2) in predetermined directions (D1, D2) at the alignment marks (6).

[0059] This configuration allows for the optimization of the size balance between the alignment mark (6) and the outer periphery (7) in a plan view (i.e., a plan view from the thickness direction F1 of the first wafer 3). As a result, the visibility of the alignment mark (6) can be improved.

[0060] In the wafer bonding structure (1) of the third embodiment, the resistivity of the active layer (33) is 0.1 Ωcm or less, as in the first and second embodiments.

[0061] With this configuration, the visibility of the alignment mark (6) can be improved when the resistivity of the active layer (33) is 0.1 Ωcm or less.

[0062] The wafer bonding structure (1) of the fourth embodiment comprises a first wafer (3) and a second wafer (4). The first wafer (3) has a first bonding surface (3s). The second wafer (4) has a second bonding surface (4s) connected to the first bonding surface (3s). The first wafer (3) comprises a support layer (31), a BOX layer (32), and an active layer (33). The first bonding surface (3s) is the main surface of the active layer (33) opposite to the side of the BOX layer (32). The first bonding surface (3s) is provided with alignment marks (6) and an outer peripheral portion (7). The outer peripheral portion (7) is located on the outer periphery of the alignment marks (6). The lengths (M1, M2) in the predetermined directions (D1, D2) perpendicular to the thickness direction (F2) of the active layer (33) at the outer periphery (7) are 1.5 times or more and 5 times or less the lengths (L1, L2) in the predetermined directions (D1, D2) at the alignment marks (6). [Explanation of Symbols]

[0063] 1. Wafer bonding structure 3. First wafer 3s 1st joint surface 4. Second wafer 4s 2nd joint surface 6. First alignment mark (alignment mark) 7. First outer perimeter (outer perimeter) 31 Support layer 32 BOX layer 33 Active layer D1 1st direction (predetermined direction) D2 Second direction (predetermined direction) F1 Thickness direction of the first wafer F2 Active layer thickness direction L1: Length of the first alignment mark in the first direction (length of the alignment mark in a predetermined direction) L2 The length of the first alignment mark in the second direction (the length of the alignment mark in a predetermined direction) M1 Length of the first outer perimeter in the first direction (length of the outer perimeter in a predetermined direction) M2 Length of the first outer perimeter in the second direction (length of the outer perimeter in a predetermined direction)

Claims

1. A first wafer having a first bonding surface, A second wafer having a second bonding surface connected to the first bonding surface, The first wafer is Supporting layer, A BOX layer laminated on the aforementioned support layer, The box layer comprises an active layer laminated on the box layer, The first bonding surface is the main surface of the active layer opposite to the side of the BOX layer, The first bonding surface has, Alignment marks and An outer peripheral portion is provided, which is positioned on the outer periphery of the alignment mark. The outer periphery is configured such that the outer periphery of the alignment mark within the active layer penetrates in the thickness direction of the active layer. Wafer bonding structure.

2. The length of the active layer in the outer peripheral portion in a predetermined direction perpendicular to the thickness direction is 1.5 times or more and 5 times or less the length of the alignment mark in the predetermined direction. The wafer bonding structure according to claim 1.

3. The resistivity of the active layer is 0.1 Ωcm or less. The wafer bonding structure according to claim 1 or 2.

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