Semiconductor device and its manufacturing method

Abstract

This technology is applicable to superjunction structures composed of high aspect ratio columns. [Solution] A method for manufacturing a semiconductor device 1 having a superjunction structure in which a first conductivity type column 14a and a second conductivity type column 14b are alternately and repeatedly arranged along at least one direction comprises: a first step of forming an intervening film 42 on a second conductivity type semiconductor layer 14A; a second step of forming a shielding film 46 containing a metal on the intervening film after the first step; a third step of forming an opening 52 that penetrates the shielding film after the second step; and a fourth step of ion implanting first conductivity type impurities into the second conductivity type semiconductor layer through the opening to form first conductivity type columns and second conductivity type columns after the third step.

Description

Technical Field

[0001] The technology disclosed in this specification relates to a semiconductor device and a method for manufacturing the same.

Background Art

[0002] A semiconductor device having a super junction structure in which p-type columns and n-type columns are alternately and repeatedly arranged along at least one direction has been proposed. A semiconductor device having a super junction structure can have characteristics of low on-resistance and high breakdown voltage. Patent Document 1 discloses an example of a semiconductor device having a super junction structure.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In order to further improve the characteristics of low on-resistance and high breakdown voltage, it is desirable to increase the aspect ratio of each of the p-type columns and the n-type columns. The super junction structure is formed by ion-implanting an impurity of the other conductivity type (for example, a p-type impurity) into a semiconductor layer of one conductivity type (for example, an n-type semiconductor layer). Conventionally, a photoresist having an opening corresponding to the ion-implantation region is used as a mask for ion implantation. In order to shield the impurity of the conductivity type to be ion-implanted and form a column with a high aspect ratio, it is necessary to increase the thickness of the photoresist and narrow the pitch of the openings formed in the photoresist. For this reason, in the photoresist for forming a column with a high aspect ratio, the aspect ratio of the formed openings also becomes high. According to the study by the present inventors, it has been found that when the aspect ratio of the openings formed in the photoresist becomes high, there is a concern about the collapse of the photoresist.

[0005] This specification provides a technology applicable to superjunction structures composed of high aspect ratio columns. [Means for solving the problem]

[0006] This specification discloses a method for manufacturing a semiconductor device (1) having a superjunction structure in which first conductivity type columns (14a) and second conductivity type columns (14b) are alternately and repeatedly arranged along at least one direction. This manufacturing method may comprise: a first step of forming an intercalation film (42) on a second conductivity type semiconductor layer (14A); a second step of forming a metal-containing shielding film (46, 146) on the intercalation film after the first step; a third step of forming an opening (52) through the shielding film after the second step; and a fourth step of ion implanting first conductivity type impurities into the second conductivity type semiconductor layer through the opening to form the first conductivity type columns and the second conductivity type columns after the third step. The intercalation film may be formed directly on the second conductivity type semiconductor layer or on the second conductivity type semiconductor layer via another layer. The shielding film may also be formed directly on the intercalation film or on the intercalation film via another layer. The shielding film containing metal exhibits high shielding properties against the first conductive impurity. Therefore, the thickness of the shielding film can be reduced. As a result, the aspect ratio of the openings formed in the shielding film is reduced, thereby suppressing the tilting of the shielding film.

[0007] This specification discloses a semiconductor device (1) having a superjunction structure in which first conductivity type columns (14a) and second conductivity type columns (14b) are arranged alternately in at least one direction. Each of the first conductivity type columns and the second conductivity type columns may be silicon carbide. Furthermore, the aspect ratio of each of the first conductivity type columns and the second conductivity type columns may be 8.5 or higher. This semiconductor device has a superjunction structure composed of high aspect ratio columns and can have a withstand voltage of 850V or higher. [Brief explanation of the drawing]

[0008] [Figure 1] A schematic cross-sectional view of the main part of the semiconductor device disclosed herein is shown. [Figure 2] A schematic cross-sectional view of a key part in one step of the method for manufacturing a semiconductor device disclosed herein is shown. [Figure 3] A schematic cross-sectional view of a key part in one step of the method for manufacturing a semiconductor device disclosed herein is shown. [Figure 4] A schematic cross-sectional view of a key part in one step of the method for manufacturing a semiconductor device disclosed herein is shown. [Figure 5] A schematic cross-sectional view of a key part in one step of the method for manufacturing a semiconductor device disclosed herein is shown. [Figure 6] A schematic cross-sectional view of a key part in one step of the method for manufacturing a semiconductor device disclosed herein is shown. [Figure 7] A schematic cross-sectional view of a key part in one step of the method for manufacturing a semiconductor device disclosed herein is shown. [Figure 8] A schematic cross-sectional view of a key part in one step of the method for manufacturing a semiconductor device disclosed herein is shown. [Figure 9] A schematic cross-sectional view of a key part in one step of the method for manufacturing a semiconductor device disclosed herein is shown. [Figure 10] A schematic cross-sectional view of a key part in one step of the method for manufacturing a semiconductor device disclosed herein is shown. [Figure 11] A schematic cross-sectional view of a key part in one step of a modified example of the semiconductor device manufacturing method disclosed herein is shown. [Figure 12] A schematic cross-sectional view of a key part in one step of a modified example of the semiconductor device manufacturing method disclosed herein is shown. [Modes for carrying out the invention]

[0009] The semiconductor devices disclosed herein will be described below with reference to the drawings. For the purpose of clarity in the illustrations, only one of the repeatedly arranged components may be given a reference numeral.

[0010] Figure 1 schematically shows a cross-sectional view of the main part of the semiconductor device 1. The semiconductor device 1 is a type of power semiconductor device called a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), and comprises a semiconductor layer 10, a drain electrode 22 covering the lower surface of the semiconductor layer 10, a source electrode 24 covering the upper surface of the semiconductor layer 10, and a plurality of trench gates 30 provided in the upper part of the semiconductor layer 10.

[0011] The semiconductor layer 10 is a wide-bandgap semiconductor. The semiconductor layer 10 is not particularly limited, but may be, for example, a 4H silicon carbide layer. The semiconductor layer 10 may be replaced with, for example, a nitride semiconductor layer, a gallium oxide layer, a diamond layer, etc. The semiconductor layer 10 is n + A drain region 12 of type p, a drift region 14, a body region 16 of type p, and n + Source area 18 of type and p + It has a body contact area 19 of the type.

[0012] The drain region 12 is located in the lower part of the semiconductor layer 10 and is provided in a position exposed on the lower surface of the semiconductor layer 10. The drain region 12 is in ohmic contact with the drain electrode 22 that covers the lower surface of the semiconductor layer 10. As will be explained in the manufacturing method described later, the drain region 12 is n + A silicon carbide substrate of a certain type, and n crystals grown from its upper surface. + It is composed of an epitaxial layer of type and

[0013] The drift region 14 is provided between the drain region 12 and the body region 16 and has a plurality of p-type columns 14a and a plurality of n-type columns 14b. The p-type column 14a is an example of a column of the first conductivity type, and the n-type column 14b is an example of a column of the second conductivity type. The p-type columns 14a and the n-type columns 14b are arranged to alternately repeat along at least one direction within the cross-section of the semiconductor layer 10, constituting a superjunction structure. The plurality of p-type columns 14a and the plurality of n-type columns 14b are not particularly limited when viewed from a direction orthogonal to the upper surface of the semiconductor layer 10 (hereinafter referred to as "when viewed in plan view"), and may be arranged, for example, in a stripe shape.

[0014] The p-type column 14a has a height 14H measured along the thickness direction of the semiconductor layer 10 from the lower surface to the upper surface which is the interface with the body region 16. The p-type column 14a has a width 14W measured between side surfaces which are interfaces with the n-type columns 14b along the repetition direction of the superjunction structure. The height 14H of the p-type column 14a is not particularly limited, but is, for example, 3.4 μm or more. The width 14W of the p-type column 14a is not particularly limited, but is, for example, 0.4 μm or less. Therefore, the aspect ratio of the p-type column 14a is 8.5 or more. The height and width of the n-type column 14b are the same. Such a superjunction structure with such dimensions enables the breakdown voltage of the semiconductor device 1 calculated from the dielectric breakdown field of silicon carbide to be 850 V or more.

[0015] The body region 16 is provided on the drift region 14 and is arranged in the upper layer portion of the semiconductor layer 10. The body region 16 is provided between the n-type column 14b of the drift region 14 and the source region 18, separating the n-type column 14b and the source region 18. The concentration of p-type impurities in the body region 16 is adjusted according to the desired gate threshold voltage.

[0016] The source region 18 is located on the body region 16, positioned in the upper part of the semiconductor layer 10, and exposed on the upper surface of the semiconductor layer 10. The source region 18 is in contact with the side surface of the trench gate 30. The source region 18 is in ohmic contact with the source electrode 24 that covers the upper surface of the semiconductor layer 10.

[0017] The body contact region 19 is provided on the body region 16, positioned in the upper part of the semiconductor layer 10, and exposed on the upper surface of the semiconductor layer 10. The body contact region 19 is in ohmic contact with the source electrode 24 that covers the upper surface of the semiconductor layer 10.

[0018] The trench gate 30 is filled in a trench formed in the upper part of the semiconductor layer 10, and penetrates the source region 18 and the body region 16 to reach the n-type column 14b of the drift region 14. In this example, when the semiconductor layer 10 is viewed from above, the trench gate 30 extends along the longitudinal direction of the p-type column 14a and the n-type column 14b, i.e., in a direction perpendicular to the repeating direction of the superjunction structure. Alternatively, when the semiconductor layer 10 is viewed from above, the trench gate 30 may extend along the repeating direction of the p-type column 14a and the n-type column 14b. The trench gate 30 has a gate electrode 32 and a gate insulating film 34. The gate electrode 32 is formed of polysilicon containing impurities and faces the semiconductor layer 10 via the gate insulating film 34. In particular, the gate electrode 32 faces the portion of the body region 16 that separates the n-type column 14b of the drift region 14 from the source region 18 via the gate insulating film 34. The gate insulating film 34 is made of silicon oxide and covers the inner wall of the trench.

[0019] Next, the operation of the semiconductor device 1 will be explained with reference to Figure 1. When the potential of the drain electrode 22 is positive compared to the potential of the source electrode 24, and the potential of the gate electrode 32 of the trench gate 30 is positive compared to the source electrode 24 and controlled to be higher than a threshold, the semiconductor device 1 turns on. At this time, an inversion layer is formed in the body region 16 in the portion separating the n-type column 14b of the drift region 14 from the source region 18. Electrons supplied from the source region 18 reach the n-type column 14b of the drift region 14 via the channel of the inversion layer. Electrons that reach the n-type column 14b flow through the n-type column 14b to the drain region 12. Since the n-type column 14b has a high concentration of n-type impurities, the semiconductor device 1 can have low on-resistance characteristics.

[0020] When the potential of the gate electrode 32 of the trench gate 30 is controlled to be the same as the potential of the source electrode 24, the channel in the inversion layer disappears, and the semiconductor device 1 turns off. The multiple p-type columns 14a and multiple n-type columns 14b constituting the superjunction structure are substantially completely depleted, and a wide area of ​​the drift region 14 is depleted. Furthermore, since the drift region 14 has a superjunction structure, the electric field distribution of the drift region 14 is leveled in the depth direction. As a result, the drift region 14 can bear a large potential difference, and the semiconductor device 1 can have high breakdown voltage characteristics.

[0021] (Method of manufacturing semiconductor devices) Next, with reference to Figures 2 to 10, the process of forming the superjunction structure in the manufacturing method of the semiconductor device 1 will be described. As detailed below, the superjunction structure is composed of p-type columns and n-type columns formed in the lower epitaxial layer and the upper epitaxial layer, respectively, which are connected vertically. For other processes for manufacturing the semiconductor device 1, known manufacturing techniques can be used as needed.

[0022] First, prepare the drain region 12 as shown in Figure 2. The drain region 12 is n + From the surface of a silicon carbide substrate of type n +An n-type epitaxial layer is formed by crystal growth. Next, using epitaxial growth technology, an n-type lower epitaxial layer 14A is crystal grown from the surface of the drain region 12. The thickness of the lower epitaxial layer 14A is not particularly limited, but may be, for example, 1.8 μm. The lower epitaxial layer 14A constitutes at least a part of the semiconductor layer 10 and is sometimes referred to as an n-type semiconductor layer.

[0023] Next, as shown in Figure 3, an intervening film 42 is formed on the lower epitaxial layer 14A using a deposition technique such as CVD. The intervening film 42 is not particularly limited, but may be an oxide film such as silicon oxide. The thickness of the intervening film 42 is not particularly limited, but may be, for example, 50 nm.

[0024] Next, as shown in Figure 4, a bonding film 44 is formed on the intervening film 42 using a deposition technique such as sputtering. The bonding film 44 is provided between the shielding film 46 (described later) and the intervening film 42 to improve the adhesion between the shielding film 46 and the intervening film 42. The bonding film 44 may consist of a single film containing a metal, or it may consist of multiple films containing metals stacked on top of each other. The metal contained in the bonding film 44 is a metal that forms an oxide with a higher free energy of formation (|ΔG|) than the oxide of the intervening film 42 (silicon oxide in this example) (i.e., a metal that is easily oxidized). For example, the metal contained in the bonding film 44 may include at least one selected from the group consisting of Sn, Ge, In, Cs, Zn, Mn, Ga, Cr, Nb, Na, Ta, B, V, Ti, Ba, Zr, Al, Hf, Li, Sr, La, Mg, Be, Ca, and Y. The bonding film 44 is not particularly limited, but may be a single film of these metals (e.g., a Ti film or a Ta film) or a nitride film of these metals (e.g., a TiN film or a TaN film). The thickness of the bonding film 44 is not particularly limited, but may be, for example, 100 nm.

[0025] Next, as shown in Figure 5, a shielding film 46 is formed on the bonding film 44 using a deposition technique such as sputtering, CVD, or ALD. The shielding film 46 is a film containing metal. The shielding film 46 is not particularly limited, but may be a single film of tungsten, for example. The thickness of the shielding film 46 is not particularly limited, but may be 1.1 μm, for example.

[0026] Next, as shown in Figure 6, a mask 48 is patterned on the shielding film 46 using photolithography. The mask 48 has openings corresponding to the formation area of ​​the p-type column 14a (see Figure 1). The mask 48 is not particularly limited, but may be an oxide film such as silicon oxide.

[0027] Next, as shown in Figure 7, an opening 52 is formed through the shielding film 46 exposed from the opening in the mask 48 using etching techniques such as the RIE method. In this example, the opening 52 penetrates the bonding film 44 in addition to the shielding film 46, but not the intervening film 42. The bottom surface of the opening 52 is located within the intervening film 42, and a portion of the intervening film 42 remains on the lower epitaxial layer 14A. Alternatively, the opening 52 may penetrate the intervening film 42.

[0028] Next, as shown in Figure 8, ion implantation technology is used to implant p-type impurities into the lower epitaxial layer 14A through the opening 52. The p-type impurities are not particularly limited, but may be aluminum, for example. The region of the lower epitaxial layer 14A into which the p-type impurities have been introduced becomes a p-type column 14a, and the region sandwiched between the p-type columns 14a becomes an n-type column 14b. As a result, a structure is formed in the lower epitaxial layer 14A in which p-type columns 14a and n-type columns 14b are alternately and repeatedly arranged along one direction.

[0029] Next, as shown in Figure 9, the intervening film 42, bonding film 44, shielding film 46, and mask 48 deposited on the lower epitaxial layer 14A are removed using the lift-off method. Specifically, the intervening film 42 is etched using an etching solution (e.g., hydrofluoric acid) with a higher etching rate for the intervening film 42 than for the shielding film 46, thereby removing the bonding film 44, shielding film 46, and mask 48 stacked on the intervening film 42.

[0030] Next, as shown in Figure 10, the upper epitaxial layer 14B is crystallized on the lower epitaxial layer 14A using epitaxial growth technology, and then a structure is formed in which p-type columns 14a and n-type columns 14b are alternately and repeatedly arranged in one direction within the upper epitaxial layer 14B. Such an upper epitaxial layer 14B is formed by repeating each of the processes described in Figures 2 to 8. As a result, the p-type columns 14a and n-type columns 14b formed in the lower epitaxial layer 14A and the upper epitaxial layer 14B are connected vertically to form a superjunction structure.

[0031] Subsequently, a body region 16 containing p-type impurities is formed on the upper epitaxial layer 14B using epitaxial growth technology, and a source region 18 and a body contact region 19 are formed in a predetermined region within the body region 16 using ion implantation technology, thereby completing the semiconductor device 1 by forming various electrode structures (trench gate 30, drain electrode 22, and source electrode 24).

[0032] In the above manufacturing method, a metal-containing shielding film 46 is used as a shielding film for ion implantation. The metal-containing shielding film 46 has high shielding properties against p-type impurities (aluminum in this example). Therefore, even if the thickness of the shielding film 46 is thin, it is possible to sufficiently shield against p-type impurities and prevent them from being implanted into the non-ion-implanted regions of the epitaxial layers 14A and 14B. Because the thickness of the shielding film 46 is thin, the aspect ratio of the openings 52 formed in the shielding film 46 is low. As a result, the occurrence of situations such as the partition walls between the openings 52 of the shielding film 46 tilting is suppressed.

[0033] In the above manufacturing method, an intervening film 42 is provided between the epitaxial layers 14A and 14B and the shielding film 46. The presence of the intervening film 42 suppresses metal contamination by metals (tungsten in this example) contained in the shielding film 46 that penetrate into the epitaxial layers 14A and 14B. For example, if metals contained in the shielding film 46 remain between the lower epitaxial layer 14A and the upper epitaxial layer 14B, there is a concern that the charge balance of the superjunction structure will be disrupted, and the breakdown voltage of the semiconductor device 1 will decrease. For this reason, the above manufacturing method is particularly useful when forming a superjunction structure in two stages.

[0034] In the above manufacturing method, when an opening 52 is formed in the shielding film 46, the intervening film 42 remains on the epitaxial layers 14A and 14B. According to this method, the intervening film 42 can function as a protective film when forming the opening 52 in the shielding film 46. Therefore, damage to the upper surface of the epitaxial layers 14A and 14B when forming the opening 52 in the shielding film 46 is suppressed. In addition, the intervening film 42 remaining on the epitaxial layers 14A and 14B can function as a through-film when ion implanting p-type impurities. Therefore, damage to the upper surface of the epitaxial layers 14A and 14B during ion implantation is also suppressed.

[0035] In the above manufacturing method, since the shielding film 46 is formed on the intervening film 42, the shielding film 46 can be easily removed by etching the intervening film 42. To utilize such a lift-off method, high adhesion between the intervening film 42 and the shielding film 46 is desirable. In the above manufacturing method, a bonding film 44 is provided between the intervening film 42 and the shielding film 46, thereby increasing the adhesion between the intervening film 42 and the shielding film 46. When the material of the bonding film 44 is a single metal film (for example, a Ti film or a Ta film), oxygen is extracted from the oxide film of the intervening film 42 and the bonding film 44 is oxidized, causing the interface between the intervening film 42 and the bonding film 44 to mix, resulting in high adhesion between the intervening film 42 and the bonding film 44. On the other hand, if the oxidation of the bonding film 44 progresses and an oxide film is formed on the upper surface of the bonding film 44, i.e., at the interface between the bonding film 44 and the shielding film 46, the adhesion between the bonding film 44 and the shielding film 46 may decrease. Therefore, the material of the bonding film 44 may be a metal nitride film (for example, a TiN film or a TaN film). This suppresses the formation of an oxide film between the bonding film 44 and the shielding film 46, and provides high adhesion between the bonding film 44 and the shielding film 46.

[0036] Figure 11 is a cross-sectional view of the main part corresponding to Figure 5 of the above manufacturing method. In this example of manufacturing method, the bonding film 144 has a first bonding film 144a and a second bonding film 144b. The first bonding film 144a is located on the intervening film 42 side, is provided between the intervening film 42 and the second bonding film 144b, and is in contact with the intervening film 42. The second bonding film 144b is located on the shielding film 46 side, is provided between the first bonding film 144a and the shielding film 46, and is in contact with the shielding film 46. The first bonding film 144a is a single metal film (e.g., a Ti film or a Ta film), and the second bonding film 144b is a metal nitride film (e.g., a TiN film or a TaN film). The first bonding film 144a, being a single metal film, exhibits high adhesion to the intervening film 42 due to the mixing effect, and the second bonding film 144b, being a metal nitride film, exhibits high adhesion to the shielding film 46 by suppressing the formation of oxide films. Thus, when the bonding film 144 is composed of a single metal film and a metallic nitride film, the adhesion between the intervening film 42 and the shielding film 46 is improved.

[0037] Figure 12 is a cross-sectional view of the main part corresponding to Figures 5 and 11 of the above manufacturing method. In this example of the manufacturing method, bonding films 44 and 144 are not provided, and the shielding film 146 is in contact with the intervening film 42. The material of the shielding film 146 is tungsten silicide (WSi2). Tungsten silicide exhibits good adhesion to oxide films. Therefore, when the material of the shielding film 146 is tungsten silicide, bonding films 44 and 144 are unnecessary. For this reason, this manufacturing method allows for the production of semiconductor devices 1 at a low manufacturing cost. Although the tungsten silicide shielding film 146 has slightly inferior shielding properties against p-type impurities compared to the tungsten shielding film 46, it has sufficient shielding properties compared to, for example, a resist. In addition, the tungsten silicide shielding film 146 has the advantage of producing sharper edge roughness compared to the tungsten silicide shielding film 146.

[0038] The following summarizes the features of the technology disclosed in this specification. Note that each of the technical elements described below is an independent technical element, and exhibits technical usefulness either individually or in various combinations.

[0039] (Aspect 1) A method for manufacturing a semiconductor device (1) having a superjunction structure in which first conductive column (14a) and second conductive column (14b) are repeatedly arranged alternately along at least one direction, A first step involves forming an intervening film (42) on a second conductivity type semiconductor layer (14A), A second step is to form a shielding film (46, 146) containing metal on the intervening film, A third step is to form an opening (52) that penetrates the shielding film after the second step, A method for manufacturing a semiconductor device, comprising: a fourth step after the third step, ion implantation of a first conductivity type impurity into the second conductivity type semiconductor layer through the opening to form a first conductivity type column and a second conductivity type column.

[0040] (Aspect 2) A method for manufacturing a semiconductor device according to embodiment 1, further comprising a fifth step of etching the intervening film to lift off the shielding film after the fourth step.

[0041] (Aspect 3) The method further comprises a sixth step of forming a second conductivity type epitaxial layer (14B) on the second conductivity type semiconductor layer after the fifth step, A method for manufacturing a semiconductor device according to embodiment 2, wherein when the second conductivity type epitaxial layer is the second conductivity type semiconductor layer, the first conductivity type column and the second conductivity type column formed in the second conductivity type semiconductor layer and the second conductivity type epitaxial layer, respectively, are connected to form the superjunction structure by further carrying out the first to fifth steps.

[0042] (Aspect 4) The second conductive semiconductor layer is silicon carbide, A method for manufacturing a semiconductor device according to any one of embodiments 1 to 3, wherein the aspect ratio of each of the first conductive column and the second conductive column is 8.5 or greater.

[0043] (Appendix 5) A method for manufacturing a semiconductor device according to any one of embodiments 1 to 4, wherein the metal contained in the shielding film contains at least tungsten.

[0044] (Aspect 6) A method for manufacturing a semiconductor device according to any one of embodiments 1 to 5, wherein the intervening film is an oxide film.

[0045] (Aspect 7) The process further includes a step of forming a bonding film (44, 144) between the first and second steps, The shielding film is a single metal film of tungsten, The method for manufacturing a semiconductor device according to embodiment 6, wherein the bonding film comprises at least one selected from the group consisting of Sn, Ge, In, Cs, Zn, Mn, Ga, Cr, Nb, Na, Ta, B, V, Ti, Ba, Zr, Al, Hf, Li, Sr, La, Mg, Be, Ca, and Y.

[0046] (Pattern 8) The method for manufacturing a semiconductor device according to embodiment 7, wherein the bonding film is a metal nitride film of Ti or Ta.

[0047] (Aspect 9) The bonding film (144) comprises a first bonding film (144a) located on the intervening film side and a second bonding film (144b) located on the shielding film side. The first bonding film is a single metal film, The method for manufacturing a semiconductor device according to embodiment 7, wherein the second bonding film is a metal nitride film.

[0048] (Aspect 10) The first bonding film is a single metal film of Ti or Ta, The method for manufacturing a semiconductor device according to embodiment 9, wherein the second bonding film is a Ti or Ta nitride film.

[0049] (Aspect 11) The method for manufacturing a semiconductor device according to embodiment 5, wherein the shielding film (146) is tungsten silicide.

[0050] (Aspect 12) The method for manufacturing a semiconductor device according to embodiment 11, wherein the shielding film is in contact with the intervening film.

[0051] (Aspect 13) In the third step, the intervening film is left on the second conductivity type semiconductor layer. A method for manufacturing a semiconductor device according to any one of embodiments 1 to 12, wherein in the fourth step, the first conductivity type impurity is ion-implanted by passing through the remaining intervening film.

[0052] (Aspect 14) A method for manufacturing a semiconductor device according to any one of embodiments 1 to 13, wherein the second conductive semiconductor layer is a wide bandgap semiconductor.

[0053] (Aspect 15) A semiconductor device (1) having a superjunction structure in which first conductive type columns (14a) and second conductive type columns (14b) are arranged alternately in at least one direction, Each of the first conductive column and the second conductive column is silicon carbide, A semiconductor device in which the aspect ratio of the first conductive column and the second conductive column is 8.5 or greater.

[0054] (Aspect 16) The semiconductor device according to embodiment 15, wherein the width of the first conductive column is 0.4 μm or less.

[0055] (Aspect 17) The semiconductor device according to embodiment 15 or 16, wherein the height of the first conductive column is 3.4 μm or more.

[0056] Although specific examples of the present invention have been described in detail above, these are merely illustrative and do not limit the scope of the claims. The technologies described in the claims include various modifications and changes to the specific examples illustrated above. Furthermore, the technical elements described in this specification or drawings exhibit technical usefulness individually or in various combinations, and are not limited to the combinations described in the claims at the time of filing. In addition, the technologies illustrated in this specification or drawings can achieve multiple objectives simultaneously, and achieving even one of these objectives itself constitutes technical usefulness. [Explanation of Symbols]

[0057] 1: Semiconductor device, 10: Semiconductor layer, 12: Drain region, 14: Drift region, 14a: p-type column, 14b: n-type column, 16: Body region, 18: Source region, 19: Body contact region, 22: Drain electrode, 24: Source electrode, 30: Trench gate, 32: Gate electrode, 34: Gate insulating film

Claims

1. A method for manufacturing a semiconductor device (1) having a superjunction structure in which a first conductive column (14a) and a second conductive column (14b) are repeatedly arranged alternately along at least one direction, A first step involves forming an intervening film (42) on a second conductive semiconductor layer (14A), A second step is to form a shielding film (46, 146) containing metal on the intervening film, A third step is to form an opening (52) that penetrates the shielding film, after the second step described above. A method for manufacturing a semiconductor device, comprising: a fourth step after the third step, ion implantation of a first conductivity type impurity into the second conductivity type semiconductor layer through the opening to form a first conductivity type column and a second conductivity type column.

2. The method for manufacturing a semiconductor device according to claim 1, further comprising a fifth step of etching the intervening film to lift off the shielding film after the fourth step.

3. The method further comprises a sixth step of forming a second conductivity type epitaxial layer (14B) on the second conductivity type semiconductor layer after the fifth step, The method for manufacturing a semiconductor device according to claim 2, wherein when the second conductivity type epitaxial layer is the second conductivity type semiconductor layer, the first conductivity type column and the second conductivity type column formed in the second conductivity type semiconductor layer and the second conductivity type epitaxial layer are connected to form the superjunction structure by further carrying out the first to fifth steps.

4. The second conductive semiconductor layer is silicon carbide, The method for manufacturing a semiconductor device according to claim 1, wherein the aspect ratio of each of the first conductive column and the second conductive column is 8.5 or greater.

5. The method for manufacturing a semiconductor device according to claim 1, wherein the metal contained in the shielding film includes at least tungsten.

6. The method for manufacturing a semiconductor device according to claim 1, wherein the intervening film is an oxide film.

7. The process further includes a step of forming a bonding film (44, 144) between the first step and the second step, The shielding film (46) is a single metal film of tungsten, The method for manufacturing a semiconductor device according to claim 6, wherein the bonding film comprises at least one selected from the group consisting of Sn, Ge, In, Cs, Zn, Mn, Ga, Cr, Nb, Na, Ta, B, V, Ti, Ba, Zr, Al, Hf, Li, Sr, La, Mg, Be, Ca, and Y.

8. The method for manufacturing a semiconductor device according to claim 7, wherein the bonding film is a Ti or Ta nitride film.

9. The bonding film (144) comprises a first bonding film (144a) located on the intervening film side and a second bonding film (144b) located on the shielding film side. The first bonding film is a single metal film, The method for manufacturing a semiconductor device according to claim 7, wherein the second bonding film is a metallic nitride film.

10. The first bonding film is a single metal film of Ti or Ta, The method for manufacturing a semiconductor device according to claim 9, wherein the second bonding film is a Ti or Ta nitride film.

11. The method for manufacturing a semiconductor device according to claim 5, wherein the shielding film (146) is tungsten silicide.

12. The method for manufacturing a semiconductor device according to claim 11, wherein the shielding film is in contact with the intervening film.

13. In the third step, the intervening film is left on the second conductive semiconductor layer. The method for manufacturing a semiconductor device according to claim 1, wherein in the fourth step, the first conductivity type impurity is ion-implanted by passing through the remaining intervening film.

14. The method for manufacturing a semiconductor device according to any one of claims 1 to 13, wherein the second conductive semiconductor layer is a wide bandgap semiconductor.

15. A semiconductor device (1) having a superjunction structure in which first conductive type columns (14a) and second conductive type columns (14b) are arranged alternately in at least one direction, Each of the first conductive column and the second conductive column is silicon carbide, A semiconductor device in which the aspect ratio of the first conductive column and the second conductive column is 8.5 or greater.

16. The semiconductor device according to claim 15, wherein the width of the first conductive column is 0.4 μm or less.

17. The semiconductor device according to claim 15 or 16, wherein the height of the first conductive column is 3.4 μm or more.

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