semiconductor element

Abstract

To provide semiconductor devices. [Solution] The semiconductor device comprises a substrate structure including a semiconductor layer, a source structure, a drain structure, and a gate structure. The source structure, drain structure, and gate structure are located above the semiconductor layer of the substrate structure and are arranged along a first direction. The gate structure is located between the source structure and the drain structure. The drain structure includes a plurality of first island structures and a plurality of second island structures arranged alternately and spaced apart along a second direction substantially perpendicular to the first direction. Each first island structure includes a p-type semiconductor layer and a first metal electrode located above the p-type semiconductor layer, and each second island structure includes a second metal electrode. In a conductive state, the potential of the first metal electrode of the first island structure is different from the potential of the second metal electrode of the second island structure.

Description

[Technical Field]

[0001] This disclosure relates to semiconductor devices. [Background technology]

[0002] III-V (III-V) semiconductor compounds are widely used in integrated circuit elements such as high-power field-effect transistors, high-frequency transistors, and high-electron mobility transistors (HEMTs) due to their semiconductor properties. In high-electron mobility transistors, gallium nitride-based materials have attracted particular attention in recent years because they have a wide band gap, a high saturation rate, and can be applied to high-frequency and high-power-density operation. However, in order to adapt to increased volume density, it is necessary to further reduce the energy consumption and on-state resistance of high-electron mobility transistors. [Overview of the project] [Means for solving the problem]

[0003] One aspect of the present disclosure relates to a semiconductor device comprising: a substrate structure including a semiconductor layer; a source structure located above the semiconductor layer of the substrate structure; a plurality of first island structures located above the semiconductor layer and arranged along a first direction with respect to the source structure, each including a p-type semiconductor layer and a first metal electrode located above the p-type semiconductor layer; a plurality of second island structures including a second metal electrode, wherein the first and second island structures are arranged alternately at intervals along a second direction substantially perpendicular to the first direction, and in a conductive state, the potential of the first metal electrode of each first island structure is different from the potential of the second metal electrode of each second island structure; and a gate structure located in the semiconductor layer and between the source structure and the drain structure.

[0004] Another aspect of the present disclosure relates to a semiconductor device comprising: a substrate structure including a semiconductor layer; a source structure located above the semiconductor layer of the substrate structure; a plurality of first island structures located above the semiconductor layer and arranged along a first direction with respect to the source structure, each including a drain metal connection line, a p-type semiconductor layer, and at least one first drain through-hole located above the p-type semiconductor layer and in contact with the p-type semiconductor layer and connected to the drain metal connection line; a plurality of second island structures including a metal electrode and at least one second drain through-hole located above the metal electrode and in contact with the metal electrode and connected to the drain metal connection line, wherein the first and second island structures are arranged alternately and spaced apart along a second direction substantially perpendicular to the first direction, and in a conductive state, the potential of at least one contact surface between the at least one first drain through-hole of each first island structure and the p-type semiconductor layer is different from the potential of the metal electrode of each second island structure; and a gate structure located in the semiconductor layer and between the source structure and the drain structure.

[0005] The drawings illustrate one or more embodiments of the present disclosure and are used together with the written description to interpret the principles of the present disclosure. The same reference numerals are used throughout the drawings whenever possible to refer to similar or identical elements of the embodiments. [Brief explanation of the drawing]

[0006] [Figure 1] This is a plan view of a semiconductor device according to several embodiments of the present disclosure. [Figure 2] This is a partial cross-sectional view of a semiconductor device according to several embodiments of the present disclosure. [Figure 3] This is a partial cross-sectional view of a semiconductor device according to several embodiments of the present disclosure. [Figure 4] This is a partial cross-sectional view of a semiconductor device according to several embodiments of the present disclosure. [Figure 5] These are schematic diagrams of equivalent circuits of semiconductor devices according to some embodiments of the present disclosure. [Figure 6] This is a partial cross-sectional view of a semiconductor device according to several other embodiments of the present disclosure. [Figure 7] This is a plan view of a semiconductor device according to several other embodiments of the present disclosure. [Modes for carrying out the invention]

[0007] Refer to Figures 1 to 5. Figure 1 is a plan view of a semiconductor device 10 according to several embodiments of the present disclosure. Figures 2, 3, and 4 are partial cross-sectional views of the semiconductor device 10 along line segments A-A', B-B', and C-C' in Figure 1, respectively. Figure 5 is a schematic equivalent circuit diagram of the semiconductor device 10.

[0008] As shown in Figure 1, the semiconductor element 10 comprises a substrate structure 100, a source structure 110, a drain structure 120, and a gate structure 130. Furthermore, the source structure 110, the drain structure 120, and the gate structure 130 are located above the semiconductor layer 108 of the substrate structure 100 and are arranged along a first direction D1. The gate structure 130 is located between the source structure 110 and the drain structure 120. The source structure 110 and the gate structure 130 each extend along a second direction D2. As shown in Figure 1, the first direction D1 is substantially perpendicular to the gate width direction, and the second direction D2 is substantially parallel to the gate width direction.

[0009] In some embodiments, the substrate structure 100 includes a semiconductor stack. For example, as shown in Figures 2 and 3, the substrate structure 100 includes a substrate 102, a buffer layer 104, a semiconductor layer 106, and a semiconductor layer 108. The buffer layer 104 is located above the substrate 102. The semiconductor layer 106 is located above the buffer layer 104. The semiconductor layer 108 is located above the semiconductor layer 106. In some embodiments, the semiconductor layers 106 and 108 include a III-V semiconductor compound. For example, semiconductor layer 106 may contain gallium nitride (GaN), and semiconductor layer 108 may contain aluminum gallium nitride (AlGaN). In this way, semiconductor layer 106 and semiconductor layer 108 form a heterostructure, and their interface has a high two-dimensional electron gas (2DEG) channel. As a result, semiconductor device 10 has lower energy consumption and higher power density than silicon-based semiconductor devices.

[0010] In some embodiments, the source structure 110 includes a source electrode 111, a source through-hole 112, and a source metal connection wire 113. As shown in Figure 1, the source electrode 111 is a long, elongated material extending along a second direction D2. The source structure 110 may include a plurality of source through-holes 112 arranged along the second direction D2. As shown in Figures 2 and 3, the source metal connection wire 113 is located above the source electrode 111 and is electrically connected to the source electrode 111 via the source through-hole 112. In some embodiments, the material of the source electrode 111 and the source metal connection wire 113 may include, but are not limited to, titanium, titanium nitride, aluminum, copper, or a combination thereof.

[0011] In some embodiments, the drain structure 120 includes a first island structure 121, a second island structure 122, and a drain metal connecting wire 123. As shown in Figure 1, the first island structure 121 and the second island structure 122 are arranged alternately along a second direction D2. There is a gap G between the first island structure 121 and the second island structure 122. Detailed features of the first island structure 121 and the second island structure 122 will be described in subsequent paragraphs.

[0012] In some embodiments, the gate structure 130 includes a gate semiconductor 131 and a gate metal electrode 132. As shown in Figure 1, the gate semiconductor 131 and the gate metal electrode 132 are elongated materials extending along a second direction D2. As shown in Figures 2 and 3, the gate metal electrode 132 is located above the gate semiconductor 131. In some embodiments, the gate semiconductor 131 includes, but is not limited to, gallium nitride or p-type doped gallium nitride, and the gate metal electrode 132 includes, but is not limited to, titanium, titanium nitride, aluminum, copper, or a combination thereof.

[0013] As shown in Figure 2, the first island structure 121 includes a p-type semiconductor layer 121a, a metal electrode 121b located above the p-type semiconductor layer 121a, and a drain through-hole 121c located above the metal electrode 121b. In some embodiments, the p-type semiconductor layer 121a is made of gallium nitride having a p-type dopant. In some embodiments, the metal electrode 121b includes, but is not limited to, titanium, titanium nitride, aluminum, copper, or a combination thereof. The metal electrode 121b contacts the upper surface of the p-type semiconductor layer 121a to form a Schottky barrier diode (SBD). The bottom surface of the p-type semiconductor layer 121a contacts the semiconductor layer 108. The metal electrode 121b and the p-type semiconductor layer 121a are electrically connected to a drain metal connection wire 123 via the drain through-hole 121c. In some embodiments, the metal electrode 121b can be omitted, and the drain through-hole 121c is provided directly on the p-type semiconductor layer 121a along the dashed line in Figure 2 and in contact with the upper surface of the p-type semiconductor layer 121a, and the drain through-hole 121c and the p-type semiconductor layer 121a form a Schottky barrier diode.

[0014] As shown in Figure 3, the second island structure 122 includes a metal electrode 122a and a drain through-hole 122b located above the metal electrode 122a. The metal electrode 122a contacts the semiconductor layer 108 to form an ohmic contact. In some embodiments, the metal electrode 122a includes, but is not limited to, titanium, titanium nitride, aluminum, copper, or a combination thereof. The metal electrode 122a is electrically connected to a drain metal connection wire 123 via the drain through-hole 122b.

[0015] As shown in Figure 4, the first island structure 121 and the second island structure 122 are arranged in a staggered pattern with spacing along the second direction D2 and are connected to the drain metal connection line 123. In a cross-section along the line segment C-C', the metal electrode 122a of the second island structure 122 has a connected lower and upper part, the lower part is in direct contact with the semiconductor layer 108, and the upper part is located above the lower part and is in contact with the drain through-hole 122b. There is a gap G between the edge of the upper part and the edge of the p-type semiconductor layer 121a of the first island structure 121. In other words, the orthographic region of the metal electrode 122a of the second island structure 122 in the substrate structure 100 and the orthographic region of the p-type semiconductor layer 121a of the first island structure 121 in the substrate structure 100 are separated from each other and do not overlap. In some embodiments, as shown in Figure 4, the upper surface of the upper part of the metal electrode 122a is higher than the upper surface of the metal electrode 121b. In other words, the bottom of drain through hole 122b is higher than the bottom of drain through hole 121c.

[0016] In this configuration, the first island-shaped structure 121 and the second island-shaped structure 122 are separated from each other and electrically connected to the drain metal connection wire 123 via drain through-holes 121c and 122b, respectively. Therefore, in a conductive state, the metal electrode 121b of the first island-shaped structure 121 and the metal electrode 122a of the second island-shaped structure 122 may have different potentials. See Figure 5 for details. The current flows through the drain metal connection wire 123 (potential value V) via two paths. 123 (having) a two-dimensional electron gas channel (potential value V 2DEG The current can flow through the drain through-hole 121c and the Schottky barrier diode SD formed by the metal electrode 121b and the p-type semiconductor layer 121a. The current can flow through the drain through-hole 122b and the metal electrode 122a. Therefore, the potential value V of the metal electrode 121b 121b The potential value V of the metal electrode 122a is 122a This may differ from the above. In some embodiments, the resistance value R of the drain through hole 121c is adjusted by adjusting the characteristics of the first island structure 121 and the second island structure 122. 121cis the resistance value R of the drain through-hole 122b 122b becomes larger. In this way, since the current value I1 flowing through the left path is smaller than the current value I2 of the right path, the energy consumption of the first island structure 121 can be reduced. Further, by providing the drain through-hole 121c as a protection resistor, an overshoot of the voltage due to an abnormal disturbance of the drain metal connection line 123 can be suppressed, and damage to the Schottky barrier diode SD can be avoided. Also, in an embodiment where the metal electrode 121b is omitted, in order to achieve the same purpose, the potential of the contact surface between the drain through-hole 121c and the p-type semiconductor layer 121a may be different from the potential of the metal electrode 122a.

[0017] Please refer to FIGS. 1 and 4 again. In order to achieve the above object, the characteristics of the first island structure 121 and the second island structure 122 can be further described.

[0018] As shown in FIG. 1, in some embodiments, the contact area between the drain through-hole 121c and the metal electrode 121b (or the bottom area of the drain through-hole 121c) is smaller than the contact area between the drain through-hole 122b and the second metal electrode 122a (or the bottom area of the drain through-hole 122b), so the resistance value of the drain through-hole 121c is larger than the resistance value of the drain through-hole 122b. In an embodiment where the metal electrode 121b is omitted, in order to achieve the same effect, the contact area between the drain through-hole 121c and the p-type semiconductor layer 121a is set to be smaller than the contact area between the drain through-hole 122b and the metal electrode 122a. Similarly, as shown in FIG. 4, in some embodiments, the cross-sectional area of the drain through-hole 121c is smaller than the cross-sectional area of the drain through-hole 122b. In some embodiments, the height of the drain through-hole 121c may be larger than the height of the drain through-hole 122b.

[0019] On the one hand, as shown in FIG. 1, in some embodiments, the width W1 of each first island structure 121 along the first direction D1 is substantially equal to the width W2 of each second island structure 122 along the first direction D1. For example, the width W1 is between 0.1 μm and 3 μm, and the width W2 is between 0.1 μm and 3 μm. In some embodiments, the length L1 of each first island structure 121 along the second direction D2 is smaller than the length L2 of each second island structure 122 along the second direction D2. For example, the length L1 is between 0.1 μm and 3 μm, and the length L2 is between 0.1 μm and 30 μm. In this way, by increasing the planar view area of the second island structure 122, the conduction resistance is reduced. In such a case, in a planar view, the area of each second island structure 122 is larger than the area of each first island structure 121.

[0020] Similarly, as shown in FIG. 4, by increasing the contact area between the second island structure 122 and the semiconductor layer 108, the contact resistance can be reduced. In such a case, the contact area between each second island structure 122 and the semiconductor layer 108 (or the bottom area of each second island structure 122) is larger than the contact area between each first island structure 121 and the semiconductor layer 108 (or the bottom area of each first island structure 121).

[0021] Also, as shown in FIG. 1, in some embodiments, the edges of each first island structure 121 are aligned with the edges of each second island structure 122. Specifically, the edge of the p-type semiconductor layer 121a of the first island structure 121 is aligned with the edge of the second metal electrode 122a of the second island structure 122. In this way, the length between the gate and the drain (L gdBy maximizing the pitches (corresponding to pitches X1 and X2 in Figure 1), electric field spikes can be reduced, a large breakdown voltage can be provided, and the reliability of the device can be improved. In such a case, since it is trimmed along the second direction D2, the pitch X1 along the first direction D1 between the p-type semiconductor layer 121a of the first island structure 121 and the gate semiconductor 131 of the gate structure 130 is substantially equal to the pitch X2 along the first direction D1 between the second metal electrode 122a of the second island structure 122 and the gate semiconductor 131. Note that both pitches X1 and X2 are larger than the pitch X3 between the source structure 110 and the gate structure 130. For example, pitch X1 is between 0.3 μm and 30 μm, pitch X2 is between 0.3 μm and 30 μm, and pitch X3 is between 0.1 μm and 1 μm.

[0022] In some embodiments, the pitch X1 is substantially equal to the pitch X2 and the width W1 is substantially equal to the width W2, so that the central axis of each first island structure 121 coincides with the central axis of each second island structure 122 (for example, coincides with the line segment C-C') and is parallel to the second direction D2.

[0023] Next, a method for manufacturing a semiconductor element 10 according to several embodiments of the present disclosure will be described with reference to Figures 1 and 4. First, a substrate structure 100 is provided. For example, a buffer layer 104, a semiconductor layer 106, and a semiconductor layer 108 are sequentially formed on a substrate 102. Subsequently, a plurality of p-type semiconductor layers 121a are formed, separated from each other and arranged along a second direction D2. In some embodiments, the gate semiconductor 131 of the gate structure 130 may also be formed at this stage. Next, metal electrodes 121b are formed above each p-type semiconductor layer 121a. In some embodiments, the gate metal electrode 132 of the gate structure 130 may also be formed at this stage. Subsequently, the p-type semiconductor layers 121a and the second metal electrodes 122a are arranged alternately with spacing along the second direction D2 by forming second metal electrodes 122a between the p-type semiconductor layers 121a. In some embodiments, the source electrode 111 of the source structure 110 may also be formed at this stage. Next, drain through-holes 121c and 122b are formed above the metal electrode 121b and the second metal electrode 122a, respectively. In some embodiments, a source through-hole 112 may also be formed above the source electrode 111 at this stage. Subsequently, a drain metal connection wire 123 is formed above the drain through-holes 121c and 122b. In some embodiments, a source metal connection wire 113 may also be formed above the source through-hole 112 at this stage.

[0024] In an embodiment in which the metal electrode 121b is omitted, the manufacturing method does not form the metal electrode 121b above the p-type semiconductor layer 121a, and in the step of forming the drain-through hole 121c and drain-through hole 122b, the drain-through hole 121c is formed directly on the p-type semiconductor layer 121a.

[0025] In some embodiments, there may be a plurality of drain through holes 121c above the metal electrode 121b, and a plurality of drain through holes 122b above the metal electrode 122a. Referring to, for example, Figure 6, this is a partial cross-sectional view of a semiconductor element 10' according to some other embodiment of the present disclosure. The difference between the semiconductor element 10' and the semiconductor element 10 is that each second island structure 122 of the semiconductor element 10' may have three separate drain through holes 122b above the metal electrode 122a, arranged along a second direction D2. The dimensions of each drain through hole 122b are approximate to those of the drain through hole 121c. In these embodiments, the sum of the contact areas of all the drain-through holes 122b above each second island-like structure 122 is greater than the sum of the contact areas of all the drain-through holes 121c above each first island-like structure 121, and the total resistance of the drain-through holes 121c above each first island-like structure 121 is greater than the total resistance of the drain-through holes 122b above each second island-like structure 122.

[0026] In some embodiments, the drain-through holes 121c and 122b may have arbitrary shapes. See, for example, Figure 7, which is a plan view of a semiconductor element 10” according to yet another embodiment of the present disclosure. The difference between semiconductor element 10” and semiconductor element 10 is that the drain-through holes 121c and 122b of semiconductor element 10” have circular planar contours. In addition, in these embodiments, above the metal electrode 122a of each second island structure 122 there are four drain-through holes 122b scattered above the metal electrode 122a. Similarly, the sum of the contact areas of all the drain-through holes 122b above each second island structure 122 is greater than the sum of the contact areas of all the drain-through holes 121c above each first island structure 121, and the total resistance of the drain-through holes 121c above each first island structure 121 is greater than the total resistance of the drain-through holes 122b above each second island structure 122.

[0027] As described above, in some embodiments of the present disclosure, a semiconductor device is provided with a first island structure and a second island structure that are separated from each other and arranged alternately. The first island structure includes a metal electrode forming a Schottky barrier diode and a p-type semiconductor layer, and the second island structure includes a metal electrode forming ohmic contact with the underlying semiconductor layer. The first and second island structures are electrically connected to a drain metal connection wire via drain through-holes, respectively. In this manner, in a conductive state, the metal electrode of the first island structure and the metal electrode of the second island structure have different potentials, and the area relationship between the drain through-holes and metal electrodes of the first and second island structures can further reduce energy consumption and suppress damage due to voltage overshoot. [Explanation of Symbols]

[0028] 10, 10', 10”: Semiconductor devices 100: Substrate structure 102: Circuit board 104: Buffer layer 106, 108: Semiconductor layer 110: Source Structure 111: Source electrode 112: Source through hole 113: Source metal connection wire 120: Drain structure 121:First island structure 121a: p-type semiconductor layer 121b, 122a: Metal electrode 121c, 122b: Drain-through holes 122:Second island structure 123: Drain metal connection wire 130: Gate structure 131: Gate Semiconductor 132: Gate metal electrode A-A', B-B', C-C': line segments D1: 1st direction D2:Second direction G: Interval I1, I2: Current values L1, L2: Length R 121c 、R 122b : Resistance value SD: Schottky barrier diode V 121b 、V 122a 、V 123 、V 2DEG : Potential value W1, W2: Width X1, X2, X3: Pitch

Claims

1. A substrate structure including a semiconductor layer, A source structure located above the semiconductor layer of the substrate structure, Located above the semiconductor layer and arranged along the first direction with respect to the source structure, A plurality of first island-like structures each including a p-type semiconductor layer and a first metal electrode located above the p-type semiconductor layer, Multiple second island-like structures, each containing a second metal electrode, Includes, The plurality of first island-like structures and the plurality of second island-like structures are arranged alternately at intervals along a second direction substantially perpendicular to the first direction. In the conductive state, the potential of each of the first metal electrodes of the plurality of first island-like structures is different from the potential of each of the second metal electrodes of the plurality of second island-like structures, drain structure, A gate structure located in the semiconductor layer and between the source structure and the drain structure, A semiconductor element equipped with the following features.

2. The semiconductor element according to claim 1, wherein the drain structure further includes a drain metal connection wire, each of the plurality of first island-like structures further includes at least one first drain through-hole electrically connected to the drain metal connection wire above the first metal electrode, and each of the plurality of second island-like structures further includes at least one second drain through-hole electrically connected to the drain metal connection wire above the second metal electrode.

3. The semiconductor element according to claim 2, wherein the total contact area between the at least one first drain through-hole and the first metal electrode is smaller than the total contact area between the at least one second drain through-hole and the second metal electrode.

4. The semiconductor element according to claim 1, wherein the contact area between each of the plurality of second island-like structures and the semiconductor layer is greater than the contact area between each of the plurality of first island-like structures and the semiconductor layer.

5. The semiconductor element according to claim 1, wherein each edge of the plurality of first island-like structures is trimmed to match each edge of the plurality of second island-like structures.

6. The semiconductor element according to claim 1, wherein the width of each of the plurality of first island-like structures along the first direction is substantially equal to the width of each of the plurality of second island-like structures along the first direction.

7. A substrate structure including a semiconductor layer, A source structure located above the semiconductor layer of the substrate structure, Located above the semiconductor layer and arranged along the first direction with respect to the source structure, Drain metal connection wire, A plurality of first island-like structures each include a p-type semiconductor layer, and at least one first drain through-hole located above the p-type semiconductor layer, which is in contact with the p-type semiconductor layer and connected to the drain metal connection wire. A plurality of second island-like structures each include at least one metal electrode and at least one second drain through-hole that is in contact with the metal electrode and connected to the drain metal connection wire, and located above the metal electrode, Includes, The plurality of first island-like structures and the plurality of second island-like structures are arranged alternately at intervals along a second direction substantially perpendicular to the first direction. In the conductive state, the potential of at least one contact surface between each of the plurality of first island-shaped structures and the p-type semiconductor layer is different from the potential of each of the plurality of second island-shaped structures and the drain structure. A gate structure located in the semiconductor layer and between the source structure and the drain structure, A semiconductor element equipped with the following features.

8. The semiconductor element according to claim 7, wherein the total area of ​​the at least one contact surface between the at least one first drain through-hole and the p-type semiconductor layer is smaller than the total area of ​​the at least one contact surface between the at least one second drain through-hole and the metal electrode.

9. The semiconductor element according to claim 7, wherein the width of each of the plurality of first island-like structures along the first direction is substantially equal to the width of each of the plurality of second island-like structures along the first direction.

10. The semiconductor element according to claim 7, wherein the central axis of each of the plurality of first island-like structures coincides with the central axis of each of the plurality of second island-like structures and is parallel to the second direction.

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