Magnetic resonance imaging apparatus and amplification apparatus

Abstract

To suppress the decrease in linearity caused by temperature fluctuations in the amplification device without providing a high-power isolator between the amplification device and the RF coil. [Solution] One embodiment of the magnetic resonance imaging apparatus comprises an amplification device and an RF coil. The amplification device amplifies a high-frequency input signal and outputs it as an output signal. The RF coil applies the output signal to the subject. The amplification device comprises an amplification circuit and a control circuit. The amplification circuit has an amplification element that amplifies the input signal. The control circuit acquires pulse sequence information, which is information about the pulse sequence performed in this scan, estimates the junction temperature of the amplification element based on the pulse sequence information, calculates a linearity compensation value based on the junction temperature to compensate for the linearity of the output signal, and compensates the linearity of the output signal for each input signal based on the linearity compensation value corresponding to the junction temperature.

Description

Technical Field

[0001] The embodiments disclosed in this specification and the drawings relate to a magnetic resonance imaging (MRI) apparatus and an amplifier device.

Background Art

[0002] An MRI apparatus excites the nuclear spins of a subject placed in a static magnetic field with a high-frequency (RF: Radio Frequency) signal at the Larmor frequency, and performs a scan to collect magnetic resonance (MR: Magnetic Resonance) signals generated from the subject due to the excitation, and generates an MR image based on the MR signals collected by the scan.

[0003] Conventionally, an MRI apparatus is provided with an amplifier device for amplifying high frequencies. In the amplifier device, for example, impedance mismatch caused by the load impedance varying from a predetermined reference value can be a factor in the reduction of linearity. Also, during the operation of the MRI apparatus, temperature fluctuations may occur in the amplifier device, and there is a possibility that the linearity of the amplifier device may decrease.

[0004] Therefore, in order to suppress the reduction of linearity, an isolator may be provided between the amplifier circuit and the output terminal of the amplifier device. The isolator removes the reflected wave power from the output terminal side to the amplifier circuit, and suppresses fluctuations in the load impedance due to the reflected wave power. However, isolators for high power are large in physical size and expensive.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0006] One of the problems that the embodiments disclosed herein and in the drawings aim to solve is to suppress the decrease in linearity caused by temperature fluctuations in the amplifier without providing a high-power isolator between the amplifier and the RF coil of the MRI apparatus. However, the problems that the embodiments disclosed herein and in the drawings aim to solve are not limited to the above problem. Problems corresponding to the effects of each configuration shown in each embodiment described later can also be positioned as other problems. [Means for solving the problem]

[0007] One embodiment of the MRI apparatus comprises an amplification device and an RF coil. The amplification device amplifies a high-frequency input signal and outputs it as an output signal. The RF coil applies the output signal to the subject. The amplification device comprises an amplification circuit and a control circuit. The amplification circuit has an amplification element that amplifies the input signal. The control circuit acquires pulse sequence information, which is information about the pulse sequence performed in this scan, estimates the junction temperature of the amplification element based on the pulse sequence information, calculates a linearity compensation value based on the junction temperature to compensate for the linearity of the output signal, and compensates the linearity of the output signal for each input signal based on the linearity compensation value corresponding to the junction temperature. [Brief explanation of the drawing]

[0008] [Figure 1] A block diagram showing an example of the overall configuration of an MRI apparatus according to this embodiment. [Figure 2] A block diagram showing an example configuration of an amplification device according to the first embodiment. [Figure 3] A flowchart showing an example of operation of the amplification device according to the first embodiment. [Figure 4] A diagram illustrating information about RF pulses. [Figure 5] A diagram illustrating information about the sequence. [Figure 6] A graph showing the relationship between pulse width and transient thermal resistance for each duty cycle. [Figure 7] A graph illustrating an example of estimating the variation in the junction temperature of an amplifying element in relation to the pulse number. [Figure 8] A graph illustrating an example of the characteristics between the drain current and gate voltage of an amplification element. [Figure 9] A diagram showing an example of a difference compensation table. [Figure 10] A diagram illustrating the first compensation table. [Figure 11] A flowchart showing an example of the operation of step ST50 in Figure 3. [Figure 12] A block diagram showing an example configuration of an amplification device according to the second embodiment. [Figure 13] A flowchart showing an example of operation of the amplification device according to the second embodiment. [Modes for carrying out the invention]

[0009] The MRI apparatus and amplification apparatus according to the embodiment will be described below with reference to the attached drawings. In each figure, the same elements are denoted by the same reference numerals, and redundant explanations are omitted.

[0010] (Overall configuration of the MRI system) Figure 1 is a block diagram showing an example of the overall configuration of an MRI apparatus 1 according to an embodiment. The MRI apparatus 1 comprises a magnet stand 100, a control cabinet 300, an image processing device 400, and a patient table 500.

[0011] The magnet stand 100 comprises a static magnetic field magnet 10, a gradient magnetic field coil 11, and a whole-body (WB) coil 12. The static magnetic field magnet 10 is broadly classified into a cylindrical type, which has a cylindrical magnetic structure, and an open type, which has a pair of magnets arranged vertically on either side of the imaging space. The following description will focus on the case where the MRI device 1 is cylindrical, but it may also be open type.

[0012] The static magnetic field magnet 10 has a generally cylindrical shape and generates a static magnetic field within a bore into which a subject (e.g., a patient) is carried. The bore is an inspection space inside the cylinder of the static magnetic field magnet 10. The static magnetic field magnet 10 incorporates a superconducting coil, and the superconducting coil is cooled to an extremely low temperature by liquid helium. The static magnetic field magnet 10 generates a static magnetic field by applying a current supplied from a static magnetic field power source (not shown) to the superconducting coil in an excitation mode. When the static magnetic field magnet 10 shifts to the persistent current mode, the static magnetic field power source is disconnected. Once the static magnetic field magnet 10 shifts to the persistent current mode, it continues to generate a large static magnetic field for a long time, e.g., over one year. Note that the static magnetic field magnet 10 may be constituted by a permanent magnet.

[0013] The gradient magnetic field coil 11 has a generally cylindrical shape and is fixed inside the static magnetic field magnet 10 in the radial direction of the cylindrical shape. The gradient magnetic field coil 11 generates a gradient magnetic field by receiving a current supply from a gradient magnetic field power source 31. The gradient magnetic field coil 11 is formed by combining three coils corresponding to the X-axis, Y-axis, and Z-axis that are orthogonal to each other, and the three coils receive individual current supplies from the gradient magnetic field power source 31 to generate a gradient magnetic field in which the magnetic field strength changes along the X-axis, Y-axis, and Z-axis.

[0014] As shown in FIG. 1, the left-right direction of the subject P placed on the bed 500 is defined as the X-axis direction, the front-back direction (the body thickness direction) is defined as the Y-axis direction, and the head-foot direction is defined as the Z-axis direction. The X-axis, Y-axis, and Z-axis are orthogonal to each other.

[0015] The WB coil 12 has a generally cylindrical shape and is an RF coil fixed inside the gradient magnetic field coil 11 so as to surround the subject. The WB coil 12 transmits an RF pulse transmitted from an RF transmitter 32 to the subject and receives an MR signal emitted from the subject P by the excitation of hydrogen nuclei.

[0016] In addition to the WB coil 12, the MRI apparatus 1 may have a local coil 20. The local coil 20 is an RF coil disposed close to the subject, and receives an MR signal emitted from the subject at a position close to the subject. The local coil 20 may transmit an RF pulse transmitted from the RF transmitter 32 to the subject. There are various types of local coils 20 corresponding to imaging regions of the subject, such as the head, chest (e.g., FIG. 1), spine, lower limbs, whole body, etc.

[0017] The control cabinet 300 includes a gradient magnetic field power supply 31, an RF transmitter 32, an RF receiver 33, and a sequence controller 34. The gradient magnetic field power supply 31 supplies current to the gradient magnetic field coil 11 under the control of the sequence controller 34, and generates a gradient magnetic field along each of the X-axis, Y-axis, and Z-axis by the gradient magnetic field coil 11.

[0018] The RF transmitter 32 generates an RF pulse train in the Larmor frequency band as an RF transmission wave based on an instruction from the sequence controller 34, outputs it to the RF coil, and excites the subject P. The RF transmitter 32 is constituted by an amplifier device 32 according to the embodiment. A detailed description of the amplifier device 32 according to the embodiment will be described later.

[0019] The RF receiver 33 analog-to-digital (AD: Analog to Digital) converts the MR signal received by the RF coil and outputs it to the sequence controller 34. The digitized MR signal is called raw data.

[0020] The sequence controller 34 executes a scan of the subject P by driving the gradient magnetic field power supply 31, the RF transmitter 32, and the RF receiver 33 respectively under the control of the image processing apparatus 400. The sequence controller 34 receives raw data from the RF receiver 33 by executing the scan, and transmits the raw data to the image processing apparatus 400.

[0021] The sequence controller 34 includes a processing circuit (not shown). The processing circuit of the sequence controller 34 consists of, for example, a processor that executes a predetermined program, or hardware such as an FPGA (Field Programmable Gate Array) or ASIC (Application Specific Integrated Circuit).

[0022] The bed 500 comprises a bed body 50 and a top plate 51. The bed body 50 allows the top plate 51 to move vertically and horizontally, and moves the subject placed on the top plate 51 to a predetermined height and then into the bore.

[0023] The image processing device 400 comprises a processing circuit 40, a storage circuit 41, a display 42, an input interface 43, and a network interface 44. The image processing device 400 is configured by a computer.

[0024] The memory circuit 41 is a storage medium that includes ROM (Read Only Memory), RAM (Random Access Memory), and external storage devices such as HDD (Hard Disk Drive) and optical disc drives. The memory circuit 41 stores various information and data, and stores various programs that are executed by the processor equipped in the processing circuit 40.

[0025] The display 42 is a display device such as a liquid crystal display panel, a plasma display panel, or an organic EL panel. The display 42 may also be a GUI (Graphical User Interface) that displays various information and data under the control of the processing circuit 40 and also functions as an input device.

[0026] The input interface 43 includes various input devices for the user to input various types of information and data, and an input circuit that processes signals from the input devices. Examples of input devices include a mouse, keyboard, trackball, and touch panel. When an input device is operated, the input circuit generates a signal corresponding to that operation and outputs it to the processing circuit 40.

[0027] The network interface 44 communicates with various devices connected to the network via wired or wireless means, and exchanges various information and data.

[0028] The processing circuit 40 is, for example, a circuit equipped with a CPU or a dedicated or general-purpose processor. The processor of the processing circuit 40 realizes functions corresponding to various programs by executing various programs that are pre-stored in the memory circuit 41 or directly incorporated into the processing circuit 40.

[0029] These components enable the image processing device 400 to control the entire MRI apparatus 1. Specifically, the processing circuit 40 receives instructions regarding imaging conditions and other various information from a user, such as a medical technologist, via the input interface 43. The processing circuit 40 then instructs the sequence controller 34 to perform a scan based on the input imaging conditions. The processing circuit 40 also reconstructs the MR image based on the raw data transmitted from the sequence controller 34. The reconstructed MR image is displayed on the display 42 and stored in the memory circuit 41.

[0030] Conventionally, MRI systems sometimes incorporate isolators between the amplification circuit and output terminals of the amplification unit to suppress the decrease in linearity of the amplification unit. However, high-power isolators are physically large and expensive. Furthermore, temperature fluctuations can occur in the amplification unit during the operation of the MRI system, potentially leading to a decrease in the linearity of the amplification unit.

[0031] Therefore, the MRI apparatus 1 according to this embodiment estimates the temperature fluctuations in the amplification device 32 and performs DPD (Digital Pre-Distortion) feedforward compensation based on the estimation results, thereby suppressing the decrease in linearity caused by temperature fluctuations without providing a high-power isolator. In addition, in the MRI apparatus 1 according to this embodiment, the junction temperature of the amplification element is used as an indicator of temperature fluctuations in the amplification device 32.

[0032] (First Embodiment) Figure 2 is a schematic diagram showing an example configuration of an amplifier 32 according to the first embodiment. The amplifier 32 includes an input terminal 310, a DPD feedforward compensation circuit 311, a digital modulation circuit 313, a digital-to-analog (D / A) conversion circuit 314, an amplification circuit 315, a coupler 316, an output terminal 317, a control circuit 330, and a memory circuit 340.

[0033] The input terminal 310 of the amplifier 32 is connected to the sequence controller 34. The sequence controller 34 outputs transmission waveform data that defines the transmission power and the amplitude and phase of the transmission waveform. The amplifier 32 acquires the transmission waveform data from the sequence controller 34 via the input terminal 310.

[0034] The DPD feedforward compensation circuit 311, under the control of the control circuit 330, compensates for the nonlinearity of the input-output characteristics of the amplifier circuit 315, so that the input-output characteristics of the entire amplifier 32 from input to output become linear. This compensation for the nonlinearity of the input-output characteristics of the amplifier circuit 315 is called "linearity compensation."

[0035] The input-output characteristics of amplifier circuit 315 should ideally be linear, such as y = ax, where x is the input signal and y is the output signal, and a is the gain of amplifier circuit 315. However, in reality, the output signal y is not a linear function of the input signal x; for example, the output signal y may have components of order two or higher of the input signal x, and the input-output characteristics of amplifier circuit 315 can become nonlinear. As a result, the output signal of amplifier circuit 315 is not perfectly similar to the input signal and will have some degree of distortion. This phenomenon is known to occur more easily when there is a mismatch in the load impedance of amplifier circuit 315.

[0036] Ideally, the gain a of the amplifier circuit 315 should be constant regardless of the magnitude of the input signal. However, in reality, the gain a of the amplifier circuit 315 can change depending on the magnitude of the input signal. For example, when the input signal exceeds a certain value, the gain a decreases compared to when the input signal is small. It is also known that changes or fluctuations in the gain a can be caused by temperature fluctuations of the amplifying elements (e.g., FETs: Field Effect Transistors) that make up the amplifier circuit 315.

[0037] Thus, the input-output characteristics of the actual amplifier circuit 315 are not perfectly linear, but exhibit nonlinearity. In this embodiment, "linearity compensation" is the operation of compensating for the nonlinear characteristics of the input-output characteristics of the amplifier circuit 315 so that the amplifier device 32 as a whole approaches linear characteristics. In the amplifier device 32 of this embodiment, the role of this "linearity compensation" is mainly performed by the DPD feedforward compensation circuit 311.

[0038] For example, if the gain of the amplifier circuit 315, which should be constant, changes depending on the magnitude of the input signal, the linearity of the input / output characteristics of the amplifier circuit 315 decreases. To compensate for this decrease in linearity, the DPD feedforward compensation circuit 311 compensates for the decrease in gain based on the gain compensation value. The gain compensation value is a value that compensates for the appropriate gain with respect to the input power value (or the amplitude of the input high-frequency signal), which is the power value of the input high-frequency signal. Specifically, the DPD feedforward compensation circuit 311 adds or subtracts from the amplitude of the transmitted waveform corresponding to the input transmitted waveform data.

[0039] Furthermore, due to the nonlinearity between the input and output signals, the waveform of the high-frequency signal input to the amplifier circuit 315 is distorted when output by the amplifier circuit 315. This phenomenon is also caused by a decrease in the linearity of the input / output characteristics of the amplifier circuit 315. To address this decrease in linearity, the DPD feedforward compensation circuit 311 performs linearity compensation based on the waveform compensation value. The waveform compensation value is a value that compensates the waveform of the input signal to the amplifier circuit 315 so that the output of the amplifier circuit 315 becomes a distortion-free waveform. Specifically, the DPD feedforward compensation circuit 311 generates inverse distortion, that is, inverse distortion to cancel out the distortion generated in the amplifier circuit 315, which adjusts the amplitude and phase of the transmitted waveform corresponding to the input transmitted waveform data for each amplitude of the input signal.

[0040] During the operation of the MRI device 1, temperature fluctuations may occur in the amplifier 32, potentially reducing the linearity of the amplifier 32. For example, if the junction temperature Tj of the FET constituting the amplifier circuit 315 fluctuates, the linearity of the amplifier circuit 315 may decrease even if the load impedance is matched. Therefore, the DPD feedforward compensation circuit 311 of the amplifier 32 according to this embodiment compensates for the decrease in linearity of the amplifier circuit 315 due to fluctuations in the FET junction temperature Tj, based on the gain compensation value.

[0041] In other words, the DPD feedforward compensation circuit 311 compensates for the gain of the amplifier circuit 315, which changes due to fluctuations in the FET junction temperature Tj, based on the gain compensation value. For example, if the junction temperature Tj rises, the gain of the amplifier circuit 315 is expected to decrease, so the amplitude of the input signal to the DPD feedforward compensation circuit 311 is increased by the amount of the gain decrease, i.e., by the gain compensation value, and output from the DPD feedforward compensation circuit 311. This operation of the DPD feedforward compensation circuit 311 can compensate for the linearity of the amplifier circuit 315.

[0042] The digital modulation circuit 313 digitally modulates the input signal, which has been compensated by the DPD feedforward compensation circuit 311, with the digital carrier signal 312, i.e., upconverts the input signal in the digital domain. The digital-to-analog conversion circuit 314 converts the digitally modulated input signal into an analog signal and outputs it to the amplification circuit 315.

[0043] The amplification circuit 315 has an amplification element that amplifies the input signal. The amplification element is, for example, a transistor such as a field-effect transistor (i.e., FET). The amplification circuit 315 amplifies the input signal after it has been compensated by the DPD feedforward compensation circuit 311 and outputs an amplified signal, which is the amplified signal.

[0044] Coupler 316 is a directional coupler provided between the amplification circuit 315 and the output terminal 317. Coupler 316 outputs the amplified signal, which has been amplified by the amplification circuit 315, to the output terminal 317. The output terminal 317 outputs the amplified signal to the RF coil. In other words, the amplification device 32 amplifies the high-frequency input signal and outputs it as an output signal. The RF coil applies the output signal to the subject P. Note that the RF coil may be a WB coil 12 or a local coil 20.

[0045] The amplifier 32 may further include an output cutoff control circuit 318. In this case, the coupler 316 extracts the forward wave power from the amplified signal and the reflected wave power from the output terminal 317 for monitoring. The output cutoff control circuit 318 acquires the monitoring results regarding the forward wave power and reflected wave power extracted by the coupler 316 and stops the operation of the amplifier 32 if it detects an abnormal condition such as a short circuit or overload.

[0046] The control circuit 330 is a circuit that includes, for example, a CPU or a dedicated or general-purpose processor. The processor of the control circuit 330 realizes functions corresponding to various programs by executing various programs that are pre-stored in the memory circuit 340 or directly incorporated into the control circuit 330. The memory circuit 340 stores various programs used in the control circuit 330, data necessary for program execution, linearity compensation tables related to the linearity compensation values ​​described later, etc.

[0047] The control circuit 330 implements an acquisition function 331, an estimation function 332, a calculation function 333, a generation function 334, and a compensation function 335. Linearity compensation in the amplifier 32 is performed by adjusting the amplitude or waveform of the input signal using the DPD feedforward compensation circuit 311. The overall flow of linearity compensation in the amplifier 32 according to the first embodiment will be explained using the flowchart in Figure 3.

[0048] In the following explanation, "main scan" refers to scanning the subject P for purposes such as acquiring diagnostic MR images or for positioning. "Pre-scan" refers to scanning the subject P before the main scan, for purposes such as acquiring positioning MR images or calibration to maintain image quality during a second scan. A pre-scan may be performed for each main scan, or one pre-scan may be performed for multiple main scans.

[0049] In step ST10, the acquisition function 331 acquires pulse sequence information, which is information about the pulse sequence to be executed in this scan. The pulse sequence information includes at least information about the amplitude Ap(W), pulse width tw(ms), and pulse period ts of the RF pulse set as the pulse sequence. The pulse sequence information may also include information about the duty cycle D. The acquisition function 331 acquires the pulse sequence information from, for example, the sequence controller 34 or the processing circuit 40 of the image processing device 400 before executing this scan.

[0050] Here, referring to Figures 4 and 5, the pulse sequence information will be explained. Amplitude Ap is the peak value of the RF pulse. Pulse width tw is the duration of one RF pulse. The pulse energy Ep(J) of one RF pulse is the integral of amplitude Ap and pulse width tw. Pulse period ts is the time interval between two consecutive RF pulses. Duty cycle D indicates the ratio of the time the RF pulse is transmitted, i.e., the pulse width tw, to the pulse period ts. For example, if an RF pulse is generated every second and transmitted for 0.2 seconds, the duty cycle D is 20%. Also, if N RF pulses are repeatedly applied with a pulse period ts in one scan, the RF pulse with pulse number n (see Figure 7) means the nth RF pulse from the start of the scan.

[0051] In step ST20, the estimation function 332 estimates the junction temperature Tj of the amplification element based on the pulse sequence information.

[0052] The estimation function 332 estimates the FET junction temperature Tj(°C) using equation (1), based on the transient thermal resistance Rt(°C / W), heat generation Q(J), pulse period ts(s), heat transfer amount Ht(W), and the junction temperature Tjb(°C) of the preceding FET. Tj = Rt * (Q / Pi - Ht) + Tjb ... (1)

[0053] Here, Figure 6 is a graph showing the relationship between pulse width tw and transient thermal resistance Rt for each duty cycle D. Based on the duty cycle D and pulse width tw obtained in step ST10, the corresponding transient thermal resistance Rt is derived from the relationship shown in Figure 6.

[0054] The heat generation Q may be derived, for example, from the pulse energy Ep to the energy conversion efficiency of the FET, based on the information about the RF pulse shown in Figure 5.

[0055] The heat generation Q may also be derived from the on-resistance of the FET at the immediately preceding Tjb. The on-resistance of the FET is the resistance between the drain and source when the FET is operated (turned on), and this resistance causes conduction losses (heat generation). The immediately preceding junction temperature Tjb is the junction temperature (n-1) pulses after the nth pulse, when the estimated junction temperature Tj of the FET is the nth pulse.

[0056] The pulse period ts is obtained in step ST10. The heat transfer amount Ht(W) is estimated using equation (2) based on the junction temperature Tjb(°C) of the FET immediately preceding the test, the ambient temperature Ta(°C) of the FET, and the thermal resistance Rr(°C / W) of the heat sink. Ht = (Tjb - Ta) / Rr ... (2)

[0057] The ambient temperature Ta of the FET is maintained at a constant temperature (e.g., 25°C) by, for example, water cooling. The heat sink thermal resistance Rr is determined by the heat dissipation capacity of the amplifier 32.

[0058] Figure 7 is a graph showing an example of the estimation of the variation in the FET junction temperature Tj with respect to pulse number. As shown in equation (2), the amount of heat transfer Ht is proportional to the difference between the immediately preceding junction temperature Tjb and the ambient temperature Ta of the FET. After the start of the sequence, when an RF pulse with a small pulse number is applied, the difference between the immediately preceding junction temperature Tjb and the ambient temperature Ta of the FET is small, so the amount of heat transfer Ht is small. Furthermore, as shown in equation (1), the smaller the amount of heat transfer Ht, the higher the junction temperature Tj rises, so as shown in Figure 7, the increase in junction temperature Tjb is larger for RF pulses with small pulse numbers.

[0059] After some time has passed since the start of the sequence, the difference between the previous junction temperature Tjb and the ambient temperature Ta of the FET gradually increases, and the amount of heat transfer Ht also increases, so as shown in Figure 7, the rate of increase in junction temperature Tj decreases. Furthermore, after a certain amount of time has passed since the start of the sequence, when an RF pulse with a large pulse number is applied, the rate of increase in junction temperature Tj gradually approaches zero, and the junction temperature Tj reaches temperature saturation.

[0060] Thus, the control circuit 330 estimates the junction temperature Tj of the amplifying element, which changes with the execution of the pulse sequence, based on the transient thermal resistance Rt based on the pulse width tw and duty cycle D of the RF pulse, the amount of heat generated Q by the amplifying element with respect to the pulse period ts of the RF pulse, and the amount of heat transferred Ht by the heat sink and cooler provided in the MRI device 1.

[0061] The control circuit 330 estimates the junction temperature Tj of the amplification element, which changes with the execution of the pulse sequence, for each RF pulse. Alternatively, the control circuit 330 may estimate the junction temperature Tj of the amplification element, which changes with the execution of the pulse sequence, for each of multiple RF pulses. In this case, it is preferable to use the most recently estimated junction temperature Tj in the calculation of the linearity compensation value in step ST30, which will be described later.

[0062] In step ST30, the calculation function 333 calculates a linearity compensation value that compensates for the linearity of the output signal based on the junction temperature Tj.

[0063] Here, Figure 8(A) is an Id-Vg function graph showing the relationship between the drain current Id and the gate voltage Vg for a given temperature, which is a characteristic of the FET. Figure 8(B) is a specific example extracted from a part of Figure 8(A) for illustrative purposes. The Id-Vg function graph for a given temperature shows the characteristics of the FET, and this information is generally provided in the datasheet that shows the operating characteristics and operating conditions for each type of FET.

[0064] The gain compensation value Cg (dB) due to fluctuations in junction temperature Tj is derived based on the relationship between the drain current Id (A) and the gate voltage Vg (V). Specifically, the gain compensation value Cg is calculated using equation (3) based on the drain current IdTo at the reference temperature To and the drain current IdTj at the junction temperature Tj. Cg=20*log(IdTo / IdTj) ···(3)

[0065] Here, the drain current IdTo at the reference temperature To is given by equation (4), where Vg is the gate voltage, a1 is the slope of the Id-Vg function at the reference temperature To (°C), and b1 is the intercept of the Id-Vg function at the reference temperature To. IdTo=(a1*Vg-b1) ···(4)

[0066] The drain current IdT1 at a predetermined temperature T1 is given by equation (5), where Vg is the gate voltage, a2 is the slope of the Id-Vg function at the predetermined temperature T1 (°C), and b2 is the intercept of the Id-Vg function at the predetermined temperature T1. IdT1=(a2*Vg-b2) ...(5)

[0067] The change in the slope c of the Id-Vg function when the junction temperature Tj changes by 1°C is calculated as c = (a2 - a1) / (T1 - To). The change in the intercept d of the Id-Vg function when the junction temperature Tj changes by 1°C is calculated as d = (b2 - b1) / (T1 - To).

[0068] Therefore, the drain current IdTj at the junction temperature Tj is calculated using equation (6) according to the temperature change ΔTj from the reference temperature To to the junction temperature Tj. IdTj=(a1*Vg-b1)-(c*Vg-d)*ΔTj ···(6)

[0069] From equations (3), (4), and (6), the gain compensation value Cg is calculated by equation (7). Cg=20*log((a1*Vg-b1) / ((a1*Vg-b)-(c*Vg-d)*ΔTj)) ···(7)

[0070] Specifically, in the FET with the Id-Vg function characteristics shown in Figure 8(B), the drain current IdTo at a reference temperature of 25°C is 6.4*Vg-30, and the drain current IdT1 at a predetermined temperature of 125°C is 4.8*Vg-20. In this case, the gain compensation value Cg is calculated by 20*log((6.4*Vg-30) / ((6.4*Vg-30)-(0.016*Vg-0.1)*ΔTj)).

[0071] In the example of estimating the variation in the FET junction temperature Tj for each pulse shown in Figure 7, for example, in the third RF pulse, the change in temperature ΔTj from the reference temperature of 25°C to the junction temperature Tj is 33.7°C. In this case, the gain compensation value Cg of the input power amplitude for the third pulse is calculated as 20*log((6.4*Vg-30) / (5.86*Vg-26.63)). Also, in the fourth RF pulse, the change in temperature ΔTj is 41.9°C. In this case, the gain compensation value Cg of the input power amplitude for the fourth pulse is calculated as 20*log((6.4*Vg-30) / (5.73*Vg-25.81)).

[0072] Thus, the control circuit 330 calculates a gain compensation value (i.e., a linearity compensation value) based on the junction temperature Tj and according to the relationship between the drain current Id of the amplifying element and the gate voltage Vg, which is defined in relation to the junction temperature Tj.

[0073] The control circuit 330 may calculate a linearity compensation value for each input signal. In this case, in step ST50 described later, the control circuit 330 compensates for the linearity of the output signal for each input signal based on the linearity compensation value for each input signal. Alternatively, the control circuit 330 may use a portion of the linearity compensation value calculated for each input signal to compensate for the linearity of the output signal for each input signal.

[0074] Furthermore, the control circuit 330 does not need to calculate a linearity compensation value for each input signal. The control circuit 330 may calculate a linearity compensation value corresponding to the junction temperature Tj at predetermined intervals. In this case, in the linearity compensation of step ST50 described later, the control circuit 330 compensates the linearity of the output signal for each input signal based on the linearity compensation value at predetermined intervals. That is, linearity compensation is performed for each input signal based on the linearity compensation value for each RF pulse that was most recently calculated. The predetermined interval at which the linearity compensation value is calculated may be changed depending on the processing speed of the control circuit 330.

[0075] In step ST40, the generation function 334 generates a linearity compensation table based on the linearity compensation value corresponding to the junction temperature Tj. The linearity compensation table based on the linearity compensation value corresponding to the junction temperature Tj is a lookup table for providing an appropriate linearity compensation value for the input power value.

[0076] The linearity compensation table may be a differential compensation table or a first compensation table. In step ST40, the generation function 334 only needs to generate at least one of the linearity compensation tables, which is either a differential compensation table or a first compensation table. The linearity compensation table is stored in the memory circuit 340.

[0077] The reference compensation table, the difference compensation table, and the first compensation table will be described with reference to Figures 9 and 10. The reference compensation table is a table based on linearity compensation values ​​at a reference temperature and reference load impedance, and is stored in the memory circuit 340. The reference compensation table may also have a table based on waveform compensation values ​​(not shown) along with a table based on gain compensation values ​​for input power values.

[0078] The reference temperature is, for example, the ambient temperature of the FET (e.g., 25°C). The reference load impedance is, for example, 50Ω. The linearity compensation value of the reference compensation table is measured by a predetermined pulse sequence such that the FET junction temperature Tj remains unchanged from the reference temperature. The reference compensation table is generated for each amplifier 32, for example, during the manufacturing or installation of the MRI device 1.

[0079] Figure 9 shows an example of a differential compensation table. The differential compensation table is a table for each pulse number in which the linearity compensation value corresponding to the junction temperature Tj is expressed as the difference from the reference compensation table. The first compensation table is a table for each pulse number showing the linearity compensation value corresponding to the junction temperature Tj. As shown in Figure 10, the first compensation table can also be said to be a table that combines the reference compensation table with the differential compensation tables for each pulse number. Note that in Figure 10, the lookup table is represented as a graph.

[0080] In step ST50, the compensation function 335 compensates the linearity of the output signal for each input signal based on a linearity compensation value corresponding to the junction temperature Tj. The compensation function 335 may perform linearity compensation based on the linearity compensation table generated in step ST40, or based on the linearity compensation value calculated in step ST30. For example, linearity compensation may be performed while reflecting the linearity compensation value calculated in step ST30 in the reference compensation table.

[0081] In the first embodiment, the compensation function 335 performs appropriate linearity compensation for each pulse number using a linearity compensation value corresponding to the junction temperature Tj. An example of the flow of step ST50, which consists of steps ST51 to ST56, will be specifically explained using the flowchart in Figure 11.

[0082] In step ST51, the transmitted waveform data output from the sequence controller 34 is input to the amplifier 32.

[0083] In step ST52, the DPD feedforward compensation circuit 311 compensates for the linearity in the amplifier 32 under the control of the control circuit 330. That is, the control circuit 330 controls the linearity of the output signal for each input signal by DPD feedforward compensation.

[0084] The control circuit 330 may compensate for the linearity of the output signal for each input signal based on a reference compensation table and a difference compensation table. The control circuit 330 may also compensate for the linearity of the output signal for each input signal based on a first compensation table.

[0085] In step ST53, the digital modulation circuit 313 digitally modulates the input signal compensated by the DPD feedforward compensation circuit 311 with the digital carrier signal 312.

[0086] In step ST54, the digital-to-analog conversion circuit 314 converts the digitally modulated input signal to an analog signal.

[0087] In step ST55, the amplification circuit 315 amplifies the input high-frequency signal and outputs the amplified signal.

[0088] In step ST56, the amplified signal, amplified by the amplification circuit 315, is output to the RF coil via the output terminal 317. That is, the amplification device 32 amplifies the input high-frequency signal and outputs it as an output signal, and the RF coil applies this output signal to the subject P.

[0089] According to the MRI apparatus 1 of the first embodiment, the junction temperature Tj of the FET is estimated as an indicator of temperature fluctuations in the amplifier 32, and the linearity of the output signal is pre-compensated by DPD feedforward based on the estimation result. Therefore, it is possible to suppress the decrease in linearity caused by temperature fluctuations in the amplifier 32 without providing a high-power isolator.

[0090] (Second Embodiment) In the second embodiment, in addition to suppressing the decrease in linearity caused by temperature fluctuations in the amplifier 32 of the first embodiment, it is also possible to suppress the decrease in linearity when the load impedance (i.e., complex load impedance) deviates from the reference load impedance.

[0091] The load 320 may vary depending on the individual subject P's weight, height, body fat percentage, the type of RF coil, and the subject P's position and movement within the RF coil. The load 320 includes at least the RF coil and the subject P. In response to changes in the load 320, the load impedance fluctuates from the reference load impedance, resulting in an impedance mismatch between the amplification circuit 315 and the load 320.

[0092] When an impedance mismatch occurs between the amplifier circuit 315 and the load 320, reflected waves are generated from the load 320, and the linearity of the amplifier circuit 315 decreases. In this case, the input / output characteristics of the amplifier circuit 315 become nonlinear, and the input / output characteristics differ depending on the value of the load impedance. Therefore, in the second embodiment, the linearity of the output signal is further compensated based on a linearity compensation value corresponding to the actual load 320.

[0093] Figure 12 is a block diagram showing an example configuration of the amplifier 32 according to the second embodiment. The control circuit 330 further implements a determination function 336. Figure 13 is a flowchart showing an example of operation of the amplifier 32 according to the second embodiment. In the second embodiment, steps ST1 and ST2 are performed before step ST10.

[0094] In step ST1, a pre-scan is performed and the acquisition function 331 acquires information relating to the load impedance of a load that includes at least the RF coil and the subject. The information relating to the load impedance is at least one of the following: complex load impedance, complex load admittance, voltage standing wave ratio (VSWR), phase angle between the forward wave and the reflected wave, complex reflection coefficient, and S11 parameters. The information relating to the load impedance is acquired by monitoring the forward wave power of the amplified signal from the coupler 316 and the reflected wave power from the output terminal 317 and outputting them to the control circuit 330.

[0095] In step ST2, the determination function 336 determines a linearity compensation value to compensate for the linearity of the output signal output from the amplifier 32, based on information related to the load impedance. The linearity compensation value corresponding to the information related to the load impedance is the same for all pulse numbers. The determination function 336 determines the linearity compensation value by selecting from, for example, a plurality of second compensation tables.

[0096] The second compensation table is a lookup table of linearity compensation values ​​for input power values, and there are multiple tables for each load impedance corresponding to information related to a specific load impedance different from the reference load impedance (e.g., VSWR and phase angle). In other words, the second compensation table is a table based on gain compensation values ​​and waveform compensation values ​​for input power values. The linearity compensation value in the second compensation table is expressed as the difference from the linearity compensation value at the reference load impedance. Multiple second compensation tables are created in advance, for example, during the development or manufacture of the amplifier 32, and stored in the memory circuit 340.

[0097] In step ST50, in the first embodiment, the compensation function 335 compensates the linearity of the output signal for each input signal based on a linearity compensation value corresponding to the junction temperature Tj. In the second embodiment, the compensation function 335 compensates for each amplitude of the input signal based on a linearity compensation value corresponding to the junction temperature Tj and a linearity compensation value corresponding to information related to the load impedance. Specifically, linearity compensation is performed based on the gain compensation value and waveform compensation value corresponding to the information related to the load impedance determined in step ST2, and linearity compensation is also performed based on the gain compensation value for each pulse number corresponding to the junction temperature Tj calculated in step ST30.

[0098] According to the MRI apparatus 1 of the second embodiment, in addition to the effects of the amplifier 32 of the first embodiment, a decrease in linearity in the amplifier 32 can also be suppressed even when the load impedance fluctuates from the reference load impedance.

[0099] As described above, according to one embodiment of the MRI apparatus, it is possible to suppress the decrease in linearity caused by temperature fluctuations in the amplification device without providing a high-power isolator between the amplification device and the RF coil of the MRI apparatus.

[0100] In the above embodiment, the term "processor" refers to circuits such as a dedicated or general-purpose CPU (Central Processing Unit), GPU (Graphics Processing Unit), or Application Specific Integrated Circuit (ASIC), or a programmable logic device (e.g., a Simple Programmable Logic Device (SPLD), a Complex Programmable Logic Device (CPLD), and a Field Programmable Gate Array (FPGA)).

[0101] If the processor is, for example, a CPU, it implements various functions by reading and executing programs stored in memory circuits. Alternatively, if the processor is, for example, an ASIC, instead of storing programs in memory circuits, functions equivalent to those programs are directly incorporated as logic circuits within the processor's circuitry. In this case, the processor implements various functions through hardware processing that reads and executes the programs incorporated within the circuitry. Furthermore, a processor can also implement various functions by combining software and hardware processing.

[0102] Furthermore, although the above embodiment shows an example where a single processor in the processing circuit implements each function, a processing circuit may be configured by combining multiple independent processors, with each processor implementing each function. Also, when multiple processors are provided, the memory circuit for storing programs may be provided individually for each processor, or a single memory circuit may store programs corresponding to the functions of all processors together.

[0103] While several embodiments of the present invention have been described, these embodiments are presented as examples only and are not intended to limit the scope of the invention. These embodiments can be carried out in a variety of other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims and their equivalents. [Explanation of symbols]

[0104] 1…Magnetic Resonance Imaging (MRI) device 12…(RF coil) 20…(RF coil) 32…RF transmitter (amplifier) ​​34…Sequence controller 315…Amplification circuit 330…Control circuit 340…Memory circuit

Claims

1. An amplifier that amplifies a high-frequency input signal and outputs it as an output signal, The system comprises an RF coil that applies the output signal to a subject, The amplification device is An amplification circuit having an amplification element for amplifying the input signal, The control circuit acquires pulse sequence information, which is information about the pulse sequence performed in this scan; estimates the junction temperature of the amplification element based on the pulse sequence information; calculates a linearity compensation value for compensating the linearity of the output signal based on the junction temperature; and compensates the linearity of the output signal for each input signal based on the linearity compensation value corresponding to the junction temperature. Magnetic resonance imaging device.

2. The control circuit performs control to compensate for the linearity of the output signal for each input signal by DPD (Digital Pre-Distortion) feedforward compensation. The magnetic resonance imaging apparatus according to claim 1.

3. The control circuit calculates the linearity compensation value for each input signal. The magnetic resonance imaging apparatus according to claim 1.

4. The pulse sequence information includes at least information regarding the amplitude, pulse width, and pulse period of the RF pulse set as the pulse sequence. The magnetic resonance imaging apparatus according to claim 1.

5. The control circuit estimates the junction temperature, which changes with the execution of the pulse sequence, for each of the one or more RF pulses. The magnetic resonance imaging apparatus according to claim 4.

6. The control circuit estimates the junction temperature, which changes as the pulse sequence is executed, based on the transient thermal resistance based on the pulse width and duty cycle of the RF pulse, the amount of heat generated by the amplification element with respect to the pulse period of the RF pulse, and the amount of heat transferred by the heat sink and cooler provided in the magnetic resonance imaging apparatus. The magnetic resonance imaging apparatus according to claim 4.

7. The control circuit calculates the linearity compensation value according to the relationship between the drain current and gate voltage of the amplification element, which is defined in relation to the junction temperature. The magnetic resonance imaging apparatus according to claim 1.

8. The amplification device further includes a storage circuit that stores a linearity compensation table based on a linearity compensation value corresponding to the junction temperature, The control circuit compensates the linearity of the output signal for each input signal based on the linearity compensation table. The magnetic resonance imaging apparatus according to claim 1.

9. The amplification device further includes a memory circuit that stores a reference compensation table based on linearity compensation values ​​at a reference temperature and reference load impedance, and a difference compensation table which is the difference between the linearity compensation value corresponding to the junction temperature and the reference compensation table. The control circuit compensates each input signal based on the reference compensation table and the difference compensation table. The magnetic resonance imaging apparatus according to claim 1.

10. The control circuit calculates a linearity compensation value corresponding to the junction temperature at predetermined intervals, and compensates the linearity of the output signal for each input signal based on the linearity compensation value at the predetermined intervals. The magnetic resonance imaging apparatus according to claim 1.

11. The aforementioned control circuit is In a pre-scan performed before the main scan, information relating to the load impedance is acquired for a load that includes at least the RF coil and the subject. Based on the information relating to the load impedance, a linearity compensation value is determined to compensate for the linearity of the output signal output from the amplification circuit. The linearity of the output signal is compensated for each amplitude of the input signal based on a linearity compensation value corresponding to the junction temperature and a linearity compensation value corresponding to the information related to the load impedance. The magnetic resonance imaging apparatus according to claim 1.

12. An amplification circuit having an amplification element for amplifying a high-frequency input signal, A control circuit acquires pulse sequence information, which is information about the pulse sequence performed in this scan; estimates the junction temperature of the amplification element based on the pulse sequence information; calculates a linearity compensation value based on the junction temperature to compensate for the linearity of the output signal output from the amplification circuit; and compensates the linearity of the output signal for each input signal based on the linearity compensation value corresponding to the junction temperature. An amplification device equipped with the following features.

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