Wiring board and method for manufacturing the same

Abstract

In a wiring board having a glass core layer, internal glass fracture is suppressed. [Solution] The wiring board 1 has a glass core layer 10 and a first wiring layer 12 arranged on one surface 10a of the core layer 10. The core layer 10 has one surface 10a in plan view and a first notch 101 located on the outside thereof. In plan view, one surface 10a of the core layer 10 has multiple corners, and the first notch 101 includes a portion that bends along each corner of at least one surface 10a. In the first notch 101, the connection between the side and the bottom is curved in cross-sectional view.

Description

Technical Field

[0001] The present invention relates to a wiring board and a method for manufacturing the same.

Background Art

[0002] A wiring board in which a wiring layer and an insulating layer are laminated on a core layer is known. In such a wiring board, a notch may be provided in the outer peripheral portion of the core layer. Since the notch is formed by, for example, a dicing blade having a sharp tip, it has a structure having corners. The notch is coated with, for example, a resin different from the resin constituting the interlayer insulating layer (Patent Document 1).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] Although a glass core layer may be used for the wiring board, the coefficient of thermal expansion of the glass core layer is significantly different from the coefficient of thermal expansion of the resin constituting the insulating layer. Therefore, due to the thermal contraction force caused by the difference in the coefficients of thermal expansion between the two, internal fracture may occur in the glass.

[0005] The present invention has been made in view of the above points, and an object thereof is to suppress internal fracture of glass in a wiring board having a glass core layer.

Means for Solving the Problems

[0006] The wiring board comprises a glass core layer and a first wiring layer disposed on one surface of the core layer, wherein the core layer comprises the one surface and a first notch located outside thereon in a plan view, wherein the one surface of the core layer has a plurality of corners in a plan view, and the first notch includes a portion that bends along at least each of the corners of the one surface, and in the first notch, the connection between the side and the bottom is curved in cross-sectional view. [Effects of the Invention]

[0007] According to the disclosed technology, internal fracture of the glass can be suppressed in a wiring substrate having a glass core layer. [Brief explanation of the drawing]

[0008] [Figure 1] This figure illustrates a wiring board according to the first embodiment. [Figure 2] This is a diagram (part 1) illustrating the manufacturing process of a wiring board according to the first embodiment. [Figure 3] This is a diagram (part 2) illustrating the manufacturing process of a wiring board according to the first embodiment. [Figure 4] This is a diagram (part 3) illustrating the manufacturing process of a wiring board according to the first embodiment. [Figure 5] This is a plan view illustrating a wiring board according to a modified example 1 of the first embodiment. [Figure 6] This is a plan view illustrating a wiring board according to a modified example 2 of the first embodiment. [Modes for carrying out the invention]

[0009] The embodiments for carrying out the invention will be described below with reference to the drawings. In each drawing, the same reference numerals are used for identical components, and redundant explanations may be omitted.

[0010] <First Embodiment> [Structure of the wiring board according to the first embodiment] Figure 1 illustrates a wiring board according to the first embodiment, where Figure 1(a) is a plan view and Figure 1(b) is a cross-sectional view along line AA in Figure 1(a).

[0011] Referring to Figure 1, the wiring board 1 is a wiring board in which a wiring layer and an insulating layer are laminated on both sides of a core layer 10.

[0012] Specifically, on the wiring board 1, one side 10a of the core layer 10 has a wiring layer 12, an insulating layer 13, a wiring layer 14, an insulating layer 15, a wiring layer 16, and a solder resist layer 17 stacked in sequence. On the other side 10b of the core layer 10, a wiring layer 22, an insulating layer 23, a wiring layer 24, an insulating layer 25, a wiring layer 26, and a solder resist layer 27 are stacked in sequence.

[0013] In the first embodiment, for convenience, the solder resist layer 17 side of the wiring board 1 is referred to as the upper side or one side, and the solder resist layer 27 side as the lower side or the other side. Also, the surface on the solder resist layer 17 side of each part is referred to as one surface or the upper surface, and the surface on the solder resist layer 27 side is referred to as the other surface or the lower surface. However, the wiring board 1 can be used upside down or positioned at any angle. Furthermore, a plan view refers to viewing the object from the direction normal to one surface 10a of the core layer 10, and a planar shape refers to the shape of the object viewed from the direction normal to one surface 10a of the core layer 10.

[0014] The core layer 10 is made of glass. The type of glass that makes up the core layer 10 is not limited, but for example, alkali-free glass, quartz glass, borosilicate glass, etc. can be used. The thickness of the core layer 10 is, for example, about 100 to 1000 μm. The core layer 10 is provided with through holes 10x that penetrate through the core layer 10 in the thickness direction. The planar shape of the through holes 10x is, for example, circular.

[0015] The core layer 10 includes one surface 10a in plan view and a first notch portion 101 located outside thereof. Further, the core layer 10 includes the other surface 10b in plan view and a second notch portion 102 located outside thereof. The widths of the first notch portion 101 and the second notch portion 102 can be, for example, about 0.05 mm or more and 0.5 mm or less. The depths of the first notch portion 101 and the second notch portion 102 can be, for example, about 0.05 mm or more and 0.3 mm or less.

[0016] In plan view, one surface 10a of the core layer 10 has a plurality of corner portions, and the first notch portion 101 includes a portion that bends along the outside of each corner portion of at least one surface 10a. Further, in plan view, the other surface 10b of the core layer 10 has a plurality of corner portions, and the second notch portion 102 includes a portion that bends along the outside of each corner portion of at least the other surface 10b.

[0017] In the example of FIG. 1, one surface 10a and the other surface 10b of the core layer 10 are square or rectangular, and each surface has four corner portions. And in the example of FIG. 1, in plan view, the first notch portion 101 includes a portion that bends along the outside of the four corner portions of one surface 10a, and is provided so as to surround the outer edge of one surface 10a in a frame shape. Further, the second notch portion 102 includes a portion that bends along the four corner portions of the other surface 10b, and is provided so as to surround the outer edge of the other surface 10b in a frame shape.

[0018] In the first notch portion 101 and the second notch portion 102, the connection portion C between the side portion and the bottom portion is curved in cross-sectional view and has no corner portion. The connection portion C may be arc-shaped, elliptical arc-shaped, or other shapes close to an arc or an elliptical arc in cross-sectional view. When the connection portion C is arc-shaped in cross-sectional view, the radius of the arc can be, for example, about 0.05 mm or more and 0.3 mm or less.

[0019] In the first notch portion 101, the side portion is a portion that contacts one surface 10a and extends from the one surface 10a side toward the other surface 10b side. Also, the bottom portion is a portion that contacts the side surface of the core layer 10 and extends from the side surface toward the through-hole 10x side. In the first notch portion 101, the boundaries of the side portion, the bottom portion, and the connecting portion do not have to be clear, and it is important that there are no corners in the range from the portion contacting one surface 10a to the portion contacting the side surface of the core layer 10.

[0020] Also, in the second notch portion 102, the side portion is a portion that contacts the other surface 10b and extends from the other surface 10b side toward the one surface 10a side. Also, the bottom portion is a portion that contacts the side surface of the core layer 10 and extends from the side surface toward the through-hole 10x side. In the second notch portion 102, the boundaries of the side portion, the bottom portion, and the connecting portion do not have to be clear, and it is important that there are no corners in the range from the portion contacting the other surface 10b to the portion contacting the side surface of the core layer 10.

[0021] The wiring layer 12 is disposed on one surface 10a of the core layer 10. Also, the wiring layer 22 is disposed on the other surface 10b of the core layer 10. The wiring layer 12 and the wiring layer 22 are electrically connected by a through-wiring 11 formed in the through-hole 10x. The wiring layers 12 and 22 are each patterned into a predetermined planar shape. As the materials of the wiring layers 12 and 22 and the through-wiring 11, for example, copper (Cu) or the like can be used. The thicknesses of the wiring layers 12 and 22 are, for example, about 10 to 40 μm. Note that the wiring layer 12, the wiring layer 22, and the through-wiring 11 may be integrally formed.

[0022] The insulating layer 13 is an interlayer insulating layer disposed on one surface 10a of the core layer 10 and covering the wiring layer 12 and the first notch portion 101. The insulating layer 13 fills the entire first notch portion 101. As the material of the insulating layer 13, for example, an insulating resin mainly composed of an epoxy-based resin or a polyimide-based resin can be used. The thickness of the insulating layer 13 can be, for example, about 30 to 40 μm. The insulating layer 13 can contain a filler such as silica (SiO2).

[0023] The insulating layer 13 has via holes 13x that penetrate the insulating layer 13 and expose the upper surface of the wiring layer 12. The via holes 13x can be in the shape of an inverted truncated cone recess, where the diameter of the opening on the insulating layer 15 side is larger than the diameter of the bottom surface of the opening formed by the upper surface of the wiring layer 12.

[0024] The wiring layer 14 is formed on one side of the insulating layer 13. The wiring layer 14 comprises via wiring filled in via holes 13x and a wiring pattern formed on the upper surface of the insulating layer 13. The wiring pattern is electrically connected to the wiring layer 12 via the via wiring. The material of the wiring layer 14 and the thickness of the wiring pattern can be the same as, for example, the wiring layer 12.

[0025] The insulating layer 15 is formed so as to cover the wiring layer 14 on the upper surface of the insulating layer 13. The material and thickness of the insulating layer 15 can be the same as, for example, the insulating layer 13. The insulating layer 15 may contain fillers such as silica (SiO2).

[0026] The insulating layer 15 has via holes 15x that penetrate the insulating layer 15 and expose the upper surface of the wiring layer 14. The via holes 15x can be inverted truncated cone-shaped recesses in which the diameter of the opening that opens to the solder resist layer 17 side is larger than the diameter of the bottom surface of the opening formed by the upper surface of the wiring layer 14.

[0027] The wiring layer 16 is formed on one side of the insulating layer 15. The wiring layer 16 consists of via wiring filled in via holes 15x and a pad formed on the upper surface of the insulating layer 15. The pad is electrically connected to the wiring layer 14 via the via wiring. The material of the wiring layer 16 and the thickness of the pad can be the same as, for example, the same as the wiring layer 12. The thickness of the pad may be greater than the thickness of the wiring layer 12. In addition to the pad, the wiring layer 16 may also include a wiring pattern.

[0028] The solder resist layer 17 is a protective insulating layer located on the outermost side of the wiring substrate 1, and is formed on the upper surface of the insulating layer 15 so as to expose the wiring layer 16. The solder resist layer 17 can be formed in a frame shape, for example, so as to expose the wiring layer 16 within the opening 17x. The pads of the wiring layer 16 exposed within the opening 17x can be used, for example, to electrically connect to electronic components such as semiconductor chips. The solder resist layer 17 can be formed from, for example, a photosensitive epoxy insulating resin or an acrylic insulating resin. The thickness of the solder resist layer 17 is, for example, about 15 to 35 μm.

[0029] Furthermore, a metal layer may be formed on the surface of the wiring layer 16 exposed within the opening 17x, or an organic coating may be formed by applying an anti-oxidation treatment such as OSP (Organic Solderability Preservative) treatment. Examples of metal layers include an Au layer, a Ni / Au layer (a metal layer in which Ni and Au layers are stacked in that order), a Ni / Pd / Au layer (a metal layer in which Ni, Pd, and Au layers are stacked in that order), and a Sn layer.

[0030] The insulating layer 23 is an interlayer insulating layer located on the other surface 10b of the core layer 10, covering the wiring layer 22 and the second notch 102. The insulating layer 23 fills the entire second notch 102. The material and thickness of the insulating layer 23 can be the same as, for example, the insulating layer 13. The insulating layer 23 may contain fillers such as silica (SiO2).

[0031] The insulating layer 23 has via holes 23x that penetrate the insulating layer 23 and expose the lower surface of the wiring layer 22. The via holes 23x can be frustoconical recesses in which the diameter of the opening on the insulating layer 25 side is larger than the diameter of the bottom surface of the opening formed by the lower surface of the wiring layer 22.

[0032] The wiring layer 24 is formed on the other side of the insulating layer 23. The wiring layer 24 comprises via wiring filled in via holes 23x and a wiring pattern formed on the underside of the insulating layer 23. The wiring pattern is electrically connected to the wiring layer 22 via the via wiring. The material and thickness of the wiring layer 24 can be the same as, for example, the wiring layer 12.

[0033] The insulating layer 25 is formed on the underside of the insulating layer 23 so as to cover the wiring layer 24. The material and thickness of the insulating layer 25 can be the same as, for example, the insulating layer 13. The insulating layer 25 may contain fillers such as silica (SiO2).

[0034] The insulating layer 25 has via holes 25x that penetrate the insulating layer 25 and expose the lower surface of the wiring layer 24. The via holes 25x can be frustoconical recesses in which the diameter of the opening that opens to the solder resist layer 27 side is larger than the diameter of the bottom surface of the opening formed by the lower surface of the wiring layer 24.

[0035] The wiring layer 26 is formed on the other side of the insulating layer 25. The wiring layer 26 comprises via wiring filled in via holes 25x and a wiring pattern formed on the underside of the insulating layer 25. The wiring pattern is electrically connected to the wiring layer 24 via the via wiring. The material and thickness of the wiring layer 26 can be the same as, for example, the wiring layer 12.

[0036] The solder resist layer 27 is a protective insulating layer located on the outermost side of the wiring board 1, and is formed to cover the wiring layer 26 on the underside of the insulating layer 25. The material and thickness of the solder resist layer 27 can be the same as, for example, the solder resist layer 17. The solder resist layer 27 has an opening 27x, and a portion of the underside of the wiring layer 26 is exposed within the opening 27x. The planar shape of the opening 27x can be, for example, circular. The wiring layer 26 exposed within the opening 27x can be used as a pad for electrically connecting to a mounting board such as a motherboard. If necessary, the aforementioned metal layer may be formed on the underside of the wiring layer 26 exposed within the opening 27x, or an anti-oxidation treatment such as OSP treatment may be applied.

[0037] Generally, in a circuit board, the glass core layer, each wiring layer, and each insulating layer have different coefficients of thermal expansion. For example, the thermal expansion coefficient of a glass core layer is approximately 3 to 15 ppm / °C, that of a copper wiring layer is approximately 17 ppm / °C, and that of a resin insulating layer is approximately 10 to 100 ppm / °C. Therefore, when the temperature of the circuit board rises, thermal contraction force is generated towards the center of the circuit board, tensile stress is generated in the vertical direction, and stress concentrates on the outer periphery of the glass core layer. In some cases, the strength of the glass itself cannot withstand this stress, and internal fracture may occur starting from the outer periphery.

[0038] To suppress internal failure, it is conceivable to provide notches on the outer periphery of the core layer, as shown in Patent Document 1. However, if the notches have corners, stress will concentrate at the corners of the notches, which may be the starting point for internal failure, and therefore the effect of suppressing internal failure may not be sufficient.

[0039] In contrast, the wiring board 1 has a first notch 101 and a second notch 102 on the outer periphery of the glass core layer 10, where the connection between the side and the bottom is curved in cross-sectional view. That is, since the first notch 101 and the second notch 102 do not have corners, stress is distributed and internal fracture of the glass core layer 10 can be suppressed.

[0040] Furthermore, since glass core layers generally have a coefficient of thermal expansion similar to that of wiring and semiconductors, problems such as warping due to temperature changes are less likely to occur. Therefore, wiring boards with glass core layers are often used at higher temperatures than conventional ones. When used at high temperatures, if voids or other air pockets exist in the wiring board, there is a concern that internal fracture of the glass may occur due to air expansion. Therefore, wiring boards with glass core layers require more care than conventional ones to prevent the formation of voids. As shown in Patent Document 1, if the notch has a corner, poor filling of the resin constituting the insulating layer can occur at the corner, making it easier for voids to form.

[0041] In contrast, the wiring board 1 has a first notch 101 and a second notch 102 on the outer periphery of the glass core layer 10, where the connection between the side and bottom is curved in cross-section. That is, since the first notch 101 and the second notch 102 do not have corners, it is possible to suppress the occurrence of poor filling of the resin constituting the insulating layers 13 and 23. As a result, voids and other air gaps are less likely to occur in the wiring board 1, and internal damage to the glass core layer 10 can be suppressed.

[0042] The inventors conducted experiments to confirm the effects of the first and second notches in the wiring board 1, as well as to confirm the presence or absence of voids.

[0043] First, nine Sample A wiring boards were prepared by preparing a 1 mm thick glass core layer and laminating four 30 μm thick epoxy resin insulating layers on both sides of the core layer. The core layer of Sample A was provided with a first notch and a second notch that continuously cut out the entire outer circumference, and the first and second notches were covered with the insulating layer. When the connection between the side and bottom of the first and second notches was observed with a microscope in each of the prepared Sample A, it was found to be curved in cross-sectional view, as shown in Figure 1. Furthermore, observation with a microscope confirmed that the first and second notches were covered with the insulating layer and that no voids were present.

[0044] Next, nine samples of sample B were prepared, each with the same layer structure as sample A. The core layer of sample B did not have the first and second notches. In other words, except for the presence or absence of the first and second notches, sample A and sample B are identical in specifications.

[0045] Next, the core layers of samples A and B immediately after preparation were observed using a microscope to confirm whether or not the glass was broken.

[0046] Next, reflow soldering was performed three times on two samples A and two samples B at 260°C for 1 minute. The core layers of samples A and B after reflow were observed using a microscope to confirm whether or not the glass was fractured.

[0047] Next, the other two samples A and the other two samples B were subjected to five reflow cycles at 260°C for 1 minute each. The core layers of samples A and B after reflow were then observed using a microscope to confirm whether or not the glass had broken.

[0048] Next, the other two samples A and the other two samples B were subjected to 10 reflow cycles at 260°C for 1 minute each. The core layers of samples A and B after reflow were then observed using a microscope to confirm whether or not the glass had broken.

[0049] The verification results are shown in Table 1. Table 1 shows the number of samples in which glass fracture was observed among the examined samples. For example, 1 / 2 indicates that two samples were examined, and glass fracture was observed in only one of them.

[0050] [Table 1] As shown in Table 1, no fracture was observed in either the nine Sample A samples or the nine Sample B samples immediately after preparation (before reflow). In contrast, after three reflow cycles, no glass fracture was observed in Sample A samples that had the first and second notches, but in Sample B samples that did not have the first and second notches, the glass fracture was observed in both out of two samples.

[0051] Furthermore, after five reflow cycles, no glass fracture was observed in sample A, which had both a first and second notch, but in sample B, which did not have either a first or second notch, glass fracture was observed in one out of two samples.

[0052] Furthermore, after 10 reflow cycles, no glass fracture was observed in sample A, which had the first and second notches. However, in sample B, which did not have the first and second notches, the glass fractured in one out of two samples.

[0053] Thus, it was confirmed that by providing a first and second notch on the outer periphery of the glass core layer, where the connection between the side and bottom is curved in cross-sectional view, the fracture of the glass when temperature is applied can be suppressed.

[0054] [Manufacturing method for wiring boards] Figures 2 to 4 illustrate the manufacturing process of a wiring board according to the first embodiment, with Figure 2 being a plan view and Figures 3 and 4 being cross-sectional views.

[0055] First, in the process shown in Figure 2, a glass core layer 10 is prepared. The core layer 10 has multiple wiring regions R1 that are separated into individual pieces to form a wiring substrate, and cutting regions R2 that are cut during the separation process. For convenience, Figure 2 shows the cutting regions R2 as a dot pattern.

[0056] Next, in the process shown in Figure 3(a), through holes 10x are formed in the wiring region R1 of the core layer 10 by wet etching. A first groove 201, wider than the cutting region R2, is formed by wet etching, including the cutting region R2 on one side 10a of the core layer 10. A second groove 202, wider than the cutting region R2, is formed by wet etching, including the cutting region R2 on the other side 10b of the core layer 10. The same etching solution can be used for the wet etching of the first groove 201, the second groove 202, and the through holes 10x. This simplifies the manufacturing process of the wiring board 1. Examples of etching solutions used in this process include hydrofluoric acid and strong alkaline solutions.

[0057] In a plan view, the wiring region R1 on one surface 10a of the core layer 10 has multiple corners, and the first groove 201 includes a portion that bends along each corner of the wiring region R1 on at least one surface 10a. The first groove 201 may be provided along the entire wiring region R1 on one surface 10a. Also, in a plan view, the wiring region R1 on the other surface 10b of the core layer 10 has multiple corners, and the second groove 202 includes a portion that bends along each corner of the wiring region R1 on at least the other surface 10b. The second groove 202 may be provided along the entire wiring region R1 on the other surface 10b. When the first groove 201 and the second groove 202 are formed by wet etching, the connection between the side and bottom of the first groove 201 and the second groove 202 becomes curved in cross-sectional view.

[0058] Next, in the process shown in Figure 3(b), wiring layers 12 are placed in each wiring region R1 on one surface 10a of the core layer 10, wiring layers 22 are placed in each wiring region R1 on the other surface of the core layer 10, and through-wiring 11 is placed in the through-holes 10x. For example, a seed layer (copper, etc.) is formed to cover one surface 10a of the core layer 10, the other surface 10b, and the inner wall surface of the through-holes 10x by electroless plating or sputtering, and an electroplated layer (copper, etc.) is formed on the seed layer by electroplating using the seed layer as a power supply layer. As a result, the through-holes 10x are filled with the electroplated layer formed on the seed layer, and wiring layers 12 and 22, in which the seed layer and the electroplated layer are laminated, are formed on one surface 10a and the other surface 10b of the core layer 10. Next, the wiring layers 12 and 22 are patterned into a predetermined planar shape by subtractive plating or the like.

[0059] Next, in the process shown in Figure 3(c), an insulating layer 13 covering the wiring layer 12 and the first groove 201 is placed in each wiring region R1 and each cut region R2 on one surface 10a of the core layer 10. The insulating layer 13 is formed to cover the first groove 201. Specifically, for example, a semi-cured film-like epoxy resin or the like is laminated to one surface 10a of the core layer 10 to cover the wiring layer 12 and the first groove 201, and then cured to form the insulating layer 13. Alternatively, instead of laminating with a film-like epoxy resin, a liquid or paste-like epoxy resin or the like may be applied and then cured to form the insulating layer 13. The material and thickness of the insulating layer 13 are as described above. Similarly, an insulating layer 23 covering the wiring layer 22 and the second groove 202 is placed in each wiring region R1 and each cut region R2 on the other surface 10b of the core layer 10. The upper surface of the insulating layer 13 in the portion filling the first groove 201 and the upper surface of the insulating layer 13 in the other portions are, for example, on the same plane. Also, the lower surface of the insulating layer 23 in the portion filling the second groove 202 and the lower surface of the insulating layer 23 in the other portions are, for example, on the same plane.

[0060] Next, in the process shown in Figure 3(d), via holes 13x are formed in the insulating layer 13, penetrating the insulating layer 13 and exposing the upper surface of the wiring layer 12. Also, via holes 23x are formed in the insulating layer 23, penetrating the insulating layer 23 and exposing the lower surface of the wiring layer 22. The via holes 13x and 23x can be formed, for example, by a laser processing method using a CO2 laser. After forming the via holes 13x and 23x, it is preferable to perform a desmear treatment to remove resin residue adhering to the surfaces of the wiring layers 12 and 22 exposed at the bottom of the via holes 13x and 23x.

[0061] Next, in the process shown in Figure 4(a), a wiring layer 14 is formed on one side of the insulating layer 13. The wiring layer 14 consists of via wiring filled in via holes 13x and a wiring pattern formed on the upper surface of the insulating layer 13. The wiring layer 14 is electrically connected to the wiring layer 12 exposed at the bottom of the via holes 13x. Similarly, a wiring layer 24 is formed on the other side of the insulating layer 23. The wiring layer 24 consists of via wiring filled in via holes 23x and a wiring pattern formed on the lower surface of the insulating layer 23. The wiring layer 24 is electrically connected to the wiring layer 22 exposed at the bottom of the via holes 23x. The materials and thickness of the wiring patterns of the wiring layers 14 and 24 can be the same as those of the wiring layer 12, for example.

[0062] Next, in the process shown in Figure 4(b), first, the same process as in Figures 3(c), 3(d), and 4(a) is repeated to form insulating layers 15 and 25, and wiring layers 16 and 26. Next, a solder resist layer 17 is formed on the upper surface of the insulating layer 15 so as to cover the wiring layer 16. Also, a solder resist layer 27 is formed on the lower surface of the insulating layer 25 so as to cover the wiring layer 26. The solder resist layer 17 can be formed, for example, by applying a liquid or paste-like photosensitive epoxy insulating resin to the upper surface of the insulating layer 15 so as to cover the wiring layer 16 using a screen printing method, roll coating method, or spin coating method. Alternatively, for example, a film-like photosensitive epoxy insulating resin may be laminated to the upper surface of the insulating layer 15 so as to cover the wiring layer 16. The method for forming the solder resist layer 27 is the same as for the solder resist layer 17. Subsequently, the solder resist layers 17 and 27 are exposed and developed to form openings 17x in the solder resist layer 17 that expose the wiring layer 16. Also, openings 27x are formed in the solder resist layer 27 that expose a portion of the lower surface of the wiring layer 26.

[0063] Next, in the process shown in Figure 4(c), each layer including the core layer 10 is cut in the cutting region R2 shown in Figure 4(b) to produce a plurality of individual wiring boards 1. Cutting can be performed, for example, by a dicer. In the core layer 10 of each individual wiring board 1, the first groove 201 is divided to provide a first notch 101 located on the outside of one surface 10a in a plan view, and the second groove 202 is divided to provide a second notch 102 located on the outside of the other surface 10b in a plan view. Furthermore, the first notch 101 is filled with an insulating layer 13, and the second notch 102 is filled with an insulating layer 23.

[0064] <Variations of the first embodiment> In the modified version of the first embodiment, an example is shown in which the positions of the first notch 101 and the second notch 102 are provided differently from those of the wiring board according to the first embodiment. In the modified version of the first embodiment, descriptions of components that are the same as those described in the previously described embodiment may be omitted.

[0065] Figure 5 is a plan view illustrating a wiring board according to Modification 1 of the First Embodiment. In the wiring board 1A shown in Figure 5, the first notches 101 are bent along the outside of each corner of one surface 10a of the core layer 10 and are spaced apart from each other. That is, the number of corners is the same as the number of first notches 101. The second notches 102 can be provided, for example, in a position that overlaps with the first notches 101 in a plan view.

[0066] Figure 6 is a plan view illustrating a wiring board according to a modified example 2 of the first embodiment. In the wiring board 1B shown in Figure 6, the first notches 101 are provided in the same positions as in the wiring board 1A, and are also provided between adjacent corners. The wiring board 1B has eight first notches 101 spaced apart from each other. The number of spaced-apart first notches 101 may be further increased. The second notches 102 can be provided, for example, in a position that overlaps with the first notches 101 in a plan view.

[0067] As shown in Figures 5 and 6, the first notch 101 does not necessarily have to be a single continuous first notch 101 surrounding the outer edge of one surface 10a, as in the first embodiment, as long as it includes a portion that bends along the outside of each corner of at least one surface 10a. Stress tends to concentrate at each corner of one surface 10a and each corner of the other surface 10b when the temperature rises. Therefore, by providing the first notch 101 to include a portion that bends along the outside of each corner of at least one surface 10a, and the second notch 102 to include a portion that bends along the outside of each corner of at least the other surface 10b, the effect of suppressing internal fracture of the glass core layer 10 can be obtained.

[0068] Although preferred embodiments have been described in detail above, the invention is not limited to the embodiments described above, and various modifications and substitutions can be made to the embodiments described above without departing from the scope of the claims.

[0069] For example, the present invention is also effective for wiring boards having a wiring layer or insulating layer on only one side of a glass core layer. In this case, it is sufficient to provide a notch on only one side of the core layer. [Explanation of Symbols]

[0070] 1,1A,1B Wiring board 10 core layers 10a One side 10b The other side 10x through holes 11. Through-wiring 12, 14, 16, 22, 24, 26 wiring layer 13, 15, 23, 25 Insulating layer 13x, 15x, 23x, 25x Beer Hall 17, 27 Solder resist layer 17x, 27x opening 101 First notch 102 Second notch 201 First trench section 202 Second trench section

Claims

1. A glass core layer, The core layer comprises a first wiring layer disposed on one side of the core layer, The core layer comprises, in plan view, one of the surfaces and a first notch located on its outer side. In plan view, one face of the core layer has a plurality of corners, and the first notch includes a portion that bends along at least each of the corners of the one face. A wiring board in which, in the first notch, the connection between the side and the bottom is curved in cross-sectional view.

2. The wiring board according to claim 1, comprising a first insulating layer disposed on one surface of the core layer and covering the first wiring layer and the first notch.

3. The wiring board according to claim 1, wherein the first notch is provided so as to surround the outer edge of one of the surfaces.

4. The core layer has a second wiring layer disposed on the other side of the core layer, The core layer comprises the other surface in a plan view and a second notch located on the outside thereof, In plan view, the other surface of the core layer has a plurality of corners, and the second notch includes a portion that bends along at least each of the corners of the other surface. The wiring board according to any one of claims 1 to 3, wherein in the second notch, the connection between the side and the bottom is curved in cross-sectional view.

5. The wiring board according to claim 4, further comprising a second insulating layer disposed on the other side of the core layer and covering the second wiring layer and the second notch.

6. The wiring board according to claim 4, wherein the second notch is provided so as to surround the outer edge of the other surface.

7. A process of preparing a glass core layer having multiple wiring regions that will be separated into individual pieces to form a wiring board, and cutting regions that will be cut during the separation process, A step of forming a first groove wider than the cutting region by wet etching so as to include the cutting region on one side of the core layer, A step of arranging the first wiring layer in each of the wiring regions on one side of the core layer, The process includes the step of arranging the first wiring layer and the first insulating layer covering the first groove in each of the wiring regions and each of the cut regions on one side of the core layer, In a plan view, the wiring region on one face of the core layer has a plurality of corners, and the first groove includes a portion that bends along at least each of the corners of the wiring region on the one face. A method for manufacturing a wiring board, wherein the connection between the side and bottom portions of the first groove is curved in cross-sectional view.

8. A step of forming a second groove, wider than the cutting region, by wet etching, so as to include the cutting region on the other side of the core layer, A step of arranging a second wiring layer in each of the wiring regions on the other side of the core layer, The process includes the step of arranging the second wiring layer and the second insulating layer covering the second groove in each of the wiring regions and each of the cut regions on the other surface of the core layer, In plan view, the wiring region on the other face of the core layer has a plurality of corners, and the second groove includes a portion that bends along at least each of the corners of the wiring region on the other face. The method for manufacturing a wiring board according to claim 7, wherein in the second groove, the connection between the side and the bottom is curved in cross-sectional view.

9. The process includes cutting at the aforementioned cutting region to produce a plurality of individual wiring boards, A method for manufacturing a wiring board according to claim 8, wherein the core layer of each of the individualized wiring boards is provided with a first notch, the first groove being divided and located on the outside of one surface in a plan view, and a second notch, the second groove being divided and located on the outside of the other surface in a plan view.

10. The process includes forming through holes penetrating the core layer by wet etching, A method for manufacturing a wiring board according to claim 8 or 9, wherein the same etching solution is used for wet etching of the first groove, the second groove, and the through hole.

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