Semiconductor device and method for manufacturing the same

Abstract

This invention provides a semiconductor device and a method for manufacturing the same that achieve high integration. [Solution] In the semiconductor device 10, the first p-type thin-film transistor 11 has a first gate electrode 21, a first semiconductor film 23, a first source electrode 24, and a first drain electrode 25, and the first insulating layer 26 is configured as the first gate insulating layer. The second n-type thin-film transistor 12 has a second gate electrode 31, a second semiconductor film 33, a second source electrode 34, and a second drain electrode 35, and the second insulating layer 36 is configured as the second gate insulating layer. The first semiconductor film 23, the first source electrode 24, the first drain electrode 25, and the second gate electrode 31 are formed on the first insulating layer 26, and the second semiconductor film 33, the second source electrode 34, and the second drain electrode 35 are formed on the second insulating layer 36 that covers them. When viewed from the stacking direction, one end of the second semiconductor film 33 and the second drain electrode 35 are arranged to overlap the first semiconductor film 23 and the first drain electrode 25.

Description

Technical Field

[0001] The present invention relates to a semiconductor device and a method for manufacturing the same.

Background Art

[0002] There is known a semiconductor device having an n-type thin film transistor and a p-type thin film transistor, in which n-type and p-type semiconductor films are formed in the same layer on a substrate (see, for example, Patent Document 1). Further, there is known a semiconductor device in which an organic semiconductor film, wiring, electrodes, etc. are formed using printing technology.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In the semiconductor device in which n-type and p-type semiconductor films are formed in the same layer as described above, since the n-type thin film transistor and the p-type thin film transistor each occupy space, there is a problem that high integration is difficult. Further, in a thin film transistor using an organic semiconductor film, in order to avoid contamination of n-type and p-type semiconductor materials, it is necessary to ensure a sufficiently large distance between those organic semiconductor films. For this reason, high integration of the semiconductor device has been more difficult.

[0005] The present invention has been made in view of the above circumstances, and an object thereof is to provide a semiconductor device capable of achieving high integration and a method for manufacturing the same.

Means for Solving the Problems

[0006] The semiconductor device of the present invention comprises a first thin-film transistor having a first gate electrode, a first gate insulating layer, a first semiconductor film of one type, n-type or p-type, a first source electrode and a first drain electrode stacked on top of each other, and a second thin-film transistor having a second gate electrode, a second gate insulating layer, a second semiconductor film of the other type, n-type or p-type, a second source electrode and a second drain electrode stacked on top of each other, wherein at least one isolation insulating layer is interposed between the first semiconductor film and the second semiconductor film, the first semiconductor film and the second semiconductor film are formed at different stacking positions, and the first thin-film transistor and the second thin-film transistor are formed at positions where at least a portion overlaps when viewed from the stacking direction.

[0007] In the semiconductor device manufacturing method of the present invention, an insulating layer is formed to cover a first semiconductor film of one type, n-type or p-type, that constitutes a first thin-film transistor. Then, a second semiconductor film of the other type, n-type or p-type, that constitutes a second thin-film transistor is formed, and the second semiconductor film is formed in a position where at least a portion of the first thin-film transistor and the second thin-film transistor overlap when viewed from the stacking direction. [Effects of the Invention]

[0008] According to the present invention, the first thin-film transistor and the second thin-film transistor are formed in positions where at least a portion of them overlap when viewed from the stacking direction, thus enabling high integration. [Brief explanation of the drawing]

[0009] [Figure 1] This is a cross-sectional view showing the layer structure of a semiconductor device according to an embodiment of the present invention. [Figure 2] This is a schematic diagram showing the layout of the first and second thin-film transistors as viewed from the stacking direction. [Figure 3] This is an explanatory diagram showing the steps involved in the manufacturing process of a semiconductor device, up to the formation of the first semiconductor film. [Figure 4]This is an explanatory diagram showing the steps involved in the manufacturing process of a semiconductor device, specifically the process up to the deposition of conductive materials that will form the first source electrode, the first drain electrode, and the second gate electrode. [Figure 5] This is an explanatory diagram showing the steps in the manufacturing procedure for a semiconductor device, up to the formation of the resist film for forming the second semiconductor film. [Figure 6] This is an explanatory diagram showing the remaining steps in the manufacturing process of a semiconductor device. [Modes for carrying out the invention]

[0010] Figure 1 shows the layer structure of the semiconductor device 10. Figure 2 schematically shows the layout of each part of the first thin-film transistor 11 and the second thin-film transistor 12 as viewed from the stacking direction (up and down direction and Z direction in Figure 1). The semiconductor device 10 is configured as a complementary transistor device in which one of the first thin-film transistor 11 and the second thin-film transistor 12 is an n-type thin-film transistor using an n-type semiconductor film, and the other is a p-type thin-film transistor using a p-type semiconductor film. In this example, the first thin-film transistor 11 is an n-type thin-film transistor using an n-type semiconductor film, and the second thin-film transistor 12 is a p-type thin-film transistor using a p-type semiconductor film. This semiconductor device 10 has a structure in which various electrodes, semiconductor films, and insulating layers are stacked on a base layer 14.

[0011] Although Figures 1 and 2 depict one first thin-film transistor 11 and one second thin-film transistor 12, the semiconductor device 10 actually has multiple first thin-film transistors 11 and multiple second thin-film transistors 12. Also, in Figure 1, the hatching indicating the cross-section has been omitted.

[0012] The first thin-film transistor 11 has a first gate electrode 21, a first semiconductor film 23, a first source electrode 24, and a first drain electrode 25, and is configured with a first insulating layer 26 as the first gate insulating layer. The second thin-film transistor 12 has a second gate electrode 31, a second semiconductor film 33, a second source electrode 34, and a second drain electrode 35, and is configured with a second insulating layer 36 as the second gate insulating layer. The first thin-film transistor 11 and the second thin-film transistor 12 have a bottom-gate structure in which the gate electrode is located below the semiconductor film. It is also possible to configure the first thin-film transistor 11 and the second thin-film transistor 12 as a top-gate structure in which the gate electrode is located above the semiconductor film.

[0013] In the following explanation, the base layer 14 side will be considered the lower side of the semiconductor device 10, following the orientation of the semiconductor device 10 shown in Figure 1. However, the orientation and position of the semiconductor device 10 are not limited to this.

[0014] The base layer 14 is made of an insulating material. In this example, the base layer 14 is an insulating substrate in which a polyimide film is attached to the surface of a glass substrate.

[0015] The first gate electrode 21 of the first thin-film transistor 11 is formed of a conductive material on the base layer 14. For example, the first gate electrode 21 is made of Au. In this example, the first gate electrode 21 has a constant width in the X direction (left-right direction, width direction in Figure 1) perpendicular to the Z direction and extends in the Y direction perpendicular to the X and Z directions. The conductive material forming the first gate electrode 21 is not particularly limited as long as it has high conductivity, and may be Al, for example.

[0016] The first insulating layer 26 is formed of an insulating material on the base layer 14 and covers the surface of the base layer 14 including the first gate electrode 21. In this example, the first insulating layer 26 is formed of Al2O3 (alumina). The first insulating layer 26 of Al2O3 can be formed, for example, by the atomic layer deposition (ALD) method. The insulating material forming the first insulating layer 26 can be, in addition to Al2O3, SiO2 (silicon oxide), SiNx (silicon nitride), Ta2O5 (tantalum oxide), HfO2 (hafnium oxide), etc. The first insulating layer 26 of such an insulating material can be formed, for example, by the CVD method, the sputtering method, or the like. By intervening between the first gate electrode 21 and the first semiconductor film 23, the first insulating layer 26 becomes the first gate insulating layer of the first thin film transistor 11 as described above.

[0017] The first semiconductor film 23 is formed on the surface of the first insulating layer 26. When viewed from the Z direction, the central portion that becomes the channel region of the first semiconductor film 23 is arranged so as to overlap and cross the first gate electrode 21, and its width (length in the X direction) is made larger than the width of the first gate electrode 21. The first semiconductor film 23 is an n-type organic semiconductor film or an inorganic semiconductor film.

[0018] Also, on the surface of the first insulating layer 26, the first source electrode 24 and the first drain electrode 25, and the second gate electrode 3 of the second thin film transistor 12 are formed. The first source electrode 24 and the first drain electrode 25 are provided at both ends in the X direction of the first semiconductor film 23 so as to sandwich the central portion of the first semiconductor film 23 in the X direction. A part of both the first source electrode 24 and the first drain electrode 25 overlaps the first semiconductor film 23. In this example, the electrode on the second thin film transistor 12 side, that is, the right end electrode of the first semiconductor film 23 is taken as the first drain electrode 25, and the left end electrode of the first semiconductor film 23 is taken as the first source electrode 24. However, a configuration with the reverse arrangement such that the electrode on the second thin film transistor 12 side becomes the first source electrode may also be used.

[0019] As described above, the second gate electrode 31 is formed on the surface of the first insulating layer 26, i.e., on the same plane, together with the first source electrode 24 and the first drain electrode 25. In this example, the second gate electrode 31 extends in the X direction from the first drain electrode 25 away from the first semiconductor film 23 and is formed integrally with the first drain electrode 25. Therefore, in this example, the first drain electrode 25 and the second gate electrode 31 are electrically connected. By forming the second gate electrode 31 on the same surface of the first insulating layer 26 as the first source electrode 24 and the first drain electrode 25, the manufacturing process is simplified. It is also possible to provide the first drain electrode 25 and the second gate electrode 31 separately and not be electrically connected. Furthermore, in this example, the second gate electrode 31 is provided on the first insulating layer 26 together with the first source electrode 24 and the first drain electrode 25, so that they are at the same stacking position, but the second gate electrode 31 may be provided at a different stacking position from the first source electrode 24 and the first drain electrode 25.

[0020] The conductive material used to form the first source electrode 24, the first drain electrode 25, and the second gate electrode 31 is selected to have a small contact barrier with the first semiconductor film 23. In this example, the first source electrode 24, the first drain electrode 25, and the second gate electrode 31 are formed using Al (aluminum), which has a small contact barrier with the n-type first semiconductor film 23.

[0021] The second insulating layer 36 is formed on the first insulating layer 26 and covers the surface of the first insulating layer 26 including the first semiconductor film 23, the first source electrode 24, the first drain electrode 25, and the second gate electrode 31. The second insulating layer 36 is formed of an organic or inorganic insulating material that can be formed at a temperature that does not affect the first semiconductor film 23, for example, 350°C or lower. Examples of insulating materials that can be formed at 350°C or lower include "ZEOCOAT" (trade name, manufactured by Nippon Zeon Co., Ltd.) and spin-on glass (SOG). This second insulating layer 36 is a separation insulating layer interposed between the first semiconductor film 23 and the second semiconductor film 33, and by interposing between the second gate electrode 31 and the second semiconductor film 33, it becomes the second gate insulating layer of the second thin film transistor 12 as described above.

[0022] In the case where the first semiconductor film 23 is composed of a p-type organic semiconductor film, the temperature that does not affect the first semiconductor film 23 may be 150°C or lower. In such a case, the second insulating layer 36 is formed of an insulating material that can be formed at 150°C or lower. In this case, for forming the second insulating layer 36, a method of forming a SiO film by vapor deposition, a method of forming a SiO2 film by converting polysilazane, or the like can be used.

[0023] The second semiconductor film 33 is formed on the surface of the second insulating layer 36, and the second semiconductor film 33 is formed in a layer above the first semiconductor film 23 formed on the surface of the first insulating layer 26. That is, the first semiconductor film 23 and the second semiconductor film 33 are formed at different stacking positions by interposing a separation insulating layer. When viewed from the Z direction, the second semiconductor film 33 extends in the X direction from near directly above the end of the first semiconductor film 23 in a direction away from the first semiconductor film 23. The central portion of this second semiconductor film 33 that becomes its channel region is arranged directly above the second gate electrode 31. The second semiconductor film 33 is a p-type organic semiconductor film or an inorganic semiconductor film.

[0024] As described above, a second insulating layer 36 is interposed between the first semiconductor film 23 and the second semiconductor film 33 as a separating insulating layer. This makes it possible to avoid contamination of n-type and p-type semiconductor materials when forming the first semiconductor film 23 and the second semiconductor film 33, even when the first thin-film transistor 11 and the second thin-film transistor 12 are arranged in close proximity so that parts of them overlap when viewed from the Z direction.

[0025] Furthermore, a second source electrode 34 and a second drain electrode 35 are formed on the surface of the second insulating layer 36. The second source electrode 34 and the second drain electrode 35 are provided at both ends of the second semiconductor film 33 in the X direction, sandwiching the central part of the second semiconductor film 33 in the X direction. Both the second source electrode 34 and the second drain electrode 35 partially overlap the second semiconductor film 33. In this example, the electrode on the first thin-film transistor 11 side, i.e., the left end of the second semiconductor film 33, is designated as the second drain electrode 35, and the electrode on the left end of the second semiconductor film 33 is designated as the second source electrode 34. However, the arrangement may be reversed so that the electrode on the first thin-film transistor 11 side becomes the second source electrode.

[0026] As the conductive material for forming the second source electrode 34 and the second drain electrode 35, a material with a small contact barrier with the second semiconductor film 33 is selected. In this example, the second source electrode 34 and the second drain electrode 35 are formed using Au, which has a small contact barrier with the p-type second semiconductor film 33.

[0027] In this example, by arranging the parts of the second thin-film transistor 12 as described above, when viewed from the Z direction, the first thin-film transistor 11 and the second thin-film transistor 12 partially overlap each other. More specifically, a portion of the second semiconductor film 33 and the second drain electrode 35 of the second thin-film transistor 12 overlaps with the first semiconductor film 23 and the first drain electrode 25 of the first thin-film transistor 11.

[0028] As described above, by arranging the first thin-film transistor 11 and the second thin-film transistor 12 so that parts of them overlap, the semiconductor device 10 can be highly integrated, and the degree of layout flexibility can be improved. Furthermore, it becomes possible to shorten the length of the wiring, thereby enabling higher speeds.

[0029] A protective film 41 is formed on the second insulating layer 36 using an insulating material, covering the surface of the second insulating layer 36, which includes the second semiconductor film 33, the second source electrode 34, and the second drain electrode 35. The protective film 41 is formed of an organic or inorganic insulating material that can be deposited at a temperature that does not affect the first semiconductor film 23 and the second semiconductor film 33. Examples of insulating materials for forming the protective film 41 include PMMA, PADMA, and "TOPAS" (registered trademark) manufactured by Polyplastics Co., Ltd.

[0030] Examples of n-type organic semiconductor materials used in the first semiconductor film 23 include PDI1MPCN2 (N,N'-di((S)-1-methylpentyl)-1,7(6)-dicyano-perylene-3,4:9,10-bis-(dicarboximide)), PDI-FCN2 (N-fluoroalkylated dicyanoperylene-3,4:9,10-bis(dicarboximides)), PDI-C8 (N,N'-dioctyl perylene diimide), PDI-C13 (N,N'-ditridecyl perylene diimide), PDI-8CN2 (N,N'-bis(n-octyl),1,6-dicyanoperylene-3,4:9,10-bis(dicarboximide)), PBI-F2, and PBI-F4 (fluoro-substituted PBI(Perylene tetracarboxylic acid bisimide)). derivatives), F16CuPc (Copper hexadecafluoro phthalocyanine), TC-PTCDI (tetra-chloroperylene tetracarboxyldiimide), BPE-PTCDI(N,N'-bis(2-phenylethyl)perylene-3,4:9:10-bis-(dicarboximide)), 2,9- Examples include diphenethylanthra[9,1,2-cde:10,5,6-c'd'e']bis([2,7]naphthyridine)-1,3,8,10(2H,9H)-tetraone.

[0031] Examples of p-type organic semiconductor materials used in the second semiconductor film 33 include pentacene and copper phthalocyanine, which can be deposited by vapor deposition. Furthermore, the second semiconductor film 33 can also be formed by edge casting. In this case, the organic semiconductor material can be, for example, Tips-Pentacen (6,13-bis(triisopropylsilylethynyl)pentacene), NSFAAP (13,6-N-sulfinylacetamidopentacene), DMP (6,13-Dihydro-6,13-methanopentacene-15-one), or Pentacene-N-sulfinyl-n-butylcarbamate adduct. Pentacene precursors such as adduct, pentacene-N-sulfinyl-tert-butylcarbamate, BTBT[1]benzothieno[3,2-b]benzothiophene, and C10-DNBDT (3,11-didecyldinaphth[2,3-d:2',3'-d']benzo[1,2-b:4,5-b']dithiophene) are represented by these precursors. Examples include low molecular weight compounds such as (3,11-didecyldinaphto[2,3-d:2',3'-d']benzo[1,2-b:4,5-b']dithiophene)) and C9-DNBDT, which has a different side chain length, compounds with a benzobisthiadiazole skeleton, porphyrins, benzoporphyrins, and oligothiophenes having alkyl groups as soluble groups, as well as high molecular weight compounds such as oligomers, polythiophenes, fluorene copolymers, and IDT-BT (indacenodithiophene benzothiadiazole) and CDT-BT (Cyclopentadithiophene benzothiadiazole) which have a DA structure.

[0032] Figures 3 to 6 show an example of the manufacturing process for the semiconductor device 10. Note that in Figures 3 to 6, hatching to indicate cross-sections is omitted. A resist film 44 is formed on the base layer 14 by lithography in a pattern that exposes the region of the first gate electrode 21 (step ST1). Subsequently, the conductive material 45 for the first gate electrode 21 is deposited by vapor deposition or sputtering (step ST2), and then the resist film 44 is removed to obtain the first gate electrode 21 (step ST3). After this, the surface of the base layer 14 is irradiated with short-wavelength UV (ultraviolet) light for a predetermined time (for example, about 20 minutes) to remove the resist residue, and the laminate with the first gate electrode 21 formed on the base layer 14 is dried by heat treatment at a temperature of, for example, 300°C for about 60 minutes. After this drying, Al2O3 is deposited using a formation method appropriate to the insulating material, for example by atomic layer deposition, to cover the surface of the first gate electrode 21 and the base layer 14 of the laminate, thereby forming the first insulating layer 26 (step ST4).

[0033] Next, a semiconductor film 46, which will become the first semiconductor film 23, is formed to cover the surface of the first insulating layer 26 (step ST5). The method for forming the semiconductor film 46 depends on the semiconductor material of the first semiconductor film 23; for example, sputtering or spin coating can be used. If the first semiconductor film 23 is an organic semiconductor, the semiconductor film 46 can be formed using methods such as plated or plateless printing, edge casting, continuous edge casting, deposition, or stamp transfer technology. After that, the first semiconductor film 23 is dried and densified by heat treatment.

[0034] A resist film 47 is formed on the semiconductor film 46 using lithography to cover only the region of the first semiconductor film 23 (step ST6). Using the resist film 47 as a mask, wet etching or dry etching is performed on the semiconductor film 46, and then the resist film 47 is removed to obtain the first semiconductor film 23 (step ST7). After that, heat treatment is performed to dry the first semiconductor film 23.

[0035] A resist is applied to the surfaces of the first semiconductor film 23 and the first insulating layer 26 to form a resist film 48 patterned so that the regions of the first source electrode 24, the first drain electrode 25, and the second gate electrode 31 are exposed (step ST8). Using the resist film 48 as a mask, a conductive material (Al in this example) 49 is deposited by vapor deposition or sputtering (step ST9). After this deposition, the resist film 48 is removed to obtain the first source electrode 24, the first drain electrode 25, and the second gate electrode 31 (step ST10). Subsequently, the laminate with the first source electrode 24, the first drain electrode 25, and the second gate electrode 31 is dried by heat treatment at a temperature of 90°C for about 3 hours.

[0036] A second insulating layer 36 is formed on the first insulating layer 26 by a formation method appropriate to the insulating material, such as a spin coating method, so as to cover the surface of the first insulating layer 26, the first semiconductor film 23, the first source electrode 24, the first drain electrode 25, and the second gate electrode 31 (step ST11). After this, for example, the second insulating layer 36 is densified by heat treatment at a temperature of 200°C for about 1 hour.

[0037] A semiconductor film 53, which will become the second semiconductor film 33, is formed to cover the surface of the second insulating layer 36 (step ST12). The method for forming the semiconductor film 53 is the same as for the semiconductor film 46, and is a method that depends on the semiconductor material of the second semiconductor film 33.

[0038] A resist film 54 is formed on the semiconductor film 53 using lithography to cover only the region of the second semiconductor film 33 (step ST13). The second semiconductor film 33 is formed by wet etching or dry etching of the semiconductor film 53 using the resist film 54 as a mask, and then removing the resist film 54 (step ST14). After that, the second semiconductor film 33 is dried by heat treatment. The resist film 54 is patterned so as to hide the portion of the semiconductor film 53 directly above the first drain electrode 25, so that when viewed from the Z direction, a portion of the second semiconductor film 33 overlaps with a portion of the first drain electrode 25.

[0039] A resist is applied to the surfaces of the second semiconductor film 33 and the second insulating layer 36 to form a resist film 55 patterned so that the regions of the second source electrode 34 and the second drain electrode 35 are open (step ST15). Using the resist film 55 as a mask, a conductive material (Au in this example) 56 is deposited by vapor deposition or sputtering (step ST16). After this, the resist film 55 is removed to obtain the second source electrode 34 and the second drain electrode 35 (step ST17). After this, the laminate with the second source electrode 34 and the second drain electrode 35 is dried by heat treatment at a temperature of 80°C for about 1 hour.

[0040] The resist film 55 is patterned so that the region including the edge of the first semiconductor film 23 and the area directly above the first drain electrode 25 forms an opening that forms the second drain electrode 35. When viewed from the Z direction, the second drain electrode 35 is formed such that a portion of it overlaps with the edge of the first semiconductor film 23 and a portion of the first drain electrode 25.

[0041] After the formation of the second source electrode 34 and the second drain electrode 35, a protective film 41 is formed to cover the surfaces of the second semiconductor film 33, the second source electrode 34, the second drain electrode 35, and the second insulating layer 36. After the formation of the protective film 41, contact holes and wiring for electrically connecting the first thin-film transistor 11 and the second thin-film transistor 12 are sequentially formed to form the semiconductor circuit in the semiconductor device 10.

[0042] In the above, the first semiconductor film 23 formed in a lower layer relatively close to the base layer 14 is defined as n-type, and the second semiconductor film 33 formed in a layer above the first semiconductor film 23 is defined as p-type. However, it is also possible to define the first semiconductor film 23 as p-type and the second semiconductor film 33 as n-type. On the other hand, n-type semiconductor films tend to have high deposition temperatures, and p-type organic semiconductor films are prone to degradation at high temperatures. For this reason, when constructing one thin-film transistor using a p-type organic semiconductor film, it is preferable to define the first semiconductor film 23, which is formed first, as n-type, and the second semiconductor film 33, which is formed afterward, as p-type. By doing so, the p-type second semiconductor film 33 can be made unaffected by the deposition of the n-type first semiconductor film 23. In addition, the temperature constraints in the process before forming the p-type second semiconductor film 33 can be reduced.

[0043] In the above example, the first source electrode 24 and the first drain electrode 25 and the second gate electrode 31 are provided on the surface of the same insulating layer (second insulating layer 36). However, the second gate electrode 31 may be provided in a position below or above the first source electrode 24 and the first drain electrode 25. Also, in the above example, the first thin-film transistor 11 and the second thin-film transistor 12 have a bottom gate structure, but they may also have a top gate structure. [Explanation of symbols]

[0044] 10 Semiconductor Devices 11. First Thin-Film Transistor 12. Second Thin-Film Transistor 14 Base Layer 21 First Gate 23 First Semiconductor Film 24 First source electrode 25 First drain electrode 26. First insulating layer 31. Second gate 33. Second Semiconductor Film 34. Second source electrode 35. Second drain electrode 36. Second insulating layer

Claims

1. A first thin-film transistor comprising a first gate electrode, a first gate insulating layer, a first semiconductor film of either n-type or p-type, and a first source electrode and a first drain electrode stacked together, A second thin-film transistor comprising a second gate electrode, a second gate insulating layer, a second semiconductor film of the other type (n-type and p-type), a second source electrode, and a second drain electrode stacked together. Equipped with, At least one isolation insulating layer is provided between the first semiconductor film and the second semiconductor film, and the first semiconductor film and the second semiconductor film are formed at different stacking positions. The first thin-film transistor and the second thin-film transistor are formed in positions where at least a portion of them overlap when viewed from the stacking direction. A semiconductor device characterized by the following features.

2. The first semiconductor film, the first source electrode, and the first drain electrode and the second gate electrode are formed on the first gate insulating layer and covered with the second gate insulating layer. The second semiconductor film is formed on the second gate insulating layer. The second gate insulating layer is the separation insulating layer. The semiconductor device according to feature 1.

3. The semiconductor device according to claim 1 or 2, characterized in that at least one of the first semiconductor film and the second semiconductor film is an organic semiconductor.

4. When viewed from the stacking direction, one of the second source electrode and the second drain electrode overlaps one of the first source electrode and the first drain electrode. The semiconductor device according to claim 1 or 2.

5. After forming an insulating layer covering one of the n-type and p-type first semiconductor films that constitute the first thin-film transistor, a second semiconductor film of the other n-type and p-type that constitutes the second thin-film transistor is formed. The first thin-film transistor and the second thin-film transistor are formed in positions where at least a portion of them overlap when viewed from the stacking direction. A method for manufacturing a semiconductor device, characterized by the following:

6. The first semiconductor film is an n-type organic semiconductor, and the second semiconductor film is a p-type organic semiconductor. The method for manufacturing a semiconductor device according to claim 5, characterized in that it is a semiconductor device.

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