Electro-optical devices and electronic equipment

Abstract

To provide an electro-optical device that can suppress temperature rise. [Solution] The electro-optical device comprises a transistor, a pixel electrode provided corresponding to the transistor, a first conductive layer having a first film electrically connected to the pixel electrode and a second film provided on the pixel electrode side of the first film having a higher light reflectivity than the first film and covering the side surface of the first film, and a connecting member provided in a contact hole for electrically connecting the pixel electrode and the first film of the first conductive layer.

Description

Technical Field

[0001] The present invention relates to an electro-optical device and an electronic device including the electro-optical device.

Background Art

[0002] As a conventional electro-optical device, for example, the one described in Patent Document 1 is known. Patent Document 1 describes a liquid crystal panel provided with a holding capacitor connected via a pixel contact hole directly under a pixel electrode.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In the electro-optical device described in Patent Document 1, the capacitive electrode constituting the holding capacitor is formed of titanium nitride. Since the reflectivity of titanium nitride is low, most of the light hitting the capacitive electrode is absorbed without being reflected, causing the temperature of the liquid crystal panel to rise.

Means for Solving the Problems

[0005] An electro-optical device according to one aspect of the present application includes a transistor, a pixel electrode provided corresponding to the transistor, a first film electrically connected to the pixel electrode in a layer between the transistor and the pixel electrode, and a second film provided on the pixel electrode side of the first film and having a higher light reflectivity than the first film and covering a side surface of the first film. The electro-optical device further includes a first conductive layer having the first film and the second film, and a connection member provided in a contact hole for electrically connecting the pixel electrode and the first film of the first conductive layer.

[0006] An electronic device relating to one aspect of the present invention comprises the electro-optical device described above. [Brief explanation of the drawing]

[0007] [Figure 1] A plan view of the electro-optical apparatus according to Embodiment 1. [Figure 2] Cross-sectional view of the electro-optical apparatus along line II-II in Figure 1. [Figure 3] An equivalent circuit diagram showing the electrical configuration of the element substrate. [Figure 4] An explanatory diagram showing the cross-sectional structure of the display area on the element substrate. [Figure 5] An explanatory diagram showing the planar structure of the display area on the element substrate. [Figure 6] An explanatory diagram showing the planar structure of the display area on the element substrate. [Figure 7] An explanatory diagram showing the planar structure of the display area on the element substrate. [Figure 8] An explanatory diagram showing the planar structure of the display area on the element substrate. [Figure 9] An explanatory diagram showing the planar structure of the display area on the element substrate. [Figure 10] A cross-sectional view along line XX in Figure 9. [Figure 11] An enlarged plan view showing a magnified portion of the planar structure of the relay layer and conductive layer. [Figure 12] A flowchart illustrating the manufacturing process for contact holes. [Figure 13] A cross-sectional view showing one aspect of the manufacturing process. [Figure 14] A cross-sectional view showing one aspect of the manufacturing process. [Figure 15] A cross-sectional view showing one aspect of the manufacturing process. [Figure 16] A cross-sectional view showing one aspect of the manufacturing process. [Figure 17] A cross-sectional view showing one aspect of the manufacturing process. [Figure 18] A cross-sectional view showing one aspect of the manufacturing process. [Figure 19] A cross-sectional view showing one aspect of the manufacturing process. [Figure 20] A cross-sectional view showing one aspect of the manufacturing process. [Figure 21] Flowchart showing the manufacturing process of a contact hole. [Figure 22] Cross-sectional view showing one aspect of the manufacturing process. [Figure 23] Cross-sectional view showing one aspect of the manufacturing process. [Figure 24] Cross-sectional view showing one aspect of the manufacturing process. [Figure 25] Cross-sectional view showing one aspect of the manufacturing process. [Figure 26] Schematic diagram showing an example of an electronic device according to Embodiment 2.

Embodiments for Carrying Out the Invention

[0008] Hereinafter, embodiments of the present invention will be described with reference to the drawings. In each of the following drawings, for ease of viewing each component, the scale of the dimensions may be shown differently depending on the component. Also, hereinafter, for convenience of explanation, the X-axis, Y-axis, and Z-axis orthogonal to each other will be appropriately used for explanation. Further, one direction along the X-axis is denoted as the X1 direction, and the direction opposite to the X1 direction is denoted as the X2 direction. Similarly, one direction along the Y-axis is denoted as the Y1 direction, and the direction opposite to the Y1 direction is denoted as the Y2 direction. One direction along the Z-axis is denoted as the Z1 direction, and the direction opposite to the Z1 direction is denoted as the Z2 direction. Also, hereinafter, looking in the Z1 direction or Z2 direction is referred to as "plan view", and looking from a direction perpendicular to a cross-section including the Z-axis is referred to as "cross-sectional view".

[0009] Furthermore, in the following description, for example, with respect to a substrate, the description "on the substrate" means any of the cases where it is disposed in contact with the top of the substrate, where it is disposed on the substrate via another structure, or where a part is disposed in contact with the top of the substrate and a part is disposed on the substrate via another structure. Also, for example, the description "the upper surface of the substrate" indicates the surface on the Z1 side of the substrate, and the description "the lower surface of the substrate" indicates the surface on the Z2 side of the substrate.

[0010] 1. Embodiment 1 In this embodiment, an example of a liquid crystal device will be described as an electro-optical device. The liquid crystal display is an actively driven transmissive liquid crystal display equipped with a TFT (Thin Film Transistor) as a switching element for each pixel. This liquid crystal display is used, for example, as an optical modulator in a projection display device described later. In this embodiment, the projection display device is an example of an electronic device.

[0011] 1.1. Overview of the structure of a liquid crystal display device The structure of the liquid crystal apparatus 300 according to this embodiment will be described with reference to Figures 1 and 2. Figure 1 shows a plan view of the liquid crystal apparatus 300. Figure 2 shows a schematic cross-sectional configuration of the liquid crystal apparatus 300 along the line II-II in Figure 1.

[0012] As shown in Figures 1 and 2, the liquid crystal device 300 includes a light-transmitting element substrate 100, a light-transmitting opposing substrate 200, a frame-shaped sealing member 8, and a liquid crystal layer Lc. "Light-transmitting" refers to the ability to transmit visible light, preferably with a visible light transmittance of 50% or more.

[0013] The liquid crystal display device 300 has a display area A1 for displaying an image and a peripheral area A2 located outside the display area A1 in a planar view. Display area A1 is provided with multiple pixels P arranged in a matrix. Although the shape of the liquid crystal device 300 and display area A1 shown in Figure 1 is rectangular, other shapes, such as a circle, may also be used.

[0014] As shown in Figure 2, the element substrate 100 and the opposing substrate 200 are arranged with a liquid crystal layer Lc in between. In this embodiment, a counter substrate 200 is placed on the light incidence side of the liquid crystal layer Lc, and an element substrate 100 is placed on the light emission side of the liquid crystal layer Lc. The incident light IL incident on the counter substrate 200 is modulated by the liquid crystal layer Lc and emitted from the element substrate 100 as modulated light ML.

[0015] The element substrate 100 has a base body 90, multiple interlayer insulating layers including an interlayer insulating layer 82, a pixel electrode 10, and an alignment film 12.

[0016] The substrate 90 is a translucent and insulating flat plate. The substrate 90 is, for example, a glass substrate or a quartz substrate. Transistors 1, relay layers, or conductive layers, which will be described later, are arranged between the layers of the multiple interlayer insulating layers.

[0017] The pixel electrode 10 is translucent. The pixel electrode 10 is formed from ITO (Indium Tin Oxide). Alternatively, the pixel electrode 10 may be formed from transparent conductive materials such as IZO (Indium Zinc Oxide) and FTO (Fluorine-doped tin oxide). The thickness direction of the pixel electrode 10 coincides with the Z1 direction or the Z2 direction.

[0018] The alignment film 12 is transparent and insulating. The alignment film 12 aligns the liquid crystal molecules of the liquid crystal layer Lc. Examples of materials for the alignment film 12 include silicon oxide (SiO2) or polyimide.

[0019] The opposing substrate 200 has a base 210, an insulating layer 220, a common electrode 230, and an alignment film 240. The substrate 210 is a translucent and insulating flat plate. The substrate 210 is, for example, a glass substrate or a quartz substrate. The insulating layer 220 is transparent and insulating. The material of the insulating layer 220 is an inorganic material such as silicon oxide.

[0020] The common electrode 230 is an electrode positioned opposite to multiple pixel electrodes 10, and can be referred to as a counter electrode. The common electrode 230 is formed from a transparent conductive material such as ITO, IZO, or FTO. The common electrode 230 and the pixel electrodes 10 apply an electric field to the liquid crystal layer Lc. The alignment film 240 is transparent and insulating.

[0021] The sealing member 8 is placed between the element substrate 100 and the opposing substrate 200. The sealing member 8 is formed using an adhesive containing various curable resins, such as epoxy resin. The sealing member 8 may also include a gap material made of an inorganic material such as glass.

[0022] The liquid crystal layer Lc is located within a region enclosed by the element substrate 100, the opposing substrate 200, and the sealing member 8. The liquid crystal layer Lc is an electro-optic layer whose optical properties change in response to the electric field generated by the pixel electrode 10 and the common electrode 230. The liquid crystal layer Lc contains liquid crystal molecules having positive or negative dielectric anisotropy. The orientation of the liquid crystal molecules changes in response to the electric field applied to the liquid crystal layer Lc. The liquid crystal layer Lc modulates the incident light IL in response to the applied electric field.

[0023] As shown in Figure 1, multiple scan line drive circuits 6, data line drive circuits 7, and external terminals 9 are arranged in the peripheral region A2 of the element substrate 100. External terminal 9 is a mounting terminal on which external connection lines, such as FPC (Flexible Printed Circuits) (not shown), are mounted. Various signals, such as image signals, synchronization signals, inspection signals, common potential, and power supply potential, are supplied to external terminal 9 via the external connection lines.

[0024] 1.2. Electrical configuration of the element substrate Figure 3 is an equivalent circuit diagram showing the electrical configuration of the element substrate 100. As shown in Figure 3, the display area A1 of the element substrate 100 is provided with multiple transistors 1, n scan lines 3, m data lines 4, m capacitance lines 5, pixel electrodes 10, and capacitance elements 2. n and m are integers of 2 or greater.

[0025] Transistor 1 is provided corresponding to each intersection of the n scan lines 3 and the m data lines 4. The pixel electrode 10 is electrically connected to the drain region of transistor 1. Each of the n scan lines 3 extends in the X1 direction, and the n scan lines 3 are arranged at equal intervals in the Y1 direction. Each of the n scan lines 3 is electrically connected to the gate electrode of the corresponding transistor 1. The n scan lines 3 are electrically connected to the scan line driving circuit 6 shown in Figure 1. The scan line drive circuit 6 supplies scan signals G1, G2, ..., and Gn to 1 to n scan lines 3 in line-by-line sequence.

[0026] Each of the m data lines 4 extends in the Y1 direction, and the m data lines 4 are arranged at equal intervals in the X1 direction. Each of the m data lines 4 is electrically connected to the source region of the corresponding set of transistors 1. The m data lines 4 are electrically connected to the data line drive circuit 7 shown in Figure 1. The data line drive circuit 7 supplies image signals E1, E2, ..., and Em to 1 to m data lines 4.

[0027] The n scan lines 3 and m data lines 4 are electrically insulated from each other and are arranged in a grid pattern in a planar view. The region enclosed by two adjacent scan lines 3 and two adjacent data lines 4 corresponds to a pixel P.

[0028] Each of the m capacitance lines 5 extends in the Y1 direction, and the m capacitance lines 5 are arranged at equal intervals in the X1 direction. The capacitance lines 5 are electrically insulated from the data lines 4 and scan lines 3, and are spaced apart from them. A fixed potential, such as a common potential or ground potential, is supplied to the capacitance lines 5 via the external terminal 9.

[0029] One electrode of the capacitive element 2 is electrically connected to the capacitance line 5. The other electrode of the capacitive element 2 is electrically connected to the pixel electrode 10 and holds the potential of the image signal supplied to the pixel electrode 10. As will be described later, in this embodiment, one electrode of the capacitive element 2 is a capacitance line 5, and the other electrode of the capacitive element 2 is a relay layer that electrically connects the pixel electrode 10 and the transistor 1.

[0030] 1.3. Cross-sectional and planar structures of the display area on the element substrate Figure 4 is an explanatory diagram showing the cross-sectional structure of the display area A1 of the element substrate 100, and is a cross-sectional view showing the stacking relationship and electrical connection relationship of each layer. Figures 5 to 9 are plan views showing the planar structure of the main layers. As shown in Figure 4, in the display area A1, the element substrate 100 has a cross-sectional structure in which insulating or conductive functional layers or functional films are stacked on the substrate 90.

[0031] Figure 5 is a plan view showing the planar structure from the substrate 90 to the interlayer insulating layer 76, with the light-shielding layer 80, semiconductor layer 70, gate electrode 74, and contact holes 71, 73, 75, and 81 shown by solid lines. In Figures 5 to 9, the position of the pixel electrode 10 is shown by a dashed line to show the positional relationship of each component in a plan view. The shape of the pixel electrode 10 is rectangular.

[0032] As shown in Figure 4, a light-shielding layer 80 is placed between the substrate 90 and the interlayer insulating layer 82. As shown in Figure 5, the light-shielding layer 80 is provided so as to overlap with the transistor 1 in a plan view. The transistor 1 is provided so as to extend in the Y1 direction and the Y2 direction between the four pixel electrodes 10. The light-shielding layer 80 has a portion that extends in the Y1 direction, a portion that extends in the Y2 direction, and a protruding portion that overlaps with each corner of the four pixel electrodes 10.

[0033] The light-shielding layer 80 is formed of a conductive material having light-shielding properties. Examples of conductive materials having light-shielding properties include metals such as tungsten (W), titanium (Ti), chromium (Cr), iron (Fe), and aluminum (Al), metal nitrides, and metal silicides. The same applies to conductive materials having light-shielding properties, and they function as a light-shielding layer. "Light-shielding properties" refers to light-shielding properties with respect to visible light, preferably with a visible light transmittance of less than 50%, and more preferably with a transmittance of 10% or less.

[0034] The interlayer insulating layer 82 is transparent and insulating. The interlayer insulating layer 82 is formed from an inorganic material such as silicon oxide (SiO2). Hereafter, the interlayer insulating layer is formed from the same material as the interlayer insulating layer 82.

[0035] As shown in Figure 4, a transistor 1 is provided on the interlayer insulating layer 82. Transistor 1 has a semiconductor layer 70 having an LDD (Lightly Doped Drain) structure, a gate electrode 74, and a gate insulating layer 72. The semiconductor layer 70 has a drain region 70d, an LDD region 70a, a channel region 70c, an LDD region 70b, and a source region 70s.

[0036] The channel region 70c is located in the central part of the semiconductor layer 70. The LDD region 70b is located between the channel region 70c and the source region 70s. The LDD region 70a is located between the channel region 70c and the drain region 70d.

[0037] The semiconductor layer 70 is, for example, polysilicon, and the regions excluding the channel region 70c are doped with impurities to enhance conductivity. The impurity concentrations in the LDD region 70b and LDD region 70a are lower than the impurity concentrations in the source region 70s and drain region 70d.

[0038] A gate electrode 74 is provided on the semiconductor layer 70 via a gate insulating layer 72. The gate electrode 74 overlaps the channel region 70c of the semiconductor layer 70. The gate electrode 74 is formed, for example, using polysilicon doped with impurities to enhance conductivity. Alternatively, the gate electrode 74 may be formed using conductive materials such as metals, metal silicides, and metal compounds. The gate insulating layer 72 is composed of silicon oxide, which is formed by, for example, thermal oxidation or CVD (Chemical Vapor Deposition).

[0039] An interlayer insulating layer 76 is provided on transistor 1. A conductive layer 61 is provided on the interlayer insulating layer 76. In this embodiment, the conductive layer 61 is a scanning line 3. The conductive layer 61 is formed of a light-shielding conductive material.

[0040] Figure 6 is a plan view showing the planar structure of the conductive layer 61 provided on the interlayer insulating layer 76, with the conductive layer 61, light-shielding member 62, and contact holes 71 and 73 shown by solid lines, and the contact holes 75 and 81 and semiconductor layer 70 shown by dashed lines.

[0041] As shown in Figure 4, the conductive layer 61 is electrically connected to the gate electrode 74 via a contact hole 75 provided in the interlayer insulating layer 76. The conductive layer 61 is also electrically connected to the light-shielding layer 80 via contact holes 81 provided in the interlayer insulating layer 76 and the interlayer insulating layer 82. The light-shielding layer 80 receives a scanning signal from the conductive layer 61 and functions as a back gate.

[0042] As shown in Figure 6, the contact holes 81 are provided along the X1-direction side and X2-direction side of the channel region 70c and LDD region 70a, shielding the channel region 70c and LDD region 70a from light incident from these sides.

[0043] The conductive layer 61 extends in the X1 and X2 directions so as to overlap with the region between adjacent pixel electrodes 10 in the Y1 and Y2 directions. The conductive layer 61 also has protruding portions that overlap with the corners of each of the four pixel electrodes 10.

[0044] The light-shielding member 62 is provided so as to overlap with the LDD region 70a in a plan view. As shown in Figure 4, the light-shielding member 62 is connected to the relay layer 54, and the potential of the drain region 70d is applied through the contact hole 71 and the relay layer 54.

[0045] Figure 7 is a plan view showing the planar structure of the relay layers 53 and 54, with the relay layers 53 and 54 and contact holes 51 and 52 shown by solid lines, and the contact holes 71 and 73, light-shielding member 62, and semiconductor layer 70 shown by dashed lines.

[0046] The relay layers 53 and 54 are provided so as to overlap with the regions between adjacent pixel electrodes 10 in the X1 and X2 directions, respectively. The relay layer 54 is provided at a position that overlaps with the corners of the four pixel electrodes 10, and has a protruding portion that overlaps with the corner of each pixel electrode 10.

[0047] As shown in Figure 4, the relay layer 54 is electrically connected to the drain region 70d of the semiconductor layer 70 via contact holes 71 provided in the interlayer insulating layer 60 and the interlayer insulating layer 76. The relay layer 53 is electrically connected to the source region 70s of the semiconductor layer 70 via contact holes 73 provided in the interlayer insulating layer 60 and the interlayer insulating layer 76.

[0048] An interlayer insulating layer 50 is provided on the intermediate layer 53 and the intermediate layer 54, and an intermediate layer 41 and a conductive layer 42 are provided on the interlayer insulating layer 50. In this embodiment, the conductive layer 42 is a data line 4. The relay layer 41 and the conductive layer 42 are provided in the same layer and are each formed of a light-shielding conductive material.

[0049] Figure 8 is a plan view showing the planar structure of the relay layer 41 and the conductive layer 42, with the relay layer 41, the conductive layer 42, and the contact holes 43 shown by solid lines, and the contact holes 51, 52, and the semiconductor layer 70 shown by dashed lines.

[0050] The relay layer 41 is provided so as to overlap with the region between adjacent pixel electrodes 10 in the Y1 and Y2 directions. The conductive layer 42 extends in the Y1 and Y2 directions so as to overlap with the region between adjacent pixel electrodes 10 in the X1 and X2 directions, and is provided so as to overlap with the semiconductor layer 70.

[0051] As shown in Figure 4, the relay layer 41 is electrically connected to the relay layer 54 via the contact hole 51. The conductive layer 42 is electrically connected to the relay layer 53 via the contact hole 52.

[0052] An interlayer insulating layer 40 is provided on the intermediate layer 41, the conductive layer 42, and the interlayer insulating layer 50. A conductive layer 44 and an interlayer insulating layer 30 are provided on the interlayer insulating layer 40. A capacitive insulating layer 32 and an intermediate layer 23 are provided on the conductive layer 44 and the interlayer insulating layer 30.

[0053] In this embodiment, the conductive layer 44 is a capacitance line 5. The conductive layer 44 is formed of a light-shielding conductive material. The relay layer 23 is made of a light-shielding conductive material and is the light-shielding layer located closest to the pixel electrode 10. In this embodiment, the relay layer 23 also functions as a light-reflecting layer.

[0054] The conductive layer 44, the intermediate layer 23, and the capacitive insulating layer 32 form a capacitive element 2. More specifically, the portion where the conductive layer 44 and the intermediate layer 23 face each other, separated only by the capacitive insulating layer 32, is the capacitive element 2. In the capacitive element 2, the conductive layer 44 and the intermediate layer 23 are capacitive electrodes, respectively.

[0055] The interlayer insulating layer 30 is provided so as to cover the end portion 44e of the conductive layer 44. In this embodiment, the end portion 44e includes the side surface of the conductive layer 44 and a portion of the upper surface of the conductive layer 44 along the corner between the side surface and the upper surface of the conductive layer 44.

[0056] Therefore, a stepped portion 30a is formed around the periphery of the capacitive element 2 by the interlayer insulating layer 30. The stepped portion 30a covers the end portion 44e of the conductive layer 44. By forming a stepped portion 30a around the periphery of the capacitive element 2 by the interlayer insulating layer 30, a configuration can be made in which the relay layer 23 and the conductive layer 44 are less likely to short-circuit. Furthermore, since the stepped portion 30a is provided along the end portion 44e of the conductive layer 44, the area of ​​the capacitive element 2 can be maximized, and the capacitance of the capacitive element 2 can be increased.

[0057] Figure 9 is a plan view showing the planar structure of the relay layer 23 and the conductive layer 44, with the relay layer 23 and contact holes 21 shown by solid lines, and the conductive layer 44, contact holes 43, and semiconductor layer 70 shown by dashed lines.

[0058] The relay layer 23 is formed in an inverted L-shape in plan view and has an extended portion 23a that extends in the X2 direction so as to overlap the region between adjacent pixel electrodes 10 in the Y1 and Y2 directions, an extended portion 23b that extends in the Y2 direction so as to overlap the region between adjacent pixel electrodes 10 in the X1 and X2 directions, and a protruding portion 23c that overlaps with the corners of the four pixel electrodes. The protruding portion 23c1 is the part of the protruding portion 23c that overlaps with the corner of the pixel electrode 10 at the corner between the extended portion 23a and the extended portion 23b. The corner between the extended portion 23a and the extended portion 23b may be rephrased as the corner defined by the extended portion 23a and the extended portion 23b.

[0059] In this embodiment, the relay layer 23 is an example of the first conductive layer, the extended portion 23a is an example of the first extended portion, the extended portion 23b is an example of the second extended portion, and the protruding portion 23c is an example of the protruding portion. Also, the X2 direction is an example of the first direction, and the Y2 direction is an example of the second direction.

[0060] The conductive layer 44 has an extended portion 44b that extends in the Y1 and Y2 directions between adjacent pixel electrodes 10 in the X1 and X2 directions, an extended portion 44a that overlaps with the extended portion 23a in a plan view, and an extended portion 44c that overlaps with the protruding portion 23c in a plan view. The protruding portion 44c also has an extended portion 44c1 that overlaps with the protruding portion 23c1 in a plan view.

[0061] As shown in Figure 4, the capacitive insulating layer 32 is provided between the conductive layer 44 and the relay layer 23. Around the capacitive element 2, the capacitive insulating layer 32 is provided so as to cover the interlayer insulating layer 30. In this embodiment, the conductive layer 44 is an example of a second conductive layer, and the interlayer insulating layer 30 is an example of an insulating member.

[0062] The relay layer 23 is electrically connected to the relay layer 41 via contact holes 43 provided in the interlayer insulating layer 30 and the interlayer insulating layer 40.

[0063] By providing a capacitance line 5 in the region between the relay layer 23 and the data line 4, the region between the relay layer 23 and the data line 4 is shielded by the capacitance line 5, and electrical coupling between the relay layer 23 and the data line 4 is suppressed. Therefore, it is possible to suppress the superposition of image signals from other pixels P supplied to the data line 4 as noise onto the image signal.

[0064] An interlayer insulating layer 20 and a protective layer 22 are provided on the intermediate layer 23, the capacitive insulating layer 32, and the interlayer insulating layer 30. The protective layer 22 is made of an inorganic material that is translucent and hygroscopic, such as BSG (Borosilicate Glass). The protective layer 22 may be omitted. Pixel electrodes 10 are provided on the protective layer 22.

[0065] The pixel electrode 10 is electrically connected to the relay layer 23 via contact holes 21 provided in the interlayer insulating layer 20 and the protective layer 22. A contact plug 25 is provided inside the contact hole 21. The contact hole 21 and the contact plug 25 constitute the pixel contact.

[0066] As shown in Figure 9, the contact hole 21 is located in a position that overlaps with the protruding portion 23c1 in a plan view. Also, as shown in Figure 4, the contact hole 21 is located in a position that overlaps with the relay layer 23, the capacitive insulating layer 32, and the conductive layer 44, but does not overlap with the interlayer insulating layer 30.

[0067] 1.4. Light-reflecting layer and pixel contact Figure 10 is a cross-sectional view along line XX in Figure 9, showing the cross-sectional structure on the interlayer insulating layer 50. The relay layer 23 has a conductive film 231 and a reflective film 232 provided on the conductive film 231. The reflective film 232 is provided so as to cover the upper surface and side surface 231e of the conductive film 231. The conductive film 231 contains titanium nitride (TiN).

[0068] The reflective film 232 contains aluminum. Aluminum has a higher light reflectivity than titanium nitride. Therefore, the reflective film 232 functions as a light reflective layer. Specifically, the reflective film 232 reflects about 90% of the light that is irradiated onto the relay layer 23. In other words, the reflective film 232 can reduce the amount of light absorbed by the relay layer 23 to about 10% of the irradiated light.

[0069] Therefore, the liquid crystal device 300 of this embodiment can suppress the temperature rise of the liquid crystal device 300. In this embodiment, the conductive film 231 is an example of a first film, and the reflective film 232 is an example of a second film.

[0070] The pixel contact electrically connects the pixel electrode 10 and the relay layer 23. In this embodiment, the pixel contact consists of a contact hole 21 and a contact plug 25.

[0071] The contact hole 21 penetrates the reflective film 232 and reaches the conductive film 231. A contact plug 25 is provided inside the contact hole 21. In this embodiment, the contact plug 25 contains tungsten. Tungsten has excellent heat resistance and is a material that is easy to embed in the contact hole 21, which has a high aspect ratio. Therefore, tungsten neatly embeds the elongated shape of the contact hole 21. Thus, the reliability of the contact plug 25 as a connecting member can be improved.

[0072] A barrier member 24 is provided between the contact plug 25 and the side and bottom surfaces of the contact hole 21. The barrier member 24 is made of tungsten nitride (WN) or titanium nitride. Tungsten nitride or titanium nitride has excellent adhesion to the interlayer insulating layer 20. Therefore, the barrier member 24 can suppress delamination of the contact plug 25 compared to when the barrier member 24 is not provided. Thus, the reliability of the contact plug 25 as a connecting member can be improved.

[0073] Figure 11 is an enlarged plan view showing a portion of the planar structure of the relay layer 23 and the conductive layer 44, with the relay layer 23 and contact holes 21 shown by solid lines, and the conductive layer 44, contact holes 43, and semiconductor layer 70 shown by dashed lines.

[0074] Figure 11 shows the conductive film 231 and the reflective film 232 that form the relay layer 23. The conductive film 231 is provided so as to cover the conductive layer 44. A side surface 231e1 in the X1 direction, which is part of the side surface 231e of the conductive film 231, is formed on a stepped portion 30a of the interlayer insulating layer 30, which is not shown in Figure 11.

[0075] The reflective film 232 is provided so as to cover the conductive film 231 in a plan view. A portion of the reflective film 232 that covers the side surface 231e1 of the conductive film 231 is formed on a stepped portion 30a, which is not shown in Figure 11. The reflective film 232 is provided so as to cover the side surface 231e1 of the conductive film 231 in the region that overlaps with the stepped portion 30a. By having the reflective film 232 cover the side surface 231e1 of the conductive film 231 in the region that overlaps with the stepped portion 30a, the area of ​​the capacitive element 2 can be maximized without the reflective film 232 covering a portion of the pixel electrode 10.

[0076] 1.5. Method for Manufacturing Pixel Contacts Next, a method for manufacturing pixel contacts will be described with reference to Figures 12 to 26. In this embodiment, two methods for manufacturing pixel contacts will be described.

[0077] 1.5.1. Method for manufacturing the first pixel contact The method for manufacturing the first pixel contact will be described with reference to Figures 12 to 20. Figure 12 is a flowchart of the method for manufacturing the first pixel contact. Figures 13 to 20 are cross-sectional views showing one aspect of the manufacturing process of the pixel contact.

[0078] In step S1, a conductive film 231 is formed. As shown in Figure 13, in this process, a conductive film 231 is formed by patterning titanium nitride on the capacitive insulating layer 32. The side surface 231e1 of the conductive film 231 is formed on the stepped portion 30a.

[0079] In step S2, a reflective film 232 is formed. As shown in Figure 14, in this process, a reflective film 232 is formed by dry etching a pattern of aluminum so as to cover the conductive film 231. The reflective film 232 is formed so as to cover the side surface 231e of the conductive film 231 in the region that overlaps with the stepped portion 30a in a plan view.

[0080] In step S3, the interlayer insulating layer 20 and the protective layer 22 are formed. As shown in Figure 15, in this process, an interlayer insulating layer 20 is formed on the reflective film 232, the capacitive insulating layer 32, and the interlayer insulating layer 30. After the interlayer insulating layer 20 is formed, a protective layer 22 is formed on the interlayer insulating layer 20.

[0081] In step S4, a contact hole 21a is formed. As shown in Figure 16, in this step, a photoresist 95 is used to form a contact hole 21a that penetrates the protective layer 22 and the interlayer insulating layer 20, exposing the reflective film 232 at the bottom of the hole. Subsequently, any deposits remaining in the contact hole 21a, in other words, etching residues and by-products, are removed. Ozone water (O3) and a dilute hydrofluoric acid aqueous solution are used for the removal.

[0082] In step S5, the reflective film 232 made of aluminum is etched back (EB). As shown in Figure 17, in this step, the reflective film 232 is etched using the protective layer 22 or the interlayer insulating layer 20 as a mask to form contact holes 21 that expose the conductive film 231. A chlorine-based etching gas is used for etching the aluminum. After that, any deposits remaining in the contact holes 21 are removed. A stripping solution containing nitric acid is used for stripping.

[0083] In step S6, a barrier layer 24a is formed. As shown in Figure 18, in this step, tungsten nitride or titanium nitride is deposited on the inner wall of the contact hole 21 and on the protective layer 22 to form a barrier layer 24a made of tungsten nitride or titanium nitride.

[0084] In step S7, tungsten is embedded in the contact hole 21. As shown in Figure 19, in this step, a tungsten layer 25a is deposited on the barrier layer 24a by CVD. The tungsten layer 25a is neatly embedded in the contact hole 21.

[0085] Step S8 involves performing CMP (Chemical Mechanical Polishing). As shown in Figure 20, in this step, the tungsten layer 25a and barrier layer 24a on the protective layer 22 are removed by CMP. This step forms a tungsten contact plug 25 and a barrier member 24 between the contact plug 25 and the contact hole 21 within the contact hole 21.

[0086] In step S9, the pixel electrode 10 is formed. As shown in Figure 10, in this step, ITO is deposited and patterned to form the pixel electrode 10. An alignment film 12 (not shown) is formed on the pixel electrode 10.

[0087] 1.5.2. Method for manufacturing the second pixel contact The method for manufacturing the second pixel contact will be described with reference to Figures 21 to 25. Figure 21 is a flowchart of the method for manufacturing the second pixel contact. Figures 22 to 25 are cross-sectional views showing one aspect of the manufacturing process of the pixel contact.

[0088] In step S21, a conductive film 231 is formed. Similar to the first method for manufacturing a pixel contact, as shown in Figure 13, in this step, a conductive film 231 is formed by patterning titanium nitride on the capacitive insulating layer 32. The side surface 231e1 of the conductive film 231 is formed on the stepped portion 30a.

[0089] In step S22, a reflective film 232 is formed. As shown in Figure 22, in this process, a reflective film 232 is formed by dry etching a pattern of aluminum so as to cover the conductive film 231. The reflective film 232 is formed so as to cover the side surface 231e1 of the conductive film 231 in the region that overlaps with the stepped portion 30a in a plan view.

[0090] In step S22, when forming the aluminum reflective film 232 by dry etching, the aluminum in the area where the contact hole 21a is formed is removed simultaneously with the formation of the reflective film 232. By removing the aluminum in the area where the contact hole 21a is formed, the opening 232a is formed. Because the opening 232a is formed, step S5 of the first pixel contact manufacturing method is omitted in the second pixel contact manufacturing method.

[0091] In step S23, the interlayer insulating layer 20 and the protective layer 22 are formed. As shown in Figure 23, in this process, an interlayer insulating layer 20 is formed on the reflective film 232, the capacitive insulating layer 32, and the interlayer insulating layer 30. After the interlayer insulating layer 20 is formed, a protective layer 22 is formed on the interlayer insulating layer 20.

[0092] In step S24, a contact hole 21a is formed. As shown in Figure 24, in this step, a photoresist 95 is used to form a contact hole 21a that penetrates the protective layer 22 and the interlayer insulating layer 20, exposing the conductive film 231 at the bottom of the hole. The contact hole 21a is provided inside the opening 232a from which the aluminum was removed in step S22. Subsequently, any deposits remaining in the contact hole 21a, in other words, etching residues and by-products, are removed. Ozone water (O3) and a dilute hydrofluoric acid aqueous solution are used for removal.

[0093] In step S25, a barrier layer 24a is formed. Similar to the first method for manufacturing the pixel contact, as shown in Figure 25, tungsten nitride or titanium nitride is deposited on the inner wall of the contact hole 21 and the protective layer 22 to form a barrier layer 24a made of tungsten nitride or titanium nitride.

[0094] In step S26, tungsten is embedded in the contact hole 21. Similar to the manufacturing method of the first pixel contact shown in Figure 19, in this step, a tungsten layer 25a is deposited on the barrier layer 24a by CVD. The tungsten layer 25a is neatly embedded in the contact hole 21.

[0095] Step S27 involves performing CMP (Chemical Mechanical Polishing). Similar to the first pixel contact manufacturing method shown in Figure 20, in this step, the tungsten layer 25a and barrier layer 24a on the protective layer 22 are removed by CMP. This step forms a tungsten contact plug 25 and a barrier member 24 between the contact plug 25 and the contact hole 21 within the contact hole 21.

[0096] In step S28, the pixel electrode 10 is formed. Similar to the first method for manufacturing the pixel contact, as shown in Figure 10, this step involves forming and patterning ITO to create the pixel electrode 10. An alignment film 12 (not shown) is formed on the pixel electrode 10.

[0097] As described above, the liquid crystal device 300 as an electro-optical device of this embodiment provides the following advantages. The liquid crystal apparatus 300 of this embodiment includes a transistor 1, a pixel electrode 10 provided corresponding to the transistor 1, a relay layer 23 as a first conductive layer having a conductive film 231 as a first film electrically connected to the pixel electrode 10 in the layer between the transistor 1 and the pixel electrode 10, and a reflective film 232 as a second film provided on the pixel electrode 10 side of the conductive film 231 having a higher light reflectivity than the conductive film 231 and covering the side surface 231e of the conductive film 231, and a contact plug 25 as a connecting member provided in a contact hole 21 for electrically connecting the pixel electrode 10 and the conductive film 231 of the relay layer 23.

[0098] Thus, the relay layer 23, which is connected to the pixel electrode 10 via the contact plug 25, has a reflective film 232 that covers the upper surface and side surface 231e of the conductive film 231. Therefore, much of the light irradiated onto the relay layer 23 is reflected by the reflective film 232. As a result, the temperature rise of the liquid crystal device 300 can be suppressed.

[0099] The liquid crystal device 300 of this embodiment comprises a capacitive element 2 having a relay layer 23 and a conductive layer 44 as a second conductive layer provided opposite the relay layer 23, and an interlayer insulating layer 30 as an insulating member having a stepped portion 30a provided between the relay layer 23 and the conductive layer 44 so as to cover the end portion 44e of the conductive layer 44, and the reflective film 232 is provided so as to cover the side surface 231e1 of the conductive film 231 in the region that overlaps with the stepped portion 30a of the interlayer insulating layer 30 in a plan view.

[0100] By providing the reflective film 232 so as to cover the side surface 231e1 of the conductive film 231 in the region where it overlaps with the stepped portion 30a of the interlayer insulating layer 30, the area of ​​the capacitive element 2 can be maximized without the reflective film 232 covering a portion of the pixel electrode 10.

[0101] In the liquid crystal device 300 of this embodiment, the contact hole 21 overlaps with the relay layer 23 and the conductive layer 44 in a plan view, but does not overlap with the interlayer insulating layer 30.

[0102] Thus, in a plan view, the contact hole 21 overlaps with the relay layer 23 and the conductive layer 44, but does not overlap with the interlayer insulating layer 30. Here, the relay layer 23 and the conductive layer 44 form a capacitive element 2, and the capacitive element 2 does not overlap with the interlayer insulating layer 30. Therefore, the contact hole 21 is provided in a position that overlaps with the capacitive element 2. In other words, the position that overlaps with the contact hole 21 is the capacitive element 2. Thus, the capacitance of the capacitive element 2 can be increased. Furthermore, because an interlayer insulating layer 30 is provided to cover the end portion 44e of the conductive layer 44, short circuits between the relay layer 23 and the conductive layer 44 can be suppressed, thereby improving the reliability of the capacitive element 2.

[0103] The reflective film 232 has an opening 232a, and in a plan view, a contact hole 21 is provided inside the opening 232a. By forming an opening 232a in the reflective film 232, the process of etching back (EB) the aluminum reflective film 232 can be omitted.

[0104] In the liquid crystal apparatus 300 of this embodiment, the conductive film 231 contains titanium nitride, and the reflective film 232 contains aluminum. By using aluminum, which has high reflectivity, for the reflective film 232, approximately 90% of the light irradiated onto the relay layer 23 can be reflected. In other words, the amount of light absorbed by the relay layer 23 can be suppressed to about 10%. Therefore, the temperature rise of the liquid crystal device 300 can be suppressed.

[0105] In the liquid crystal device 300 of this embodiment, the contact plug 25, which serves as a connecting member, contains tungsten. Tungsten has excellent heat resistance and is a material that is easy to embed in contact holes 21 with a high aspect ratio. Therefore, by including tungsten in the contact plug 25, which is a pixel contact, the reliability of conductivity between the pixel electrode 10 and the relay layer 23 can be improved.

[0106] The liquid crystal device 300 of this embodiment includes a barrier member 24 between the contact plug 25, which serves as a connecting member, and the side surface of the contact hole 21. In this way, by providing the barrier member 24, it is possible to impart functions according to the material of the barrier member 24, thereby further improving the reliability of conductivity between the pixel electrode 10 and the relay layer 23.

[0107] In the liquid crystal apparatus 300 of this embodiment, the barrier member 24 includes tungsten nitride or titanium nitride. Tungsten nitride or titanium nitride exhibits excellent adhesion to the interlayer insulating layer 20. Therefore, delamination of the contact plug 25 can be suppressed, and the reliability of conductivity between the pixel electrode 10 and the relay layer 23 can be further improved.

[0108] In the liquid crystal apparatus 300 of this embodiment, the relay layer 23 as the first conductive layer has an extended portion 23a as the first extended portion that extends along the X2 direction as the first direction, an extended portion 23b as the second extended portion that extends along the Y2 direction as the second direction that intersects with the X2 direction, and a protruding portion 23c1 provided at the corner between the extended portion 23a and the extended portion 23b, which overlaps with the pixel electrode 10 in a plan view, and the contact hole 21 overlaps with the protruding portion 23c1 in a plan view.

[0109] Thus, the relay layer 23 has an extended portion 23a, an extended portion 23b, and an overhanging portion 23c1. In other words, the relay layer 23 has a large area. Therefore, the relay layer 23 can reflect a lot of light. Thus, the temperature rise of the liquid crystal device 300 can be suppressed. Furthermore, the contact hole 21 overlaps with the protruding portion 23c1 in a plan view. Therefore, good electrical conductivity can be achieved between the pixel electrode 10 and the relay layer 23.

[0110] 2. Embodiment 2 Figure 26 is a schematic diagram showing an example of an electronic device, and is a schematic diagram showing the general configuration of a projection-type display device 1000 as an electronic device. The projection display device 1000 is, for example, a three-panel projector equipped with three of the above-described liquid crystal displays 300. Liquid crystal display 300R corresponds to the red display color, liquid crystal display 300G corresponds to the green display color, and liquid crystal display 300B corresponds to the blue display color. The control unit 1005 includes, for example, a processor and memory, and controls the operation of the liquid crystal displays 300R, 300G, and 300B.

[0111] The illumination optical system 1001 supplies red light RL from the light source illumination device 1002 to the liquid crystal device 300R, green light GL to the liquid crystal device 300G, and blue light BL to the liquid crystal device 300B. Each liquid crystal device 300R, 300G, and 300B functions as an optical modulator that modulates the respective colored lights RL, GL, and BL supplied from the illumination optical system 1001 according to the displayed image. The projection optical system 1003 combines the light emitted from the liquid crystal display unit 300R, the liquid crystal display unit 300G, and the liquid crystal display unit 300B and projects it onto the screen 1004.

[0112] As described above, the projection-type display device 1000 as an electronic device of this embodiment includes the liquid crystal display device 300 described above. Therefore, by employing a liquid crystal device 300 that suppresses temperature rise, the performance of the projection display device 1000 can be improved.

[0113] Furthermore, the electronic device is not limited to the three-chip projector exemplified. For example, it may be a single-chip, two-chip, or projector equipped with four or more liquid crystal displays 300. The electronic device may also be a smartphone, PDA (Personal Digital Assistant), camera, television, car navigation system, personal computer, display, e-paper, calculator, videophone, and POS (Point of Sale), printer, scanner, copier, video player, or device equipped with a touch panel.

[0114] Although preferred embodiments have been described above, the present invention is not limited to the embodiments described above. Furthermore, the configuration of each part of the present invention can be replaced with any configuration that performs a similar function to that of the embodiments described above, and any configuration can be added. [Explanation of symbols]

[0115] 1...Transistor, 2...Capacitor element, 3...Scan line, 4...Data line, 5...Capacitor line, 6...Scan line drive circuit, 7...Data line drive circuit, 8...Sealing member, 9...External terminal, 10...Pixel electrode, 12...Alignment film, 20...Interlayer insulating layer, 21...Contact hole, 21a...Contact hole, 22...Protective layer, 23...Relay layer, 23a...Extended part, 23b...Extended part, 23c...Protruding part, 23c1...Protruding part, 24...Barrier member, 24a...Barrier layer, 25...Contact plug, 25a...Tungsten Ten layer, 30...Interlayer insulating layer, 30a...Stepped portion, 32...Capacitive insulating layer, 40...Interlayer insulating layer, 41...Intermediate layer, 42...Conductive layer, 43...Contact hole, 44...Conductive layer, 44a...Extended portion, 44b...Extended portion, 44c...Protruding portion, 44c1...Protruding portion, 44e...End portion, 50...Interlayer insulating layer, 51...Contact hole, 52...Contact hole, 53...Intermediate layer, 54...Intermediate layer, 60...Interlayer insulating layer, 61...Conductive layer, 62...Light shielding member, 70...Semiconductor layer, 70a...LDD region, 70b...LD D region, 70c... Channel region, 70d... Drain region, 70s... Source region, 71... Contact hole, 72... Gate insulating layer, 73... Contact hole, 74... Gate electrode, 75... Contact hole, 76... Interlayer insulating layer, 80... Light-shielding layer, 81... Contact hole, 82... Interlayer insulating layer, 90... Substrate, 95... Photoresist, 100... Device substrate, 200... Opposing substrate, 210... Substrate, 220... Insulating layer, 230... Common electrode, 231... Conductive film, 231e... Side surface, 231e1... Side view, 232...reflective film, 232a...aperture, 240...alignment film, 300...liquid crystal device, 300B...liquid crystal device, 300G...liquid crystal device, 300R...liquid crystal device, 1000...projection type display device, 1001...illumination optical system, 1002...illumination device, 1003...projection optical system, 1004...screen, 1005...control unit, A1...display area, A2...peripheral area, BL...blue light, E1...image signal, G1...scanning signal, GL...green light, IL...incident light, Lc...liquid crystal layer, ML...modulated light, P...pixel, RL...red light

Claims

1. Transistors and, A pixel electrode provided in correspondence with the transistor, A first conductive layer is provided between the transistor and the pixel electrode, comprising: a first film electrically connected to the pixel electrode; and a second film provided on the pixel electrode side of the first film, having a higher light reflectivity than the first film and covering the side surface of the first film. The device comprises a connecting member provided in a contact hole for electrically connecting the pixel electrode and the first film of the first conductive layer, Electro-optical device.

2. A capacitive element having a first conductive layer and a second conductive layer provided opposite to the first conductive layer, and an insulating member having a stepped portion provided between the first conductive layer and the second conductive layer so as to cover the end of the second conductive layer, The second film is provided so as to cover the side surface of the first film in the region that overlaps with the stepped portion in a plan view. The electro-optical apparatus according to claim 1.

3. In a plan view, the contact hole overlaps with the first conductive layer and the second conductive layer, but does not overlap with the insulating member. The electro-optical apparatus according to claim 2.

4. The second film has an opening, and in a plan view, the contact hole is provided inside the opening. The electro-optical apparatus according to claim 1.

5. The first film contains titanium nitride, The second film contains aluminum, The electro-optical apparatus according to claim 1.

6. The connecting member contains tungsten, The electro-optical apparatus according to claim 1.

7. A barrier member is provided between the connecting member and the side surface of the contact hole. The electro-optical apparatus according to claim 6.

8. The barrier member includes tungsten nitride or titanium nitride. The electro-optical apparatus according to claim 7.

9. The first conductive layer has a first extending portion extending along a first direction, a second extending portion extending along a second direction intersecting the first direction, and a protruding portion provided at the corner between the first extending portion and the second extending portion, which overlaps with the pixel electrode in a plan view. The contact hole, in a plan view, overlaps with the protruding portion. The electro-optical apparatus according to claim 1.

10. An electronic device comprising an electro-optical apparatus as described in any one of claims 1 to 7.

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