Vehicle speed limiter

Abstract

To provide a vehicle speed limiting device that can limit vehicle speed without significantly impairing the inherent performance of the vehicle. [Solution] The system includes a signal processing unit that limits the vehicle speed of the product vehicle by applying predetermined signal processing to the detection voltage of the product vehicle's throttle sensor and outputting it to the product vehicle's control device. The signal processing unit outputs an output voltage to the control device that decreases from the detection voltage when the vehicle speed of the product vehicle exceeds a predetermined upper limit vehicle speed, and returns to the current output voltage from the throttle sensor without signal processing when the vehicle speed decreases to a predetermined lower limit vehicle speed.

Description

[Technical Field]

[0001] This invention relates to a vehicle speed limiting device. [Background technology]

[0002] Patent Document 1 below discloses an electric vehicle capable of realizing a variety of driving modes. This electric vehicle includes an electric motor for driving the vehicle, an accelerator grip, an operating lever, an accelerator position sensor, a lever position sensor, and a control device, and the control device controls the driving force of the electric motor so that a driving force corresponding to the accelerator operation amount and lever operation speed is output based on the detected values ​​of the accelerator position sensor and the lever position sensor. [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2020-48261 [Overview of the Initiative] [Problems that the invention aims to solve]

[0004] Incidentally, with the above-mentioned electric vehicles, there is a need to operate them at a speed that is lower than the actual operating speed they can achieve. To meet this need, it is necessary to add a speed limiting device to the electric vehicle or other product vehicles to limit the actual operating speed. When adding a speed limiting device to a product vehicle, it is preferable to limit only the actual operating speed without impairing the product vehicle's inherent performance as much as possible.

[0005] This invention has been made in view of the circumstances described above, and aims to provide a vehicle speed limiting device that can limit vehicle speed without impairing the inherent performance of the vehicle as much as possible. [Means for solving the problem]

[0006] To achieve the above objective, the present invention provides a first solution relating to a vehicle speed limiting device, which includes a signal processing unit that limits the vehicle speed of a product vehicle by applying predetermined signal processing to the detection voltage of the throttle sensor of the product vehicle and outputting it to the control device of the product vehicle, wherein the signal processing unit outputs an output voltage to the control device that decreases from the detection voltage when the vehicle speed of the product vehicle exceeds a predetermined upper limit vehicle speed, and returns to the current output voltage from the throttle sensor without signal processing when the vehicle speed decreases to a predetermined lower limit vehicle speed.

[0007] In the present invention, as a second solution relating to a vehicle speed limiting device, the first solution described above employs a method in which the output voltage gradually decreases from the detection voltage when the vehicle speed exceeds the upper limit vehicle speed, and gradually increases back to the detection voltage when the vehicle speed decreases to the lower limit vehicle speed.

[0008] In the present invention, as a third solution relating to a vehicle speed limiting device, the signal processing unit is provided with a first or second solution, wherein the signal processing unit comprises a reference voltage generation unit that generates a predetermined reference voltage by comparing the vehicle speed with the upper limit vehicle speed and the lower limit vehicle speed, and an output voltage generation unit that generates the output voltage based on the detected voltage and the reference voltage.

[0009] In the present invention, as a fourth solution relating to the vehicle speed limiting device, the signal processing unit in the first or second solution described above employs the means of generating a pair of output voltages corresponding to two systems of detected voltages. [Effects of the Invention]

[0010] According to the present invention, it is possible to provide a vehicle speed limiting device that can limit the vehicle speed without impairing the inherent performance of the vehicle as much as possible. [Brief explanation of the drawing]

[0011] [Figure 1]It is a block diagram showing the schematic configuration of a vehicle speed limitation device according to an embodiment of the present invention. [Figure 2] It is a characteristic diagram of two systems of detection voltages in an embodiment of the present invention. [Figure 3] It is a block diagram showing the detailed configuration of a vehicle speed limitation device according to an embodiment of the present invention. [Figure 4] It is a circuit diagram showing the configuration of a bell control module in an embodiment of the present invention. [Figure 5] It is a waveform diagram showing the operation of a signal processing unit in an embodiment of the present invention.

Embodiments for Carrying Out the Invention

[0012] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. As shown in FIG. 1, the vehicle speed limitation device A according to the present embodiment is an additional device mounted between a throttle sensor B and a motor ECU (Electronic Control Unit).

[0013] That is, this vehicle speed limitation device A is a device that is retrofitted to a production vehicle such as an electric vehicle. It takes as inputs a pair of detection voltages a and b output from the throttle sensor B, and outputs a pair of output voltages c and d to the motor ECU by performing predetermined signal processing on the pair of detection voltages a and b.

[0014] Here, the throttle sensor B is a detector that detects the operation amount of a throttle grip provided on the steering wheel of an electric vehicle as the throttle opening. In order to ensure redundancy, there is also a model of this throttle sensor B that individually outputs different two systems (a pair) of detection voltages a and b indicating the operation amount from a pair of output terminals depending on the vehicle model on which it is mounted.

[0015] As shown in Figure 2, the two detection voltages a and b are voltage signals with different slopes relative to the throttle opening. Of these two detection voltages a and b, the first detection voltage a is output from the first output terminal to the vehicle speed limiter A. The second detection voltage b is output from the second output terminal to the vehicle speed limiter A.

[0016] Vehicle speed limiter A is a device that outputs a pair of output voltages c and d, corresponding to two sets (a pair) of detected voltages a and b, to the motor ECU of the production vehicle. The motor ECU is a control device that controls the traction motor, which is the power source of the production vehicle, based on the pair of output voltages c and d input from vehicle speed limiter A.

[0017] In other words, the motor ECU generates a drive signal for the traction motor based on a pair of output voltages c and d, and controls the rotational speed of the traction motor, i.e., the vehicle speed S of the production vehicle, by outputting this drive signal to the traction motor.

[0018] As shown in Figure 3, the vehicle speed limiting device A includes a power terminal PW, five input terminals IN1 to IN5, three output terminals OUT1 to OUT3, a power supply circuit 1, a power-on reset circuit 2, two input I / Fs 3 and 4, a DIP switch 5, a reset switch 6, a pair of filter circuits 7 and 8, a microcontroller 9, a pair of level control modules 10 and 11, and an LED drive circuit 12.

[0019] The power terminal PW is connected to the vehicle's battery outside the vehicle speed limiter A, and to the input terminal of the power circuit 1 inside the vehicle speed limiter A. This power terminal PW is a connection terminal for taking in the battery power (battery power) as the operating power for the vehicle speed limiter A.

[0020] Of the five input terminals IN1 to IN5, the first input terminal IN1 is connected to the first output terminal of the throttle sensor B outside of the vehicle speed limiter A, and is connected to the input terminal of the first filter circuit 7 and the first input terminal in1 of the first level control module 10 inside the vehicle speed limiter A. This first input terminal IN1 is a connection terminal that receives the first detection voltage a from the throttle sensor B.

[0021] The second input terminal IN2 is connected to the second output terminal of the throttle sensor B outside of the vehicle speed limiter A, and is connected to the input terminal of the second filter circuit 8 and the first input terminal in1 of the second level control module 11 inside the vehicle speed limiter A. This second input terminal IN2 is a connection terminal that receives the second detection voltage b from the throttle sensor B.

[0022] The third input terminal, IN3, is connected to the output of the power supply circuit and is a power-on reset circuit that ensures system operation is performed only within the microcontroller's guaranteed voltage range. It turns on (high output) when the power supply circuit output Vcc exceeds a specified value and turns off (low output) when it falls below the set value.

[0023] The fourth input terminal IN4 is connected to the speed pulse input terminal, which is connected to the speedometer of the product vehicle outside of the vehicle speed limiter A, and is connected to the input terminal of the first input I / F3 inside the vehicle speed limiter A. This fourth input terminal IN4 is a connection terminal that receives speed pulses from the motor ECU. The speed pulse is a pulse signal that indicates the vehicle speed of the product vehicle.

[0024] The fifth input terminal IN5 is connected to the brake switch of the vehicle outside of the vehicle speed limiter A, and is connected to the input terminal of the second input I / F4 inside the vehicle speed limiter A. This fifth input terminal IN5 is a connection terminal that receives a brake signal from the motor ECU. The brake signal indicates the operating status of the brakes provided on the vehicle.

[0025] Of the three output terminals OUT1 to OUT3, the first output terminal OUT1 is connected to the first input terminal of the motor ECU of the vehicle outside of the vehicle speed limiter A, and is connected to the third A / D conversion input terminal AD_IN of the microcontroller 9 and the output terminal out of the first level control module 10 inside the vehicle speed limiter A. This first output terminal OUT1 is a connection terminal that supplies the first output voltage c output from the first level control module 10 to the motor ECU.

[0026] The second output terminal OUT2 is connected to the second input terminal of the motor ECU of the vehicle outside of the vehicle speed limiter A, and to the fourth A / D conversion input terminal AD_IN of the microcontroller 9 and the output terminal out of the second level control module 11 inside the vehicle speed limiter A. This second output terminal OUT2 is a connection terminal that supplies the second output voltage d output from the second level control module 11 to the motor ECU.

[0027] The third output terminal OUT3 is connected to the third input terminal of the motor ECU of the vehicle outside of the vehicle speed limiter A, and to the output terminal of the LED drive circuit 12 inside the vehicle speed limiter A. This third output terminal OUT3 is a connection terminal that supplies the LED drive signal output from the LED drive circuit 12 to the light-emitting element of the motor ECU, i.e., the LED (Light Emitting Diode).

[0028] Power supply circuit 1 has its input terminal connected to power supply terminal PW and its output terminal connected to the power supply terminal Vcc of the microcontroller 9. This power supply circuit 1 converts the battery power input from the battery via power supply terminal PW and outputs it to the power supply terminal Vcc of the microcontroller 9. In other words, this power supply circuit 1 converts the battery power into a power supply voltage that conforms to the specifications of the microcontroller 9 and outputs it to the microcontroller 9.

[0029] In Figure 3, the output terminal of power supply circuit 1 is connected only to the power supply terminal Vcc of microcontroller 9. In other words, power supply circuit 1 is a circuit that generates operating power exclusively for microcontroller 9. In contrast, the components of vehicle speed limiting device A include circuits other than microcontroller 9 that require power. These power-requiring circuits are supplied with battery power via noise and surge protection circuits.

[0030] The power-on reset circuit 2 has its input terminal connected to IN3, which is connected to the output of the power supply circuit 1, and its output terminal connected to the reset terminal RS of the microcontroller 9. This power-on reset circuit 2 generates a reset signal based on the output level of the power supply circuit 1 via the third input terminal IN3 and outputs it to the reset terminal RS of the microcontroller 9.

[0031] Of the two input interfaces, 3 and 4, the first input interface 3 has its input terminal connected to the fourth input terminal IN4 and its output terminal connected to the input terminal INT of the microcontroller 9. This first input interface 3 shapes the speed pulse input received from the speed pulse input terminal connected to the speedometer via the fourth input terminal IN4 and outputs it to the input terminal INT of the microcontroller 9.

[0032] The second input interface 4 has its input terminal connected to the fifth input terminal IN5 and its output terminal connected to the microcontroller 9's input terminal GPIO. This second input interface 4 formats the brake signal input from the brake switch via the fifth input terminal IN5 and outputs it to the microcontroller 9's input terminal GPIO.

[0033] The DIP switch 5 has four output terminals, each of which is individually connected to one of the four GPIO input terminals on the microcontroller 9. The DIP switch 5 also has four slide switches, which individually set a 4-bit binary code that is output to the four GPIO input terminals on the microcontroller 9. In other words, the DIP switch 5 outputs the operation setting information to the microcontroller 9 as a 4-bit binary code.

[0034] The reset switch 6 is connected to the GPIO input terminal of the microcontroller 9. This reset switch 6 outputs a forced reset signal to the microcontroller 9 as an interrupt signal. In other words, the microcontroller 9 is forcibly initialized when the reset switch 6 is operated by the user.

[0035] Of the pair of filter circuits 7 and 8, the first filter circuit 7 has its input terminal connected to the first input terminal IN1 and the first input terminal in1 of the first level control module 10, and its output terminal connected to the first A / D conversion input terminal AD_IN of the microcontroller 9. This first filter circuit 7 removes the noise component of the first detection voltage a input from the throttle sensor B via the first input terminal IN1 and outputs it to the microcontroller 9.

[0036] The second filter circuit 8 has its input terminal connected to the second input terminal IN2 and the first input terminal in1 of the second level control module 11, and its output terminal connected to the second A / D conversion input terminal AD_IN of the microcontroller 9. This second filter circuit 8 removes the noise component of the second detection voltage b input from the throttle sensor B via the second input terminal IN2 and outputs it to the microcontroller 9.

[0037] As described above, the microcontroller 9 is connected to the power supply circuit 1, the power-on reset circuit 2, two input interfaces 3 and 4, a DIP switch 5, a reset switch 6, a pair of filter circuits 7 and 8, a pair of level control modules 10 and 11, and an LED driver circuit 12.

[0038] This microcontroller 9 has its first A / D conversion input terminal AD_IN connected to the output terminal of the first filter circuit 7, and its second A / D conversion input terminal AD_IN connected to the output terminal of the second filter circuit 8. Furthermore, this microcontroller 9 has its third A / D conversion input terminal AD_IN connected to the output terminal out of the first level control module 10, and its fourth A / D conversion input terminal AD_IN connected to the output terminal out of the second level control module 11.

[0039] Furthermore, the first D / A conversion output terminal DA_OUT of the microcontroller 9 is connected to the second input terminal in2 of the first level control module 10. The second D / A conversion output terminal DA_OUT of the microcontroller 9 is connected to the second input terminal in2 of the second level control module 11. Additionally, the third output terminal GPIO of the microcontroller 9 is connected to the input terminal of the LED driver circuit 12.

[0040] Such a microcontroller 9 is an integrated circuit that operates based on the operating power supplied from the power supply circuit 1. The microcontroller 9 has a non-volatile memory unit that stores a signal processing program, and processes various signals input from the power-on reset circuit 2, two input I / Fs 3 and 4, a DIP switch 5, a reset switch 6, a pair of filter circuits 7 and 8, and a pair of level control modules 10 and 11 based on the above signal processing program.

[0041] For example, the microcontroller 9 calculates the vehicle speed S of the product vehicle based on the speed pulse input from the first input I / F 3, and sets the vehicle speed S to the upper limit vehicle speed S. DT and lower limit vehicle speed S RT By comparing these values, a first reference voltage REF1 and a second reference voltage REF2 are generated, with the voltage values ​​decreasing or increasing in stages.

[0042] When generating the first reference voltage REF1 and the second reference voltage REF2, the microcontroller 9 refers to the first and second detection voltages a and b and the first and second output voltages a and b input to the first to fourth A / D conversion input terminals AD_IN. That is, the microcontroller 9 refers to the vehicle speed S and the upper limit vehicle speed S DT and lower limit vehicle speed S RT In addition to the relative magnitudes of the two values, the first reference voltage REF1 and the second reference voltage REF2 are generated based on the voltage values ​​of the first and second detection voltages a and b, and the first and second output voltages a and b.

[0043] The microcontroller 9 outputs the first reference voltage REF1 generated in this manner to the second input terminal in2 of the first level control module 10. The microcontroller 9 also outputs the second reference voltage REF2 generated in this manner to the second input terminal in2 of the second level control module 11. Note that the above-mentioned upper limit vehicle speed S DT and lower limit vehicle speed S RT These are parameters pre-stored in the microcontroller 9.

[0044] Of the pair of level control modules 10 and 11, the first level control module 10 has its first input terminal in1 connected to the first input terminal IN1 and the input terminal of the first filter circuit 7, and its second input terminal in2 connected to the first D / A conversion output terminal DA_OUT of the microcontroller 9. The output terminal out of the first level control module 10 is connected to the first output terminal OUT1.

[0045] The second level control module 11 has its first input terminal in1 connected to the second input terminal IN2 and the input terminal of the second filter circuit 8, and its second input terminal in2 connected to the second D / A conversion output terminal DA_OUT of the microcontroller 9. The second level control module 11 also has its output terminal out connected to the second output terminal OUT2.

[0046] Such a pair of level control modules 10 and 11 have the detailed configuration shown in Figure 4(a). That is, the pair of level control modules 10 and 11 are configured as identical circuits.

[0047] The pair of level control modules 10 and 11 include, in addition to the first input terminal in1, second input terminal in2, and output terminal out described above, a first buffer circuit f, an operational amplifier g, a transistor h, a first resistor i, a second resistor j, and a second buffer circuit k. Of these components, the operational amplifier g, transistor h, first resistor i, and second resistor j constitute a differential amplifier C.

[0048] The first buffer circuit f has its input terminal connected to the first input terminal in1 and its output terminal connected to the collector terminal of transistor h. This first buffer circuit f reduces the impedance of the first detection voltage a input to the first input terminal in1 and outputs it to the collector terminal of transistor h.

[0049] The operational amplifier g has its positive-sequence input terminal connected to the second input terminal in2, and its negative-sequence input terminal connected to the connection point between the first resistor i and the second resistor j. Furthermore, the output terminal of this operational amplifier g is connected to the base terminal of transistor h.

[0050] Such an operational amplifier g generates a difference voltage between the first reference voltage REF1 or second reference voltage REF2 input to the second input terminal in2 and the divided voltage of the first output voltage c or second output voltage d input from the connection point of the first resistor i and the second resistor j. Furthermore, this operational amplifier g outputs the above difference voltage as a comparison result to the base terminal of transistor h.

[0051] Transistor h has its collector terminal connected to the output terminal of the first buffer circuit f, and its base terminal connected to the output terminal of the operational amplifier g. Furthermore, the emitter terminal of transistor h is connected to one end of the first resistor i and the input terminal of the second buffer circuit k. Such transistor h amplifies the differential voltage input to its base terminal from the operational amplifier g and outputs it to the second buffer circuit k.

[0052] The first resistor i has one end connected to the emitter terminal of transistor h and the input terminal of the second buffer circuit k, and the other end connected to one end of the second resistor j and the inverse input terminal of the operational amplifier g. This first resistor i has a predetermined first resistance value R1 and, together with the second resistor j, sets the gain of the differential amplifier C.

[0053] The second resistor j has one end connected to the other end of the first resistor i and the reverse-phase input terminal of the operational amplifier g, and the other end is grounded. This second resistor j has a predetermined second resistance value R2 and, together with the first resistor i, sets the gain of the differential amplifier.

[0054] The second buffer circuit k has its input terminal connected to the emitter terminal of transistor h and the first resistor i, and its output terminal connected to the output terminal out of a pair of level control modules 10 and 11. The second buffer circuit k is an amplifier circuit with a voltage gain of "1", and its input terminal is the emitter terminal of transistor h, i.e., the output terminal of the differential amplifier, which outputs the output voltage Vout to the output terminal out without voltage amplification.

[0055] In other words, the output voltage Vout of the differential amplifier C is the first output voltage c or the second output voltage d of the pair of level control modules 10 and 11. The output voltage Vout, that is, the first output voltage c or the second output voltage d, is expressed by the following equations (1) and (2), when the first reference voltage REF1 and the second reference voltage REF2 are collectively referred to as the reference voltage Vref.

[0056] Vout = P·Vref (1) P = (R1 + R2) / R1 (2)

[0057] Figure 4(b) shows the circuit configuration of a modified differential amplifier Ca. This differential amplifier Ca is constructed by configuring the differential amplifier C described above as a voltage follower circuit with a voltage gain of "1".

[0058] In other words, this differential amplifier Ca is obtained by removing the first resistor i and the second resistor j, and directly connecting the emitter terminal of transistor h to the inverted input terminal of operational amplifier g. The output voltage Vout of such a differential amplifier Ca is expressed by equation (3) below. Vout=Vref (3)

[0059] Here, the differential amplifiers C and Ca described above have a basic configuration in which the first reference voltage REF1 or the second reference voltage REF2 input from the microcontroller 9 to the second input terminal in2 is amplified by an operational amplifier g, a transistor h, a first resistor i and a second resistor j, or by a positive-sequence amplifier composed of an operational amplifier g and a transistor h, and output to the second buffer circuit k.

[0060] Furthermore, these differential amplifiers C and Ca are configured such that a first detection voltage a or a second detection voltage b is input to the collector terminal of transistor h via a first buffer circuit f. Therefore, depending on the relative magnitudes of the reference voltage Vref and the output voltage Vout, they output an output voltage Vout based on the first detection voltage a or the second detection voltage b, or the first reference voltage REF1 or the second reference voltage REF2, to the second buffer circuit k.

[0061] As will be explained in more detail later, differential amplifiers C and Ca output the output voltage Vout shown in equation (1) or equation (3) to the second buffer circuit k when the reference voltage Vref is greater than the divided voltage of the output voltage Vout or the output voltage Vout. Conversely, when the reference voltage Vref is less than or equal to the divided voltage of the output voltage Vout or the output voltage Vout, differential amplifiers C and Ca output the input voltage, which is the first detection voltage a or the second detection voltage b, directly to the second buffer circuit k.

[0062] The LED driver circuit 12 has its input terminal connected to the third output terminal GPIO of the microcontroller 9, and its output terminal connected to the third output terminal OUT3. This LED driver circuit 12 generates an LED driver signal based on the LED control signal input from the microcontroller 9 and outputs it to the third output terminal OUT3.

[0063] In the vehicle speed limiting device A configured in this way, the first input interface 3, the microcontroller 9, and the pair of level control modules 10 and 11 constitute the signal processing unit in the present invention. That is, the first input interface 3, the microcontroller 9, and the pair of level control modules 10 and 11 work together to apply predetermined signal processing to the first and second detection voltages a and b, and output first and second output voltages c and d to the motor ECU (control device of the production vehicle), thereby limiting the vehicle speed S of the production vehicle.

[0064] Furthermore, as will be described in more detail later, the first input I / F3, the microcontroller 9, and the pair of level control modules 10 and 11 work together to ensure that the vehicle speed S of the product vehicle is within a predetermined upper limit vehicle speed S.DT When it exceeds, the first and second output voltages c and d are made lower than the original output voltages corresponding to the first and second detection voltages a and b, and when the vehicle speed S drops to a predetermined lower limit vehicle speed S RT it outputs the original output voltage as the first and second output voltages c and d to the motor ECU.

[0065] In such a first input I / F 3, microcomputer 9, and pair of level control modules 10 and 11, the first input I / F 3 and microcomputer 9 constitute a reference voltage generation unit in the present invention. Also, the pair of level control modules 10 and 11 correspond to an output voltage generation unit in the present invention.

[0066] That is, the first input I / F 3 and microcomputer 9 generate a predetermined first reference voltage REF1 and second reference voltage REF2 by comparing the vehicle speed S with the upper limit vehicle speed S DT and the lower limit vehicle speed S RT Also, the pair of level control modules 10 and 11 generate the first and second output voltages c and d based on the first and second output voltages c and d, and the first reference voltage REF1 and second reference voltage REF2.

[0067] Next, the main part operation of the vehicle speed limiting device A according to the present embodiment will be described in detail with reference to FIG. 5.

[0068] FIGS. 5(a) and (b) are waveform diagrams showing the operation (main part operation) of the signal processing unit in the vehicle speed limiting device A. In FIGS. 5(a) and (b), the upper waveform shows the operation of the reference voltage generation unit in the signal processing unit, and the lower waveform shows the operation of the output voltage generation unit in the signal processing unit, that is, the time change of the first and second output voltages c and d.

[0069] First, the operation of the signal processing unit in the vehicle speed limiting device A will be described with reference to FIG. 5(a). As shown in the upper waveform, when the vehicle speed S sequentially rises and exceeds the upper limit vehicle speed S at time t1, the reference voltage generation unit generates a first reference voltage REF1 and a second reference voltage REF2 whose voltage values drop stepwise. DT The

[0070] The stepwise decrease in the voltage value is shown in the figure, voltage V P Therefore, the time interval of one stage is time t P The output voltage generation unit generates first and second output voltages c and d, which decrease in stages based on the first reference voltage REF1 and second reference voltage REF2, which decrease in stages in this manner.

[0071] The reference voltage generation unit then generates a reference voltage when the vehicle speed S is at a lower limit vehicle speed S at time t2. RT When the voltage drops to a certain level, it generates a first reference voltage REF1 and a second reference voltage REF2, with the voltage values ​​increasing in steps. The amount of the stepwise increase in the voltage value is as shown in the figure, with respect to voltage V PR Therefore, the time interval of one stage is time t PR That is the case.

[0072] Based on the first reference voltage REF1 and second reference voltage REF2, which increase in steps as described above, the output voltage generation unit generates first and second output voltages c and d, which increase in steps from time t2 to first and second detection voltages a and b at time t3.

[0073] In other words, the signal processing unit in the vehicle speed limiting device A determines that the vehicle speed S is the upper limit vehicle speed S for the input signals, the first and second detection voltages a and b. DT and lower limit vehicle speed S RT The voltage value is manipulated only within the speed tolerance range set by the system, and only during the period T from time t1 to time t3. The signal processing unit does not manipulate the voltage value outside the speed tolerance range, i.e., outside of period T.

[0074] Here, as mentioned above, vehicle speed S and upper limit vehicle speed S DT and lower limit vehicle speed S RT Based on the comparison results, the first and second detection voltages a and b are gradually lowered or raised. Therefore, the timing of the decrease in the first and second detection voltages a and b is from time t1 to time t, as shown in the figure. ST This will result in a delay in timing.

[0075] Furthermore, the timing of the rise in the first and second detected voltages a and b is from time t2 to time t d This results in a timing delay of only that much. Furthermore, the timing of returning to the first and second detection voltages a and b is determined by the vehicle speed S being the lower limit vehicle speed S. RT The time ta when it rose to this point is the time t PR This will result in a delay in timing.

[0076] Next, Figure 5(b) shows the vehicle speed S twice, and the upper limit vehicle speed S DT This shows the operation of the signal processing unit when the vehicle speed S and the upper limit vehicle speed S are exceeded. In this case as well, the signal processing unit controls the vehicle speed S and the upper limit vehicle speed S. DT and lower limit vehicle speed S RT By comparing these, first and second output voltages c and d are generated, which gradually decrease or increase the first and second detection voltages a and b.

[0077] The vehicle speed limiting device A according to this embodiment includes a signal processing unit that limits the vehicle speed S of the product vehicle by applying predetermined signal processing to the first and second detection voltages a and b of the throttle sensor B of the product vehicle and outputting them to the motor ECU (control device of the product vehicle), and the signal processing unit sets the vehicle speed S of the product vehicle to a predetermined upper limit vehicle speed S DT If it exceeds a certain value, the voltage value is lowered to below the first and second detection voltages a and b, and the vehicle speed S is set to a predetermined lower limit vehicle speed S. RT When the voltage drops to a certain level, the motor ECU outputs the first and second output voltages c and d, which return to the current output voltages a and b from throttle sensor B without signal processing.

[0078] In other words, this vehicle speed limiter A modifies the first and second detection voltages a and b only within the speed tolerance range set by the upper limit speed SDT and the lower limit speed SRT, and only during the period T from time t1 to time t3. To put it another way, the vehicle speed limiter A does not modify the first and second detection voltages a and b outside of the speed tolerance range, i.e., outside of period T.

[0079] According to this embodiment, since it includes a signal processing unit, it is possible to provide a vehicle speed limiting device A that can limit the vehicle speed without impairing the inherent performance of the production vehicle as much as possible.

[0080] Furthermore, in the vehicle speed limiting device A according to this embodiment, the first and second output voltages c and d are set such that the vehicle speed S is the upper limit vehicle speed S DT When it exceeds this limit, the first and second detection voltages a and b decrease in stages, and the vehicle speed S becomes the lower limit vehicle speed S. RT When the voltage drops to a certain level, it gradually increases back to the first and second detection voltages a and b. According to this embodiment, the vehicle speed S can be limited without impairing the inherent performance of the production vehicle as much as possible.

[0081] Furthermore, in the vehicle speed limiting device A according to this embodiment, the signal processing unit receives the vehicle speed S and the upper limit vehicle speed S. DT and lower limit vehicle speed S RT The system includes a first input interface 3 and a microcontroller 9 (reference voltage generation unit) that generate predetermined first and second reference voltages REF1 and REF2 by comparing them, and a pair of level control modules 10 and 11 (output voltage generation units) that generate first and second output voltages c and d based on first and second detection voltages a and b and first and second reference voltages REF1 and REF2. According to this embodiment, it is possible to limit the vehicle speed S without impairing the inherent performance of the production vehicle as much as possible.

[0082] Furthermore, in the vehicle speed limiting device A according to this embodiment, the signal processing unit generates a pair of output voltages c and d corresponding to two detection voltages a and b. This embodiment makes it possible to accommodate a redundant throttle sensor B.

[0083] The present invention is not limited to the embodiments described above, and for example, the following modifications are possible. (1) In the above embodiment, first and second output voltages c and d were generated by comparing the vehicle speed S with the upper limit vehicle speed SDT and the lower limit vehicle speed SRT to gradually decrease or increase the first and second detection voltages a and b, but the present invention is not limited thereto. For example, first and second output voltages c and d may be generated by decreasing or increasing the first and second detection voltages a and b linearly or curvilinearly.

[0084] (2) In the above embodiment, the signal processing unit was configured with the first input I / F3, the microcontroller 9, and the pair of level control modules 10 and 11, but the present invention is not limited thereto. That is, the signal processing unit may be configured with circuit elements other than the first input I / F3, the microcontroller 9, and the pair of level control modules 10 and 11. [Explanation of symbols]

[0085] A Vehicle speed limiter B Throttle Sensor PW power supply terminal IN1~IN5 Input Terminals OUT1~OUT3 Output terminals 1 Power circuit 2. Power-on reset circuit 3, 4 Input I / F 5 DIP switches 6. Reset switch 7, 8 Filter circuits 9 Microcontroller 10, 11 Level control module 12 LED driver circuit

Claims

1. The vehicle includes a signal processing unit that limits the vehicle speed of the product vehicle by applying predetermined signal processing to the detection voltage of the product vehicle's throttle sensor and outputting it to the product vehicle's control unit. The vehicle speed limiting device is characterized in that the signal processing unit outputs an output voltage to the control device that decreases from the detected voltage when the vehicle speed of the product vehicle exceeds a predetermined upper limit vehicle speed, and returns to the current output voltage from the throttle sensor without signal processing when the vehicle speed decreases to a predetermined lower limit vehicle speed.

2. The vehicle speed limiting device according to claim 1, characterized in that the output voltage gradually decreases from the detection voltage when the vehicle speed exceeds the upper limit vehicle speed, and gradually increases back to the detection voltage when the vehicle speed decreases to the lower limit vehicle speed.

3. The signal processing unit, A reference voltage generation unit that generates a predetermined reference voltage by comparing the vehicle speed with the upper limit vehicle speed and the lower limit vehicle speed, An output voltage generation unit that generates the output voltage based on the detected voltage and the reference voltage. A vehicle speed limiting device according to claim 1 or 2, characterized by comprising:

4. The vehicle speed limiting device according to claim 1 or 2, characterized in that the signal processing unit generates a pair of output voltages corresponding to the two detected voltages.

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