Electronic equipment and control methods

Abstract

The performance of electronic devices is maximized according to the battery's power supply capacity. [Solution] An electronic device comprising a host system, a first controller, a second controller, and a battery module, wherein during the startup process of the host system, the second controller determines the power supply capacity from the battery module based on the voltage of the battery module, and the first controller determines the clock frequency of the host system based on the supply capacity.

Description

Technical Field

[0001] This application relates to an electronic device and a control method, for example, control of the clock frequency of a processor.

Background Art

[0002] Portable electronic devices such as notebook personal computers (hereinafter sometimes referred to as "notebook PCs") include a processor such as a CPU (Central Processing Unit) and a battery. The processor always consumes the power stored in the battery to realize the main functions of the electronic device even when power is not always supplied from an external power source. Generally, when the temperature decreases, the amount of power discharged from the battery decreases. In a low-temperature environment, the electronic device cannot exhibit the expected performance. Therefore, a lower limit of the operating temperature (for example, 0 to 10°C) is defined.

[0003] Therefore, when the temperature at startup is lower than the lower limit of the predetermined operating temperature, the functions of the electronic device may be restricted. For example, the electric device described in Patent Document 1 includes a microcontroller, and when the temperature detected by a temperature sensor at system startup is lower than the operation guarantee temperature, the CPU operates at a clock frequency lower than normal and starts a self-test operation.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] However, temperature is not the only reason why the battery's power supply capacity may decrease. Even if the battery has sufficient power supply capacity, uniformly reducing the clock frequency based on temperature will decrease the processor's processing speed. As a result, it will take a long time for the system to complete its startup process. Furthermore, after the system has started up, if the clock frequency remains reduced, the electronic device may not be able to perform at its full potential. [Means for solving the problem]

[0006] This invention was made to solve the above-mentioned problems, and an electronic device according to one embodiment comprises a host system, a first controller, a second controller, and a battery module, wherein during the startup process of the host system, the second controller determines the power supply capacity from the battery module based on the voltage of the battery module, and the first controller determines the clock frequency of the host system based on the supply capacity.

[0007] In the electronic device described above, the process by which the second controller determines the supply capacity and the process by which the first controller determines the clock frequency may be repeated at predetermined intervals.

[0008] In the electronic device described above, the second controller determines whether or not to stop discharging the battery module based on the voltage, and when it is determined that the battery module should be stopped discharging, the first controller may set a clock frequency lower than a predetermined standard clock frequency as the clock frequency.

[0009] In the electronic device described above, the second controller estimates the dischargeable power, which is the power that can be discharged from the battery module, based on the voltage and temperature of the battery module, and the first controller may set a clock frequency lower than a predetermined standard clock frequency as the clock frequency when the dischargeable power falls below a predetermined threshold for dischargeable power.

[0010] In the electronic device described above, when the first controller detects a DC power supply separate from the battery module, it sets the standard clock frequency as the clock frequency, regardless of the supply status.

[0011] A control method according to a second aspect of the present application is a control method for an electronic device comprising a host system, a first controller, a second controller, and a battery module, wherein during the startup process of the host system, the second controller may determine the power supply capacity from the battery module based on the voltage of the battery module, and the first controller may determine the clock frequency of the host system based on the supply capacity. [Effects of the Invention]

[0012] According to the embodiments of the present invention, the performance of electronic devices can be enhanced according to the power supply capacity of the battery module. [Brief explanation of the drawing]

[0013] [Figure 1] This diagram shows an example configuration of the electronic device according to this embodiment. [Figure 2] This block diagram shows an example configuration of the battery pack according to this embodiment. [Figure 3] This flowchart shows a first example of the battery status monitoring process of the BMU according to this embodiment. [Figure 4] This flowchart shows a first example of system startup control for the EC according to this embodiment. [Figure 5] This flowchart shows a second example of the battery status monitoring process of the BMU according to this embodiment. [Figure 6] This flowchart shows a second example of system startup control for the EC according to this embodiment. [Figure 7] This flowchart shows a second example of EC system startup control related to the comparative example. [Modes for carrying out the invention]

[0014] Hereinafter, embodiments of the present application will be described with reference to the drawings. First, an example of the configuration of the electronic device 1 according to the present application will be described. Figure 1 is a block diagram showing an example configuration of the electronic device 1 according to this embodiment. In the example shown in Figure 1, electronic device 1 is configured as a general-purpose PC.

[0015] The electronic device 1 comprises a host system 10, a ROM (Read Only Memory) 22, storage 23, a display 24, a communication module 25, an input / output interface 26, an EC 31, an input device 32, a power supply circuit 33, a battery pack 34, and a power switch 36.

[0016] The host system 10 is the core computer system of the electronic device 1. The host system 10 includes a CPU (Central Processing Unit) 11, main memory 12, and a chipset 21. In this application, the hardware constituting the host system 10 may be referred to as the "host device."

[0017] The CPU 11 controls the operation of the entire electronic device 1. In other words, the CPU 11 is a core processing unit (processor) that executes arithmetic processing instructed by various commands written in the software (program). The operation of the CPU 11 includes reading and writing data to storage media such as the main memory 12 and storage 23, reading data from the ROM 22, and input / output with other devices. Programs executed by the CPU 11 include, for example, the OS (Operating System), firmware, device drivers (sometimes simply called "drivers" in this application), utility programs, and application programs (sometimes simply called "applications" or "apps" in this application). In this application, the execution of processing instructed by commands written in a program may be referred to as "executing a program" or "program execution."

[0018] The main memory 12 is a writable memory that is used as a loading area for the execution program of the CPU 11 or as a working area for writing the processing data of the execution program. The main memory 12 is composed of, for example, a plurality of DRAM (Dynamic Random Access Memory) chips. The CPU 11 and the main memory 12 are the minimum hardware components that make up the host system 10.

[0019] The chipset 21 includes a plurality of controllers and enables connection so that a plurality of devices and various data can be input and output. The controllers provided in the chipset 21 may be any of, for example, USB (Universal Serial Bus), SPI (Serial Peripheral Interface) bus, PCI-Express bus, etc. In the example of FIG. 1, the chipset 21 is connected to the ROM 22, the storage 23, the display 24, the communication module 25, the input / output I / F 26, and the EC 31.

[0020] The ROM 22 mainly stores firmware. The firmware stored in the ROM 22 includes BIOS and other firmware related to individual devices. The ROM 22 is composed of a rewritable non-volatile memory such as EEPROM (Electrically Erasable Programmable Read Only Memory) or flash ROM.

[0021] The storage 23 is an auxiliary storage device that stores various data used in the processing of the host system 10, various data obtained by those processes, or various programs, etc. The storage 23 may be any of, for example, SSD (Solid State Drive), HDD (Hard-disk Drive), etc.

[0022] The display 24 displays a screen based on display data input from the CPU 11. The display 24 may be, for example, a liquid crystal display (LCD) or an organic light-emitting diode (OLED) display.

[0023] The communication module 25 connects to a communication network, enabling it to send and receive various types of data wirelessly or via wired connections. The communication module 25 communicates various types of data with other devices connected to the communication network. The communication module 25 is, for example, a wireless LAN module that connects to a wireless LAN.

[0024] The I / F26 input / output interface connects to various devices for data input and output via wired or wireless connections. For example, the I / F26 includes a connector (USB connector) for wired data input and output in accordance with USB specifications.

[0025] EC31 is a controller that monitors and controls the operation of various devices connected to it, regardless of the operating state of the host system 10. EC31 has a CPU, ROM, RAM, timer, and input / output interface, separate from the host system 10. Devices with a lower data transfer speed than the chipset 21 can be connected to EC31. In the example in Figure 1, an input device 32, a power supply circuit 33, a battery pack 34, and a power switch 36 are connected to EC31.

[0026] The input device 32 detects user operations, generates an operation signal according to the detected operation, and outputs it to EC31. The input device 32 may be, for example, a keyboard, a touchpad, or any other.

[0027] The power supply circuit 33 includes a voltage converter (DC (Direct Current) / DC converter). The voltage converter converts the voltage of the DC power supplied from the AC adapter 35 or battery pack 34 into the voltage required for the operation of each device constituting the electronic device 1, and supplies power with the converted voltage to the target device. The power supply circuit 33 performs power supply to the device according to the control of EC31.

[0028] The power supply circuit 33 detects whether or not a connection to the AC adapter 35 is made. The power supply circuit 33 determines whether or not a connection to the AC adapter 35 is made, for example, based on whether or not the voltage at the connection terminal to the AC adapter 35 is equal to or greater than a predetermined detection voltage. The power supply circuit 33 notifies the EC31 of the connection information indicating whether or not a connection to the AC adapter is made. The EC31 determines whether or not the power state of the device is battery mode or AC mode depending on whether or not a connection to the AC adapter 35 is made. Battery mode is a state in which the device consumes power supplied from the battery pack 34. AC mode is a state in which the device consumes power supplied from an external power source via the AC adapter 35. In AC mode, any surplus power supplied from the AC adapter 35 that is not consumed may be used to charge the battery pack 34.

[0029] The power supply circuit 33 also includes a charger. The charger charges the battery pack 34 with the remaining power from the AC adapter 35 that is not consumed by each device. If power is not supplied from the AC adapter 35, or if the power supplied from the AC adapter 35 does not meet the demand, the charger supplies power discharged from the battery pack 34 to each device.

[0030] The battery pack 34 charges power supplied from the power supply circuit 33 or discharges power stored in itself to the power supply circuit 33, according to the control of EC31. The battery pack 34 notifies EC31 of its temperature and charge / discharge status. An example configuration of the battery pack 34 will be described later.

[0031] The AC adapter 35 converts AC power supplied from an external power source into a DC voltage having a predetermined output voltage. The AC adapter 35 is equipped with a connector that is detachably connected to a connection terminal for the power supply circuit 33. The AC adapter 35 supplies the converted DC voltage to the power supply circuit 33.

[0032] Each time a press operation is received, the power switch 36 controls the power supply state to the host system 10 to either Power ON or Power OFF. When a press operation is received, the power switch 36 outputs a press signal to EC31. When the electronic device 1 is powered off and a press signal is input from the power switch 36, EC31 instructs the power supply circuit 33 to start supplying power to each device of the electronic device 1 (power on). The power supply destinations include peripheral devices as well as the host device. When the electronic device 1 is receiving power and a press signal is input from the power switch 36, EC31 instructs the host system 10 to perform a shutdown process.

[0033] The functions of the host system 10 are realized by the CPU 11 executing various programs in cooperation with the main memory 12, chipset 21, and other hardware. In this application, the firmware relating to the host system 10 is referred to as "system firmware." The system firmware includes a BIOS (Basic Input / Output System). The BIOS is a program for performing input and output with hardware resources. The BIOS includes a system BIOS based on the UEFI (Unified Extensible Firmware Interface) standard. In this application, the system firmware may sometimes be referred to as BIOS.

[0034] CPU11 starts booting when power is turned on. CPU11 executes the boot loader and reads the BIOS from ROM22. The BIOS is the first thing executed after power is turned on. CPU11 performs the POST (Power On Self Test) process according to the BIOS. The POST process includes basic device initialization, consistency verification, device detection, and system configuration, and is executed in that order. Basic device initialization mainly involves the initialization of the host device and loading the BIOS into main memory 12. Consistency verification verifies the consistency of the entire BIOS. Device detection detects and initializes peripheral devices other than the host device. In system configuration, system configuration information and the OS loader stored in a predetermined storage area of ​​storage 23 are retrieved. System configuration information is referenced when the system starts (OS starts). The OS loader is a program related to system startup. In system configuration, a user interface for system configuration is provided, and a parameter set that constitutes part of the system configuration information may be updated.

[0035] After the POST process is completed, the CPU 11 executes the system startup process. In the system startup process, the CPU 11 executes the OS loader, reads the OS and other programs (e.g., device drivers, utilities, etc.) from the storage 23, and loads them into the main memory 12. Then, the CPU 11 starts the OS and other programs by referring to the system configuration information. In this application, the POST process and the system startup process are collectively referred to as the "startup process".

[0036] Next, an example of the configuration of the battery pack 34 according to this embodiment will be described. Figure 2 is a block diagram showing an example of the configuration of the battery pack according to this embodiment. The battery pack 34 includes a BMU (Battery Management Unit) 34b, a temperature sensor 34t, and a battery module 34m. In this application, the battery module 34m or the battery pack 34 may be collectively referred to as "battery."

[0037] The BMU34b monitors the status of the battery module 34m (sometimes referred to as "battery status" in this application). The EMU34b acquires information indicating the detected battery status as battery information and notifies the EC31 of the acquired battery information. Examples of battery status will be described later. Furthermore, when the BMU34b detects an excessive voltage exceeding a predetermined withstand voltage in the battery module 34m, or an excessive current inflow or outflow exceeding a predetermined withstand current, it isolates the battery module 34m from the power supply circuit 33 to protect the battery module 34m.

[0038] The temperature sensor 34t detects the temperature of the battery module 34m. The battery module 34m charges power supplied from the AC adapter 35 via the power supply circuit 33, or discharges the charged power to the power supply circuit 33, according to the control of the BMU 34b. The battery module 34m comprises N cells 34c (where N is a predetermined integer of 1 or more). When N is 2 or more, the N cells 34c are connected in series or in parallel. In the example in Figure 2, the N cells 34c are connected in parallel and are distinguished as 34c1 to 34cN. The battery module 34m may have a configuration (sometimes referred to as a "battery configuration") comprising two or more layers connected in series, with multiple cells 34c connected in parallel within each layer. Each cell 34c comprises a positive electrode, a negative electrode, and a separator, with the separator sandwiched between the positive and negative electrodes. A cell 34c is also called a single cell. The separator consists of an insulator that holds the electrolyte. Since the positive and negative electrodes are not directly electrically connected but are connected via the electrolyte, an electromotive force is generated between the two electrodes.

[0039] Next, a first example of the battery status monitoring process of the BMU34b according to this embodiment will be described. Figure 3 is a flowchart of the first example of the battery status monitoring process of the BMU34b according to this embodiment. The BMU34b repeats the process from steps S102 to S106. (Step S102) The BMU34b detects the cell voltage, current, and battery temperature as elemental information of the battery state. The BMU34b detects the voltage between the two electrodes of each cell 34c as the cell voltage. The BMU34b detects the current discharged from the battery module 34m. The BMU34b is notified of the temperature detected by the temperature sensor 34t as the battery temperature.

[0040] (Step S104) The BMU 34b determines whether the detected cell voltage for each individual cell 34c falls below a predetermined cell voltage threshold, which is the TDA (Terminate Discharge Alarm) threshold. Based on the determination result, the BMU 34b sets the value of the TDA bit. The TDA bit is a single-bit information bit that indicates whether or not to stop discharging from the battery module 34m. A TDA bit value of 1 indicates that discharge should be stopped. A TDA bit value of 0 indicates that discharge is permitted. As the TDA threshold, for example, the cell voltage generated in each individual cell 34c when power equivalent to the power consumption required for startup processing at a standard clock frequency is discharged from the battery module 34m may be set in advance. In that case, the TDA bit can be considered as information indicating whether or not the remaining capacity of the battery module 34m is sufficient to discharge the power required for startup processing.

[0041] If BMU34b finds that at least one cell has a cell voltage below the TDA threshold (step S104 YES), it proceeds to step S106. If all detected cell voltages are above the TDA threshold (step S104 NO), it sets the value of the TDA bit to 0 and returns to step S102. (Step S106) The BMU34b sets the value of the TDA bit to 1. Then, it returns to the process in step S102.

[0042] Next, a first example of the system startup control process for EC31 according to this embodiment will be described. Figure 4 is a flowchart of the first example of the system startup control for EC31 according to this embodiment. (Step S202) When the power switch 36 is pressed, EC31 determines the power state of the device. If the power supply circuit 33 is not connected to the AC adapter 35, EC31 determines the power state to be battery mode and starts the host system 10 startup process. If the power supply circuit 33 is not connected to the AC adapter 35, EC31 determines the power state to be AC ​​mode, terminates the process shown in Figure 4, and starts the host system 10 startup process.

[0043] (Step S204) EC31 monitors the battery information obtained from the BMU34b of the battery pack 34. At this time, EC31 outputs a battery information request command to the BMU34b indicating a request for battery information. When the BMU34b receives a battery information request command from EC31, it responds to EC31 with battery information including the battery temperature and TDA bits. EC31 proceeds to step S206 if the value of the TDA flag shown in the battery information is 1 (step S204 YES). If EC31's TDA bit value, as indicated in the battery information, is 0 (step S204 NO), it proceeds to step S210.

[0044] (Step S206) EC31 activates the thermal control function of the host system 10. For example, EC31 applies a high voltage value (H) to the PROCHOT terminal (PROCHOT#) of the host system 10 that is significantly higher than the reference voltage. At this time, the PROCHOT terminal changes from a low voltage value (L) state where there is no significant difference from the reference voltage to a high voltage value (H). The host system 10 is instructed (asserted) to perform thermal control by monitoring the voltage applied to the PROCHOT terminal. (Step S208) The host system 10 enables the thermal control function in response to control from EC31 and executes the startup process at a frequency lower than a predetermined standard clock frequency (hereinafter sometimes referred to as the "standard clock frequency"; the standard clock frequency is, for example, 1GHz to 4GHz) (for example, the lowest frequency at which the CPU 11 can operate (typically 250MHz to 600MHz)).

[0045] (Step S210) The host system 10 performs the startup process at a predetermined standard clock frequency. (Step S212) The host system 10 continues the startup process. (Step S214) The host system 10 determines whether the startup process is continuing after a predetermined period of time (for example, 2 to 8 seconds). If it is determined that it is continuing (Step S214 YES), it returns to the process in Step S204. If it is determined that it is not continuing (Step S214 NO), it terminates the process in Figure 5. Therefore, as long as the startup process is continuing, the processes in Steps S204 to S214 are repeated at regular intervals.

[0046] According to the process shown in Figures 3 and 4, the clock frequency of the CPU 11 is controlled by referring to the TDA bit. When there is a reasonable expectation that the power available for discharge from the battery module 34m is sufficient to power the startup process at the standard clock frequency, the startup process is executed at the standard clock frequency. Furthermore, even if the startup process is temporarily executed at a clock frequency lower than the standard clock frequency, if the available power increases due to factors such as heat generation or temperature rise due to the external environment, the clock frequency is increased to the standard clock frequency and the startup process continues. As a result, the startup process is executed with higher performance than when the clock frequency is uniformly determined based on the detected temperature.

[0047] Next, a second example of the battery status monitoring process of the BMU34b according to this embodiment will be described. Figure 5 is a flowchart of the second example of the battery status monitoring process of the BMU34b according to this embodiment. The BMU34b repeats the process from steps S122 to S126. (Step S122) The BMU 34b detects the cell voltage of the individual cells 34c, the current discharged from the battery module 34m, and the battery temperature, similar to step S102.

[0048] (Step S124) The BMU34b calculates the impedance of the battery module 34m from the voltage and current obtained from the cell voltage of each cell 34c, under a preset battery configuration of the battery module 34m. The BMU34b calculates the peak capable wattage and average capable wattage of the battery module 34m using a predetermined formula based on the cell voltage, impedance, and battery temperature. (Step S126) The BMU34b stores the newly calculated peak discharge power and average discharge power. The peak discharge power and average discharge power already stored in the BMU34b are updated with the new peak discharge power and average discharge power, respectively. Then, the process returns to step S122.

[0049] Peak dischargeable power corresponds to the peak value of the dischargeable power from the battery module 34m, which fluctuates over time. Average dischargeable power corresponds to the moving average value of the dischargeable power from the battery module 34m. Peak dischargeable power is greater than average dischargeable power. Generally, the higher the individual cell voltage or the voltage of the battery module 34m, the greater the peak dischargeable power and average dischargeable power. The higher the battery temperature, the greater the peak dischargeable power and average dischargeable power. Also, under constant cell voltage or battery module 34m voltage, the higher the impedance, the less the peak dischargeable power and average dischargeable power. In this application, peak dischargeable power and average dischargeable power are sometimes collectively referred to as dischargeable power (capable wattage).

[0050] Next, a second example of the system startup control process for EC31 according to this embodiment will be described. Figure 6 is a flowchart of the second example of the system startup control for EC31 according to this embodiment. The processes of steps S222, S226, S228, S232, and S234 illustrated in Figure 6 are the same as the processes of steps S202, S206, S208, S212, and S214, respectively, so their explanations will be used accordingly.

[0051] In step S222, EC31 starts the host system 10 startup process in battery mode, and then proceeds to step S224. (Step S224) EC31 monitors battery information obtained from the BMU34b of the battery pack 34. EC31 determines whether the peak dischargeable power and average dischargeable power, as indicated in the battery information obtained from BMU34b, are below predetermined thresholds for peak dischargeable power and average dischargeable power, respectively. If it is determined that they are below the thresholds (step S224 YES), the process proceeds to step S226. If it is determined that either or both of the peak dischargeable power and average dischargeable power are above the predetermined thresholds for peak dischargeable power and average dischargeable power, respectively (step S224 NO), the process proceeds to step S230. Note that the thresholds for peak dischargeable power and average dischargeable power may be pre-set in EC31 to be above the peak value and moving average value of the power consumption required to execute the startup process at a standard clock frequency.

[0052] (Step S230) EC31 activates the power control module (not shown) of the host system 10. EC31 sets power limit parameters in the power control module based on the peak discharge power and average discharge power. The power control module controls the clock frequency of the host system 10 based on the power limit parameters set in EC31. Power limit parameters include, for example, Power Limit 1 (PL1) and Power Limit 2 (PL2). PL1 is the upper limit of the long-term average power consumption of the CPU 11 during the first observation period up to that point (e.g., 30 seconds to 120 seconds). PL2 is the upper limit of the short-term average power consumption of the CPU 11 during the second observation period up to that point (a shorter period than the first observation period, e.g., 3 to 10 seconds). EC31 sets the values ​​obtained by multiplying the peak dischargeable power and average dischargeable power by a constant coefficient of 1 or less (e.g., 0.7 to 0.9), respectively, as PL2 and PL1 in the power control module. The power control module controls the clock frequency of the CPU 11 so that the short-term average power during the first observation period up to that point is less than or equal to PL1, and the long-term average power during the second observation period is less than or equal to PL2. Then, the process proceeds to step S232.

[0053] According to the processing shown in Figures 5 and 6, the clock frequency of the CPU 11 is controlled by referring to the peak and average dischargeable power from the battery module 34m. If the power dischargeable from the battery module 34m is sufficient to cover the startup process at the standard clock frequency, the startup process is executed at the standard clock frequency. Furthermore, by quantifying the discharge capacity of the battery module 34m based on the peak and average dischargeable power, the processing capacity of the host system 10, whose power consumption fluctuates over time, can be maximized.

[0054] In addition, during the process in step S204 of Figure 4 and the process in step S224 of Figure 6, EC31 may further refer to the battery temperature included in the battery information. For example, in step S204, if EC31 indicates that the battery temperature is below a predetermined lower limit of operating temperature, or if the value of the TDA flag is 1 (step S204 YES), the process may proceed to step S206. If EC31 indicates that the battery temperature shown in the battery information is above a predetermined lower limit of operating temperature, and the value of the TDA bit is 0 (step S204 NO), the process proceeds to step S210.

[0055] Alternatively, in step S224, if it is determined that the battery temperature of EC31 is below a predetermined lower limit of operating temperature, or that the peak dischargeable power and average dischargeable power are below predetermined thresholds for peak dischargeable power and average dischargeable power, respectively (step S224 YES), the process may proceed to step S226. If it is determined that the battery temperature is above a predetermined lower limit of operating temperature, and either the peak dischargeable power or the average dischargeable power, or both, are above predetermined thresholds for peak dischargeable power and average dischargeable power, respectively (step S224 NO), the process proceeds to step S230.

[0056] In step S124 of Figure 5, the BMU34b may calculate either the peak dischargeable power or the average dischargeable power and omit the calculation of the other. In step S126, the BMU34b updates the existing value of one of the two with the newly calculated value of the other. In step S224 of Figure 7, the EC31 may obtain either the peak dischargeable power or the average dischargeable power and determine whether to proceed to step S226 or step S230 based on whether the obtained value of one of the two is below its threshold. In step S230, the EC31 sets the power limit parameter in the power control module based on either the peak dischargeable power or the average dischargeable power.

[0057] In the above embodiment, an example was given in which EC31 selects one of two predetermined clock frequencies based on the voltage or dischargeable power of the battery module 34m as the clock frequency of the CPU 11, but it is not limited to this. The clock frequency of the CPU 11 may have three or more levels. Furthermore, EC31 may set the clock frequency of the CPU 11 to increase as the voltage or dischargeable power of the battery module 34m increases.

[0058] In the comparative example illustrated in Figure 7, after EC31 starts the startup process in battery mode in step S302, EC31 determines in step S304 whether the battery temperature is below the lower limit of the operating temperature. If the battery temperature is below the lower limit of the operating temperature (step S304 NO), the process proceeds to step S306, where EC31 uniformly sets the CPU 11 to a clock frequency lower than the standard clock frequency. If the battery temperature is above the lower limit of the operating temperature (step S304 YES), the process proceeds to step S310, where EC31 sets the CPU 11 to the standard clock frequency. Therefore, even when the battery module 34m was able to cover the power consumption related to the startup process, it reduced its processing power by lowering the clock frequency, which tended to prolong the startup process time.

[0059] In contrast, the electronic device 1 according to this embodiment comprises a host system 10, a first controller (e.g., EC31), a second controller (e.g., BMU34b), and a battery module 34m. During the startup process of the host system 10, the second controller determines the power supply capacity from the battery module 34m based on the voltage of the battery module 34m, and the first controller determines the clock frequency of the host system 10 based on the supply capacity. In this configuration, the host system 10 operates at a clock frequency determined based on the power supply capacity estimated from the voltage of the battery module 34m. If the battery module 34m has sufficient power supply capacity, the host system 10 can perform at its full processing power without dropping below the standard clock frequency, regardless of the battery temperature. This avoids or reduces delays in the startup process.

[0060] Alternatively, the process by which the second controller determines the power supply capacity and the process by which the first controller determines the clock frequency may be repeated at predetermined intervals. In this configuration, the clock frequency is variable in response to fluctuations in power supply capacity. Even if the clock frequency temporarily drops, if the power supply capacity recovers due to a rise in temperature, the clock frequency will return to its previous frequency. Therefore, startup delays are reduced.

[0061] Furthermore, the second controller determines whether or not to stop discharging the battery module 34m based on the voltage of the battery module 34m (for example, by the TDA bit), and when the first controller determines that it has stopped discharging the battery module 34m, it may set a clock frequency lower than a predetermined standard clock frequency as the clock frequency. With this configuration, if the power supply capacity decreases to the point where the discharge stoppage is determined based on the voltage of the battery module 34m, the clock frequency of the host system 10 can be lowered below the standard clock frequency. This prevents the startup process from continuing because the power supplied by the battery module 34m is insufficient.

[0062] Furthermore, the second controller estimates the dischargeable power, which is the power that can be discharged from the battery module 34m, based on the voltage and temperature of the battery module 34m, and the first controller may set a clock frequency lower than a predetermined standard clock frequency as the clock frequency when the dischargeable power falls below a predetermined threshold for dischargeable power. In this configuration, the host system 10's clock frequency is determined based on the estimated dischargeable power from the battery module 34m, which is determined based on the battery module's voltage and temperature. This allows for a more quantitative avoidance of situations where power consumption exceeds the power supply capacity of the battery module 34m.

[0063] Furthermore, when the first controller detects a DC power source (e.g., an AC adapter 35) separate from the battery module 34m, it may set a standard clock frequency as the clock frequency of the host system 10, regardless of the power supply capacity from the battery module 34m. With this configuration, if a DC power source separate from the battery module 34m is detected, the standard clock frequency is used by consuming the power supplied from that DC power source, thereby avoiding a decrease in startup performance.

[0064] Although embodiments of the present invention have been described in detail above with reference to the drawings, the specific configurations are not limited to the embodiments described above, and include designs and the like that do not depart from the spirit of this invention. The configurations described in the embodiments described above can be combined in any way. [Explanation of Symbols]

[0065] 1...Electronic device, 10...Host system, 11...CPU, 12...Main memory, 22...ROM, 23...Storage, 24...Display, 25...Communication module, 26...Input / Output I / F, 31...EC, 32...Input device, 33...Power supply circuit, 34...Battery pack, 34b...BMU, 34c1~34cN...Cell, 34m...Battery module, 35...AC adapter, 36...Power switch

Claims

1. An electronic device comprising a host system, a first controller, a second controller, and a battery module, During the startup process of the host system, The second controller is, The power supply capacity from the battery module is determined based on the voltage of the battery module. The first controller is, The clock frequency of the host system is determined based on the aforementioned supply capacity. electronic equipment.

2. The second controller performs a process to determine the supply capacity, The first controller performs the process of determining the clock frequency, Repeats at predetermined intervals. The electronic device according to claim 1.

3. The second controller is, Based on the voltage, it is determined whether or not to stop the discharge of the battery module. The first controller is, When it is determined that the battery module has stopped discharging, a clock frequency lower than the predetermined standard clock frequency is set as the clock frequency. The electronic device according to claim 1.

4. The second controller is, Based on the voltage and temperature of the battery module, the dischargeable power, which is the power that can be discharged from the battery module, is estimated. The first controller is, When the dischargeable power falls below a predetermined threshold for dischargeable power, Set the aforementioned clock frequency to a clock frequency lower than the predetermined standard clock frequency. The electronic device according to claim 1.

5. The first controller is, When detecting a DC power source separate from the aforementioned battery module, Regardless of the supply capacity, the standard clock frequency is set as the clock frequency. The electronic device according to claim 3.

6. A control method for an electronic device comprising a host system, a first controller, a second controller, and a battery module, During the startup process of the host system, The second controller is, The power supply capacity from the battery module is determined based on the voltage of the battery module. The first controller is, The clock frequency of the host system is determined based on the aforementioned supply capacity. Control method.

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