Semiconductor memory device for HBM and method for manufacturing the same

Abstract

To provide a semiconductor memory device for HBM that can suppress cracking. [Solution] A semiconductor memory device for HBM comprising a substrate having a semiconductor memory element region, wherein the substrate is a carbon-doped silicon substrate and has the semiconductor memory element region on the surface layer of the carbon-doped silicon substrate, or comprises a carbon-doped first silicon substrate and a carbon-non-doped second silicon substrate on the carbon-doped first silicon substrate, and has the semiconductor memory element region on the surface layer of the carbon-non-doped second silicon substrate.

Description

[Technical Field]

[0001] This invention relates to a semiconductor memory device for High Bandpass Memory (HBM) and a method for manufacturing the same, and more particularly to a semiconductor memory device for HBM installed inside a GPU used in a server for generating AI, and a method for manufacturing the same. [Background technology]

[0002] In the 2000s, the demand for AI servers exploded, driven by the ability to machine-learn large amounts of data on servers and dramatically improve the accuracy of image recognition. Furthermore, in recent years, generative AI, which generates data based on machine-learned data, has become mainstream. While it was previously possible to output search results based on the results of machine learning, generative AI, which will attract attention in the future, outputs new results. An example of this is the recent case of SoftBank (registered trademark) filing an overwhelming number of patents in a short period of time, which will fundamentally change the conventional social structure (Non-Patent Literature 1).

[0003] Furthermore, since the content of the data used for learning naturally differs between machine learning and generative AI, the importance of AI servers, which replace conventional general-purpose servers, is expected to increase even more in the future (the age of artificial intelligence).

[0004] The GPUs used in AI servers have a structure in which the processor's main core and the HBM are connected by a silicon interposer. For thermal management, heat sinks are installed on top of the processor and HBM. For this reason, the height of the HBM must be the same as the height of the processor (Non-Patent Literature 2).

[0005] HBMs have a stacked structure of DRAM (Dynamic Random Access Memory) chips (DRAM dies). To improve performance, the number of stacks needs to be increased, but due to height constraints, the height of individual DRAM chips needs to be reduced (thinner). As mentioned in Non-Patent Document 2 above, as the DRAM chips become thinner, the substrate strength of the DRAM chip decreases, leading to problems such as cracking defects due to crack formation and bonding defects due to warping. [Prior art documents] [Non-patent literature]

[0006] [Non-Patent Document 1] Nomura Research Institute, Center for Future Innovation Research Report Vol. 10, "The Future Landscape Transformed by Generative AI: What You Need to Know About the Suddenly Appearing 'Generative AI'," December 2023. [Non-Patent Document 2] ADMETAPlus2024, Tutorial "Metallization for Memory Devices - Challenging High Bandwidth Memory," Naoki Yokoi, Micron Memory Japan, KK [Overview of the project] [Problems that the invention aims to solve]

[0007] This invention was made to solve the above problems and aims to provide a semiconductor memory device for HBM that can suppress cracking. [Means for solving the problem]

[0008] To achieve the above objective, the present invention provides a semiconductor memory device for HBM comprising a substrate having a semiconductor memory element region, The aforementioned substrate is It is a carbon-doped silicon substrate, and has the semiconductor memory element region on the surface layer of the carbon-doped silicon substrate, or It includes a carbon-doped first silicon substrate and a carbon-undoped second silicon substrate on the carbon-doped first silicon substrate, and has the semiconductor memory element region on the surface layer of the carbon-undoped second silicon substrate, and provides a semiconductor memory device for HBM characterized by this.

[0009] In the semiconductor memory device for HBM of the present invention, there are two patterns as described above regarding the substrate. In either pattern, except for the surface layer (semiconductor memory element region), it has at least a silicon part doped with carbon (the region other than the surface layer of the carbon-doped silicon substrate, or the carbon-doped first silicon substrate). Therefore, the strength is improved by the doped carbon, and it becomes a semiconductor memory device for HBM capable of suppressing cracks. For this reason, without causing problems such as cracks, the semiconductor memory device for HBM can be further thinned, and high performance in HBM (increase in the number of stacked layers of the semiconductor memory device for HBM) becomes possible.

[0010] In this case, the thickness of the region other than the thickness of the semiconductor memory element region among the thickness of the carbon-doped silicon substrate, or the thickness of the carbon-doped first silicon substrate is It can be set to 100 nm or more.

[0011] If the thickness of the above-mentioned part is within the above numerical range, cracks can be more reliably and effectively suppressed.

[0012] Also, it can be further provided with a silicon support on the back side of the substrate.

[0013] It may be further provided with a silicon support in this way. Due to the presence of the silicon support, the strength is further improved.

[0014] The present invention also provides a method for manufacturing a semiconductor memory device for HBM, which includes forming an epitaxial layer on a silicon substrate, forming a semiconductor memory element on the surface layer of the epitaxial layer, and performing a thinning process. In the formation of the epitaxial layer and the formation of the semiconductor memory element, a carbon-doped silicon layer is formed on the silicon substrate by epitaxial growth, and then the semiconductor memory element is formed on the surface layer of the carbon-doped silicon layer, or a carbon-doped first silicon layer is formed on the silicon substrate by epitaxial growth, and then a carbon-undoped second silicon layer is formed on the carbon-doped first silicon layer, and then the semiconductor memory element is formed on the surface layer of the carbon-undoped second silicon layer. In the thinning process, a method for manufacturing a semiconductor memory device for HBM is provided, which is characterized by removing part or all of the silicon substrate.

[0015] According to the method for manufacturing a semiconductor memory device for HBM of the present invention, as described above, a semiconductor memory device for HBM having at least a silicon portion doped with carbon (a region other than the surface layer of the carbon-doped silicon layer or the carbon-doped first silicon layer) except for the surface layer (semiconductor memory element region) can be manufactured. Therefore, the strength can be improved by the doped carbon, and cracking can be suppressed. As a result, without causing the problem of cracking, the semiconductor memory device for HBM can be thinned to increase the number of its laminations in the HBM, and the high performance of the HBM can be achieved.

[0016] In this case, when forming the semiconductor memory element on the surface layer of the carbon-doped silicon layer, the thickness of the region other than the formation region thickness of the semiconductor memory element in the thickness of the carbon-doped silicon layer is left at 100 nm or more, or when forming the carbon-doped first silicon layer, the film formation thickness can be set to 100 nm or more.

[0017] If the thickness of the above-mentioned parts falls within the above numerical range, crack suppression can be achieved more reliably and effectively.

[0018] Furthermore, when forming the carbon-doped silicon layer, or when forming the carbon-non-doped second silicon layer, The film thickness can be adjusted depending on the thickness of the semiconductor memory device for HBM being manufactured.

[0019] In HBM fabrication, when attempting to increase the number of stacked semiconductor memory devices for HBM while considering the thickness limitations of the HBM, it is necessary to thin the thickness of each individual HBM semiconductor memory device. Therefore, it is best to appropriately adjust the thickness of each silicon layer as described above, taking into account the required thickness of the HBM semiconductor memory device. [Effects of the Invention]

[0020] The present invention provides a semiconductor memory device for HBM and a manufacturing method thereof, which improves strength due to doped carbon and reduces cracking, thereby enabling the creation of an HBM semiconductor memory device with improved performance. This allows for thinner films than conventional HBM semiconductor memory devices, increases the number of layers in the HBM, and ultimately improves the performance of the HBM. [Brief explanation of the drawing]

[0021] [Figure 1] This is a schematic diagram illustrating a first embodiment of the semiconductor memory device for HBM of the present invention. [Figure 2] This is a schematic diagram illustrating a second embodiment of the semiconductor memory device for HBM of the present invention. [Figure 3] This is a schematic diagram illustrating a third aspect of the semiconductor memory device for HBM according to the present invention. [Figure 4] This is a schematic diagram illustrating a fourth aspect of the semiconductor memory device for HBM according to the present invention. [Figure 5] This is a process flow diagram showing a first embodiment of the method for manufacturing a semiconductor memory device for HBM according to the present invention. [Figure 6]This is a process flow diagram showing a second aspect of the method for manufacturing a semiconductor memory device for HBM according to the present invention. [Modes for carrying out the invention]

[0022] The present invention will be described in detail below with reference to the figures as an example of an embodiment, but the present invention is not limited thereto. As mentioned above, while there is a demand for thinning individual DRAM chips (semiconductor memory devices for HBM) in HBM, cracking due to thinning is a challenge.

[0023] Therefore, the present inventors conducted diligent research and discovered that a semiconductor memory device for HBM comprising a substrate having a semiconductor memory element region, wherein the substrate is a carbon-doped silicon substrate and has a semiconductor memory element region on the surface layer of the carbon-doped silicon substrate, or comprises a carbon-doped first silicon substrate and a carbon-non-doped second silicon substrate on the carbon-doped first silicon substrate, and has a semiconductor memory element region on the surface layer of the carbon-non-doped second silicon substrate, is capable of suppressing cracking because it has at least a carbon-doped silicon portion excluding the surface layer (semiconductor memory element region), thus completing the present invention.

[0024] Furthermore, the present invention was found to provide a method for manufacturing a semiconductor memory device for HBM, which involves forming an epitaxial layer on a silicon substrate, forming a semiconductor memory element on the surface layer of the epitaxial layer, and performing a thin-film treatment, wherein in the process of forming the epitaxial layer and forming the semiconductor memory element, a carbon-doped silicon layer is formed on the silicon substrate by epitaxial growth, and then a semiconductor memory element is formed on the surface layer of the carbon-doped silicon layer, or a first carbon-doped silicon layer is formed on the silicon substrate by epitaxial growth, then a second carbon-undoped silicon layer is formed on the first carbon-doped silicon layer, and then a semiconductor memory element is formed on the surface layer of the second carbon-undoped silicon layer, and in the thin-film treatment, part or all of the silicon substrate is removed, thereby providing a semiconductor memory device for HBM that exhibits the above-mentioned excellent effects, thus completing the present invention.

[0025] The present invention describes a semiconductor memory device for HBM. <First aspect of the apparatus> Figure 1 shows an example of a semiconductor memory device for HBM according to the present invention. As shown in Figure 1, the semiconductor memory device for HBM (hereinafter also simply referred to as memory device) 1 of the present invention comprises a silicon support 2 and a substrate 3. In the embodiment shown in Figure 1, substrate 3 is a carbon-doped silicon substrate (hereinafter also simply referred to as silicon substrate). Although the silicon substrate is the same as substrate 3, for convenience, it is denoted by a different reference numeral 4.

[0026] The silicon support 2 can be made of silicon, but is not particularly limited. It supports the substrate 3 from its underside. The silicon support 2 may be provided in this way to improve strength, etc. The silicon substrate 4 (substrate 3) is carbon-doped throughout, and has a semiconductor memory element region 4A on its surface. In other words, the desired semiconductor memory element is formed only on the surface of the carbon-doped silicon layer. The formed semiconductor memory element can be anything that performs an appropriate role as a DRAM, such as a capacitor or a transistor, and is not particularly limited. Furthermore, in the thickness direction, no semiconductor memory elements are formed in regions other than the surface layer (semiconductor memory element region 4A) of the silicon substrate 4 (hereinafter also referred to as the inner layer region 4B).

[0027] As described above, the memory device 1 of the present invention has at least a carbon-doped silicon region (i.e., an inner layer region 4B) in addition to the surface layer (semiconductor memory element region 4A), which suppresses the occurrence of cracks and is extremely superior. It is capable of adequately addressing the challenges of cracking and bonding defects due to warping in thin-film DRAM chips, which are required in recent years to achieve even thinner films and an increase in the number of layers.

[0028] Here, the carbon concentration in the silicon substrate 4 is not particularly limited, but for example, 1 × 10 18 atoms / cm 3 The above is preferable because it allows for a more reliable improvement in strength. Furthermore, there is no particular upper limit, but for example, 4 × 10 21 atoms / cm 3 Within the following range, sufficient strength can be obtained from doped carbon, and the crack suppression effect can be fully realized. To more reliably obtain these effects, more preferably 1 × 10 19 atoms / cm 3 The above 4 x 10 21 atoms / cm 3 The following range is possible.

[0029] The thickness of the silicon support 2 and the silicon substrate 4 is not particularly limited and can be determined as appropriate. For example, the thickness of each part can be determined according to the overall thickness of the memory device 1 in accordance with the requirements for thin film. The thinner the material, the thinner the overall thickness of the memory device 1 becomes, which is preferable because it allows for an increase in the number of layers in the manufacturing of HBM.

[0030] Furthermore, the thickness of the inner layer region 4B (i.e., the thickness of the region of the carbon-doped silicon substrate 4 other than the thickness of the semiconductor memory element region 4A) is not particularly limited, but it is preferable if it is, for example, 100 nm or more, as this is more effective in suppressing the cracks mentioned above. If necessary, it can be, for example, 125 nm or more, or even 150 nm or more. As an upper limit, for example, a value of around 200 nm is generally considered sufficient, but it is not limited to this, and can be determined while comparing the above effects with the overall thickness of the memory device 1, etc.

[0031] <Second aspect of the apparatus> Furthermore, Figure 2 shows an example of another embodiment of the semiconductor memory device for HBM of the present invention. As shown in Figure 2, the memory device 1A of this embodiment consists only of a silicon substrate 4 (semiconductor memory element region 4A and inner layer region 4B), which is the substrate 3. In other words, in Figure 2 there is no silicon support 2 corresponding to that of Figure 1. Therefore, the memory device 1A of the embodiment in Figure 2 can be made even thinner overall than the memory device 1 of the embodiment in Figure 1. As mentioned above, the effectiveness of the carbon-doped silicon region, known as the inner layer 4B, is such that the same crack-resistant effect as in the embodiment shown in Figure 1 can be obtained.

[0032] <Apparatus, Third Embodiment> Figure 3 shows an example of another embodiment of the semiconductor memory device for HBM of the present invention. As shown in Figure 3, the memory device 10 of this embodiment comprises a silicon support 20 and a substrate 30. In the aspect of FIG. 3, the substrate 30 includes a carbon-doped first silicon substrate (hereinafter, also simply referred to as the first silicon substrate) 40 and a carbon-undoped second silicon substrate (hereinafter, also simply referred to as the second silicon substrate) 50 on the carbon-doped first silicon substrate 40.

[0033] The silicon support 20 only needs to be made of silicon and is not particularly limited. It supports the substrate 30 from its back side. In order to improve the strength and the like, the silicon support 20 may be provided. The first silicon substrate 40 is a layer of silicon doped with carbon throughout. On the other hand, the second silicon substrate is a layer of carbon-undoped silicon and has a semiconductor memory element region 50A on its surface layer. That is, in the layer of carbon-undoped silicon, only a desired semiconductor memory element (such as a capacitor or a transistor for DRAM) is formed on its surface layer. Also, in the thickness direction, semiconductor memory elements are not formed in the region (inner layer region 50B) other than the surface layer (semiconductor memory element region 50A) of the second silicon substrate 50.

[0034] As described above, since the memory device 10 of the present invention has at least a silicon portion doped with carbon (that is, the first silicon substrate 40), the occurrence of cracks can be suppressed, and thus further thinning and an increase in the number of stacked layers can be achieved.

[0035] The thicknesses of the silicon support 20 and the substrate 30 (the first silicon substrate 40 and the second silicon substrate 50) are not particularly limited and can be determined appropriately. For example, according to the overall thickness of the memory device 10 in accordance with the requirement of thinning, the thickness of each part (especially the second silicon substrate 50) can be determined. The thinner it is, the thinner the overall thickness of the memory device 10 becomes, and it is preferable because the number of stacked layers can also be increased in the manufacture of HBM.

[0036] Here, the carbon concentration in the first silicon substrate 40 is not particularly limited. For example, 1×10 18atoms / cm 3 The above is preferable because it allows for a more reliable improvement in strength. Furthermore, there is no particular upper limit, but for example, 4 × 10 21 atoms / cm 3 Within the following range, sufficient strength can be obtained from doped carbon, and the crack suppression effect can be fully realized. To more reliably obtain these effects, more preferably 1 × 10 19 atoms / cm 3 The above 4 x 10 21 atoms / cm 3 The following range is possible.

[0037] Furthermore, the thickness of the first silicon substrate 40 is not particularly limited, but a thickness of 100 nm or more is preferable because it is more effective in suppressing the cracks mentioned above. If necessary, it can be, for example, 125 nm or more, or even 150 nm or more. As an upper limit, a thickness of around 200 nm is generally considered sufficient, but it is not limited to this, and can be determined while comparing the above effects with the overall thickness of the memory device 10.

[0038] <Fourth aspect of the apparatus> Furthermore, Figure 4 shows an example of another embodiment of the semiconductor memory device for HBM of the present invention. As shown in Figure 4, the memory device 10A in this embodiment consists only of a first silicon substrate 40 and a second silicon substrate 50 (semiconductor memory element region 50A and inner layer region 50B), which are the substrate 30. In other words, in Figure 4 there is no equivalent to the silicon support 20 in Figure 3. Therefore, the memory device 10A in the embodiment of Figure 4 can be made even thinner overall than the memory device 10 in the embodiment of Figure 3. As mentioned above, the effectiveness of the carbon-doped silicon portion, known as the first silicon substrate 40, is such that the same crack-resistant effect as in the embodiment shown in Figure 3 can be obtained.

[0039] Next, the method for manufacturing a semiconductor memory device for HBM according to the present invention will be described. <Method 1 Embodiment> Figure 5 shows an example of the process flow of the manufacturing method of the present invention. This is the process flow for manufacturing the HBM semiconductor memory device shown in Figure 1 or Figure 2, and as shown in Figure 5, it consists of (Step 1) preparation of the silicon substrate, (Step 2) deposition of a carbon-doped silicon layer, (Step 3) formation of a semiconductor memory element, and (Step 4) thin-film processing. Each step will be described in detail below.

[0040] (Step 1) Preparation of the silicon substrate First, a silicon substrate (single-crystal silicon substrate) is prepared. A silicon ingot can be manufactured using methods such as the Czochralski process or the floating zone process, and then the ingot can be cut into wafers. These wafers can then be prepared by performing various processes such as grinding, etching, and polishing. The diameter and surface orientation are not particularly limited.

[0041] (Step 2) Deposition of carbon-doped silicon layer Next, a vacuum CVD apparatus is prepared (an apparatus similar to the one used conventionally can be prepared), and an epitaxial layer is deposited on a silicon substrate placed inside the apparatus. More specifically, a carbon-doped silicon layer is deposited on the silicon substrate by epitaxial growth. In a vacuum CVD apparatus, a carbon-doped silicon layer is epitaxially grown under reduced pressure using, for example, trimethylsilane, monomethylsilane, or monosilane as a raw material gas. At this time, the temperature is set to, for example, 700°C to 900°C, preferably 730°C to 750°C, to produce a carbon-doped epitaxial layer with fewer defects. The pressure during film formation can be, for example, around 1 to 80 Torr (133 to 10666 Pa).

[0042] For example, the carbon concentration is 1 × 10⁻⁶. 18 atoms / cm 3 The above 4 x 10 21 atoms / cm 3 Within the following range, more preferably 1 × 10 19 ~4×10 21 atoms / cm 3This range can be used. By using such a range, it is possible to more reliably ensure sufficient strength from the doped carbon, and consequently, achieve sufficient suppression of cracks and fractures. The carbon concentration can be adjusted by controlling the flow rate of the raw material gas and the film deposition temperature.

[0043] The thickness of the film deposited at this stage is not particularly limited and can be changed as appropriate. However, it is advisable to consider the final overall thickness of the memory device in advance and adjust the thickness of the silicon layer appropriately so that it falls within the range of the overall thickness after the subsequent thinning process.

[0044] (Step 3) Formation of semiconductor memory elements Then, the desired semiconductor memory elements are formed on the surface of the carbon-doped silicon layer that has been deposited. Using techniques such as photolithography, a DRAM consisting of capacitors that serve as memory elements and transistors that serve as switches can be fabricated. The fabrication of this DRAM itself can be carried out in basically the same way as in the past. The region where the semiconductor memory element is formed in this manner corresponds to the semiconductor memory element region 4A in Figures 1 and 2. Furthermore, in the thickness direction of the carbon-doped silicon layer, the region other than the semiconductor memory element region 4A (i.e., the region where the semiconductor memory element was not formed) corresponds to the inner layer region 4B in Figures 1 and 2. The combination of these regions, that is, the carbon-doped silicon layer with the semiconductor memory element formed on the surface as described above, corresponds to the carbon-doped silicon substrate 4 (or substrate 3) in Figures 1 and 2.

[0045] At this time, the film thickness to be left as the inner layer region 4B in Figures 1 and 2 is not particularly limited, but it is preferably 100 nm or more. As mentioned above, this is because it is more effective in suppressing cracking of the final manufactured memory device. Furthermore, it can be, for example, 125 nm or more, 150 nm or more, and around 200 nm is sufficient.

[0046] (Step 4) Thinning treatment Then, part or all of the silicon substrate is removed. The removal method itself is not particularly limited and can be carried out as appropriate using grinding, polishing, etching, etc., and may be the same as conventional methods. Furthermore, if only a portion is removed, the remaining silicon substrate corresponds to the silicon support 2 in Figure 1. Moreover, the entire remaining portion after this thin-film treatment corresponds to the memory device 1 in Figure 1. On the other hand, if the entire silicon substrate is removed, the entire remaining material after the thin-film treatment corresponds to memory device 1A in Figure 2. Removing the entire silicon substrate allows for even thinner film construction, enabling further thinning of the HBM layer and an increase in the number of DRAM chips, which is preferable.

[0047] Furthermore, the thickness of each layer in each of the aforementioned processes can be appropriately changed according to the desired thickness of the memory device. In particular, the thickness of the layer formed by epitaxial growth can be freely set by adjusting the growth time.

[0048] As described above, the manufacturing method of the present invention makes it possible to improve strength by utilizing carbon doping and to manufacture memory devices that can suppress cracking. Therefore, even if the memory device is made thinner than conventional devices, it is less likely to crack and less likely to warp. Furthermore, by making the film even thinner, it is possible to increase the number of layers and improve the performance of HBM.

[0049] In the fabrication of HBM, the semiconductor memory device for HBM according to the present invention is diced into a chip (DRAM chip), and multiple DRAM chips (memory dies) prepared in this way are stacked vertically and connected to each other with through-electrodes to manufacture HBM. This HBM is then connected to a silicon interposer, and a processor is connected to the silicon interposer, making it usable in AI servers and the like.

[0050] <Method 2> Figure 6 also shows an example of a process flow of another embodiment of the manufacturing method of the present invention. This is a process flow for manufacturing the semiconductor memory device for HBM shown in Figure 3 or Figure 4, and as shown in Figure 6, it consists of (Step 1) preparation of a silicon substrate, (Step 2) deposition of a carbon-doped first silicon layer, (Step 3) deposition of a carbon-non-doped second silicon layer, (Step 4) formation of a semiconductor memory element, and (Step 5) thin-film processing. Each step will be described in detail below.

[0051] (Step 1) Preparation of the silicon substrate First, a silicon substrate (single-crystal silicon substrate) is prepared. This can be done in the same way as in step 1 of the first embodiment of the method.

[0052] (Step 2) Deposition of the first carbon-doped silicon layer Next, a vacuum CVD apparatus is prepared (an apparatus similar to the one used conventionally can be prepared), and an epitaxial layer is deposited on a silicon substrate placed inside the apparatus. More specifically, a carbon-doped first silicon layer is deposited on the silicon substrate by epitaxial growth. This deposited carbon-doped first silicon layer corresponds to the carbon-doped first silicon substrate 40 in Figures 3 and 4. The vacuum CVD apparatus used, the pressure and temperature during film formation, the carbon concentration, etc., can be the same as in step 2 of the first embodiment of the method. While the film thickness is not particularly limited, it is preferably 100 nm or more. As mentioned above, this is because it is more effective in suppressing cracking in the final manufactured memory device. Furthermore, it can be, for example, 125 nm or more, 150 nm or more, and around 200 nm is sufficient.

[0053] (Step 3) Deposition of the carbon-non-doped second silicon layer Next, a second carbon-non-doped silicon layer is deposited on the first carbon-doped silicon layer by epitaxial growth. In this case, there are no restrictions on whether a vacuum CVD apparatus or an atmospheric pressure CVD apparatus is used, but when growing a particularly thick layer, an atmospheric pressure CVD apparatus is preferable because it allows for a higher growth rate. At this time, by introducing, for example, monosilane or trichlorosilane into the CVD apparatus and setting the temperature to approximately 1000°C to 1200°C, the above-mentioned carbon-non-doped second silicon layer can be deposited.

[0054] At this time, by taking into consideration the final overall thickness of the memory device in advance, it is advisable to appropriately adjust the thickness of the carbon-non-doped second silicon layer so that it falls within the range of the final overall thickness after the subsequent thinning process.

[0055] (Step 4) Formation of semiconductor memory elements Then, a desired semiconductor memory element is formed on the surface of the deposited carbon-non-doped second silicon layer. A DRAM can be fabricated, and the fabrication itself can be carried out in the same manner as in step 3 of the first embodiment of the method. In other words, it can be carried out in basically the same manner as conventional methods. The region where the semiconductor memory element is formed in this manner corresponds to the semiconductor memory element region 50A in Figures 3 and 4. In addition, in the thickness direction of the carbon-undoped second silicon layer, the region other than the semiconductor memory element region 50A (i.e., the region remaining without the formation of the semiconductor memory element) corresponds to the inner layer region 50B in Figures 3 and 4. The combination of these regions, that is, the carbon-undoped second silicon layer with the semiconductor memory element formed on the surface as described above, corresponds to the carbon-undoped second silicon substrate 50 in Figures 3 and 4. Furthermore, the combination of the carbon-doped first silicon layer and the carbon-non-doped second silicon layer (with semiconductor memory elements on the surface) corresponds to the substrate 30 in Figures 3 and 4.

[0056] (Step 5) Thinning treatment Then, part or all of the silicon substrate is removed. This can be done, for example, as in step 4 of the first embodiment of the method. Furthermore, if only a portion is removed, the remaining silicon substrate corresponds to the silicon support 20 in Figure 3. Moreover, the entire remaining portion after this thin-film treatment corresponds to the memory device 10 in Figure 3. On the other hand, if the entire silicon substrate is removed, the entire remaining material after the thin-film treatment corresponds to the memory device 10A in Figure 4.

[0057] Furthermore, the thickness of each layer in each of the aforementioned processes can be appropriately changed according to the desired thickness of the memory device. In particular, the thickness of the layer formed by epitaxial growth can be freely set by adjusting the growth time. Furthermore, the subsequent preparation of HBM can be carried out in the same manner as in the first embodiment of the method.

[0058] As described above, the manufacturing method of the present invention makes it possible to manufacture memory devices that can suppress cracking by utilizing carbon doping, and consequently, to further improve the performance of HBM by making the film thinner and increasing the number of layers. [Examples]

[0059] The present invention will be described more specifically below with reference to examples of the present invention, but the present invention is not limited to these examples. (Example 1) The semiconductor memory device 1 for HBM according to the present invention was manufactured as follows, following the flow chart in Figure 5. A single-crystal silicon substrate with a diameter of 300 mm, a thickness of 750 μm, a crystal orientation of (100), boron doping, and a resistance of 10 Ω·cm was prepared (Step 1). A single-crystal silicon substrate is placed on a susceptor inside the reactor of a commercially available, typical vacuum CVD apparatus, and carbon is converted to 1 × 10¹⁶ carbon using trimethylsilane gas as the raw material gas at 700°C and 10 Torr (1333 Pa). 20 atoms / cm 3 A silicon layer doped with the specified concentration (carbon-doped silicon layer) was grown to a thickness of 2 μm (Step 2).

[0060] Using this epitaxial substrate, a semiconductor memory element (DRAM) was formed on the surface layer of a carbon-doped silicon layer by photolithography (Step 3). At this time, a region where the DRAM was not formed (inner layer region) remained with a thickness of approximately 100 nm in the thickness direction. Subsequently, for use with HBM, the single-crystal silicon substrate was polished to a thickness of approximately 78 μm to create a thin film, resulting in an overall thickness of 80 μm (step 4), thereby obtaining the HBM semiconductor memory device 1 of the present invention. Afterward, multiple DRAM chips were obtained by dicing. Then, bumps were formed on the back surface and the four DRAM chips were bonded together, but no cracks occurred.

[0061] (Example 2) The semiconductor memory device 10 for HBM according to the present invention was manufactured as follows, following the flow chart in Figure 6. A single-crystal silicon substrate similar to that in Example 1 was prepared (Step 1). Using a vacuum CVD apparatus similar to that in Example 1, trimethylsilane gas was used as the raw material gas, and carbon was processed at 700°C and 10 Torr (1333 Pa) at a pressure of 1 × 10⁻¹⁶. 20 atoms / cm 3 A silicon layer doped with the specified concentration (the first carbon-doped silicon layer) was grown to a thickness of 100 nm (Step 2). Next, using trichlorosilane gas as the raw material, a silicon layer (a carbon-non-doped second silicon layer) was grown to a thickness of 2 μm at 1080°C for 10 minutes (Step 3).

[0062] Using this epitaxial substrate, a DRAM was formed on the surface layer of the carbon-non-doped second silicon layer in the same manner as in Example 1 (Step 4). At this time, a region where no DRAM was formed (inner layer region) remained with a thickness of approximately 100 nm in the thickness direction. Subsequently, for use with HBM, the single-crystal silicon substrate was polished to a thickness of approximately 78 μm to create a thin film, resulting in an overall thickness of 80 μm (step 5), thereby obtaining the HBM semiconductor memory device 10 of the present invention. Afterward, multiple DRAM chips were obtained by dicing. Then, bumps were formed on the back surface and the four DRAM chips were bonded together, but no cracks occurred.

[0063] (Comparative example) A single-crystal silicon substrate similar to that in Example 1 was prepared. In a commercially available, standard atmospheric pressure epitaxial growth furnace, H2 annealing was performed at 1130°C for 1 minute. Subsequently, the growth temperature was increased to 1080°C, and trichlorosilane gas was introduced as the raw material gas to grow a silicon epitaxial layer (carbon-non-doped layer) to a thickness of 2 μm.

[0064] Using this epitaxial substrate, a DRAM was formed on the surface layer of the silicon epitaxial layer in the same manner as in Example 1. At this time, a region where no DRAM was formed (inner layer region) remained with a thickness of approximately 100 nm in the thickness direction. Subsequently, for use with HBM, the single-crystal silicon substrate was polished to a thickness of approximately 78 μm to create a thin film, resulting in an overall thickness of 80 μm, thus obtaining a semiconductor memory device for HBM. Afterward, multiple DRAM chips were obtained by dicing. Then, bumps were formed on the back surface and four DRAM chips were bonded together. In this case, cracks occurred in all chips, starting from the bumps.

[0065] It should be noted that the present invention is not limited to the embodiments described above. The embodiments described above are illustrative, and any configuration that has substantially the same technical idea as described in the claims of the present invention and achieves similar effects is included within the technical scope of the present invention. [Explanation of Symbols]

[0066] 1, 1A, 10, 10A... Semiconductor memory device for HBM of the present invention, 2, 20… Silicon support 3, 30...substrate, 4…Carbon-doped silicon substrate, 4A... Semiconductor memory element area, 4B...Inner layer region (the region in the thickness direction of a carbon-doped silicon substrate other than the semiconductor memory element region), 40... Carbon-doped first silicon substrate, 50...Carbon-non-doped second silicon substrate, 50A... Semiconductor memory element region, 50B...Inner layer region (the region in the thickness direction of the carbon-non-doped second silicon substrate other than the semiconductor memory element region).

Claims

1. A semiconductor memory device for HBMs comprising a substrate having a semiconductor memory element region, The aforementioned substrate is A carbon-doped silicon substrate, wherein the surface layer of the carbon-doped silicon substrate has the semiconductor memory element region, or A semiconductor memory device for HBM, characterized by comprising a carbon-doped first silicon substrate and a carbon-non-doped second silicon substrate on the carbon-doped first silicon substrate, wherein the surface layer of the carbon-non-doped second silicon substrate has the semiconductor memory element region.

2. The thickness of the region of the carbon-doped silicon substrate other than the thickness of the semiconductor memory element region, or the thickness of the first carbon-doped silicon substrate, The semiconductor memory device for HBM according to claim 1, characterized in that it is 100 nm or larger.

3. The semiconductor memory device for HBM according to claim 1 or 2, characterized in that a silicon support is further provided on the back side of the substrate.

4. A method for manufacturing a semiconductor memory device for HBM, comprising forming an epitaxial layer on a silicon substrate, forming a semiconductor memory element on the surface layer of the epitaxial layer, and subjecting it to a thin-film treatment, In the formation of the epitaxial layer and the semiconductor memory element, A carbon-doped silicon layer is formed on the silicon substrate by epitaxial growth, and then the semiconductor memory element is formed on the surface layer of the carbon-doped silicon layer, or A carbon-doped first silicon layer is formed on the silicon substrate by epitaxial growth, then a carbon-undoped second silicon layer is formed on the carbon-doped first silicon layer, and then the semiconductor memory element is formed on the surface layer of the carbon-undoped second silicon layer. A method for manufacturing a semiconductor memory device for HBMs, characterized in that, in the thin-film treatment, a part or all of the silicon substrate is removed.

5. When forming the semiconductor memory element on the surface layer of the carbon-doped silicon layer, leave a thickness of 100 nm or more in the region of the carbon-doped silicon layer other than the thickness of the semiconductor memory element formation region, or The method for manufacturing a semiconductor memory device for an HBM according to claim 4, characterized in that when the carbon-doped first silicon layer is formed, the thickness of the formed film is 100 nm or more.

6. When forming the carbon-doped silicon layer, or when forming the carbon-non-doped second silicon layer, A method for manufacturing a semiconductor memory device for HBM according to claim 4 or 5, characterized in that the film thickness is adjusted according to the thickness of the semiconductor memory device for HBM to be manufactured.

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