Printed circuit board
By integrating a glass core layer with a frame in printed circuit boards, the warpage issue is mitigated, enabling precise and reliable formation of fine vias and insulation thicknesses, thus enhancing manufacturing capabilities and distribution characteristics.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- SAMSUNG ELECTRO MECHANICS CO LTD
- Filing Date
- 2025-04-18
- Publication Date
- 2026-05-19
AI Technical Summary
The increasing demand for miniaturization and high-density printed circuit boards, particularly in high-end products like server boards, leads to warpage issues due to the increase in wiring layers and board size, which traditional materials struggle to address effectively.
Incorporating a glass core layer within a through-hole frame with a thicker total thickness than the core layer, ensuring the center lines of the frame and core layer are at different levels, and maintaining a constant thickness of the insulating layer to form fine vias and insulation thicknesses.
This configuration enhances process capability and distribution characteristics, allowing for improved manufacturing precision and reliability of fine circuits and vias, while reducing warpage and enabling wider wiring design options.
Smart Images
Figure 2026082611000001_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a printed circuit board.
Background Art
[0002] In order to cope with the high-performance and miniaturization strategies of semiconductors, the required levels of miniaturization and high density of printed circuit boards are increasing. For example, in order to manufacture high-end products such as server boards, high-multi-layer and large-sized boards are required. However, as the number of wiring layers increases and the size of the main body increases, the board may be more vulnerable to warpage. In order to solve such problems, it is considered to use a glass core.
Summary of the Invention
Problems to be Solved by the Invention
[0003] One of several objects of the present invention is to improve process capabilities and distribution characteristics in a printed circuit board including a glass layer in which fine vias and fine insulation thicknesses are formed.
Means for Solving the Problems
[0004] One of several solutions of the present invention is to dispose a core layer including a glass layer in a through-hole formed in a frame, make the total thickness of the frame thicker than the total thickness of the core layer, and make the thickness tolerance of the insulating layer laminated on the frame and the core layer constant.
[0005] At this time, the center line in the thickness direction of the frame and the center line in the thickness direction of the core layer can be arranged at different levels. Further, when the outer surface of the frame is viewed in a perspective direction perpendicular to the thickness direction, at least a part of the connection vias formed on the upper side of the frame and the insulating layer may overlap each other, and the connection vias formed on the lower side of the frame and the insulating layer may not entirely overlap each other.
[0006] For example, a printed circuit board according to one example includes a frame having a through-hole, a core layer which is at least partially disposed within the through-hole and includes a glass layer and metal vias that penetrate at least a portion of the glass layer, and a first insulating layer which covers at least a portion of the frame and the core layer and fills at least a portion of the through-hole, wherein the total thickness of the frame may be greater than the total thickness of the core layer.
[0007] For example, a printed circuit board according to one example includes a frame having a through-hole, a core layer which is at least partially disposed within the through-hole and includes a glass layer and metal vias that penetrate at least a portion of the glass layer, a first insulating layer which covers at least a portion of the frame and the core layer and fills at least a portion of the through-hole, a first connecting via which penetrates at least a portion of the upper side of the first insulating layer and is connected to the upper side of the metal via, and a second connecting via which penetrates at least a portion of the lower side of the first insulating layer and is connected to the lower side of the metal via, wherein when the outer surface of the frame is viewed through in a direction perpendicular to the thickness direction, at least a portion of the frame and the first connecting via may overlap each other. [Effects of the Invention]
[0008] One of the various effects of the present invention is that process capability and distribution characteristics can be improved in a printed circuit board that includes a glass layer and has fine vias and fine insulation thickness formed on it. [Brief explanation of the drawing]
[0009] [Figure 1] This is a block diagram illustrating an example of an electronic equipment system. [Figure 2] This is a schematic cross-sectional view showing an example of a printed circuit board. [Figure 3] This is a schematic cross-sectional view showing another example of a printed circuit board. [Figure 4] This is a schematic cross-sectional view showing yet another example of a printed circuit board. [Figure 5]This is a schematic cross-sectional view showing yet another example of a printed circuit board. [Modes for carrying out the invention]
[0010] The present invention will be described below with reference to the attached drawings. The shapes and sizes of the elements in the drawings may be exaggerated or reduced for clearer explanation.
[0011] Figure 1 is a block diagram illustrating an example of an electronic equipment system.
[0012] Referring to the drawing, the electronic device 1000 houses the main board 1010. The main board 1010 is physically and / or electrically connected to chip-related components 1020, network-related components 1030, and other components 1040, etc. These are also coupled with other electronic components, which will be described later, to form various signal lines 1090.
[0013] The chip-related components 1020 include, but are not limited to, memory chips such as volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), and flash memory; application processor chips such as central processors (e.g., CPUs), graphics processors (e.g., GPUs), digital signal processors, cryptographic processors, microprocessors, and microcontrollers; and logic chips such as analog-to-digital converters and ASICs (application-specific ICs). It goes without saying that other different forms of chip-related electronic components may also be included. Furthermore, these chip-related components 1020 may be combined with each other. The chip-related components 1020 may also be in the form of a package that includes the chips and electronic components mentioned above.
[0014] Network-related component 1030 includes, but is not limited to, any other wireless and wired protocols designated as Wi-Fi (IEEE 802.11 family, etc.), WiMAX (IEEE 802.16 family, etc.), IEEE 802.20, LTE (long term evolution), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM, GPS, GPRS, CDMA, TDMA, DECT, Bluetooth, 3G, 4G, 5G, and later. It also includes any other diverse wireless or wired standards and protocols. Furthermore, it goes without saying that network-related component 1030 may be combined with chip-related component 1020.
[0015] Other components 1040 include high-frequency inductors, ferrite inductors, power inductors, ferrite beads, LTCCs (low-temperature co-firing ceramics), EMI (electromagnetic interference) filters, MLCCs (multi-layer ceramic condensers), etc. However, they are not limited to these, and may also include other passive elements in chip component form used for various other applications. It goes without saying that other components 1040 may be combined with chip-related components 1020 and / or network-related components 1030.
[0016] Depending on the type of electronic device 1000, the electronic device 1000 may include other electronic components that are physically and / or electrically connected to the main board 1010 or not. Examples of other electronic components include, but are not limited to, audio codecs, video codecs, power amplifiers, compasses, accelerometers, gyroscopes, speakers, mass storage devices (e.g., hard disk drives), CDs (compact disks), DVDs (digital versatile disks), etc. Needless to say, other electronic components used for various purposes may also be included depending on the type of electronic device 1000.
[0017] The electronic device 1000 may be a smartphone, personal digital assistant, digital video camera, digital still camera, network system, computer, monitor, tablet, laptop, netbook, television, video game, smartwatch, automobile, server, etc. However, it is not limited to these, and it goes without saying that it may be any other electronic device that processes data.
[0018] Figure 2 is a schematic cross-sectional view showing an example of a printed circuit board.
[0019] Referring to the drawing, an example of a printed circuit board 100A includes a frame 105 having a through-hole H, a core layer 180 including a metal via 131 which is at least partially located within the through-hole H and penetrates a glass layer 111 and at least a portion of the glass layer 111, a first metal pad 132 which is located on the upper surface of the glass layer 111 and connected to the metal via 131, and a second metal pad 133 which is located on the lower surface of the glass layer 111 and connected to the metal via 131, frame 105, and core layer 180 The material may include a first insulating layer 112 covering at least a portion of each of the through-holes H and filling at least a portion of the through-holes H, a first wiring layer 121 positioned on the upper surface of the first insulating layer 112, a second wiring layer 122 positioned on the lower surface of the first insulating layer 112, a first connecting via 141 penetrating at least a portion of the upper side of the first insulating layer 112 and connected to a first metal pad 132, and a second connecting via 142 penetrating at least a portion of the lower side of the first insulating layer 112 and connected to a second metal pad 133.
[0020] As described above, the printed circuit board 100A according to one example includes a frame 105 having a through-hole H, and a core layer 180 including a glass layer 111 can be placed in the through-hole H. Therefore, warping during the manufacturing process can be controlled more easily. Furthermore, the frame 105 can be supplied at the panel level, in which case the frame 105 can be used as a jig to manufacture a large number of substrate units in a single process, and multiple unit substrates can be obtained by the singulation process. In addition, by surrounding the frame 105 and core layer 180 via the first insulating layer 112 and filling the through-hole H, a stress relaxation effect can be achieved. Furthermore, a wider variety of wiring designs are possible via the first wiring layer and the second wiring layers 121, 122, and electrical connection paths can be provided via the first connection via and the second connection vias 141, 142. Furthermore, by forming the first wiring layer 121 and the first connection via 141 with fine wiring and fine vias, they can be easily used for rewiring semiconductor chips mounted on the substrate. For example, the thickness of the first connecting via 141 may be greater than 0 μm and less than or equal to 20 μm, and the diameter of the upper end of the first connecting via 141 may be greater than 0 μm and less than or equal to 20 μm.
[0021] On the one hand, since the frame 105 is manufactured separately from the core layer 180, they can have different thickness distributions. The thickness distribution can be a distribution with respect to the total thickness considering plating layers or metal layers formed on the frame 105 and the core layer 180. Therefore, the thickness distributions of the frame 105 and the core layer 180 may vary significantly, and in this case, there may be limitations in providing a fine insulation thickness for forming fine circuits and fine vias. Thus, in the printed circuit board 100A according to an example, the total thickness t1 of the frame 105 may be greater than the total thickness t2 of the core layer 180, and at the same time, the center line C1 in the thickness direction of the frame 105 and the center line C2 in the thickness direction of the core layer 180 may be arranged at different levels from each other. Thereby, the thickness of the upper portion of the first insulating layer 112 where the first connection via 141 is formed can be kept constant at a fine thickness. Therefore, when fine vias and a fine insulation thickness are formed, the process capability and distribution characteristics can be improved. On the other hand, the total thickness t1 of the frame 105 may be the total thickness t1 including not only the main body of the frame 105 but also plating layers or metal layers that can be formed on the frame 105. Also, the total thickness t2 of the core layer 180 may be the total thickness t2 considering not only the thickness of the glass layer 111 but also the thicknesses of the first metal pad and the second metal pads 132 and 133. For example, the total thickness of the core layer 180 may be the sum of the thickness of the glass layer 111 and the thicknesses of the first metal pad and the second metal pads 132 and 133.
[0022] From this perspective, the upper surface of frame 105 can be substantially coplane with the upper surface of the first insulating layer 112. Therefore, when viewing the outer surface of frame 105 in a direction perpendicular to the thickness direction, at least a portion of frame 105 and the first connecting via 141 can overlap each other. Also, the lower surface of frame 105 can be positioned above the lower surface of core layer 180. Therefore, when viewing the outer surface of frame 105 in a direction perpendicular to the thickness direction, frame 105 and the second connecting via 142 may not overlap each other overall. In this case, the thickness of the upper portion of the first insulating layer 112 on which the first connecting via 141 is formed can be more easily maintained at a constant, fine thickness. Therefore, process capability and distribution characteristics can be further improved when fine vias and fine insulating thicknesses are formed. On the other hand, the upper or lower surface of frame 105 can refer not only to the main body of frame 105, but also to the uppermost or lowermost surface considering the plating layer and metal layer that may be formed on frame 105. Furthermore, the upper or lower surface of the core layer 180 can refer to the uppermost or lowermost surface, taking into account not only the glass layer 111 but also the first metal pad and the second metal pads 132 and 133. For example, the upper and lower surfaces of the core layer 180 may be the upper and lower surfaces of the first metal pad and the second metal pads 132 and 133, respectively.
[0023] On the other hand, a printed circuit board 100A according to one example may further include, as necessary, a second insulating layer 113 disposed on the upper surface of the first insulating layer 112, one or more third wiring layers 123 disposed on or within the second insulating layer 113, one or more third via layers 143 disposed within the second insulating layer 113 and connected to one or more third wiring layers 123, a third insulating layer 114 disposed on the lower surface of the first insulating layer 112, one or more fourth wiring layers 124 disposed on or within the third insulating layer 114, one or more fourth via layers 144 disposed within the third insulating layer 114 and connected to one or more fourth wiring layers 124, a first resist layer 151 disposed on the upper surface of the second insulating layer 113, and a second resist layer 152 disposed on the lower surface of the third insulating layer 114.
[0024] Thus, the printed circuit board 100A according to an example can have a multilayer substrate structure in which build-up layers are further formed on the upper and lower sides of the core layer 180. For example, the printed circuit board 100A according to an example may be a package substrate on which a semiconductor chip is mounted. The package substrate may be a large-area substrate used for a server or the like. At this time, the semiconductor chip may be mounted on the upper side, and the first wiring layer 121, one or more third wiring layers 123, and the first via layer including the first connection via 141 and one or more third via layers 143 may be formed of fine wirings and fine circuits.
[0025] On the other hand, the printed circuit board 100A according to an example may, if necessary, have a greater number of build-up layers formed on the upper side than the build-up layers formed on the lower side, or build-up layers may be formed only on the upper side. For example, the printed circuit board 100A according to an example may have an asymmetric structure. For example, the printed circuit board 100A according to an example may be an interposer substrate. Also in this case, the semiconductor chip may be mounted on the upper side, and the first wiring layer 121, one or more third wiring layers 123, and the first via layer including the first connection via 141 and one or more third via layers 143 may be formed of fine wirings and fine circuits.
[0026] In addition, the upper surface, upper side, lower surface, lower side, etc. used while explaining the structure of the printed circuit board 100A according to an example were determined based on the referenced drawings, but this is for convenience of explanation and defines the direction. Needless to say, depending on the product to which the printed circuit board 100A according to an example is applied, the concepts of up and down may be reversed.
[0027] Hereinafter, components of the printed circuit board 100A according to an example will be described in more detail with reference to the drawings.
[0028] The frame 105 may include, but is not limited to, materials with high rigidity, such as Copper Clad Laminate (CCL) or Unclad CCL. For example, the frame 105 may include other organic materials with high rigidity, or other types of inorganic materials with high rigidity. Since the frame 105 can be used as a jig in the process, the process can be carried out at the panel level via the frame 105. Furthermore, leaving the frame 105 on the final unit after singulation may be advantageous in warp control.
[0029] The glass layer 111 may include glass, which is an amorphous solid. The glass may include, for example, pure silicon dioxide (about 100% SiO2), soda-lime glass, borosilicate glass, aluminosilicate glass, etc. However, it is not limited to these, and alternative glass materials such as fluorine glass, phosphoric acid glass, and chalcogen glass can also be used. Furthermore, other additives may be included to form glass with specific physical properties. Such additives may include not only calcium carbonate (e.g., lime) and sodium carbonate (e.g., soda), but also magnesium, calcium, manganese, aluminum, lead, boron, iron, chromium, potassium, sulfur, and antimony, as well as carbonates and / or oxides of other elements. On the other hand, the glass layer 111 can be distinguished from organic insulating materials containing glass fibers (glass fiber, glass cloth, glass fabric), such as CCL (copper clad laminate) and PPG (prepreg). The glass layer 111 may be in the form of, for example, a glass plate.
[0030] The first to third insulating layers 112, 113, and 114 may each contain an organic insulating material. The organic insulating material may be a thermosetting resin such as epoxy resin, a thermoplastic resin such as polyimide, or may contain inorganic fillers, organic fillers, and / or glass fibers (glass fiber, glass cloth, glass fabric) together with the resin. Examples of organic insulating materials include, but are not limited to, PPG (Prepreg), ABF (Ajinomoto Build-up Film), PID (Photo Imageable Dielectric), and BS (Bonding Sheet). The first to third insulating layers 112, 113, and 114 may each consist of multiple layers. In this case, each of the multiple layers may be integrated without boundaries, or boundaries may be defined between the layers. Furthermore, each of the multiple layers may contain substantially the same insulating material, or may contain different insulating materials.
[0031] The first to fourth wiring layers 121, 122, 123, and 124 can each contain metals. These metals may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, the first to fourth wiring layers 121, 122, 123, and 124 can each contain chemical copper formed by electroless plating as a seed layer, and based on this, electroplated copper formed by electroplating can be included as a pattern plating layer. The first to fourth wiring layers 121, 122, 123, and 124 can each perform various functions depending on the design. For example, they may include signal patterns, power patterns, ground patterns, etc. These patterns can each have various forms such as lines, traces, planes, and pads. A pad can be a concept that includes a land. The third and fourth wiring layers 123 and 124 may each consist of multiple layers. The third and fourth wiring layers 123 and 124 may have the same number of layers, but are not limited to this, and may have different numbers of layers. For example, the number of layers in the third wiring layer 123 may be greater than the number of layers in the fourth wiring layer 124.
[0032] The metal via 131 may contain metals such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, the metal via 131 may include a laminated structure of titanium and copper layers formed by sputtering and / or electroless plating as a seed layer. For example, it may include sputtered titanium and sputtered copper, sputtered titanium and chemical copper, or sputtered titanium, sputtered copper, and chemical copper. Based on this, it may also include a copper layer formed by electroplating as a plating layer. For example, it may include electroplated copper. Depending on the design, the metal via 131 may contain various types of metal vias. For example, it may include metal vias for signal transmission, metal vias for power transmission, metal vias for ground transmission, etc. The metal via 131 may have a cylindrical shape with substantially vertical sides, but is not limited to this, and may have a tapered shape, for example, an hourglass shape. The metal via 131 may have a fill-plated structure as well as a conformal-plated structure, in which case it may contain a filler material inside. There may be multiple metal vias 131, and they may be arranged spaced apart from one another.
[0033] The first metal pad and the second metal pads 132 and 133 can each contain metals. These metals can include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, the first metal pad and the second metal pads 132 and 133 can each contain a laminated structure of titanium and copper layers formed by sputtering and / or electroless plating as seed layers. For example, this could include sputtered titanium and sputtered copper, sputtered titanium and chemical copper, or sputtered titanium, sputtered copper, and chemical copper. Based on this, a copper layer formed by electroplating can be included as a plating layer. For example, electroplated copper can be included. The first metal pad and the second metal pads 132 and 133 can each contain various types of metal vias depending on the design. For example, they can include metal pads for signal transmission, metal pads for power transmission, metal pads for ground transmission, and so on. The first metal pad and the second metal pads 132 and 133 may each have a circular or elliptical shape on a plane, but are not limited to these, and may have a polygonal shape as needed. If there are multiple metal vias 131, the first metal pad and the second metal pads 132 and 133 may also each have multiple vias corresponding to the number of vias.
[0034] The first and second connection vias 141 and 142 may be connection vias included in the first and second via layers, respectively. The first and second via layers and the third and fourth via layers 143 and 144 may each contain metals. These metals may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, the first and second via layers and the third and fourth via layers 143 and 144 may each contain chemical copper formed by electroless plating as a seed layer, and based on this, electroplated copper formed by electroplating may be included as a pattern plating layer. The first and second via layers and the third and fourth via layers 143 and 144 can each perform various functions depending on the design. For example, they may include connection vias for signal transmission, connection vias for power transmission, connection vias for ground transmission, etc. The first and second via layers and the third and fourth via layers 143 and 144 may each contain filled vias, in which the via holes are filled with metal, but may also contain conformal vias, in which metal is arranged along the walls of the via holes. The connecting vias contained in the first and second via layers and the third and fourth via layers 143 and 144 may each have a tapered shape. The first and second via layers and the third and fourth via layers 143 and 144 may each contain multiple connecting vias. The third and fourth via layers 143 and 144 may each consist of multiple layers. The third and fourth via layers 143 and 144 may have the same number of layers as each other, but are not limited to this, and may have different numbers of layers. For example, the number of layers in the third via layer 143 may be greater than the number of layers in the fourth via layer 144.
[0035] The first resist layer and the second resist layers 151 and 152 may each contain an organic insulating material. The organic insulating material may be a thermosetting resin such as epoxy resin, a thermoplastic resin such as polyimide, or may contain an inorganic filler and / or organic filler together with the resin. For example, the organic insulating material may be, but is not limited to, ABF (Ajinomoto Build-up Film), PID (Photo Imageable Dielectric), SR (Solder Resist), etc. The first resist layer and the second resist layers 151 and 152 may each consist of multiple layers. The first resist layer 151 may have an opening that exposes at least a portion of the third wiring layer 123 located on the uppermost side. The second resist layer 152 may have an opening that exposes at least a portion of the fourth wiring layer 124 located on the lowermost side. There may be multiple openings. The portion exposed through the opening may be of the SMD (Solder Mask Defined) and / or NSMD (Non Solder Mask Defined) type.
[0036] Figure 3 is a schematic cross-sectional view showing another example of a printed circuit board.
[0037] Referring to the drawings, in the printed circuit board 100B according to another example, the arrangement of the frame 105 may differ in part from that of the printed circuit board 100A according to the above example. For example, the lower surface of the frame 105 may be substantially coplane with the lower surface of the core layer 180, and the upper surface of the frame 105 may be positioned above the upper surface of the core layer 180. In this case as well, the technical effects described above can be substantially the same. For example, in the printed circuit board 100B according to another example, the total thickness t1 of the frame 105 may be thicker than the total thickness t2 of the core layer 180, and in addition, the center line C1 in the thickness direction of the frame 105 and the center line C2 in the thickness direction of the core layer 180 may be positioned at different levels. Furthermore, when viewing the outer surface of the frame 105 through a direction perpendicular to the thickness direction, at least a portion of the frame 105 and the first connection via 141 may overlap each other, while the frame 105 and the second connection via 142 may not overlap each other at all. This makes it possible to maintain a constant, minute thickness in the upper portion of the first insulating layer 112 on which the first connecting via 141 is formed. Therefore, process capability and distribution characteristics can be improved when minute vias and minute insulating thickness are formed.
[0038] Other explanations may be substantially the same as those described for printed circuit board 100A in the example described above.
[0039] Figure 4 is a schematic cross-sectional view showing yet another example of a printed circuit board, and Figure 5 is a schematic cross-sectional view showing yet another example of a printed circuit board.
[0040] Referring to the drawings, in the printed circuit boards 100C and 100D according to yet another example, the first metal pads and second metal pads 132 and 133 in the core layer 180 can be omitted, respectively, in the printed circuit board 100A according to the first example and the printed circuit board 100B according to the other example described above. For example, the first connecting via and the second connecting vias 141 and 142 may be directly connected to the metal via 131, respectively. In this case, the difficulty of the process can be reduced and reliability can be improved by omitting the direct formation of wiring in the glass layer 111. On the other hand, this case can also substantially include the technical effects described above. For example, in the printed circuit boards 100C and 100D according to yet another example, the total thickness t1 of the frame 105 may be thicker than the total thickness t2 of the core layer 180, and together with this, the center line C1 in the thickness direction of the frame 105 and the center line C2 in the thickness direction of the core layer 180 may be positioned at different levels from each other. Furthermore, when viewing the outer surface of frame 105 through a line perpendicular to the thickness direction, frame 105 and the first connecting via 141 may overlap at least a portion of each, while frame 105 and the second connecting via 142 do not necessarily overlap completely. This allows the thickness of the upper portion of the first insulating layer 112 on which the first connecting via 141 is formed to be kept constant at a minute thickness. Therefore, process capability and distribution characteristics can be improved when minute vias and minute insulating thickness are formed.
[0041] Other explanations may be substantially the same as those described for printed circuit board 100A relating to one example and printed circuit board 100B relating to another example described above.
[0042] In this invention, the expression "cover" can include not only cases of covering the entire surface but also cases of covering at least a part of it, and not only cases of direct covering but also cases of indirect covering. Furthermore, the expression "fill" can include not only cases of complete filling but also cases of at least a part of it, and cases of near-complete filling. For example, it can include cases where there are some gaps or voids. Also, the expression "enclose" can include not only cases of complete enclosure but also cases of partial enclosure and cases of general enclosure. Furthermore, "expose" can include not only cases of complete exposure but also cases of partial exposure, and "exposure" can mean that the structure is exposed from what is embedded in it. For example, an opening exposing a pad means exposing the pad from the resist layer, and a surface treatment layer or the like can be placed on the exposed pad.
[0043] In this invention, "placed within the penetration" can include not only cases where the object is completely placed within the penetration, but also cases where it partially protrudes upward or downward on the cross-section. For example, if the object is placed within the penetration on a plane, it can be interpreted in a broader sense.
[0044] In this invention, the determination can be made by including process errors, positional deviations, and measurement errors that substantially occur during the manufacturing process. For example, "substantially coplanar" can include not only cases where they are perfectly coplanar, but also cases where they are approximately coplanar. Similarly, "placed at substantially the same level" can include not only cases where they are placed at exactly the same level, but also cases where they are placed at approximately the same level. Furthermore, "having a substantially specific shape" can include not only cases where they have exactly that shape, but also cases where they have approximately that shape.
[0045] In this invention, "substantially identical insulating material" can mean not only completely identical insulating materials, but also insulating materials of the same type. Therefore, although the composition of the insulating material is substantially the same, the specific composition ratios may differ slightly.
[0046] In this invention, "on a cross-section" can mean the cross-sectional shape when the object is cut vertically, or the cross-sectional shape when the object is viewed from the side. "On a plane" can mean the planar shape when the object is cut horizontally, or the planar shape when the object is viewed from the top or bottom.
[0047] In this invention, terms such as "lower side," "lower part," and "bottom surface" are used for convenience to mean the downward direction relative to the cross-section in the drawing, while terms such as "upper side," "upper part," and "top surface" are used to mean the opposite direction. However, this is merely a definition of direction for explanatory purposes, and it goes without saying that the scope of rights in the patent claims is not particularly limited by such descriptions of direction, and the concepts of up / down can be changed at any time.
[0048] In this invention, "connected" is a concept that includes not only direct connection but also indirect connection via an adhesive layer or the like. Furthermore, "electrically connected" is a concept that includes both cases where they are physically connected and cases where they are not connected. In addition, expressions such as "first," "second," etc., are used to distinguish one component from another and do not limit the order and / or importance of the components. In some cases, within the scope of the rights, the first component may be named the second component, and similarly, the second component may be named the first component.
[0049] In this invention, "thickness, width, length, depth, line width, spacing, pitch, separation distance, surface roughness," etc., can be measured using a scanning microscope or optical microscope based on a cross-section obtained by polishing or cutting the printed circuit board. The cut cross-section can be a vertical or horizontal cross-section, and each value can be measured based on the required cut cross-section. For example, the width of a via or the upper and / or lower end of a via can be measured on a cross-section cut along the central axis of the via or via. In this case, if the values are not constant, the values can be determined by the average value of the values measured at any five points.
[0050] The expression "example" as used in this invention does not mean that each embodiment is the same as another, but is provided to highlight and illustrate the unique and distinct features of each. However, the examples presented above do not preclude their realization in combination with features of other examples. For example, even if a matter described in a particular example is not described in another example, it can be understood as a description related to that other example, provided that there is no contradictory or contrary description of that matter in the other example.
[0051] The terms used in this invention are used merely to illustrate an example and are not intended to limit the invention. In this context, singular expressions include plural expressions unless the context clearly indicates a different meaning. [Explanation of symbols]
[0052] 1000:Electronic equipment 1010: Mainboard 1020: Chip-related components 1030: Network-related components 1040: Other parts 1050: Camera 1060: Antenna 1070: Display 1080: Battery 1090: Signal line 100A, 100B, 100C, 100D: Printed circuit board 105: Frame 111: Glass layer 112, 113, 114: Insulating layer 121, 122, 123, 124: Wiring layer 131: Metal Via 132, 133: Metal pads 141, 142, 143, 144: Via layer (connecting vias) 151, 152: Resist layer
Claims
1. A frame having a through-hole, A core layer comprising a glass layer and a metal via penetrating at least a portion of the glass layer, is disposed within the aforementioned penetration portion. It includes a first insulating layer that covers at least a portion of the frame and the core layer and fills at least a portion of the through-hole, A printed circuit board in which the total thickness of the frame is greater than the total thickness of the core layer.
2. The printed circuit board according to claim 1, wherein the center line in the thickness direction of the frame and the center line in the thickness direction of the core layer are arranged at different levels from each other.
3. The upper surface of the frame is substantially coplane with the upper surface of the first insulating layer. The printed circuit board according to claim 1, wherein the lower surface of the frame is positioned above the lower surface of the core layer.
4. The lower surface of the frame is substantially coplane with the lower surface of the core layer. The printed circuit board according to claim 1, wherein the upper surface of the frame is positioned above the upper surface of the core layer.
5. A first wiring layer disposed on the upper surface of the first insulating layer, A second wiring layer is disposed on the lower surface of the first insulating layer, A first connecting via that penetrates at least a portion of the upper side of the first insulating layer and connects at least a portion of the first wiring layer to the metal via, The printed circuit board according to claim 1, further comprising: a second connecting via that penetrates at least a portion of the lower side of the first insulating layer and connects at least a portion of the second wiring layer to the metal via.
6. The thickness of the first connecting via is greater than 0 μm and less than or equal to 20 μm. The printed circuit board according to claim 5, wherein the diameter of the upper end of the first connecting via is greater than 0 μm and less than or equal to 20 μm.
7. The core layer further includes a first metal pad disposed on the upper surface of the glass layer and connected to the metal via, and a second metal pad disposed on the lower surface of the glass layer and connected to the metal via. The printed circuit board according to claim 5, wherein the first connection via and the second connection via are connected to the first metal pad and the second metal pad, respectively.
8. The printed circuit board according to claim 5, wherein the first connecting via and the second connecting via are each directly connected to the metal via.
9. A second insulating layer disposed on the upper surface of the first insulating layer, One or more third wiring layers are disposed on or within the second insulating layer, One or more third via layers are arranged within the aforementioned second insulating layer and connected to the one or more third wiring layers, A third insulating layer disposed on the lower surface of the second insulating layer, One or more fourth wiring layers are disposed on or within the third insulating layer, The printed circuit board according to claim 5, further comprising one or more fourth via layers, each disposed within the third insulating layer and connected to one or more fourth wiring layers.
10. A frame having a through-hole, A core layer comprising a glass layer and a metal via penetrating at least a portion of the glass layer, is disposed within the aforementioned penetration portion. A first insulating layer that covers at least a portion of the frame and the core layer and fills at least a portion of the through-hole, A first connecting via that penetrates at least a portion of the upper side of the first insulating layer and is connected to the upper side of the metal via, The first insulating layer includes a second connecting via that penetrates at least a portion of the lower side and is connected to the lower side of the metal via, When the outer surface of the frame is viewed through in a direction perpendicular to the thickness direction, the frame and the first connecting vias overlap each other in at least a portion, forming a printed circuit board.
11. The printed circuit board according to claim 10, wherein when the outer surface of the frame is viewed through in a direction perpendicular to the thickness direction, the frame and the second connecting via do not overlap each other overall.
12. The total thickness of the frame is greater than the total thickness of the core layer. The printed circuit board according to claim 10, wherein the center line in the thickness direction of the frame and the center line in the thickness direction of the core layer are arranged at different levels from each other.
13. The core layer further includes a first metal pad disposed on the upper surface of the glass layer and connected to the metal via, and a second metal pad disposed on the lower surface of the glass layer and connected to the metal via. The printed circuit board according to claim 10, wherein the first connecting via and the second connecting via are connected to the first metal pad and the second metal pad, respectively.
14. The printed circuit board according to claim 10, wherein the first connecting via and the second connecting via are each directly connected to the metal via.
15. A first wiring layer is disposed on the upper surface of the first insulating layer and at least a portion of which is connected to the first connecting via, A second wiring layer is disposed on the lower surface of the first insulating layer and at least a portion of which is connected to the second connecting via, A second insulating layer disposed on the upper surface of the first insulating layer, One or more third wiring layers are disposed on or within the second insulating layer, One or more third via layers are arranged within the aforementioned second insulating layer and connected to the one or more third wiring layers, A third insulating layer disposed on the lower surface of the second insulating layer, One or more fourth wiring layers are disposed on or within the third insulating layer, The printed circuit board according to claim 10, further comprising one or more fourth via layers, each disposed within the third insulating layer and connected to one or more fourth wiring layers.