Method for manufacturing group III nitride semiconductors

Abstract

The present invention provides a method for manufacturing a group III nitride semiconductor that can improve crystallinity. [Solution] A method for manufacturing a group III nitride semiconductor, comprising: an alkali metal coating step of covering the surface 11a of a solid alkali metal 11 with a group III metal 12; a mixed melt generation step of melting the alkali metal 11 coated with the group III metal 12 together with carbon 13 to produce a mixed melt; and a crystal growth step of immersing a seed substrate in the mixed melt under a nitrogen-containing atmosphere to grow a group III nitride semiconductor on the seed substrate.

Description

Technical Field

[0001] The present invention relates to a method for manufacturing a group III nitride semiconductor.

Background Art

[0002] Conventionally, a flux method is known in which a GaN single crystal is grown on a GaN substrate by immersing the GaN substrate in a mixed melt of Ga and Na stored in a crucible. However, when Na comes into contact with the outside air, it reacts with oxygen, moisture, etc. to generate impurities on the surface layer, leading to poor growth of the GaN single crystal and a decrease in crystallinity. In order to suppress such a decrease in crystallinity, Patent Document 1 discloses that in the process of preparing a mixed melt of Ga and Na, after solidifying the Na melt in the crucible, the inside of the crucible is heated to a temperature above the melting point of Ga and below the melting point of Na, and Ga is supplied in a state where the surface of the solidified Na is covered with the melted Ga, thereby suppressing the exposure of Na to the outside air.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In the flux method, usually, carbon is added to the mixed melt in order to promote crystal growth and suppress the formation of twins. However, in the configuration disclosed in Patent Document 1, when carbon is added to the Na melt, the wettability of the Ga melt with respect to the solidified Na decreases, making it difficult to cover the surface of the Na with the Ga melt. Therefore, there is room for improvement in improving crystallinity by suppressing the exposure of Na to the outside air while promoting crystal growth and suppressing the formation of twins by carbon.

[0005] This invention has been made in view of the above problems, and aims to provide a method for manufacturing a group III nitride semiconductor that can improve crystallinity. [Means for solving the problem]

[0006] One aspect of the present invention is, A method for producing a group III nitride semiconductor, The alkali metal coating process involves covering the surface of a solid alkali metal with a group III metal, A mixed melt generation step is performed by melting the alkali metal coated with the aforementioned group III metal together with carbon to produce a mixed melt, A crystal growth step in which a seed substrate is immersed in the mixed molten liquid in a nitrogen-containing atmosphere to grow a group III nitride semiconductor on the seed substrate, The present invention relates to a method for producing a group III nitride semiconductor, which includes the present invention. [Effects of the Invention]

[0007] In the method for manufacturing a group III nitride semiconductor according to one embodiment described above, the surface of a solid alkali metal is covered with a group III metal and then melted together with carbon to produce a mixed melt. This maintains the wettability of the group III metal melt to the surface of the solid alkali metal, and the surface of the alkali metal is covered with the group III metal, preventing it from being exposed to the outside air. As a result, the surface of the alkali metal is prevented from reacting with oxygen, moisture, etc. in the outside air, and the crystallinity of the formed group III nitride semiconductor can be improved.

[0008] As described above, according to the above embodiment, it is possible to provide a method for manufacturing a group III nitride semiconductor that can improve crystallinity. [Brief explanation of the drawing]

[0009] [Figure 1] A flow chart showing the method for manufacturing a group III nitride semiconductor in Embodiment 1. [Figure 2] A first conceptual diagram illustrating the process of coating with alkali metal in Embodiment 1. [Figure 3] A second conceptual diagram illustrating the process of coating with alkali metal in Embodiment 1. [Figure 4] A conceptual diagram illustrating the carbon addition process in Embodiment 1. [Figure 5] A conceptual diagram showing the state in which the seed substrate is not immersed in the mixed molten material in Embodiment 1. [Figure 6] A conceptual diagram showing the state in which a seed substrate has been added to the mixed molten material in Embodiment 1. [Figure 7] Conceptual diagram of the jig and crucible in Embodiment 1, viewed from above. [Figure 8] The first embodiment shows (a) a conceptual diagram of a seed substrate on which multiple seed crystals are formed, (b) a conceptual diagram of a seed substrate on which multiple initial nuclei are formed, (c) a conceptual diagram showing a state in which a GaN single crystal is formed between multiple initial nuclei, and (d) a conceptual diagram showing a state in which a GaN single crystal is grown on a planarized crystal plane. [Figure 9] A plan view showing the configuration of the seed substrate in Embodiment 1. [Figure 10] A cross-sectional view showing the structure of a seed crystal in Embodiment 1, wherein the cross-sectional view is perpendicular to the main surface of the substrate. [Figure 11] A plan view showing the configuration of the seed crystal in Embodiment 1. [Figure 12] A conceptual diagram illustrating the process of coating a deformed form with alkali metal. [Modes for carrying out the invention]

[0010] The carbon is preferably in powder form. In this case, the surface area of ​​the carbon increases, making it easier to disperse in the alkali metal molten state, thus further enhancing the crystal growth promotion effect and the suppression of unwanted crystal formation effect.

[0011] In the alkali metal coating step, by setting the temperature of the crucible in which the molten alkali metal is stored to a temperature not lower than the melting point of the group III nitride and lower than the melting point of the alkali metal, after solidifying the alkali metal in the crucible, it is preferable to add the group III metal to the crucible and coat the surface of the solid alkali metal with the molten group III metal. In this case, by solidifying the molten alkali metal in the crucible, the upper surface of the solid alkali metal can be made a flat surface, and the bottom surface and the side surface can be covered with the inner bottom surface and the inner side surface of the crucible. Therefore, by covering only the upper surface of the solid alkali metal with the group III metal, the entire surface of the solid alkali metal can be blocked from the outside air, preventing the surface of the alkali metal from reacting with oxygen, moisture, etc. in the outside air, and further suppressing the deterioration of the crystallinity of the formed group III nitride semiconductor.

[0012] In the alkali metal coating step, after adding the group III metal to the crucible and coating the surface of the solid alkali metal with the molten group III metal, by setting the temperature of the crucible to a temperature lower than the melting point of the group III metal, it is preferable to solidify the group III metal while covering the surface of the alkali metal. In this case, since the group III metal is solidified in a state where the surface of the solid alkali metal is covered with the molten group III metal in the crucible, the surface of the solid alkali metal can be reliably covered and the covered state can be maintained.

[0013] After the alkali metal coating step, it preferably includes a carbon addition step of adding carbon to the crucible, and the mixed melt generation step is performed after the carbon addition step. In this case, since carbon is added after the group III metal coating the surface of the solid alkali metal is solidified, it does not affect the wettability of the group III metal with respect to the solid alkali metal, so the surface of the solid alkali metal can be reliably covered with the group III metal and the covered state can be maintained. [[ID=?]]

[0014] [[ID=?]] In the carbon addition step, it is preferable to add the carbon at a position other than the position where the seed substrate is to be immersed in the crucible. In this case, when the seed substrate is immersed in the mixed melt, the carbon can be easily dispersed in the mixed melt, and the promoting effect of crystal growth and the suppressing effect of generation of twins can be further enhanced.

[0015] (Embodiment 1) 1. Outline of the Flux Method The method for manufacturing a group III nitride semiconductor according to Embodiment 1 is a method for manufacturing a group III nitride semiconductor by growing a group III nitride single crystal by the flux method. The flux method is a method in which a gas containing nitrogen is supplied and dissolved into a mixed melt containing an alkali metal serving as a flux and a group III metal serving as a raw material, and a group III nitride semiconductor is epitaxially grown in the liquid phase.

[0016] The method for manufacturing a group III nitride semiconductor according to Embodiment 1 includes an alkali metal coating step S1, a carbon addition step S2, a mixed melt generation step S3, and a crystal growth step S4, as shown in FIG. 1. Hereinafter, each step will be described in detail.

[0017] 2. Alkali Metal Coating Step S1 In the alkali metal coating step S1, the surface of the solid alkali metal is coated with a group III metal. As the alkali metal, Na, Li, K, etc. can be used, and in this embodiment, Na is adopted as the alkali metal. Further, as the group III metal, gallium (Ga), boron (B), aluminum (Al), indium (In), etc. can be used, and in this embodiment, Ga is adopted as the group III metal.

[0018] In this embodiment, in the alkali metal coating process S1, first, an alkali metal molten material is prepared by heating and melting Na material, which is a solid alkali metal at room temperature. Then, a predetermined amount of Na material is weighed in a glove box where the atmosphere, such as oxygen and dew point, is controlled, and as shown in Figure 2, the predetermined amount of Na material 11 is placed into an empty crucible 10. After that, the temperature of the crucible 10 is controlled to below the melting point of Na, and the Na material 11 is solidified inside the crucible. In this state, the upper surface 11a of the Na material 11 is located on the opening side of the crucible 10 and is exposed to the outside air. On the other hand, the side surface 11b and bottom surface 11c of the Na material 11 are in close contact with the inner surface of the crucible 10 and are not exposed to the outside air. Note that no additive elements such as carbon are added at this stage.

[0019] Next, a predetermined amount of solid Ga, a group III metal, is added to the Na material 11 that has solidified in the crucible 10. The temperature of the crucible 10 is controlled to be above the melting point of Ga but below the melting point of Na, so that the Ga melts without melting the Na material 11. As a result, the melted Ga wets and spreads over the upper surface 11a of the Na material 11, and as shown in Figure 3, the upper surface 11a of the Na material 11, which was exposed inside the crucible 10, becomes covered with Ga 12. Here, since no additive elements such as carbon are added to the Na material 11, the wettability of the melted Ga 12 over the Na material 11 is maintained at a high level, and the melted Ga 12 actively wets and spreads over the entire upper surface 11a of the Na material 11. After that, the temperature of the crucible 10 is controlled to be below the melting point of Ga 12, so that the Ga 12 solidifies over the entire upper surface 11a of the Na material 11. Furthermore, additive elements may be added to the melt of the Na material 11, provided that the wettability of the melt of Ga 12 with respect to the Na material 11 is not reduced.

[0020] In this embodiment, solid Ga was added to the Na material 11 and then Ga12 was melted. Alternatively, a melt of Ga12 prepared by pre-melting Ga12 may be added to the Na material 11. In this case as well, the temperature of the crucible 10 can be controlled to be above the melting point of Ga12 and below the melting point of Na, so that the melt of Ga12 wets and spreads over the entire upper surface 11a of the Na material 11. Then, the temperature of the crucible 10 can be controlled to be below the melting point of Ga12 to solidify the Ga12 over the entire upper surface 11a of the Na material 11.

[0021] 3. Carbon addition process S2 In this embodiment, after the alkali metal coating step S1, a carbon addition step S2 is included in which carbon 13 is added to the crucible 10, as shown in Figure 4. By adding carbon 13, the effects of promoting crystal growth and suppressing the formation of unwanted crystals are obtained in the crystal growth step S4 described later. In the carbon addition step S2, carbon 13 is added on top of the Ga 12 that has solidified in the crucible 10. Alternatively, carbon 13 may be added on top of the Ga 12 after the melt of Ga 12 has wetted and spread over the entire upper surface 11a of the Na material 11, but before the Ga 12 solidifies. The amount of carbon 13 to be added is not limited and can be appropriately set within a range in which the effects of promoting crystal growth and suppressing the formation of unwanted crystals are obtained.

[0022] The carbon 13 added in the carbon addition step S2 is preferably in powder form. In this embodiment, "powder form" refers to a solid state in which the length of the longest part is 500 μm or less, although the shape is not limited. By making the carbon 13 in powder form, the surface area of ​​the carbon 13 can be increased, and the effect of promoting crystal growth and suppressing the formation of miscellaneous crystals can be further improved.

[0023] In the carbon addition step S2 of this embodiment, as shown in Figure 4, carbon 13 is added to a position 12b in the crucible 10 other than the position 12a where the seed substrate 9 is to be immersed in the crystal growth step S4 described later. In this embodiment, the position 12a where the seed substrate 9 is to be immersed is called the immersion position, and the position 12b where carbon 13 is added is called the carbon addition position. As shown in Figures 5 to 7, the immersion position 12a is a position that overlaps with the seed substrate 9 when the crucible 10 is viewed from the opening side in the crystal growth step S4, and the carbon addition position 12b is a position that does not overlap with the seed substrate 9 when the crucible 10 is viewed from the opening side.

[0024] In the carbon addition step S2, adding carbon to the immersion position 12a is undesirable because, in the crystal growth step S4 described later, the carbon 13 will get trapped between the back surface of the seed substrate 9 immersed in the mixed melt 14 and the mixed melt 14, thereby hindering the dispersion of carbon within the mixed melt 14. Therefore, in the carbon addition step S2, adding carbon 13 to the carbon addition position 12b prevents the dispersion of carbon 13 within the mixed melt 14 from being hindered in the crystal growth step S4. In addition, other elements may be added along with carbon in the carbon addition step S2 as needed.

[0025] 4.Mixed melt generation process S3 As shown in Figure 1, after the carbon addition step S2, the mixed melt generation step S3 is performed. In the mixed melt generation step S3, as shown in Figure 4, the alkali metal Na material 11 coated with Ga as a group III metal is melted together with carbon 13 to produce the mixed melt 14 shown in Figure 5. In the mixed melt generation step S3, the temperature of the crucible 10 is controlled to be above the melting point of Na and below the boiling point of Na.

[0026] 5. Crystal growth process S4 In the crystal growth process S4 shown in Figure 1, a seed substrate 9 is immersed in a mixed melt 14 under a nitrogen-containing atmosphere, as shown in Figure 6, to grow a group III nitride semiconductor on the seed substrate 9. In this embodiment, the crystal growth process S4 includes an initial nucleation process S41, a planarization process S42, and a thick-film process S43.

[0027] 5-1. Initial nucleation step S41 In the initial nucleation step S41, first, a seed substrate 9, as shown in Figure 8(a), is prepared. The seed substrate 9 is an MPS (multipoint seed) substrate, in which multiple dot-shaped seed crystals 2 are periodically arranged on a substrate 1. Figure 8(a) is a cross-sectional view of the seed substrate 9, which is a cross-section perpendicular to the main surface of the substrate. Figure 4 is a plan view of the seed substrate 9 seen from above.

[0028] Substrate 1 can be made of a group III nitride semiconductor, sapphire, aluminum oxynitride, SiC, Si, spinel, ZnO, gallium oxide, etc. In the case of a sapphire substrate, for example, it is a substrate with the c-plane or a-plane as the main surface.

[0029] Multiple seed crystals 2 are provided on the substrate 1 via a buffer layer (not shown). The seed crystals 2 are arranged in a regular triangular lattice pattern. The buffer layer and seed crystals 2 are group III nitride semiconductors of any composition, such as GaN, AlGaN, and AlN. The material of the buffer layer is selected appropriately depending on the material of the seed crystals 2. For example, if the seed crystal 2 is GaN, the buffer layer is preferably GaN. The material of the seed crystals is usually a group III nitride semiconductor with the same composition as the group III nitride semiconductor to be grown by the flux method. The seed crystals 2 may be grown by any method such as MOCVD, HVPE, or MBE, but MOCVD and HVPE are preferred in terms of crystallinity and growth time.

[0030] The arrangement of seed crystals 2 is a triangular lattice pattern, as shown in Figure 9. While any periodic arrangement is acceptable, not limited to a triangular lattice, highly symmetrical patterns such as square or triangular lattices are preferred. This allows for the uniform bonding of group III nitride semiconductors grown from various crystals 2, resulting in the growth of group III nitride semiconductors with fewer dislocations and warping. When using a triangular lattice pattern, it is preferable that the arrangement direction coincides with the a-axis and m-axis directions of seed crystals 2. Here, "coincidence" does not mean perfect agreement; an angular deviation of about 10 degrees is acceptable as an error. Preferably, the angular deviation is 1 degree or less.

[0031] The distance L1 between the centers of adjacent seed crystals 2 is preferably 100 to 2000 μm. Within this range, a group III nitride semiconductor with fewer dislocations and warping can be grown. More preferably, it is 200 to 1500 μm, and even more preferably 300 to 1000 μm.

[0032] Next, the shape of the seed crystal 2 will be described in detail. Figure 10 is a cross-sectional view showing the structure of the seed crystal 2, and is a cross-sectional view perpendicular to the main surface of the substrate. Figure 11 is a plan view showing the structure of the seed crystal 2. As shown in Figures 10 and 11, the seed crystal 2 has a disc-shaped disc portion and a regular frustum-shaped hexagonal portion located in contact with the cylindrical portion, with a recess 2d in the center of the regular frustum-shaped hexagonal portion.

[0033] As described later, seed crystal 2 is formed by selective growth using a mask, and crystal growth is carried out laterally from the opening in the mask. The pattern of the mask opening is circular. Therefore, after the mask is removed, the mask opening remains as a disk. This remaining portion is the disk. The shape of the disk is the same as the shape of the mask opening when selectively growing seed crystal 2. Also, the diameter D1 of the regular frustum of a hexagon is larger than the diameter of the disk. Since the disk is circular in plan view, when separating the substrate 1 after GaN single crystal growth by the flux method, stress can be distributed, and crack formation in the grown crystal can be suppressed. Although the mask opening pattern can be changed to a regular hexagonal plate or other shape instead of a disk, a disk is preferred from the standpoint of stress distribution as described above.

[0034] The base of the frustum of the seed crystal is a regular hexagon. In particular, a regular hexagon in which each side is aligned with the m-plane of the seed crystal 2 (each side coincides with the a-axis direction) is preferred. Since group III nitride semiconductors are hexagonal, using a regular hexagon allows for the uniform bonding of group III nitride semiconductors grown from the frustum of the hexagon of various crystals 2. However, it is not necessary for it to perfectly coincide with the a-axis, and an angular deviation of about 10 degrees is acceptable. Preferably, the angular deviation is 1 degree or less.

[0035] The six sides 2a of the frustum hexagonal pyramidal portion of seed crystal 2 are (10-11) planes of the group III nitride semiconductor. The (10-11) planes are stable planes in the mixed melt of the Na flux method. Therefore, the initial nuclei 3, described later, grow from the sides 2a of the frustum hexagonal pyramidal portion of seed crystal 2 while maintaining the (10-11) planes. As a result, the shape of the initial nuclei 3 can be made uniform. Note that the entire surface of side 2a does not need to be a (10-11) plane, but it is preferable that 95% or more of the entire surface is a (10-11) plane. Furthermore, the (10-11) planes referred to here include planes that form an angle of -5 to 5 degrees with respect to the (10-11) planes as part of the (10-11) plane as an error.

[0036] In this embodiment, the diameter D1 of the seed crystal 2 is defined as the diameter D1 of the frustum hexagonal portion of the seed crystal 2 (the diameter of the circumscribed circle in a plan view), and the diameter D1 of the seed crystal 2 is preferably 30 to 300 μm. Within this range, it is possible to grow a group III nitride semiconductor with fewer dislocations and warping. In addition, the area of ​​the side surface 2a of the frustum hexagonal portion of the seed crystal 2 can be increased, making it easier to grow the initial nuclei 3 from the side surface 2a. The diameter D1 of the seed crystal 2 is more preferably 100 to 200 μm.

[0037] Furthermore, the height H1 of the seed crystal 2 is preferably 30 μm or more. Within this range, the area of ​​the side surface 2a can be sufficiently wide, and crystals can be grown uniformly from each side surface 2a. As a result, the shape of the initial nuclei 3 that grow from each type of crystal 2 can be made uniform. However, if H1 is too high, problems such as the formation of the seed crystal 2 taking a long time arise, so it is preferable to keep it at 100 μm or less. More preferably it is 20 to 60 μm, and even more preferably 30 to 50 μm.

[0038] Furthermore, for the same reasons as above, the height H1 of the seed crystal 2 is preferably 0.01 to 0.6 times the diameter D1 of the seed crystal 2. More preferably 0.1 to 0.35 times, and even more preferably 0.15 to 0.3 times.

[0039] A recess 2d is provided in the center of the seed crystal 2. By providing the recess 2d, as shown in Figures 8(a) and 8(b), the initial nuclei 3 grown from the seed crystal 2 in the initial nucleation process S41 described later do not fill the recess 2d, and a void 7 (reference) is formed. The formation of the void 7 prevents dislocations of the seed crystal 2 from propagating upwards, enabling the growth of a high-quality GaN single crystal.

[0040] As shown in Figure 10, the bottom surface 2b of the recess 2d is flat and is the (0001) plane (c plane) of the group III nitride semiconductor. Also, the bottom surface 2b is approximately circular in plan view. However, the bottom surface 2b does not need to be flat and may have irregularities. Furthermore, the shape of the bottom surface 2b in plan view does not need to be circular.

[0041] The side surface 2c of the recess 2d has numerous irregularities and, overall, has a slope similar to that of the (10-11) plane. By giving side surface 2c such an irregular shape, side surface 2c becomes the starting point for crystal growth of the group III nitride semiconductor, making it easier to fill the upper part of the seed crystal 2 with the group III nitride semiconductor. Note that side surface 2c may also be a flat surface.

[0042] The depth H2 of the recess 2d is preferably 10 to 100 μm. This range makes it easier to form voids 7, allowing for the growth of higher quality group III nitride semiconductors. More preferably, it is 20 to 60 μm, and even more preferably 30 to 50 μm. Also, for similar reasons, the depth H2 of the recess 2d is preferably 0.3 to 1.0 times the height H1 of the seed crystal 2, and more preferably 0.6 to 0.8 times.

[0043] The diameter of the upper surface of the recess 2d is such that the seed crystal 2 has no upper surface, and the side surface 2c of the recess 2d and the side surface 2a of the seed crystal 2 are connected at an angle. Therefore, there is no c-plane on the upper surface of the seed crystal 2. The c-plane may melt back in the mixed melt of the Na flux method, which can cause variations in the shape of each initial nucleus 3. In addition, crystal growth from the c-plane may cause dislocations of the seed crystal 2 to propagate upwards. Therefore, by creating a shape in which there is no c-plane on the upper surface, it is possible to suppress variations in the shape of each initial nucleus 3 and suppress the upward propagation of dislocations of the seed crystal 2.

[0044] The seed substrate 9 can be manufactured, for example, as follows. First, a mask having a plurality of openings is formed on the substrate 1. The plurality of openings are arranged in a pattern of regular triangular grids. The shape of the openings is circular. Other shapes such as regular hexagons are also acceptable, but it is preferable to use circles as in the embodiment in order to form a disc portion and suppress cracks when the substrate is peeled off. The material of the mask can be any material that can suppress the growth of group III nitride semiconductors on the mask, for example, SiO2.

[0045] Next, a buffer layer (not shown) and seed crystal 2 are selectively grown sequentially on the substrate exposed to the aperture using methods such as MOCVD or HVPE. Then, the mask is removed by melt-back with hydrofluoric acid or the like. The seed substrate 9 can be fabricated by the above steps.

[0046] Here, when selectively growing seed crystal 2 from the opening of the mask, the group III nitride semiconductor can be faceted by appropriately controlling the growth conditions, and the shape of seed crystal 2 can be made as shown in Figures 10 and 11. For example, the growth temperature can be set to 1120-1145°C and the V / III ratio to 970-120. Furthermore, since the shape is determined by selective growth, the shapes of various crystals 2 can be made uniform.

[0047] Subsequently, in the initial nucleation step S41, the mixed melt 14 is brought into contact with the surface of the seed crystal 2 in a nitrogen-containing atmosphere, thereby forming initial nuclei 3 on the various crystals 2 as shown in Figure 8(b).

[0048] In the initial nucleation step S41, first, as shown in Figure 6, the seed substrate 9 is immersed in the mixed molten metal 14 prepared in the crucible 10 using a jig 20. The jig 20 is positioned inside the crucible 10 for growing semiconductor single crystals using the flux method, as shown in Figures 5 to 7, and can support the seed substrate 9 for growing a group III nitride semiconductor single crystal inside the crucible 10. The jig 20 has a first leg portion 21, a second leg portion 22, a third leg portion 23, a connecting portion 24, and a lifting shaft 25. The material of each component of the jig 20 is alumina. As shown in Figures 5 to 7, the first leg portion 21, the second leg portion 22, and the third leg portion 23 are formed in a roughly rod shape and hang down from the corners of the connecting portion 24, which is a roughly triangular flat plate in plan view, as shown in Figure 7.

[0049] As shown in Figures 5 and 6, substrate support portions 26, consisting of protrusions capable of supporting a seed substrate 9, are formed at the lower ends of the first leg portion 21, the second leg portion 22, and the third leg portion 23 shown in Figure 9. The first leg portion 21 is formed to be longer than the second leg portion 22 and the third leg portion 23 (not shown). As a result, the substrate 1 supported by the substrate support portion 26 is supported in an inclined state with respect to the connecting portion 24. The connecting portion 24 is connected to the lifting shaft 25 so that it can assume an inclined position with respect to the lifting shaft 25. As a result, the seed substrate 9 supported by the substrate support portion 26 is in an inclined state with respect to the horizontal, as shown in Figure 5, before being immersed in the mixed molten liquid 14 stored in the crucible 10, and is in a horizontal state, as shown in Figure 6, when immersed in the mixed molten liquid 14 stored in the crucible 10.

[0050] In the initial nucleation step S41, when immersing the seed substrate 9 in the mixed molten metal 14 using the jig 20, the furnace atmosphere is replaced with an inert gas, the furnace is heated, and then vacuumed to sufficiently reduce outgassing components such as oxygen in the furnace. Next, the crucible 10 containing the raw materials and the seed substrate 9 are placed in the reaction vessel and vacuumed, and then a gas containing nitrogen is supplied to the reaction vessel. Once the pressure in the reaction vessel reaches the crystal growth pressure, the furnace is heated to the crystal growth temperature. The crystal growth temperature is, for example, between 700°C and 1000°C, and the crystal growth pressure is, for example, between 2 MPa and 10 MPa.

[0051] Once the reaction vessel reaches the crystal growth temperature and pressure, and the nitrogen dissolved in the mixed molten material 14 becomes supersaturated, the seed substrate 9 is immersed in the mixed molten material 14 in the crucible 10, as shown in Figure 6. Then, GaN crystals (initial nuclei 3) begin to grow from the various crystals 2 on the seed substrate 9. The growth of the initial nuclei 3 continues until adjacent initial nuclei 3 begin to fuse together (see Figure 8(b)). Note that a gap remains between the initial nuclei 3 and the substrate 1.

[0052] Here, the (10-11) plane, which is the side surface 2a of the frustum of the regular hexagon of the seed crystal 2, exists stably in the mixed melt 14 without melting back. Also, the height H1 of the seed crystal 2 is 30 μm or more, and the side surface 2a has a sufficiently large area. Therefore, the initial nuclei 3 grow from side surface 2a while maintaining the (10-11) plane. Since the shapes of the various crystals 2 are uniformly consistent and they grow uniformly from the seed crystal 2 while maintaining the (10-11) plane, variations in the shape of each initial nucleus 3 can be suppressed, and the shapes of each initial nucleus 3 can be made uniform.

[0053] Furthermore, because a recess 2d is formed in the center of the seed crystal 2, the initial nucleus 3 does not completely fill the recess 2d, and a void 7 is formed. The mixed molten liquid 14 is trapped inside the void 7. Because the void 7 is formed above the seed crystal 2, the transfer of dislocations from the seed crystal 2 to the upper part can be suppressed.

[0054] Furthermore, by making the diameter of the recess 2d wider, the seed crystal 2 has a shape in which there is no top surface (c-face). The c-face is an unstable surface that can be melted back in the mixed melt 14. Since there is no crystal growth from such an unstable surface, the variation in the shape of each initial nucleus 3 can be further suppressed. In addition, since there is no crystal growth from the c-face, the transfer of dislocations of the seed crystal 2 to the upper surface can be further suppressed.

[0055] 5-2. Flattening process S42 Next, the planarization process S42 shown in Figure 1 is performed. The planarization process S42 is a process in which crystal growth is carried out using the FFC (flux film coating) method, in which a seed substrate 9 on which initial nuclei 3 have been formed is immersed in a mixed melt 14 stored in a crucible 10, and then repeatedly heated under a nitrogen atmosphere, thereby growing GaN single crystals from the initial nuclei 3 and filling the spaces between adjacent initial nuclei 3 with GaN single crystals to planarize the crystal plane.

[0056] In the FFC method in the planarization step S42 of this embodiment 1, as shown in Figure 5, the seed substrate 9 is repeatedly removed from the mixed melt 14 at predetermined intervals, or immersed in the mixed melt 14 as shown in Figure 6. As shown in Figure 8(b), when adjacent initial nuclei 3 begin to fuse together, depressions 4 are formed on the fused surface. When the seed substrate 9 is removed from the mixed melt 14, the mixed melt 14 accumulates in the depressions 4 between adjacent initial nuclei 3. This allows the crystals 5 to grow along the depressions 4 (see Figure 8(c)).

[0057] Here, because the mixed molten material 14 accumulated in the depression 4 is thin, it easily becomes supersaturated with nitrogen. Therefore, the rate of crystal growth can be accelerated. On the other hand, because the amount of accumulated mixed molten material 14 is small, the amount of Ga is also small, and crystal growth stops after a while. Therefore, as shown in Figure 6, the seed substrate 9 is immersed in the mixed molten material 14 again, and as shown in Figure 5, the seed substrate 9 is removed from the mixed molten material 14, thereby intermittently supplying the depression 4 with mixed molten material 14 containing Ga. The FFC method is continued until the depression 4 is filled by the growth of crystal 5. This makes it possible to grow crystals with flat c-planes.

[0058] 5-2.Thickening process S43 As shown in Figure 1, the thickening process S43 is performed after the planarization process S42. The thickening process S43 is a process in which a GaN substrate, which is a seed substrate 9 having a crystal surface planarized in the planarization process S42, is immersed in a mixed melt of Ga and Na 14 stored in a crucible 10 to form a thickened group III nitride single crystal (GaN single crystal) 6 on the GaN substrate (seed substrate 9).

[0059] In the thickening process S43 of Embodiment 1, as shown in Figure 8, the seed substrate 9, which has a flat crystal surface, is immersed in the mixed melt 14 while being supported by the substrate support part 26. Once the GaN single crystal 6 has grown to the desired thickness, the temperature is lowered to room temperature, and the pressure is also lowered to atmospheric pressure to terminate the growth of the GaN single crystal 6. The duration of the thickening process S43 can be appropriately set according to the desired thickness of the GaN single crystal 6. At this point, the gap between the initial nucleus 3 and the substrate 1 remains unfilled. Therefore, the substrate 1 can be naturally peeled off during cooling due to the difference in thermal expansion coefficients.

[0060] As described above, according to the GaN single crystal growth method in Embodiment 1, the side surface of the seed crystal 2 is composed of (10-11) planes. Therefore, variations in the shape of each initial nucleus 3 can be suppressed, and a uniform, high-quality GaN single crystal 6 can be formed.

[0061] Furthermore, a recess 2d is provided in the center of the seed crystal 2, resulting in a shape with no upper surface. Therefore, during the growth of the initial nucleus 3, the upper part of the seed crystal 2 is not filled, and a void 7 is formed. As a result, the propagation of dislocations in the seed crystal 2 to the upper part can be suppressed, and a high-quality GaN single crystal 6 can be formed.

[0062] In this embodiment, the planarization step S42 based on the FFC method is not necessarily required, but it is preferable to perform the planarization step S42 in order to further improve the flatness of the crystal and further reduce warping.

[0063] 6. Effects The effects of the method for manufacturing a group III nitride semiconductor in this embodiment 1 are described below. In the method for manufacturing a group III nitride semiconductor in this embodiment 1, the surface 11a of a solid alkali metal 11 is covered with Ga 12, which is a group III metal, and then melted together with carbon 13 to produce a mixed melt 14. This maintains the wettability of the melt of the group III metal 12 to the surface 11a of the solid alkali metal 11, and the surface 11a of the alkali metal 11 is covered with Ga 12, preventing it from being exposed to the outside air. As a result, the surface 11a of the alkali metal 11 is prevented from reacting with oxygen, moisture, etc. in the outside air, and the crystallinity of the formed group III nitride semiconductor can be improved.

[0064] Furthermore, in this embodiment, carbon 13 is in powder form. This increases the surface area of ​​carbon 13, making it easier to disperse in the molten Na material 11, which is an alkali metal, thus further promoting crystal growth and suppressing the generation of unwanted crystals.

[0065] Furthermore, in this embodiment, in the alkali metal coating step S1, the crucible 10 containing the melt of the alkali metal Na material 11 is heated to a temperature above the melting point of the group III metal Ga 12 and below the melting point of the alkali metal 11, thereby solidifying the alkali metal 11 in the crucible 10. After that, the group III metal is added to the crucible 10 to coat the surface 11a of the solid alkali metal 11 with the melt of the group III metal Ga 12. As a result, by solidifying the melt of the alkali metal 11 in the crucible 10, the upper surface 11a of the surface of the solid alkali metal 11 can be made flat, and the bottom surface 11c and side surface 11b can be covered with the inner bottom surface and inner side surface of the crucible 10. Therefore, by simply covering the upper surface 11a of the solid alkali metal 11 with a group III metal, the entire surface 11a to 11c of the solid alkali metal 11 can be sealed from the outside air, preventing the surface 11a to 11c of the alkali metal 11 from reacting with oxygen, moisture, etc. in the outside air, and further suppressing the decrease in the crystallinity of the formed group III nitride semiconductor.

[0066] Furthermore, in this embodiment, in the alkali metal coating step S1, the group III metal 12 is added to the crucible 10 to coat the surface 11a of the solid alkali metal 11 with the molten group III metal 12. Then, the crucible 10 is heated to a temperature below the melting point of the group III metal 12, thereby solidifying the group III metal while coating the surface 11a of the alkali metal 11. As a result, the group III metal 12 is solidified in the crucible 10 while coating the surface of the solid alkali metal 11 with the molten group III metal 12, ensuring that the surface 11a of the solid alkali metal 11 is reliably coated and that the coated state is maintained.

[0067] Furthermore, in this embodiment, after the alkali metal coating step S1, a carbon addition step S2 is included in which carbon 13 is added to the crucible 10, and after the carbon addition step S2, a mixed melt generation step S3 is performed. As a result, since the carbon 13 is added after the group III metal 12 that has coated the surface 11a of the solid alkali metal 11 has solidified, it does not affect the wettability of the group III metal 12 to the solid alkali metal 11, and thus the surface 11a of the solid alkali metal 11 can be reliably coated with the group III metal 12 and the coated state can be maintained.

[0068] Furthermore, in this embodiment, in the carbon addition step S2, carbon 13 is added to a position in the crucible 10 other than the position 12a where the seed substrate 9 is to be immersed. This makes it easier for the carbon 13 to disperse in the mixed melt 14 when the seed substrate 9 is immersed in the mixed melt 14, thereby further enhancing the crystal growth promotion effect and the suppression of unwanted crystal formation effect.

[0069] In this embodiment, as shown in Figure 3, in the alkali metal coating step S1, the alkali metal molten material obtained by heating the Na material 11 is solidified in the crucible 10, and then the upper surface 11a of the solid Na material 11 is covered with the melted group III metal. Alternatively, as shown in the modified form in Figure 12, the solid Na material 11 may be placed in the crucible 10 and then the surface 11d of the solid Na material 11 may be covered with the melted group III metal. In this case, the group III metal 12 covers all surfaces 11d of the solid Na material 11 except for the part that is in contact with the crucible 10. This modified form also produces the same effects as in Embodiment 1.

[0070] As described above, according to the above embodiments and modified forms, it is possible to provide a method for manufacturing a group III nitride semiconductor that can improve crystallinity.

[0071] The present invention is not limited to the above-described embodiments and variations, and can be applied to various embodiments without departing from its spirit. [Explanation of symbols]

[0072] 1: Circuit board 2: Seed crystal 3: Initial nucleus 5: Crystal 6: Group III nitride single crystal (GaN single crystal) 9: Seed substrate 10: Crucible 11: Alkali metals (Na materials) 12: Group III metals 12a: Planned immersion location 12b: Carbon dosing position 13: Carbon 14:Mixed melt 20: Jig 100: Crucible

Claims

1. A method for manufacturing a group III nitride semiconductor, The alkali metal coating process involves covering the surface of a solid alkali metal with a Group III metal, A mixed melt generation step is performed by melting the alkali metal coated with the aforementioned Group III metal together with carbon to produce a mixed melt, A crystal growth step in which a seed substrate is immersed in the mixed molten liquid in a nitrogen-containing atmosphere to grow a group III nitride semiconductor on the seed substrate, A method for producing a group III nitride semiconductor, including

2. The method for producing a group III nitride semiconductor according to claim 1, wherein the carbon is in powder form.

3. A method for producing a group III nitride semiconductor according to claim 1 or 2, wherein in the alkali metal coating step, the alkali metal is solidified in the crucible by raising the temperature of the crucible containing the molten alkali metal to a temperature above the melting point of the group III metal and below the melting point of the alkali metal, and then the group III metal is added to the crucible to coat the surface of the solid alkali metal with the molten group III metal.

4. The method for producing a group III nitride semiconductor according to claim 3, wherein in the alkali metal coating step, the group III metal is added to the crucible to coat the solid surface of the alkali metal with the molten group III metal, and then the crucible is heated to a temperature below the melting point of the group III metal to solidify the group III metal while coating the surface of the alkali metal.

5. The process includes a carbon addition step in which carbon is added to the crucible after the alkali metal coating step, A method for producing a group III nitride semiconductor according to claim 4, wherein the mixed melt generation step is performed after the carbon addition step.

6. The method for producing a group III nitride semiconductor according to claim 5, wherein in the carbon addition step, carbon is added to the mixed molten liquid in the crucible at a position other than the position in which the seed substrate is to be immersed.

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