Enclosure system with charging assembly
The enclosure system with a charging assembly and support structures addresses contamination and inefficiencies in substrate processing by enabling in-situ inspection and charging, enhancing yield and efficiency while maintaining a sealed environment.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- APPLIED MATERIALS INC
- Filing Date
- 2026-01-25
- Publication Date
- 2026-05-26
AI Technical Summary
Conventional substrate processing systems face issues such as contamination, delays, and inefficiencies during component inspection and replacement, leading to reduced yield and increased energy consumption due to the need to open sealed environments for maintenance.
An enclosure system with a charging assembly and support structures that allows for in-situ inspection and charging of verification wafers, enabling sensor data collection without opening the system, and facilitating component replacement without disrupting the sealed environment.
This approach reduces contamination, minimizes energy consumption, and enhances maintenance efficiency by allowing inspections and replacements within a sealed environment, improving yield and reducing operator time.
Smart Images

Figure 2026086478000001_ABST
Abstract
Description
Technical Field
[0001] Embodiments of the present disclosure relate to an enclosure system used in connection with a substrate processing system, and more particularly, to an enclosure system having a charging assembly. Background
[0002] In substrate processing and other electronic processing, a platform that uses a robotic arm to transfer objects (such as substrates, etc.) between processing chambers, from a storage area (such as a front opening unified pod (FOUP), etc.) to a processing chamber, from a processing chamber to a storage area, etc. is often used. Summary
[0003] The following is a simplified summary of the disclosure in order to provide a basic understanding of some aspects of the disclosure. This summary is not an extensive overview of the disclosure. It is not intended to identify key or critical elements of the disclosure nor to delineate the scope of particular implementations of the disclosure or the scope of the claims. Its sole purpose is to present some concepts of the disclosure in a simplified form as a prelude to a more detailed description that will be presented later.
[0004] In one aspect of the present disclosure, an enclosure system includes a plurality of walls that form an internal volume. The enclosure system is configured to couple to an equipment front end module (EFEM) of a substrate processing system. Further, the enclosure system includes a charging assembly that includes a first charging coil. Further, the enclosure system includes one or more first support structures disposed within the internal volume below the first charging coil. The one or more first support structures are configured to support a first verification wafer within a threshold distance of the first charging coil and charge the first verification wafer via the charging assembly.
[0005] In other aspects of this disclosure, a charging assembly of an enclosure system configured to be coupled to an EFEM of a substrate processing system includes a first charging coil positioned above one or more first support structures supporting a first verification wafer within a threshold distance of the first charging coil within the internal volume of the enclosure system. The first verification wafer is positioned by one or more first support structures to align the first charging interface of the first verification wafer with the first charging coil. Furthermore, the charging assembly includes a rechargeable battery configured to charge the first verification wafer via the first charging coil. The rechargeable battery is configured to be recharged while coupled to the enclosure system.
[0006] In other aspects of the disclosure, the method includes receiving a first subset of sensor data from a verification wafer configured to be transported by a robot of an EFEM of a substrate processing system from one or more support structures located within an internal volume formed by an enclosure system. The first subset is associated with at least one charge state of the electrical storage device of the verification wafer. Furthermore, the method includes receiving a second subset of sensor data from a charging assembly of the enclosure system. The charging assembly is configured to charge the verification wafer in response to the verification wafer being placed on one or more support structures. Furthermore, the method includes performing corrective actions associated with the substrate processing system based on the sensor data. [Brief explanation of the drawing]
[0007] The figures in the accompanying drawings are illustrative and not limiting, and the same reference numerals indicate similar elements. It should be noted that different references to “Embodiments” or “One Embodiment” in this disclosure do not necessarily mean the same embodiment, but rather that such references mean at least one. [Figure 1A] This shows a processing system according to a specific embodiment. [Figure 1B] This block diagram shows an exemplary system architecture according to a specific embodiment. [Figure 2A] ~ [Figure 2B] A front view of an enclosure system according to a specific embodiment is shown. [Figure 2C] A cross-sectional top view of an enclosure system according to a specific embodiment is shown. [Figure 2D] A top view of an enclosure system according to a specific embodiment is shown. [Figure 3] A schematic diagram of a charging assembly for an enclosure system according to a specific embodiment is shown. [Figure 4] A side view of the charging assembly of an enclosure system according to a specific embodiment is shown. [Figure 5] A flowchart illustrating a method for implementing corrective measures according to a specific embodiment is shown. [Figure 6A] ~ [Figure 6C] A flowchart illustrating a method related to machine learning models, according to a specific embodiment, is shown. [Figure 7] This is a block diagram showing a computer system according to a specific embodiment. Detailed description of the embodiment
[0008] The embodiments described herein relate to enclosure systems including charging assemblies (e.g., FOUPs for verification wafer charging and host communication).
[0009] A substrate processing system is used to process substrates. The substrate processing system includes a factory interface (also called an equipment front-end module (EFEM)), a load lock, a transport chamber, and a processing chamber. A substrate storage system (FOUP, etc.) is connected to the factory interface (e.g., docked via a load port), a factory interface robot transports substrates from the substrate storage system to the load lock (via the factory interface), and a transport chamber robot transports substrates from the load lock to the processing chamber (via the transport chamber) for processing. The processed substrates are then transported to the load lock by the transport chamber robot and then transported from the load lock to the substrate storage system by the factory interface robot. The factory interface maintains a first environment (e.g., an atmospheric environment, an inert environment, etc.), and the transport chamber maintains a second environment (e.g., a vacuum environment, etc.) to avoid contamination of the substrates and the substrate processing system.
[0010] Components of a substrate processing system wear out over time and therefore need to be removed and replaced. For example, the process kit ring is located inside the processing chamber and needs to be replaced because it wears out over time due to substrate processing operations.
[0011] Traditionally, substrate processing systems (e.g., transport chambers, processing chambers, etc.) are opened for inspection or replacement of components (e.g., process kit rings, etc.). This can lead to contamination of the substrate processing system, delays in the re-commissioning process, reduced yield, wasted energy, and wasted operator time.
[0012] The devices, systems, and methods disclosed herein provide enclosure systems that solve problems of conventional systems. The enclosure system may be a FOUP configured to store and transport objects such as carriers, process kit rings, substrates, and verification wafers. Each carrier may support one or more process kit rings. Furthermore, the enclosure system may be configured to charge verification wafers or to receive sensor data from verification wafers.
[0013] An enclosure system includes walls that form an internal volume. The walls may include side walls, bottom walls, top walls, and / or an enclosure door. The enclosure system (e.g., via one or more walls) is configured to be coupled to an EFEM (e.g., by positioning the enclosure system over a load port). In some embodiments, the top wall of the enclosure system is an enclosure lid that is detachably attached to one or more side walls and encloses at least partially the internal volume of the enclosure system. In some embodiments, the enclosure door of the enclosure system is detachably attached to one or more side walls. In some embodiments, the enclosure system (e.g., enclosure door, walls, enclosure lid, etc.) provides a sealed environment within the internal volume of the enclosure system.
[0014] In some embodiments, the verification wafer is stored within the internal volume of an enclosure system. The verification wafer includes one or more sensors (e.g., an image sensor, a pressure sensor, a temperature sensor, etc.). The verification wafer is transported from the enclosure system to one or more other parts of a substrate processing system to provide sensor data related to the substrate processing system. In some embodiments, the verification wafer is transported to a processing chamber to collect image data and / or other data to determine whether the process kit ring needs to be replaced.
[0015] In some embodiments, the enclosure system includes a charging assembly. The charging assembly is configured to charge a verification wafer placed within the enclosure system. In some embodiments, the charging system includes a charging coil. The charging coil may be configured to charge the verification wafer by inductive charging.
[0016] In some embodiments, the enclosure system includes one or more support structures positioned within the internal volume to support one or more objects within the enclosure system (e.g., carriers, verification wafers, process kit rings, etc.). One or more first support structures are positioned below the charging coil and configured to support the verification wafer within the internal volume of the enclosure system for charging the verification wafer via a charging assembly. In some embodiments, one or more first support structures are configured to support the verification wafer within a threshold distance of the charging coil for charging the verification wafer via a charging assembly (e.g., via inductive charging, etc.). In some embodiments, one or more first support structures are configured to position the verification wafer so that the charging interface of the verification wafer is aligned with the charging coil.
[0017] In some embodiments, sensor data is received from a verification wafer and / or enclosure system, and corrective actions are performed based on the sensor data. For example, in response to the reception of sensor data (e.g., images, etc.) associated with a process kit ring in a processing chamber, a corrective action may be performed to replace the process kit ring with a new process kit ring from the enclosure system.
[0018] The devices, systems, and methods disclosed herein offer advantages over conventional solutions. This disclosure provides a verification wafer for inspecting components of a substrate processing system (e.g., a processing chamber), and provides sensor data related to the components without opening the sealed environment (e.g., without opening the transport chamber, without opening the processing chamber, etc.), compared to conventional systems where the sealed environment is opened to inspect the components. This enables improved yield, reduced energy consumption, reduced contamination, and shorter operator times compared to conventional systems. Furthermore, the enclosure system of this disclosure can transmit sensor data from the verification wafer and / or the enclosure system without opening the enclosure system or removing the verification wafer from the enclosure system, compared to conventional systems where the substrate processing system is opened for inspection. This enables reduced contamination of the enclosure system and avoidance of lengthy decontamination processes. Additionally, the enclosure system of this disclosure can charge the verification wafer without opening the enclosure system or removing the verification wafer from the enclosure system. Furthermore, the enclosure system of this disclosure allows for the replacement of components of the substrate processing system (e.g., process kit rings) without opening a sealed environment and without the time- and energy-intensive recommissioning process of conventional systems. Using the enclosure system of this disclosure, maintenance operations (e.g., replacement of process kit rings in the processing chamber) can be performed without human intervention after inspection (e.g., with a verification wafer), making the maintenance of the processing chamber more efficient compared to conventional systems.
[0019] While parts of this disclosure refer to process kit rings and carriers, and verification wafers, this disclosure can be applied to different types of content (e.g., other components of a substrate processing system). While parts of this disclosure refer to a substrate processing system, this disclosure can be applied to other types of systems (e.g., other manufacturing systems). While parts of this disclosure refer to the enclosure system being a FOUP, the enclosure system in this disclosure may be a side storage pod (SSP) or other types of enclosures (e.g., other enclosures of a substrate processing system).
[0020] Figure 1A shows a processing system 100A (e.g., a substrate processing system, a wafer processing system, a semiconductor processing system, etc.) according to a specific embodiment. The processing system 100A includes a factory interface 101 (also referred to as EFEM) and load ports 129 (e.g., load ports 129A-D, etc.). In some embodiments, load ports 129A-D are directly attached to the factory interface 101 (e.g., sealed, etc.). Enclosure systems 130 (e.g., cassettes, FOUPs, process kit enclosure systems, etc.) are configured to be detachably coupled to load ports 129A-D (e.g., docked, etc.). Referring to Figure 1A, enclosure system 130A is coupled to load port 129A, enclosure system 130B is coupled to load port 129B, enclosure system 130C is coupled to load port 129C, and enclosure system 130D is coupled to load port 129D. In some embodiments, one or more enclosure systems 130 are coupled to a load port 129 to load and unload substrates and / or other substrates into and out of the processing system 100A. Each enclosure system 130 seals to its respective load port 129. In some embodiments, a first enclosure system 130A is docked to the load port 129A (e.g., to replace a used process kit ring and / or to charge and / or store a verification wafer). Once such an operation is performed, the first enclosure system 130A is undocked from the load port 129A, and a second enclosure system 130 (e.g., a FOUP containing a substrate) is docked to the same load port 129A. In some embodiments, the first enclosure system 130A is docked semi-permanently to the load port 129A. In certain embodiments, the first enclosure system 130A is integrated with a factory interface 101. In some embodiments, the enclosure system 130 (e.g., enclosure system 130A) is an enclosure system that includes support structures for aligning the carrier, process kit ring, and / or verification wafer.
[0021] In some embodiments, load port 129 includes a front interface that forms a vertical opening (or a substantially vertical opening). Additionally, load port 129 includes a horizontal plane for supporting an enclosure system 130 (such as a cassette, a process kit enclosure system, etc.). Each enclosure system 130 (such as a FOUP for a substrate, a process kit enclosure system, etc.) has a front interface that forms a vertical opening. The front interface of enclosure system 130 is sized to interface (such as seal, etc.) with the front interface of load port 129 (for example, the vertical opening of enclosure system 130 is approximately the same size as the vertical opening of load port 129, etc.). Enclosure system 130 is disposed on the horizontal plane of load port 129, and the vertical opening of enclosure system 130 is aligned with the vertical opening of load port 129. The front interface of enclosure system 130 is interconnected (such as clamped, fixed, sealed, etc.) with the front interface of load port 129. The bottom plate of enclosure system 130 (such as a base plate, etc.) has features (such as load features like recesses or receptacles that engage with kinematic pin features of the load port, load port features for pin clearance, and / or enclosure system docking tray latch clamp features, etc.) that engage with the horizontal plane of load port 129. The same load port 129 is used for different types of enclosure systems 130 (such as a process kit enclosure system, a cassette containing a substrate, etc.).
[0022] In some embodiments, enclosure system 130 includes one or more shelves for aligning carriers, process kit rings, and / or verification wafers. In some embodiments, enclosure system 130 includes a pair of shelves for aligning carriers and / or contents disposed on the carriers (e.g., process kit rings, process chamber components, verification wafers, etc.). In some embodiments, enclosure system 130 includes two pairs of shelves, three pairs of shelves, four pairs of shelves, five pairs of shelves, six pairs of shelves, seven pairs of shelves, eight pairs of shelves, etc. for aligning objects (e.g., carriers, process kit rings, verification wafers, etc.).
[0023] In some embodiments, enclosure system 130 (e.g., a process kit enclosure system, etc.) includes one or more content items 113 (e.g., one or more of a process kit ring, an empty process kit ring carrier, a process kit ring disposed on a process kit ring carrier, a verification wafer, etc.). In some examples, enclosure system 130 is coupled to factory interface 101 (e.g., via load port 129, etc.) and can automatically transport a process kit ring on a process kit ring carrier to process system 100A for replacing a used process kit ring. In some examples, enclosure system 130 is coupled to factory interface 101 and can automatically transport a verification wafer to process system 100A for inspecting process chamber 107 or one or more components of the process chamber.
[0024] In some embodiments, the enclosure system 130 includes a charging assembly for charging one or more verification wafers. The enclosure system 130 may include a battery for storing electricity received from an external source. In some embodiments, the enclosure system 130 includes electrical connections for connecting to and receiving electricity from components of the processing system 100A via the electrical connections of the components of the processing system 100A (e.g., factory interface 101, load port 129, etc.). In some embodiments, the enclosure system 130 includes communication connections (e.g., telecommunications connections) for sending and receiving data from components of the processing system 100A via the communication connections of the components of the processing system 100A (e.g., factory interface 101, load port 129, etc.). In some embodiments, the charging system includes a first coil for charging the verification wafers by inductive charging. Furthermore, in some embodiments, the enclosure system 130 includes processing devices (e.g., processors, client devices, computing devices) for receiving data from verification wafers, factory interface 101, client devices, server devices, controllers 109, etc. The received data may indicate the status of the verification wafer and / or the status of the processing chamber components. The processor of the enclosure system 130 can communicate with the controller 109.
[0025] In some embodiments, the processing system 100A includes first vacuum ports 103a, 103b that connect the factory interface 101 to each of the degassing chambers 104a, 104b (e.g., load lock). Second vacuum ports 105a, 105b are connected to each of the degassing chambers 104a, 104b and are positioned between the degassing chambers 104a, 104b and the transport chamber 106, enabling the transport of substrates and contents 113 (e.g., process kit rings, verification wafers, etc.) to the transport chamber 106. In some embodiments, the processing system 100A includes and / or uses one or more degassing chambers 104 and a corresponding number of vacuum ports 103, 105 (e.g., the processing system 100A includes a single degassing chamber 104, a single first vacuum port 103, and a single second vacuum port 105). The transport chamber 106 includes a plurality of processing chambers 107 (e.g., four processing chambers 107, six processing chambers 107, etc.) arranged around it and coupled to the transport chamber 106. The processing chambers 107 are coupled to the transport chamber 106 via their respective ports 108, such as slit valves. In some embodiments, the factory interface 101 is under high pressure (e.g., atmospheric pressure), and the transport chamber 106 is under low pressure (e.g., vacuum). Each degassing chamber 104 (e.g., load lock, pressure chamber, etc.) has a first door (e.g., a first vacuum port 103, etc.) that seals the degassing chamber 104 away from the factory interface 101 and a second door (e.g., a second vacuum port 105, etc.) that seals the degassing chamber 104 away from the transport chamber 106. While the first door is open and the second door is closed, the contents are transported from the factory interface 101 to the degassing chamber 104. The first door is then closed, the pressure inside the degassing chamber 104 is reduced to match that of the transport chamber 106, the second door opens, and the contents are transported out of the degassing chamber 104. A local center-finding (LCF) device is used to align the contents within the transport chamber 106 (for example, before entering the processing chamber 107 and after leaving the processing chamber 107).
[0026] In some embodiments, the processing chamber 107 includes an etching chamber, a deposition chamber (including atomic layer deposition, chemical vapor deposition, physical vapor deposition, or plasma-enhanced versions thereof), an annealing chamber, and the like.
[0027] The factory interface 101 includes a factory interface robot 111. The factory interface robot 111 includes a robot arm, such as a Selective Compliance Assembly Robot Arm (SCARA) robot. Examples of SCARA robots include a 2-link SCARA robot, a 3-link SCARA robot, a 4-link SCARA robot, and so on. The factory interface robot 111 includes an end effector at the end of the robot arm. The end effector is configured to pick up and process specific objects, such as substrates. Alternatively or additionally, the end effector is configured to process objects such as carriers, process kit rings (e.g., edge rings), and / or verification wafers. The robot arm has one or more links or members (such as a wrist member, an upper arm member, or a forearm member) configured to move the end effector in various directions and to various locations.
[0028] The factory interface robot 111 is configured to transport objects between the enclosure system 130 (e.g., cassette, FOUP, etc.) and the degassing chambers 104a, 104b (or load lock). Conventional systems involve misalignment of the content and opening the processing system 100A (e.g., factory interface 101, etc.) to realign the misaligned content (e.g., disassembly, discarding seals, contamination, etc.). However, the processing system 100A is configured to facilitate content realignment without the operator having to open the processing system 100A (e.g., disassembly, discarding seals, contamination, etc.) (e.g., via one or more support structures of the enclosure system 130, via a removable rear window of the enclosure system 130, etc.). Thus, in some embodiments, a sealed environment including the internal volume of the enclosure system 130 and the internal volume of the factory interface 101 is maintained during content realignment (e.g., via one or more support structures of the enclosure system 130, via a removable rear window of the enclosure system 130, etc.).
[0029] The transport chamber 106 includes a transport chamber robot 115. The transport chamber robot 115 includes a robotic arm with an end effector at its end. The end effector is configured to handle specific objects such as substrates. In some embodiments, the transport chamber robot 115 is a SCARA robot, but in some embodiments, it has fewer links and fewer degrees of freedom than the factory interface robot 111.
[0030] The controller 109 controls various aspects of the processing system 100A. In some embodiments, the controller 109 controls only the processing system 100A (e.g., it does not control other processing systems). In some embodiments, the controller 109 controls multiple processing systems. In some embodiments, the controller controls the substrate processing equipment. The controller 109 is a computing device such as a personal computer, server computer, programmable logic controller (PLC), microcontroller, etc., and / or includes computing devices. The controller 109 includes one or more processing devices. In some embodiments, these processing devices are general-purpose processing devices such as microprocessors, central processing units, etc. More specifically, in some embodiments, the processing device is a composite instruction set computing (CISC) microprocessor, a reduced instruction set computing (RISC) microprocessor, a very long instruction word (VLIW) microprocessor, or a processor that executes other instruction sets, or a processor that executes combinations of instruction sets. In some embodiments, the processing device is one or more dedicated processing devices such as application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), digital signal processors (DSPs), network processors, etc. In some embodiments, the controller 109 includes data storage devices (e.g., one or more disk drives and / or solid-state drives), main memory, static memory, a network interface, and / or other components. In some embodiments, the controller 109 executes instructions to perform one or more of the methods or processes described herein. The instructions are stored in a computer-readable storage medium, which includes one or more main memory, static memory, secondary storage devices, and / or processing devices (during instruction execution). In some embodiments, the controller 109 receives signals from the factory interface robot 111 and the substrate transport chamber robot 115 and transmits control to them.
[0031] Figure 1A schematically illustrates the transport of content 113 (e.g., process kit rings, verification wafers, etc., placed on a carrier) to the processing chamber 107. According to one aspect of this disclosure, content 113 is removed from the enclosure system 130 via a factory interface robot 111 located in the factory interface 101. The factory interface robot 111 transports content 113 to the respective degassing chambers 104a, 104b via either the first vacuum ports 103A, 103B. A transport chamber robot 115 located in the transport chamber 106 removes content 113 from either the degassing chambers 104a, 104b via the second vacuum port 105a, 105b. The transport chamber robot 115 moves content 113 to the transport chamber 106, where content 113 is transported to the processing chamber 107 via the respective ports 108. Although not shown in Figure 1A for clarity, the transport of content 113 includes the transport of process kit rings placed on the carrier, the transport of empty process kit ring carriers, the transport of verification wafers, the transport of components of processing system 100A placed on the carrier, the transport of substrates placed on the carrier, the transport of empty carriers, the transport of process kit rings without carriers, and so on.
[0032] Figure 1A shows an example of content 113 transport, but other examples are possible. In some examples, the enclosure system 130 may be coupled to the transport chamber 106 (for example, via a load port attached to the transport chamber 106). From the transport chamber 106, the content 113 is loaded into the processing chamber 107 by the transport chamber robot 115. The processed content 113 (e.g., used process kit rings, verification wafers, etc.) is removed from the processing system 100A in the reverse manner of the method described herein.
[0033] In some embodiments, the enclosure system disclosed herein is a FOUP (e.g., docked to a load port communicating with a factory interface). In some embodiments, the enclosure system disclosed herein is a side storage pod (SSP) directly attached to the factory interface 101. In some embodiments, an additional SSP is positioned to communicate with the factory interface 101 on the opposite side of the illustrated SSP. In some embodiments, the processed content 113 is removed from the degassing chamber 104 and loaded into the SSP via a robot 111 (e.g., for cooling). In some embodiments, the processed content 113 is removed from the degassing chamber 104 and loaded into the SSP via a robot 111 (e.g., for cooling). In some embodiments, the verification wafer can be removed from the SSP and placed into the SSP via a robot 111.
[0034] When using multiple enclosure systems 130 or a combination of enclosure systems 130 and SSPs, in some embodiments, one SSP or enclosure system 130 is used for unprocessed content 113 (e.g., new process kit rings, charged verification wafers, etc.), and another SSP or enclosure system 130 is used for receiving processed content 113 (e.g., used process kit rings, used verification wafers, etc.). The enclosure system 130 is used to align the content 113 before the content 113 is transported by the robotic arm and / or before the enclosure system 130 is transported (e.g., via one or more support structures within the enclosure system 130, via a removable rear window of the enclosure system 130, etc.). By aligning the content 113 with one or more support structures and / or via a removable rear window of the enclosure system 130, the robot arm can correctly remove the content 113 from a specific location within the enclosure system 130, secure the content 113 within the enclosure system 130 (for example, by one or more support structures securing the content 113), and enable the enclosure system 130 to properly transport the content 113.
[0035] The processing system 100A includes a chamber such as a factory interface 101 (e.g., an equipment front-end module (EFEM)) and adjacent chambers adjacent to the factory interface 101 (e.g., a degassing chamber 104 such as a load port 129, an enclosure system 130, an SSP, a load lock, etc.). One or more chambers are sealed (e.g., each chamber is sealed). The adjacent chambers are sealed to the factory interface 101. In some embodiments, one or more chambers (e.g., the factory interface 101 and / or adjacent chambers, etc.) are supplied with an inert gas (e.g., one or more of nitrogen, argon, neon, helium, krypton, or xenon, etc.) to provide one or more inert environments. In some examples, the factory interface 101 is an inactive EFEM, maintaining an inactive environment (e.g., an inactive EFEM mini-environment) within the factory interface 101, thereby eliminating the need for the user to enter the factory interface 101 (for example, the processing system 100A is configured so that manual access to the factory interface 101 is not possible).
[0036] In some embodiments, a gas flow (e.g., inert gas, nitrogen, etc.) is supplied to one or more chambers of the processing system 100A (e.g., factory interface 101, enclosure system 130, etc.). In some embodiments, the gas flow is greater than the leakage through one or more chambers, maintaining a positive pressure in one or more chambers. In some embodiments, the inert gas in the factory interface 101 is recirculated. In some embodiments, a portion of the inert gas is discharged. In some embodiments, the gas flow rate of non-recirculated gas to the factory interface 101 is greater than the exhaust gas flow rate and gas leakage, maintaining a positive pressure of the inert gas in the factory interface 101. In some embodiments, the factory interface 101 is coupled to one or more valves and / or pumps to provide a gas flow in and out of the factory interface 101. A processing device (e.g., of controller 109) controls the gas flow rate in and out of the factory interface 101 and / or enclosure system 130. In some embodiments, the processing device receives sensor data from one or more sensors (e.g., an oxygen sensor, a humidity sensor, a motion sensor, a door operation sensor, a temperature sensor, a pressure sensor, etc.) and determines the flow rate of inert gas entering and leaving the factory interface 101 and / or enclosure system 130 based on the sensor data.
[0037] The enclosure system 130 can align the contents 113 (e.g., carriers, process kit rings, verification wafers, etc.) without opening the factory interface 101 and the sealed environment in the adjacent chamber. When the enclosure system 130 is docked to the load port 129, it is sealed to the load port 129. The enclosure system 130 provides purge port access, which allows the interior of the enclosure system 130 to be purged before opening the enclosure system 130, minimizing disturbance to the inert environment within the factory interface 101.
[0038] Figure 1B is a block diagram showing an exemplary system architecture according to an aspect of the present disclosure. In some embodiments, the computer system architecture 100B may be included as part of a manufacturing system for processing substrates (e.g., a processing system 100A). The computer system architecture 100B includes a client device 120, a controller 109 (e.g., a facility controller, a controller for processing system 100A, etc.), manufacturing equipment 124 (e.g., processing system 100A), a sensor 126, a verification wafer 128, a prediction server 112 (e.g., for generating prediction data, etc.), an enclosure system 130 (e.g., a FOUP, an SSP, etc.), and a data store 140. The prediction server 112 may be part of the prediction system 110. Furthermore, the prediction system 110 may include server machines 170 and 180.
[0039] The client device 120, controller 109, manufacturing equipment 124, prediction server 112, data store 140, prediction server 112, server machine 170, and server machine 180 can each be hosted by one or more computing devices. One or more computing devices include server computers, desktop computers, laptop computers, tablet computers, notebook computers, personal digital assistants (PDAs), mobile communication devices, mobile phones, handheld computers, cloud servers, cloud-based systems (e.g., cloud service devices, cloud network devices, etc.), or similar computing devices.
[0040] Sensor 126 is configured to acquire sensor data 141 before, during, or after substrate processing by the manufacturing apparatus 124. In some embodiments, one or more sensors 126 are located inside the manufacturing apparatus 124. In some embodiments, the verification wafer 128 is an inspection wafer that includes sensors 126 (e.g., image sensors such as cameras) that provide sensor data 141 for inspecting the inside of the chamber of the manufacturing apparatus 124 and / or components of the manufacturing apparatus 124.
[0041] The sensor data 141 may include one or more of the following: temperature data (e.g., heater temperature), interval data (SP), pressure data, high-frequency radio frequency (HFRF) data, electrostatic chuck (ESC) voltage data, current data, flow data, power data, voltage data, optical frequency data, waveform data, image data, etc. The sensor data 141 may be associated with or indicate hardware parameters such as the settings and components of the manufacturing apparatus 124 (e.g., size, type, etc.), or manufacturing parameters such as process parameters of the manufacturing apparatus 124. In some embodiments, the sensor data 141 may be provided while the manufacturing apparatus 124 is performing a manufacturing process (e.g., apparatus readings during product processing), or, in additional or alternative embodiments, after the manufacturing apparatus 124 has completed the manufacturing process. The sensor data 141 may be associated with or indicate the quality of a component (e.g., a process kit ring, etc.).
[0042] The verification wafer 128 provides data related to the chamber and / or components of the manufacturing apparatus 124. In some embodiments, the verification wafer 128 collects data by one or more sensors (e.g., imaging devices such as cameras). The verification wafer 128 may include multiple image sensors to capture images of the lid of the chamber (e.g., processing chamber, EFEM, transport chamber, load lock, FOUP, SSP, etc.), one or more side walls of the chamber, the bottom wall of the chamber, and / or components of the chamber (e.g., process kit ring, etc.). Images from multiple image sensors can be stitched together to generate a stitched image of the entire inner surface of the chamber. In some embodiments, the image sensors capture the visible spectrum of light. In some embodiments, the image sensors capture thermal radiation and / or visible light.
[0043] In some embodiments, the verification wafer 128 includes one or more sensors (e.g., three sensors) that emit and receive light rays and measure the distance traveled by the light rays. In some embodiments, the verification wafer 128 includes a displacement sensor, an impedance sensor, and / or an acoustic sensor. The verification wafer 128 may include a plurality of sensors, including a pressure sensor, a temperature sensor, a vibration sensor, an accelerometer, and / or a reflectance measuring sensor. In some embodiments, the verification wafer 128 includes a piezoresistive sensor and / or a piezoelectric acoustic sensor. In some embodiments, the verification wafer 128 includes a non-contact sensor. The non-contact sensor may include a radar sensor capable of scanning the surface of components in the processing chamber. Furthermore, the non-contact sensor may include an X-ray emitter (e.g., an X-ray laser) and an X-ray detector. Furthermore, the verification wafer 128 may include an illumination component. The illumination component can at least partially illuminate the internal volume of the chamber.
[0044] In some embodiments, the verification wafer 128 provides sensor data 141 for determining whether the components of the manufacturing apparatus 124 are in a predetermined state (e.g., a predetermined orientation). For example, the verification wafer 128 can provide sensor data 141 for verifying the arrangement of process kit rings in the processing chamber of the manufacturing apparatus 124. The sensor data 141 may include alignment data (e.g., of process kit rings arranged in the processing chamber), image data (e.g., one or more captured images), light beam data (e.g., laser beam data), vibration data, temperature data, humidity data, process gas data, particle data, pressure data, proximity data, displacement data, impedance data, acoustic data, arrangement data, etc. The sensor data 141 can be associated with the state of the process kit rings arranged in the processing chamber. In some embodiments, the sensor data 141 can be associated with the state of the verification wafer 128.
[0045] The verification wafer 128 may include a memory for storing sensor data. The verification wafer 128 may include a power source (e.g., an electrical storage device, a rechargeable battery, etc.). In some embodiments, the verification wafer 128 includes one or more supercapacitors that store electrical energy used to power the verification wafer 128. The supercapacitors may be high-capacitance capacitors with much higher capacitance values than conventional capacitors. In some embodiments, the supercapacitors store 10 to 100 times more electrical energy per unit volume than electrolytic capacitors. In some embodiments, the supercapacitors are rechargeable. The supercapacitors may not contaminate the processing chamber even if they are dropped and damaged in the processing chamber. In some embodiments, the supercapacitors can supply high current for a short period of time. Furthermore, the supercapacitors may not pose a fire hazard even if they are dropped onto a hot chuck in the processing chamber.
[0046] The verification wafer 128 can be charged by a charging assembly in the enclosure system 130 (e.g., FOUP, SSP, etc.). The verification wafer 128 provides sensor data 141, and the corrective action component 123 can determine the state of the processing chamber and / or the state of the verification wafer 128 based on the sensor data 141. For example, the verification wafer 128 provides sensor data 141 (e.g., image data, etc.), and the corrective action component 123 can determine, based on the sensor data 141, whether to perform a corrective action such as replacing the process kit ring. The verification wafer 128 may include whitelisting and / or blacklisting functions so that it can communicate data to appropriate destinations (e.g., client device 120, controller 121, data store 140, enclosure system 130, manufacturing equipment 124, etc.). For example, a whitelist may include a function that allows only specific destination devices (e.g., a specific client device 120, a specific controller 121, a specific data store 140, a specific enclosure system 130, a specific manufacturing equipment 124, etc.) to communicate with a specific verification wafer 128. In some embodiments, under a whitelist scheme, only specific devices can receive data from a specific verification wafer 128. In another example, a blacklist may include a function that prevents a specific destination device from communicating with a specific verification wafer 128. In some embodiments, under a blacklist scheme, a specific device can be prevented from receiving data from a specific verification wafer 128. The verification wafer 128 can communicate wirelessly with remote devices (e.g., a client device 120, a controller 121, a data store 140, an enclosure system 130, a manufacturing equipment 124, etc.). In some embodiments, the verification wafer 128 communicates via WiFi. In some embodiments, the verification wafer 128 communicates via Bluetooth. In some embodiments, the verification wafer 128 includes a wireless (e.g., Bluetooth) interface for communicating with a host device.In another example, the verification wafer 128 provides sensor data 141, and the corrective action component 123 determines, based on the sensor data 141, whether to charge the verification wafer 128 (e.g., electrically) by performing a corrective action. In some embodiments, the sensor data 141 provided by the verification wafer 128 may include image data (e.g., images).
[0047] The client device 120 includes computing devices such as personal computers (PCs), laptops, mobile phones, smartphones, tablet computers, netbooks, network-connected televisions ("smart TVs"), network-connected media players (e.g., Blu-ray players), set-top boxes, over-the-top (OTT) streaming devices, operator boxes, cloud servers, and cloud-based systems (e.g., cloud service devices, cloud network devices). The client device 120 can perform cloud-based operations (e.g., prediction system 110, data store 140, manufacturing equipment 124, enclosure system 130, verification wafer 128, controller 121, etc.). In some embodiments, sensor data 141 is received from the client device 120. In some embodiments, the client device 120 displays a graphical user interface (GUI), through which the user can provide a part of the manufacturing equipment 124 to be inspected (e.g., process kit ring, etc.) as input. In some embodiments, the client device 120 includes a corrective action component 123 for performing one or more methods (see, for example, Figure 5).
[0048] The controller 109 includes one or more computing devices such as rack-mount servers, router computers, server computers, personal computers, mainframe computers, laptop computers, tablet computers, desktop computers, graphics processing units (GPUs), accelerator application-specific integrated circuits (ASICs) (e.g., Tensor Processing Units (TPUs)), cloud servers, and systems stored in one or more clouds. In some embodiments, the controller 109 includes a corrective action component 123 for performing one or more methods (see, for example, Figure 5). In some embodiments, the controller 109 controls a manufacturing apparatus 124. In some embodiments, the controller 109 controls a manufacturing facility including the manufacturing apparatus 124.
[0049] The datastore 140 may be memory (e.g., random access memory), drives (e.g., hard drives, flash drives), database systems, cloud-based systems, or other types of components or devices capable of storing data. The datastore 140 may include multiple storage components (e.g., multiple drives or multiple databases) that can span multiple computing devices (e.g., multiple server computers, multiple clouds, etc.).
[0050] The data store 140 can store sensor data 141 received from the sensor 126, the verification wafer 128, and / or the enclosure system 130. For example, the data store 140 can store sensor data 141 collected by the verification wafer 128 during inspection of the processing chamber. The sensor data 141 may include historical sensor data 142 (e.g., sensor data collected by the verification wafer 128 during historical inspection) and / or current sensor data 143 (e.g., sensor data collected by the verification wafer 128 during current inspection). The historical sensor data 142 can be used to train a machine learning model 190. The current sensor data 143 can be used to determine predictive data 147 (e.g., using the trained machine learning model 190).
[0051] The data store 140 can store performance data 144. The performance data 144 may include historical performance data 145 and current performance data 146. In some embodiments, the corrective action component 123 generates performance data 144 based on sensor data 141. For example, the corrective action component 123 determines performance data 144 indicating whether the process kit ring needs to be replaced (e.g., the process kit ring is defective) based on sensor data 141 which includes image data of the process kit ring located in the processing chamber of the manufacturing apparatus 124. In another example, the corrective action component 123 determines performance data 144 indicating whether the verification wafer 128 needs to be recharged (e.g., the supercapacitor of the verification wafer 128 is undercharged) based on sensor data 141 which includes charge data of the verification wafer 128. In yet another example, the corrective action component 123 determines performance data 144 indicating whether the enclosure system charging assembly battery needs to be recharged (e.g., the enclosure system charging assembly battery is undercharged) based on sensor data 141, which includes charge data for the enclosure system charging assembly battery. In some embodiments, the corrective action component 123 determines the performance data 144 based on user input in response to the sensor data 141 (e.g., the user examines the image data and provides user input indicating that the process kit ring needs to be replaced).
[0052] The data store 140 can store predictive data 147, which may be predictive performance data 144. The corrective action component 123 provides sensor data 141 to the predictive component 114 and receives predictive data from the predictive component 114 indicating the corrective action that needs to be taken. In some embodiments, the corrective action component 123 provides sensor data 141 of image data associated with the installed process kit ring to the predictive component 114, and the predictive component 114 provides predictive data 147 indicating whether the process kit ring needs to be replaced (e.g., the user does not need to inspect the sensor data 141).
[0053] In some embodiments, the prediction system 110 includes server machines 170 and 180. Server machine 170 includes a training set generator 172 that can generate training datasets (e.g., a set of data inputs and a set of target outputs) for training, validating, and / or testing a machine learning model 190. Some operations of the training set generator 172 are described in detail below with reference to Figure 6A. In some embodiments, the training set generator 172 can split the training data into a training set, a validation set, and a test set. In some embodiments, the prediction system 110 generates multiple training datasets.
[0054] The server machine 180 includes a training engine 182, a validation engine 184, a selection engine 186, and / or a test engine 188. An engine can mean hardware (e.g., circuits, dedicated logic, programmable logic, microcode, processing devices, etc.), software (e.g., instructions executed on processing devices, general-purpose computer systems, or dedicated machines, etc.), firmware, microcode, or a combination thereof. The training engine 182 can train a machine learning model 190. The machine learning model 190 can mean a model artifact created by the training engine 182 using training data that includes training inputs and corresponding target outputs (the correct answers for each training input). The training engine 182 can find patterns in the training data that map training inputs to target outputs (predicted answers) and provide a machine learning model 190 that captures these patterns. In some embodiments, the machine learning model 190 uses one or more of the following: support vector machines (SVM), radial-based functions (RBF), clustering, supervised machine learning, semi-supervised machine learning, unsupervised machine learning, k-nearest neighbor algorithm (k-NN), linear regression, supervised regression, random forest, neural networks (e.g., artificial neural networks, etc.).
[0055] The validation engine 184 can validate the trained machine learning models 190 using the corresponding feature sets of the validation set from the training set generator 172. The validation engine 184 can determine the accuracy of each of the trained machine learning models 190 based on the corresponding feature sets of the validation set. The validation engine 184 can discard trained machine learning models 190 that do not meet the threshold accuracy. In some embodiments, the selection engine 186 can select trained machine learning models 190 that meet the threshold accuracy. In some embodiments, the selection engine 186 can select the trained machine learning model 190 with the highest accuracy among the trained machine learning models 190.
[0056] The test engine 188 can test the trained machine learning models 190 using the corresponding feature sets of the test sets from the training set generator 172. For example, a first trained machine learning model 190 trained using the first feature set of the training set can be tested using the first feature set of the test set. Based on the test sets, the test engine 188 can determine which trained machine learning model 190 is the most accurate among all the trained machine learning models.
[0057] The prediction server 112 includes a prediction component 114 that can provide sensor data 141 collected by one or more sensors 126 (for example, sensor data 141 collected by a verification wafer 128 during inspection of a chamber of a manufacturing apparatus 124 such as the processing chamber 107 in Figure 1A) to a trained machine learning model 190, and run the trained machine learning model 190 on the input to obtain one or more outputs.
[0058] The client device 120, controller 109, manufacturing equipment 124, sensor 126, verification wafer 128, enclosure system 130, prediction server 112, data store 140, server machine 170, and / or server machine 180 can be interconnected via network 131. In some embodiments, network 131 is a public network providing client device 120 with access to prediction server 112, data store 140, and other public computing devices. In some embodiments, network 131 is a private network providing client device 120 with access to manufacturing equipment 124, verification wafer 128, enclosure system 130, data store 140, and other private computing devices. Network 131 includes one or more wide area networks (WANs), local area networks (LANs), wired networks (e.g., Ethernet networks), wireless networks (e.g., 802.11 networks or WiFi networks), cellular networks (e.g., Long Term Evolution (LTE) networks), routers, hubs, switches, server computers, cloud computing networks, and / or combinations thereof.
[0059] In some other embodiments, the functions of server machines 170 and 180, as well as the functions of the prediction server 112, may be provided by fewer machines. For example, in some embodiments, server machines 170 and 180 may be integrated into a single machine, while in other or similar embodiments, server machines 170 and 180, like the prediction server 112, may be integrated into a single machine.
[0060] In general, functions described as being performed by server machine 170, server machine 180, and / or prediction server 112 in a single implementation can also be performed by client device 120. Furthermore, functions that belong to a particular component can be performed by different components or multiple components working together.
[0061] In some embodiments, “User” is represented as a single individual (e.g., operator, technician, engineer, etc.). However, in other embodiments of this disclosure, “User” is an entity controlled by multiple users and / or automated sources. For example, a set of individual users integrated as a group of administrators can be considered a “User.”
[0062] Figures 2A and 2B show front views of enclosure system 200 according to a particular embodiment (e.g., enclosure system 130 in Figure 1A). Figure 2C shows a cross-sectional top view of enclosure system 200 according to a particular embodiment. Figure 2D shows a top view of enclosure system 200 according to a particular embodiment. In some embodiments, features having the same reference numbers as those in other figures include the same features and / or functions as those described in other figures. In some examples, enclosure system 200 has the same features and / or functions as enclosure system 130 in Figure 1A. In some embodiments, enclosure system 200 is a side storage pod (e.g., SSP in Figure 1A).
[0063] Referring to Figure 2A, the enclosure system 200 includes walls including side walls 210 (e.g., side walls 210A-B, etc.), one or more rear walls 214 (see rear walls 214A-C in Figure 2C), and a bottom wall 220. The enclosure system 200 includes an enclosure lid 230 (e.g., a removable top wall, etc.) configured to be attached (e.g., top-mounted, side-mounted, etc.) to one or more walls (e.g., one or more side walls 210 and / or one or more rear walls 214, etc.) and encloses at least partially the internal volume of the enclosure system 200. The enclosure lid 230 may be a removable lid for the enclosure system 200. In some embodiments, the enclosure lid 230 is configured to be removablely attached to one or more walls.
[0064] In some embodiments, the enclosure lid 230 includes an overhead transport component 232 (e.g., for transporting the enclosure system 200). In some embodiments, the enclosure system 200 has one or more windows (e.g., an observation window).
[0065] In some embodiments, the support column 240 is coupled to the bottom wall 220 (e.g., via a base connector and one or more fasteners). The support column 240 is detachably coupled to the enclosure lid 230. The support structure 244 is coupled to the support column 240 and / or the wall (e.g., one or more side walls 210 and / or one or more rear walls 214, etc.) (e.g., via fasteners, etc.).
[0066] The support structure 244 is placed within the internal volume of the enclosure system 200. Each set of one or more support structures 244 can be configured to support a corresponding object (e.g., content 113 in Figure 1A, process kit ring, carrier, process kit ring placed on the carrier, verification wafer, etc.).
[0067] In some embodiments, two or more support structures 244 (e.g., two shelves positioned opposite each other, a first shelf positioned close to side wall 210A, and a second shelf positioned close to side wall 210B, etc.) support an object. In some embodiments, the first and second support structures 244 supporting the object are substantially mirror images of each other (e.g., the dimensions of the two support structures are substantially mirror images of each other, etc.).
[0068] In some embodiments, a single support structure 244 (e.g., a single shelf wrapped along one or more rear walls 214 from side wall 210A to side wall 210B) supports the object. In some embodiments, the support structure 244 has a first distal end adjacent to side wall 210A and a second distal end adjacent to side wall 210B. In some embodiments, the support structure 244 is a U-shaped shelf (e.g., wrapping around the rear of the enclosure system 200).
[0069] In some embodiments, each support structure 244 is connected to one or more struts coupled to the bottom wall 220. Each strut can interface detachably with the enclosure lid 230. In some embodiments, each strut can be positioned adjacent to either the side wall 210A or the side wall 210B. In some embodiments, each support structure 244 is connected to one or more of the side walls 210A and / or 210B. In some embodiments, a first set of struts 240 (e.g., a first pair of struts 240, two struts 240, etc.) is coupled to the bottom wall 220 adjacent to the side wall 210A (e.g., via the same base connector, etc.), and a second set of struts 240 (e.g., a second pair of struts 240, two additional struts 240, etc.) is coupled to the bottom wall 220 adjacent to the side wall 210B (e.g., via different base connectors, etc.). A set of support structures 244 (e.g., a pair of shelves, two shelves, a first shelf and a second shelf, a reciprocal shelf, etc.) can be used to support an object (e.g., content 113, etc.). The first support structure 244 can be attached to the first set of support columns 240, and the second support structure 244 can be attached to the second set of support columns 240. The first subset of support structures 244 and the second subset of support structures 244 are oriented in opposite directions from each other within the internal space of the enclosure system 200 (e.g., in mirror images of each other).
[0070] The support structure 244 is configured to support an object such as a carrier 250, one or more process kit rings 252 placed on the carrier 250, a verification wafer 254, and a substrate. In some embodiments, the verification wafer 254 is placed on one or more first support structures 244 (e.g., one or more support structures 244 located closest to the enclosure lid 230). In some embodiments, the carrier is placed on one or more second support structures 244, and one or more process kit rings 252 are placed on the carrier 250 without the process kit rings 252 contacting one or more second support structures 244. Each support structure 244 can form a recess to guide the process kit rings 252 to the correct position on the carrier 250 when the enclosure system 200 is moved (e.g., shaken, moved rapidly). In some embodiments, the verification wafer 254 is placed on one or more upper support structures 244. In some embodiments, the thickness of the verification wafer 254 is less than approximately 10 millimeters (mm). In some embodiments, the diameter of the verification wafer 254 substantially matches the diameter of the substrate (e.g., about 300 mm or about 450 mm).
[0071] In some embodiments, an upper window (e.g., located on the enclosure lid 230) is configured for orientation verification of objects placed within the internal volume (e.g., automatic or manual orientation verification). In some embodiments, a rear window (e.g., located on the rear wall 214) is removable for orientation adjustment of one or more objects (e.g., manual or automatic orientation adjustment).
[0072] In some embodiments, each of the process kit rings 252 has a corresponding flat portion (e.g., a flat internal portion) which can be viewed through the top window, sensors of the enclosure system 200 (e.g., image sensors) and / or sensors of the verification wafer 254 (e.g., image sensors). In some embodiments, each of the process kit rings 252 includes a feature (e.g., a notch, a peripheral notch, a recess, a marking, a top peripheral notch) on the top (or bottom) surface of the process kit ring 252 which can be viewed through the top window and / or sensors of the enclosure system 200 or the verification wafer 254. In some embodiments, each of the flat portions and / or features (e.g., on the top surface) of the process kit rings 252 can be viewed simultaneously (e.g., at the same time) through the top window and / or sensors of the enclosure system 200 or the verification wafer 254. In some embodiments, each carrier 250 has carrier features that are simultaneously visible through the upper window and / or sensors of the enclosure system 200 or the verification wafer 254. In some embodiments, the carrier features of each carrier 250, the upper surface features of each process kit ring 252, and the flat portion of each process kit ring 252 can be simultaneously visible through the upper window and / or sensors of the enclosure system 200 or the verification wafer 254. In response to the flat portion of the process kit ring 252 not being in the correct position, or the carrier features not being in the correct position, the rear window 236 can be removed to adjust the orientation of the process kit ring 252 and / or the carrier 250. In response to the upper features of the process kit ring 252 not being visible through the upper window and / or sensors of the enclosure system 200 or the verification wafer 254 (e.g., not facing upwards, upside down, etc.), the enclosure lid 230 and / or enclosure door can be removed to turn the process kit ring 252 upside down.
[0073] The corresponding top surface of each post 240 can be configured to interface detachably with the corresponding component of the enclosure lid 230. In some embodiments, the corresponding top surface of each post 240 forms a tapered recess configured to receive a tapered projection (e.g., a fastener) coupled to the enclosure lid 230, thereby aligning each post 240 with the enclosure lid 230.
[0074] Each of the one or more support structures 244 may be configured to align objects such as the carrier 250, process kit ring 252, and / or verification wafers 254 (e.g., content 113 in Figure 1A). In some embodiments, each of the one or more support structures 244 includes alignment features and / or surfaces configured to align objects on the one or more support structures 244. If a robotic arm places an object in the wrong position on one or more support structures 244, and / or if the object is moved by transport by the enclosure system 200, the alignment features and / or surfaces align the object to the correct position. In some embodiments, the one or more support structures 244 have holding devices configured to secure objects to the one or more support structures 244.
[0075] In some embodiments, the internal volume of the enclosure system 200 is a mini-environment (e.g., a sealed environment). In some embodiments, the internal volume of the enclosure system 200 is kept substantially particle-free (e.g., substantially uncontaminated). In some embodiments, the enclosure system 200 includes a fan (e.g., on the top) to suppress particles within the internal volume. In some embodiments, one or more of the following are substantially (or completely) absent from the internal volume: moisture, oxygen, particles (e.g., dust).
[0076] One or more walls of the enclosure system 200 form or are coupled to a front interface. The front interface is configured to interface (e.g., to seal) with a transport door of the enclosure system 200 (e.g., to provide a sealed environment). The front interface is configured to interface (e.g., to seal) with a nearly vertical portion of the load port of the substrate processing system. In response to the front interface being sealed to the door or load port, the enclosure system 200 creates a sealed environment (e.g., gases and / or particles do not enter or leave the enclosure system 200 from the ambient environment outside the substrate processing system).
[0077] In some embodiments, the bottom wall 220 includes or is coupled to a base plate (e.g., an adapter plate). The base plate is configured to interface with the horizontal portion of the load port. The base plate has features (e.g., recesses, receptacles, kinematic interfaces, etc.) for receiving motion devices (e.g., kinematic pins, precisely positioned pins, etc.) of the horizontal portion of the load port. In some embodiments, the base plate is fixed to the bottom wall 220 before the enclosure system 200 interfaces with the load port. In some embodiments, the base plate is fixed to the load port, and then the bottom wall 220 is fixed to the base plate. In some embodiments, the enclosure system 200 has seals (e.g., crushable seals, gaskets, etc.) for sealing one or more openings in the bottom wall 220.
[0078] In some embodiments, for transport of the enclosure system 200 (automatic transport, manual transport, etc.), one or more overhead transport components 232 (e.g., overhead transport flanges, etc.) or at least one handle (e.g., handles 212A and 212B, etc.) are coupled to one or more surfaces of the enclosure system 200. In some embodiments, the overhead transport (OHT) components 232 are coupled to (e.g., mounted to) the enclosure lid 230. In some embodiments, a first handle is located on side wall 210A and a second handle is located on side wall 210B.
[0079] In some embodiments, one or more purge adapters are positioned in the bottom wall 220 (e.g., inserted into an opening formed in the bottom wall 220). The purge adapters are used for one or more purposes, such as filling the enclosure system 200 with gas (e.g., nitrogen (N2)), an inert gas, removing gas from the enclosure system, or passing gas through the enclosure system 200. The purge adapters extend through a base plate and fluidly couple to one or more gas or vacuum lines (e.g., for purging the enclosure system 200, for creating a vacuum within the enclosure system 200, for filling the enclosure system 200 with gas, etc.). Each purge adapter provides a seal to the corresponding opening in the bottom wall 220 (e.g., for providing a sealed environment, etc.). In some embodiments, the enclosure system 200 is sealed to the load port in response to being docked to the load port. The internal volume of the enclosure system 200 is configured to be purged via one or more purge adapters before opening the enclosure system 200.
[0080] In some embodiments, the enclosure system 200 includes a charging assembly 225. The charging assembly 225 includes a charging coil 227 positioned on one or more first support structures 244. The charging assembly 225 provides electrical energy to the charging interface 256 of the verification wafer 254. In some embodiments, one or more first support structures 244 are configured to support the verification wafer 254 within a threshold distance of the charging coil 227. In some embodiments, the threshold distance is approximately 5 to 9 millimeters. In some embodiments, the threshold distance is approximately 7 millimeters. In some embodiments, the threshold distance allows a robotic arm (e.g., a transport robotic arm, an EFEM robot, etc.) to lift the verification wafer 254 from one or more support structures 244 and remove the verification wafer 254 from the enclosure system 200 without the top surface of the verification wafer 254 (e.g., the charging interface 256, etc.) coming into contact with the charging coil 227. Furthermore, one or more first support structures 244 can be configured to align the charging interface 256 with the charging coil 227. The charging assembly 225 may include a rechargeable battery that stores electricity to charge the verification wafer 254. The charging assembly 225 may include a lithium-ion battery. The charging assembly 225 may include a battery bank. In some embodiments, the battery of the charging assembly 225 may have a capacity of about 10,000 milliampere-hours. The verification wafer 254 (e.g., the battery of the verification wafer 254) can be charged from the charging coil 227 via inductive charging. The verification wafer 254 can receive charge from the charging coil 227 via the charging interface 256 of the verification wafer 254 (e.g., the coil of the charging interface 256). In some embodiments, the charging assembly 225 can charge the electrical storage device (e.g., battery, supercapacitor, etc.) of the verification wafer 254 via wireless charging (e.g., inductive charging, etc.). Charging of the verification wafer 254 occurs in response to the verification wafer 254 being positioned within a threshold distance of the charging coil 227 and the charging interface 256 being aligned with the charging coil 227.Furthermore, in some embodiments, the verification wafer 254 is charged in response to a command from a controller (e.g., the controller of the charging assembly 225).
[0081] In some embodiments, the charging assembly 225 receives power from an external source (e.g., a wall outlet in a substrate manufacturing facility). In some embodiments, the charging assembly 225 receives power from a substrate processing system (e.g., processing system 100A) via an electrical connection between the enclosure system 200 and an EFEM interface (e.g., load port 129 in Figure 1A). In some embodiments, the charging assembly 225 includes a controller (e.g., a processing device, microcontroller, computing device, etc.). The controller can manage the charging of the verification wafer 254. In some embodiments, the controller tracks the inventory of the enclosure system 200 (e.g., inventory of process kit rings 252, inventory of verification wafers 254, etc.) based on performed maintenance procedures, sensor data (e.g., image data from sensors on the enclosure system 200 and / or verification wafer 254, etc.), and / or user input.
[0082] In some embodiments, the enclosure system 200 includes a radio frequency identifier (e.g., RFID 221) held by an RFID holder 222. RFID 221 can store and / or broadcast data related to the enclosure system 200. For example, RFID 221 can store and / or broadcast data indicating the enclosure type of the enclosure system 200. In another example, RFID 221 can store and / or broadcast data indicating the inventory of the enclosure system 200 (e.g., inventory of process kit rings 252, verification wafers 254, etc.). In some embodiments, the data stored by RFID 221 can be read by an RFID reader (e.g., the RFID reader on the load port 129 in Figure 1A). In some embodiments, the RFID holder 222 holds RFID 221 horizontally or vertically. The RFID holder 222 can hold RFID 221 near the rear wall 214. In some embodiments, the RFID holder 222 is coupled to the bottom wall 220.
[0083] Referring to Figure 2B, in some embodiments, the charging assembly 225 includes a plurality of charging coils 227 (e.g., arranged on one or more corresponding support structures 244). The charging coil 227A is located under the enclosure lid 230 and on one or more support structures 244A configured to support a first object (e.g., a verification wafer 254A). The charging coil 227B may also be located below one or more support structures 244A (e.g., one or more upper support structures). The charging coil 227B is located on one or more support structures 244B configured to support a second object (e.g., a verification wafer 254B). One or more support structures 244B may be configured to support the verification wafer 254B within a threshold distance of the second charging coil 227B. In some embodiments, one or more support structures 244B may be configured to position the verification wafer 254B so that its charging interface 256 aligns with the charging coil 227B. The verification wafer 254B is supported by one or more support structures 244B within a threshold distance from the second charging coil 227B, and can be charged with the charging interface of the verification wafer 254B aligned with the charging coil 227B. In some embodiments, one or more charging coils 227 are supported by a charging assembly support structure 229 (e.g., positioned along a rear wall 214 or a side wall 210). In some embodiments, the charging assembly support structure 229 includes electrical connections for electrically coupling one or more charging coils 227 with the battery of the charging assembly 225.
[0084] Referring to Figure 2C, the verification wafer 254 may include a user interface. In some embodiments, the user interface includes a switch 255 (e.g., an on / off switch) and / or an indicator 257. In some embodiments, the switch 255 is a power switch for the verification wafer 254. For example, setting the switch 255 to the "off" position can turn off the verification wafer 254. Furthermore, setting the switch 255 to the "on" position can turn on the verification wafer 254. In some embodiments, the switch 255 is operated by a user (e.g., a technician, operator, etc.) when the verification wafer 254 is outside the enclosure system 200. In some embodiments, the switch 255 is operated by a user when the verification wafer 254 is supported by one or more support structures 244.
[0085] In some embodiments, the indicator 257 is a light-emitting diode (LED). In some embodiments, the color, flashing pattern, and / or brightness of the indicator 257 vary to indicate the state of the verification wafer 254. For example, in a first state, the indicator 257 may have a first brightness, flashing pattern, and / or color to indicate that the verification wafer 254 is turned on. In a second state, the indicator 257 may have a second brightness, flashing pattern, and / or color to indicate that the verification wafer 254 is in a low-power state. In a third state, the indicator 257 may have a third brightness, flashing pattern, and / or color to indicate to the user that the verification wafer 254 is in an external power state (e.g., the verification wafer 254 is charging). In a fourth state, the indicator 257 may have a fourth brightness, flashing pattern, and / or color to indicate an error (e.g., a data transmission or reception error, a sensor operation error, a data processing error, etc.). In some embodiments, the indicator 257 includes multiple LEDs. Furthermore, in some embodiments, the indicator 257 may include a graphical user interface (GUI). In some embodiments, the switch 255 may be included in the GUI of the verification wafer 254.
[0086] Referring to Figure 2D, in some embodiments, the charging assembly 225 is at least partially located above, below, and / or inside the enclosure lid 230 of the enclosure system 200. In some embodiments, the non-charging enclosure lid can be removed from the enclosure system 200, and the enclosure lid 230 containing the charging assembly 225 can be attached to the enclosure system 200.
[0087] The charging assembly 225 includes a charging coil 227, a battery 231, a controller 233, and / or a switch 235 (e.g., an on / off switch). In some embodiments, the battery 231, the controller 233, and / or associated electronics (e.g., a printed circuit board (PCB), electronic connections, etc.) are substantially housed within the housing of the charging assembly 225. In some embodiments, the charging coil 227 is located on the charging interface 256 of the verification wafer 254. The charging coil 227 can receive power from the battery 231. In some embodiments, the charging coil 227 receives power from the battery 231 via the controller 233. In some embodiments, the switch 235 is an on / off switch (e.g., an on / off switch for the charging assembly 225).
[0088] Figure 3 shows a schematic diagram of a charging assembly 300 of an enclosure system (e.g., charging assembly 225 in Figures 2A-D) according to a specific embodiment. The charging assembly 300 may be the charging assembly of an enclosure system (e.g., enclosure system 130 in Figures 1A-B, enclosure system 200 in Figures 2A-D, etc.). In some embodiments, the charging assembly 300 may be the charging assembly of a side storage pod (e.g., SSP in Figure 1A, etc.). The charging assembly 300 can be configured to supply electrical energy to a verification wafer (e.g., verification wafer 254 in Figures 2A-D, etc.).
[0089] In some embodiments, the charging assembly 300 includes a battery 310 (e.g., battery 231 in Figure 2D), a controller 320 (e.g., controller 233 in Figure 2D), a charging coil 330 (e.g., charging coil 227 in Figures 2A, 2B, and 2D), and a switch 340 (e.g., switch 235 in Figure 2D). In some embodiments, one or more components of the charging assembly 300 are included on or coupled to a PCB. In some embodiments, the charging assembly 300 includes one or more PCBs. The battery 310 can store electrical energy used to charge a verification wafer. In some embodiments, the battery 310 is a rechargeable battery. The battery 310 can receive electrical energy from an external source (e.g., a wall outlet in a substrate manufacturing facility, an electrical connection in an EFEM, etc.). The battery 310 may include one or more sensors for monitoring the state of the battery 310 (e.g., charge state, temperature state, etc.). In some embodiments, the battery 310 is a lithium-ion battery. In some embodiments, the battery 310 can have a maximum capacity of approximately 10,000 milliampere-hours. In some embodiments, the battery 310 is configured to be shipped by air (for example, the battery 310 meets certain specifications such as size, weight, and capacity suitable for air transport).
[0090] In some embodiments, the battery 310 is electrically connected to the charging coil 330 via one or more electrical connections. In some embodiments, the battery 310 is electrically connected to the controller 320, and the charging coil 330 is also electrically connected to the controller 320. In some embodiments, the battery 310 is electrically connected to the controller 320 by a battery ground wire 312 and a battery hot wire 314. The battery hot wire 314 can connect the battery 310 to the first pin of a connector J1 connected to the controller 320 (for example, located on the PCB of the controller 320). The battery ground wire 312 can connect the battery 310 to the second pin of the connector J1. In some embodiments, the battery hot wire 314 and / or the battery ground wire 312 are 26 gauge wires.
[0091] In some embodiments, the charging coil 330 is electrically coupled to the controller 320 by a charging coil hot wire 334 and a charging coil ground wire 332. The charging coil hot wire 334 may be connected to a first pin of a connector J2 coupled to the controller 320 (e.g., located on the PCB of the controller 320). The charging coil ground wire 332 may be connected to a second pin of the connector J2. In some embodiments, the charging coil hot wire 334 carries a current of about 3 to 10 volts in response to the controller 320 charging the verification wafer via the charging coil 330. In some embodiments, the charging coil hot wire 334 carries a current of about 5 volts in response to the controller 320 charging the verification wafer via the charging coil 330. In some embodiments, the charging coil hot wire 334 and / or the charging coil ground wire 332 are 24 gauge wires.
[0092] In some embodiments, the switch 340 is electrically coupled to the controller 320 by a switch hot wire 344 and a switch ground wire 342. The switch hot wire 344 may be connected to the first pin of a connector J3 coupled to the controller 320 (e.g., located on the PCB of the controller 320). The switch ground wire 342 may be connected to the second pin of the connector J3. Furthermore, the switch 340 includes multiple pins. In some embodiments, the first pin 345 of the switch 340 is electrically coupled to the switch ground wire 342. The second pin 346 of the switch 340 is electrically coupled to the switch hot wire 344. The third pin 347 of the switch 340 may be left unconnected. In some embodiments, the switch 340 controls the state of the controller 320. For example, the switch 340 can control the on / off state of the controller 320. In the first position, the third pin 347 of the switch 340 is electrically connected to the first pin 345, and the third pin 347 is electrically grounded. In the second position, the second pin 346 of switch 340 is electrically connected to the first pin 345, and the second pin 346 is electrically grounded. The controller 320 can be turned on and / or off based on the position of switch 340. The controller 320 can be turned on and / or off based on whether the first pin of connector J3 is electrically grounded (for example, whether the switch hot wire 344 is electrically connected to the switch ground wire 342 via the first pin 345 and second pin 346 of switch 340). In some embodiments, switch 340 is a push-button switch. In some embodiments, switch 340 is a single-pole double-throw switch (for example, a switch that has only one input and can be connected to and switched between two outputs). In some embodiments, switch 340 is a toggle switch (for example, an electric switch that is operated by moving a lever back and forth to open and close an electrical circuit). In some embodiments, switch 340 is controlled wirelessly.
[0093] In some embodiments, the enclosure system (e.g., including a charging system 300) has one or more sensors. In some embodiments, the charging system 300 has one or more sensors. In some embodiments, the controller 320 can receive sensor data from the battery 310, the sensors of the enclosure system, the sensors of the charging system 300, and / or the verification wafer. In some embodiments, the controller 320 includes a microcontroller 321 (e.g., a processing device, processor, computing device, etc.). The sensor data may indicate one or more parameters (e.g., the charge level of the battery 310, the lifespan of the battery 310, the total charge cycles of the battery 310, etc.). Based on the received sensor data, the microcontroller 321 can determine the state of the battery 310, the enclosure system, the components of the substrate processing system, and / or the verification wafer. For example, based on sensor data received from one or more battery sensors, the microcontroller 321 can determine that the battery 310 is in a low charge state. In another example, the microcontroller 321 can determine that the verification wafer is in a low charge state based on sensor data received from the verification wafer. In some embodiments, the microcontroller 321 determines the state of one or more components (e.g., process kit ring, processing chamber, etc.) based on sensor data received from the verification wafer. In some embodiments, the microcontroller 321 takes corrective action based on the determined state. For example, the microcontroller 321 may charge the verification wafer (e.g., via the charging coil 330, etc.). In another example, the microcontroller 321 may stop charging the verification wafer based on its determination (e.g., the verification wafer is fully charged, the electrical storage device of the verification wafer is overheating, etc.). In some embodiments, the controller 320 (e.g., the microcontroller 321, etc.) charges the verification wafer in response to the verification wafer being within a threshold distance of the charging coil 330.In some embodiments, the controller 320 charges the verification wafer in response to the verification wafer's charging interface being aligned with the charging coil 330. The controller 320 can start and / or stop the flow of electricity from the battery 310 to the charging coil 330. In some embodiments, the controller 320 adjusts the charging of the verification wafer so that the verification wafer is not undercharged and / or overcharged. In some embodiments, the controller 320 provides warnings based on sensor data. In some embodiments, the controller 320 causes the enclosure system to dock (e.g., to a load port) for a threshold time to charge the battery 310 to a threshold charge level.
[0094] In some embodiments, the charging coil 330 is configured to electrically charge the verification wafer by inductive charging. The charging coil 330 can be energized in response to electricity supplied by the controller 320 (e.g., via the charging coil hot wire 334). The charging coil 330 can wirelessly charge the verification wafer. In some embodiments, the charging coil 330 can wirelessly charge the verification wafer using resonant inductive coupling. The charging coil 330 can wirelessly charge the verification wafer using electromagnetic induction between planar coils (e.g., between the charging coil 330 and the corresponding coil of the verification wafer). In some embodiments, the charging coil 330 can generate an oscillating magnetic field. The oscillating magnetic field can induce an alternating current in a receiving coil (e.g., the coil of the verification wafer) by Faraday's law of induction. In some embodiments, the charging coil 330 wirelessly charges the verification wafer using the Qi standard. When in use, the charging coil 330 can be coupled to the bottom surface of the top wall of the enclosure system.
[0095] Figure 4 shows a side view of a charging assembly 400 of an enclosure system (e.g., charging assembly 225 in Figures 2A-2D, charging assembly 300 in Figure 3, etc.) according to a particular embodiment. In some embodiments, the charging assembly 400 is the charging assembly of a side storage pod (e.g., SSP in Figure 1A, etc.). In some embodiments, a verification wafer is supported by one or more support structures within a threshold distance 460 of the charging coil 430. The upper surface of the verification wafer (e.g., wafer top surface 455, etc.) may be within a threshold distance 460 from the surface of the charging coil 430. The charging coil 430 may be coupled to a charging coil support 432 of an enclosure system (e.g., enclosure system 130 in Figures 1A-1B, enclosure system 200 in Figures 2A-2D, etc.). The charging coil support 432 may be coupled to the lower surface of the lid of the enclosure system. In some embodiments, the charging coil support 432 can be coupled to an enclosure system (e.g., enclosure system 200 in Figure 2B) between one or more support structures (e.g., support structures 244A-F in Figure 2B). To initiate verification charging, in some embodiments, a charging interface 456 is aligned with the charging coil 430. The charging interface 456 may be located within a threshold distance 460 of the charging coil 430. In some embodiments, the threshold distance 460 is approximately 6 to 8 millimeters (mm). In some embodiments, the wafer top surface 455 is located 5 to 6 mm below the charging coil support 432. The thickness of the charging coil support 432 may be approximately 0.5 mm. In some embodiments, the charging coil support 432 is the bottom wall of the charging assembly 400. In some embodiments, the lower surface of the charging coil support 432 is located approximately 5 to 6 mm above the wafer top surface 455. In some embodiments, the wafer top surface 455 is positioned below a threshold distance from the bottom surface of the charging coil support 432, facilitating the robot arm to lift the verification wafer from the support structure and remove the verification wafer from the enclosure system without the wafer top surface 455 contacting the bottom surface of the charging coil support 432.
[0096] Figure 5 shows a flowchart of Method 500 for causing corrective actions (e.g., those related to the enclosure system, the substrate processing system, the verification wafer, etc.) to be performed according to a particular embodiment. In some embodiments, one or more operations of Method 500 are performed by processing logic that may include hardware (e.g., circuits, dedicated logic, programmable logic, microcode, processing devices, etc.), software (e.g., instructions executed by processing devices, general-purpose computer systems, or dedicated machines, etc.), firmware, microcode, or a combination thereof. In some embodiments, Method 500 can be performed at least in part by the prediction system 110 in Figure 1B. In some embodiments, Method 500 can be performed at least in part by the corrective action component 123. In some embodiments, Method 500 can be performed at least in part by the controller of the enclosure system (e.g., the controller 320 in Figure 3, etc.). In some embodiments, Method 500 can be performed at least in part by the verification wafer processing device. In some embodiments, method 500 can be performed at least partially by a controller of the substrate processing system (e.g., controller 109 of processing system 100A in Figure 1A). In some embodiments, method 500 can be performed at least partially by a controller of the substrate processing equipment (e.g., a controller that controls the movement of the enclosure system to a different substrate processing system). In some embodiments, method 500 can be performed at least partially by a controller of the EFEM. Although shown in a specific sequence or order, the order of the processes is changeable unless otherwise specified. Therefore, the illustrated embodiments should be understood as examples only, and the illustrated processes may be performed in a different order, and some processes may be performed in parallel. Furthermore, in various embodiments, one or more processes may be omitted. Therefore, not all processes are used in all embodiments.In some embodiments, a non-temporary storage medium stores instructions that, when executed by a processing device (e.g., a prediction system 110, a server machine 180, a prediction server 112, a manufacturing device 124, a verification wafer 128, an enclosure system 130, a client device 120, a controller 109, etc.), cause the processing device to perform method 500.
[0097] For the sake of simplicity, Method 500 is presented and described as a series of operations. However, the operations according to this disclosure can be performed in various orders and / or simultaneously, and in parallel with other operations not presented and described herein. Furthermore, not all illustrated operations are performed in order to carry out Method 500 in accordance with the disclosed subject matter. Furthermore, those skilled in the art will understand and recognize that Method 500 may be represented as a series of interrelated states via a state diagram or events.
[0098] In block 502, the processing logic (e.g., enclosure system, substrate processing system, substrate processing facility, EFEM, etc.) receives a first subset of sensor data from the verification wafer. In some embodiments, the processing logic receives the first subset via wireless communication.
[0099] In some embodiments, the first subset is associated with at least one charge state of the verification wafer's electrical storage device (e.g., battery, supercapacitor, etc.). In some embodiments, the verification wafer is configured to be transported by a robot of the EFEM of the substrate processing system from one or more support structures (e.g., a pair of shelves, a U-shaped shelf, etc.) located within an internal volume formed by an enclosure system.
[0100] In some embodiments, the first subset may include battery data associated with the charge state of the supercapacitor on the verification wafer (e.g., the charge level of the supercapacitor). In some embodiments, the first subset may include temperature data. For example, the first subset may include temperature data of the electrical storage device (e.g., a supercapacitor) on the verification wafer. In an additional example, the first subset may be associated with the clarity score of one or more images captured by an imaging device (e.g., a camera) on the verification wafer. The clarity score may be an indicator of how many "sharp" edges there are in the image. For example, a higher clarity score indicates the presence of more edges. The clarity score may be unitless. In some embodiments, the first subset may indicate the amount of electricity required to fully charge the verification wafer. In some embodiments, the processing device receives the first subset from the second verification wafer.
[0101] In some embodiments, the first subset includes image data. The image data may be image data associated with a process kit ring placed in a processing chamber associated with an enclosure system. For example, the image data may be associated with the placement and / or state of the process kit ring in the processing chamber. The image data may be associated with the corrosion and / or erosion of the process kit ring as it is exposed to one or more plasma processes over time in the processing chamber.
[0102] The first subset may include one or more of the following: alignment data (e.g., process kit rings placed in the processing chamber), image data (e.g., one or more captured images), light beam data (e.g., laser beam data), vibration data, temperature data, humidity data, process gas data, particle data, pressure data, proximity data, displacement data, impedance data, acoustic data, and placement data.
[0103] In block 504, the processing logic receives a second subset of sensor data from the charging assembly of the enclosure system (e.g., the controller of the charging assembly). In some embodiments, the processing device receives the second subset via wireless communication. In some embodiments, the second subset includes battery data associated with the battery of the charging assembly (e.g., charge data, temperature data, cycle data, aging data, etc.). As an example, the second subset may include data associated with the charge level of the charging assembly battery (e.g., charge state, etc.). In some embodiments, the second subset may be associated with the charge level stored in the battery. In further examples, the second subset may include temperature data associated with the battery (e.g., used to determine if the battery is overheating, etc.). In some embodiments, one or more sensors of the enclosure system (e.g., image sensors, etc.) provide a second subset of sensor data associated with the inventory of the enclosure system. The inventory of the enclosure system may include the quantity and / or location of one or more objects (e.g., verification wafers, process kit rings, etc.) placed on one or more support structures of the enclosure system.
[0104] In some embodiments, the second subset includes identifier data received from an RFID tag of the enclosure system (e.g., RFID221 in Figure 2A). For example, the identifier data may include inventory data of the enclosure system. The identifier data may include data associated with the type of enclosure system. In some embodiments, the identifier data may include data associated with the configuration of the enclosure system.
[0105] In block 506, processing logic causes corrective actions related to the substrate processing system to be performed. In some embodiments, the execution of corrective actions is based on first sensor data. In some embodiments, the execution of corrective actions is based on a first subset and / or a second subset of the first sensor data. In some embodiments, the corrective action includes one or more of the following: providing a notification (e.g., a notification on a GUI associated with the enclosure system that can be viewed by the user), transporting the verification wafer to the enclosure system for charging, maintaining or replacing the verification wafer (e.g., maintaining components of the verification wafer (e.g., cameras, sensors, etc.), replacing components of the verification wafer, replacing the verification wafer, etc.), and / or replacing a process kit ring located in the processing chamber. In some embodiments, the corrective action includes placing the enclosure system at a threshold time charging position to at least partially charge the enclosure system's battery (e.g., the battery of the enclosure system's charging assembly), performing maintenance or replacement on a part of the enclosure system (e.g., repairing and / or replacing the battery of the enclosure system's charging assembly), and / or moving the enclosure system to a predetermined location. In some embodiments, the predetermined location is a load port (e.g., a location adjacent to the EFEM). In some embodiments, the predetermined location is a maintenance location. In some embodiments, the predetermined location is a charging location. In some embodiments, the corrective action includes charging the enclosure system via an electrical connection between the enclosure system and a load port (e.g., one of the EFEM). In some embodiments, the corrective action is associated with a second verification wafer of the enclosure system.
[0106] In some embodiments, the processing logic determines performance data or prediction data based on sensor data, determines corrective actions based on the performance data or prediction data, and causes the corrective actions to be executed. For example, the processing logic may determine, based on sensor data received from the verification wafer, that the charge level of the supercapacitor on the verification wafer is below a predetermined threshold. The processing logic may then determine that the verification wafer needs to be charged (i.e., that the supercapacitor on the verification wafer needs to be charged). The processing logic may then cause the verification wafer to be charged (e.g., by a charging assembly in the enclosure system). The processing logic may also cause a notification to be provided indicating that the verification wafer needs to be charged.
[0107] In another example, processing logic can determine, based on image data from a verification wafer, that a process kit ring located in the processing chamber of a substrate processing system is worn. The processing logic can then determine that the process kit ring needs to be replaced and / or that it will need to be replaced in the future. The processing logic can then be ordered to replace the process kit ring. The processing logic can also be ordered to provide a notification indicating that the process kit ring needs to be replaced.
[0108] In a further example, processing logic may determine that the charge level of the battery in the enclosure system charging assembly is below a predetermined threshold. The processing logic may then determine that the battery needs to be charged. The processing logic can then charge the battery (e.g., via the electrical connection between the enclosure system and the EFEM, or via the electrical connection between the enclosure system and the substrate processing equipment). The processing logic may provide a notification indicating that the battery needs to be charged.
[0109] In some embodiments, the processing logic can determine performance data and / or predictive data by running one or more machine learning models (for example, one or more machine learning models as described with reference to Figures 6A-C below).
[0110] Figures 6A-C are flowcharts of methods 600A-C related to machine learning models (e.g., generating predictive data related to an enclosure system) according to specific embodiments. Methods 600A-C can be executed by hardware (e.g., circuits, dedicated logic, programmable logic, microcode, processing devices, etc.), software (e.g., instructions executed on processing devices, general-purpose computer systems, or dedicated machines, etc.), firmware, microcode, or processing logic including a combination thereof. In some embodiments, methods 600A-C can be partially executed by a prediction system 110. Method 600A can be partially executed by the prediction system 110 (e.g., server machine 170 and training set generator 172 in Figure 1, etc.). The prediction system 110 can use method 600A to generate a dataset for training, validating, or testing at least one of a machine learning model according to embodiments of this disclosure. Method 600B can be executed by server machine 180 (e.g., training engine 182, etc.). Method 600C can be executed by a prediction server 112 (e.g., a prediction component 114). In some embodiments, a non-temporary storage medium, when executed by a processing device (e.g., a prediction system 110, a server machine 180, a prediction server 112, etc.), stores instructions that cause the processing device to execute one or more of Methods 600A to C. In some embodiments, the storage medium is a non-temporary machine-readable storage medium that, when executed by a processing device (e.g., a prediction system 110, a client device 120, etc.), stores instructions that cause the processing device to execute Methods 600A to C.
[0111] For the sake of simplicity, methods 600A–C are presented and described as a series of operations. However, the operations according to this disclosure can be performed in various orders and / or simultaneously, and in parallel with other operations not presented and described herein. Furthermore, not all illustrated operations are performed in order to carry out methods 600A–C according to the disclosed subject matter. Moreover, those skilled in the art will understand and recognize that methods 600A–C may be represented as a series of interrelated states via a state diagram or events.
[0112] Figure 6A is a flowchart of Method 600A for generating a dataset to train a machine learning model (e.g., Model 190 in Figure 1B) to predict performance data related to an enclosure system, according to a specific embodiment.
[0113] Referring to Figure 6A, in some embodiments, in block 601, the processing logic implementation method 600A initializes the training set T to an empty set.
[0114] In block 602, the processing logic generates a first data input (e.g., a first training input, a first validation input, etc.) which can contain sensor data (e.g., sensor data 141 in Figure 1B). In some embodiments, the first data input may contain a first feature set for the data type, and the second data input may contain a second feature set for the data type.
[0115] In block 603, the processing logic generates a first target output for one or more data inputs (e.g., a first data input). In some embodiments, the first target output is performance data (e.g., performance data 144 in Figure 1B).
[0116] In block 604, the processing logic optionally generates mapping data that indicates input / output mappings. Input / output mappings (or mapping data) can represent data inputs (e.g., one or more data inputs as described herein), target outputs of the data inputs, and the relationships between the data inputs and target outputs.
[0117] In block 605, the processing logic, in some embodiments, adds the mapping data generated in block 604 to the dataset T.
[0118] In block 606, the processing logic branches based on whether the dataset T is sufficient for at least one of the training, validation, and / or testing of the machine learning model 190 in Figure 1B. If it is sufficient, execution proceeds to block 607; otherwise, execution returns to block 602. It should be noted that in some embodiments, the sufficiency of dataset T can be determined solely on the number of inputs in the dataset (which in some embodiments are mapped to outputs), while in other embodiments, the sufficiency of dataset T can be determined on one or more other criteria (measures of data example diversity, precision, etc.) in addition to, or instead of, the number of inputs.
[0119] In block 607, the processing logic provides a dataset T (for example, to the server machine 180 in Figure 1B) to train, validate, and / or test the machine learning model 190. In some embodiments, dataset T is a training set and is provided to the training engine 182 of the server machine 180 to perform training. In some embodiments, dataset T is a validation set and is provided to the validation engine 184 of the server machine 180 to perform validation. In some embodiments, dataset T is a test set and is provided to the test engine 188 of the server machine 180 to perform testing.
[0120] Over many training sets, the machine learning model selects appropriate values for parameters that control the number of non-zero coefficients in the low-dimensional model. After block 607, the machine learning model (e.g., machine learning model 190) may be trained using the training engine 182 of server machine 180, validated using the validation engine 184 of server machine 180, or tested using the test engine 188 of server machine 180. The trained machine learning model is run by the prediction component 114 (of prediction server 112) and can generate current performance data 146 for performing corrective actions related to the enclosure system 130 and / or validation wafer 128.
[0121] Figure 6B shows a method 600B, according to a specific embodiment, for training a machine learning model (e.g., model 190 in Figure 1B) to generate predictive data (e.g., associated with an enclosure system).
[0122] Referring to Figure 6B, in block 610 of method 600B, the processing logic receives history sensor data. The history sensor data can be associated with one or more history verification wafers or one or more history enclosure systems. In some embodiments, the history sensor data is associated with an electrical storage device of the history verification wafer. In some embodiments, the history sensor data (e.g., history image data) can be associated with one or more history components of a substrate processing system (e.g., history process kit ring). In some embodiments, the history sensor data is associated with a component located within a processing chamber (e.g., process kit ring). The history sensor data can be obtained by the processing logic from memory (e.g., data store 140 in Figure 1B) rather than directly from the verification wafer.
[0123] In block 612, the processing logic receives historical performance data associated with historical sensor data. In some embodiments, the historical performance data may include corrective actions associated with the historical sensor data. For example, the historical performance data may include a charging action for the verification wafer associated with historical sensor data indicating the charging state of the historical verification wafer. In another example, the historical performance data may include a processing chamber maintenance operation (e.g., replacement of a process kit ring located inside the processing chamber) associated with historical sensor data indicating the state of a chamber component (e.g., a process kit ring). In some embodiments, the historical performance data may include omissions associated with the historical sensor data. For example, the historical performance data may indicate that a corrective action associated with historical sensor data indicating the charging state of the verification wafer was not performed.
[0124] In block 614, the processing logic trains a machine learning model (e.g., model 190 in Figure 1B). The machine learning model is trained with data inputs including historical sensor data. The machine learning model is trained with target output data including historical performance data. In some embodiments, the historical performance data corresponds to corrective actions performed on the processing chamber and / or verification wafer. The training data input to the machine learning model is mapped to the training target output. The machine learning model is trained to predict the predicted data used to perform the corrective actions. In some embodiments, the machine learning model is trained to output predicted performance data (e.g., data indicating one or more corrective actions to be performed).
[0125] In some embodiments, multiple machine learning models may be part of a single composite machine learning model. In this case, training one component of this composite model may include receiving the output from another component of the model as training input to the component of the model being trained.
[0126] In block 616, the machine learning model can be retrained using additional data. The machine learning model can be retrained using data inputs that include sensor data (e.g., a first and / or second subset of first sensor data). The machine learning model can be retrained using target output data that includes performance data. The machine learning model can be retrained to further predict predictive data related to corrective actions to be taken. In some embodiments, the machine learning model can be continuously trained to account for drift in manufacturing equipment, sensors, measuring instruments, verification wafers, etc., and to reflect changes in procedures, recipes, etc.
[0127] Figure 6C shows a method 600C according to a particular embodiment for generating predictive data (e.g., data related to an enclosure system) using a trained machine learning model (e.g., Model 190 in Figure 1B). In some embodiments, the trained machine learning model can be configured to output predictive data (e.g., predictive data related to corrective actions for an enclosure system).
[0128] Referring to Figure 6C, in block 620 of method 600C, the processing logic receives sensor data. The processing logic may receive a first subset of sensor data from the verification wafer and / or a second subset of sensor data from the charging assembly of the enclosure system. The type of sensor data may correspond to that provided in block 610 of Figure 6B for training a machine learning model. Block 620 may be similar to block 502 and / or block 504.
[0129] In block 622, the processing logic provides sensor data as input to a trained machine learning model (e.g., model 190 in Figure 1B). The processing logic can provide one or more of the first subset and / or second subsets as input to the trained machine learning model. The machine learning model can be trained according to the embodiments described with respect to Figures 6A and 6B. For example, the machine learning model is trained to generate predictive data (e.g., data corresponding to one or more corrective actions) as described above.
[0130] In block 624, the processing logic obtains one or more outputs of a machine learning model. In some embodiments, one or more outputs of the machine learning model include predictive data corresponding to one or more corrective actions. In some embodiments, the processing logic determines the predictive data based on one or more outputs of the machine learning model. The predictive data may be predictions of performance data. For example, the predictive data may be associated with a prediction that a supercapacitor (e.g., on a verification wafer) will run out of charge after a certain time or a certain number of cycles (e.g., a verification wafer inspection cycle). In another example, the predictive data may be associated with a prediction that a process kit ring (e.g., on a processing chamber) will wear out beyond a predetermined threshold at a certain time. In some embodiments, one or more outputs of the machine learning model indicate one or more corrective actions to be performed on the processing chamber and / or the verification wafer.
[0131] In block 626, the processing logic determines corrective actions to be taken based on the predicted data. In some embodiments, the processing logic causes the corrective actions associated with the predicted data to be taken. In one example, the processing logic may determine that the supercapacitor of the verification wafer should be charged for a predetermined time or a predetermined number of cycles or less. In another example, the processing logic may determine that the verification wafer should be docked for a longer period of time to receive charge from the enclosure system charging assembly (e.g., within the enclosure system). In yet another example, the processing logic may determine that the process kit ring should be replaced based on the predicted data (e.g., as in the example above).
[0132] In block 628, the processing logic executes corrective actions related to the substrate processing system. Block 628 may be similar to block 506 in Figure 5. For example, the processing logic can cause the supercapacitor of the verification wafer to be charged. In another example, the processing logic can cause the verification wafer to be docked for a longer period of time and receive more charge from the enclosure system charging assembly. In yet another example, the processing logic can cause the process kit ring in the processing chamber to be replaced.
[0133] Figure 7 is a block diagram showing a computer system 700 according to an aspect of the present disclosure. In some embodiments, the computer system 700 is a client device 120 (e.g., Figure 1B). In some embodiments, the computer system 700 is a controller 109 (e.g., Figures 1A-B). In some embodiments, the computer system 700 is a processing device for a verification wafer 128 (e.g., Figure 1B). In some embodiments, the computer system 700 is a processing device for an enclosure system 130 (e.g., a microcontroller 321 in Figures 1A-B and 3). The computer system 700 can incorporate cloud-based functionality.
[0134] In some embodiments, the computer system 700 is connected to other computer systems (for example, via a network such as a local area network (LAN), intranet, extranet, or the Internet). The computer system 700 operates as a server or client computer in a client-server environment, or as a peer computer in a peer-to-peer or distributed network environment. In some embodiments, the computer system 700 is provided by a personal computer (PC), tablet PC, set-top box (STB), personal digital assistant (PDA), mobile phone, web appliance, server, network router, switch or bridge, or any device capable of executing a set of instructions (sequential or otherwise) that specify actions to be performed by such device. Furthermore, the term “computer” includes any set of computers that individually or collectively execute a set (or set) of instructions to perform one or more of the methods described herein.
[0135] In some embodiments, the computer system 700 includes a processing device 702, a volatile memory 704 (e.g., random access memory (RAM)), a non-volatile memory 706 (e.g., read-only memory (ROM) or electrically erasable programmable ROM (EEPROM)), and / or a data storage device 718, which communicate with each other via a bus 708.
[0136] In some embodiments, the processing device 702 is provided by one or more processors, such as a general-purpose processor (e.g., a composite instruction set computing (CISC) microprocessor, a reduced instruction set computing (RISC) microprocessor, a very long instruction word (VLIW) microprocessor, a microprocessor that executes other types of instruction sets, or a microprocessor that executes a combination of multiple types of instruction sets) or a dedicated processor (e.g., an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), a digital signal processor (DSP), or a network processor). In some embodiments, the processing device 702 is provided by one or more, such as a single processing device, multiple processing devices, or a single processing device with multiple processing cores.
[0137] Furthermore, in some embodiments, the computer system 700 includes a network interface device 722 (e.g., coupled to a network 774). In some embodiments, the computer system 700 includes one or more input / output (I / O) devices. Also, in some embodiments, the computer system 700 includes a video display unit 710 (e.g., a liquid crystal display (LCD)), an alphanumeric input device 712 (e.g., a keyboard), a cursor control device 714 (e.g., a mouse), and / or a signal generation device 720.
[0138] In some embodiments, the data storage device 718 (e.g., disk drive storage, fixed and / or removable storage device, fixed disk drive, removable memory card, optical storage, network-attached storage (NAS), and / or storage area network (SAN), etc.) includes a non-temporary computer-readable storage medium 724 that stores instructions 726 for encoding one or more of the methods or functions described herein, including instructions for encoding the components of Figure 1B (e.g., corrective action component 123, etc.) and instructions for performing the methods described herein. In some embodiments, the processing device 702 includes the corrective action component 123. In some embodiments, sensor data 141, performance data 144, and / or predictive data 147 are stored in the data storage device 718.
[0139] In some embodiments, instruction 726 resides entirely or partially in volatile memory 704 and / or processing device 702 while being executed by computer system 700, and therefore, in some embodiments, volatile memory 704 and processing device 702 also constitute a machine-readable storage medium.
[0140] Although the computer-readable storage medium 724 is shown as a single medium in the illustrative examples, the term “computer-readable storage medium” includes a single or multiple mediums (e.g., a centralized or distributed database, and / or associated caches and servers, etc.) that store one or more sets of executable instructions. The term “computer-readable storage medium” also includes tangible media that store or encode sets of instructions for a computer to execute, enabling the computer to perform one or more of the methods described herein. The term “computer-readable storage medium” includes, but is not limited to, solid-state memory, optical media, magnetic media, etc.
[0141] In some embodiments, the methods, components, and features described herein are implemented by separate hardware components or integrated into the functionality of other hardware components such as ASICS, FPGAs, DSPs, or similar devices. In some embodiments, the methods, components, and features are executed by firmware modules or functional circuits within a hardware device. Furthermore, the methods, components, and features are executed by any combination of hardware devices and computer program components, or by a computer program.
[0142] Unless otherwise specified, terms such as “receive,” “cause,” “provide,” “train,” and “determine” mean actions and processes performed or implemented by a computer system to manipulate and convert data represented as physical (electronic) quantities in computer system registers and memory into other data similarly represented as physical quantities in computer system memory or registers, or other information storage, transmission, or display devices. Furthermore, terms such as “first,” “second,” “third,” and “fourth” used herein are intended as labels to distinguish different elements and do not imply numerical order.
[0143] Furthermore, the examples described herein relate to apparatus for carrying out the methods described herein. In some embodiments, the apparatus includes a general-purpose computer system that is specifically constructed for carrying out the methods described herein or is selectively programmed by a computer program stored in the computer system. In some embodiments, such a computer program is stored in a computer-readable tangible storage medium.
[0144] The methods and examples described herein are not inherently related to any particular computer or other device. Various general-purpose systems can be used with the teachings described herein, and more specialized devices can be constructed to perform the methods and / or their individual functions, routines, subroutines, or operations described herein. Examples of the construction of these various systems are described above.
[0145] The foregoing description includes numerous specific details, such as examples of particular systems, components, and methods, to help understand some embodiments of the disclosure. However, it will be obvious to those skilled in the art that at least some embodiments of the disclosure can be implemented without these specific details. In other examples, well-known components or methods are not described in detail or are shown in simple block diagram form to avoid unnecessarily obscuring the disclosure. Thus, the specific details described are merely examples. A particular implementation may differ from these exemplary details and still be considered within the scope of the disclosure.
[0146] Throughout this specification, whenever the terms “embodiment” or “one embodiment” are used, it means that the specific features, structures, or characteristics described in relation to that embodiment are included in at least one embodiment. Therefore, where the phrases “in an embodiment” or “in one embodiment” are used in various places in this specification, they do not necessarily all refer to the same embodiment. Furthermore, the term “or” is inclusive, not exclusive. Where the terms “about” or “approximately” are used in this specification, it means that the nominal values presented are accurate to within ±10%.
[0147] The operations of the methods described herein are shown and explained in a specific order, but the order of operations for each method can be changed so that certain operations are performed in reverse order, and certain operations can be performed at least partially concurrently with other operations. In other embodiments, the instructions or suboperations of separate operations are performed intermittently and / or alternately.
[0148] It should be understood that the above description is illustrative and not limiting. Those skilled in the art will see many other embodiments by reading and understanding the above description. Therefore, the scope of the disclosure should be determined by referring to the appended claims and the entire scope of equivalents to which such claims are entitled.
Claims
[Claim 1] It is an enclosure system, Multiple walls forming an internal volume, the enclosure system comprising walls configured to be coupled to the equipment front-end module (EFEM) of the substrate processing system, A charging assembly having a first charging coil, An enclosure system comprising one or more first support structures disposed within an internal volume below a first charging coil, each first support structure configured to support a first verification wafer within a threshold distance of the first charging coil and to charge the first verification wafer via a charging assembly.