Multilayer electronic components

Abstract

To provide a multilayer electronic component with improved warp resistance. [Solution] A stacked electronic component according to one embodiment of the present invention includes a main body including a capacitance forming section including a dielectric layer and an internal electrode layer, and cover sections disposed on both end faces in a first direction of the capacitance forming section, and an external electrode disposed on the main body, wherein the cover section includes a plurality of dummy electrode layers disposed at a distance from the capacitance forming section in the first direction, the dummy electrode layers are disposed at a distance from each other in a second direction and include a dummy electrode connected to the external electrode, the dummy electrode layer located at the position closest to the capacitance forming section among the plurality of dummy electrode layers is located at a distance of d from the capacitance forming section in the first direction, and when the average dimension of the dielectric layer in the first direction is td, td

Description

[Technical Field]

[0001] This invention relates to a stacked electronic component. [Background technology]

[0002] A multilayer ceramic capacitor (MLCC), a type of multilayer electronic component, is a chip-type capacitor that is mounted on the printed circuit boards of various electronic products such as liquid crystal displays (LCDs) and plasma display panels (PDPs), computers, smartphones, and mobile phones, and plays the role of charging or discharging electricity.

[0003] Such multilayer ceramic capacitors can be used as components in various electronic devices due to their advantages of being small, yet guaranteeing high capacitance, and being easy to implement. As various electronic devices such as computers and mobile devices become smaller and more powerful, the demand for smaller and higher-capacitance multilayer ceramic capacitors is increasing.

[0004] On the other hand, multilayer electronic components need to have improved warpage resistance to ensure stability against external vibrations or shocks. Therefore, warpage resistance is improved by placing electrodes that do not form capacitance in the upper and lower regions of the main body of multilayer electronic components where internal electrodes are not stacked. However, the optimal warpage resistance differs depending on the arrangement shape or position of the electrodes, and increasing the area where electrodes are placed in order to simply improve warpage resistance increases the unit cost of manufacturing the multilayer electronic component, resulting in poor economic efficiency. This problem needs to be solved. [Prior art documents] [Patent Documents]

[0005] [Patent Document 1] Korean Published Patent Gazette No. 10-2019-0066769

Summary of the Invention

Problems to be Solved by the Invention

[0006] One of the various problems to be solved by the present invention is to provide a laminated electronic component with improved warpage strength.

[0007] However, the various problems to be solved by the present invention are not limited to the above-described content, and can be more easily understood in the process of explaining the specific embodiments of the present invention.

Means for Solving the Problems

[0008] A laminated electronic component according to an embodiment of the present invention includes a dielectric layer, a capacitance forming portion including internal electrode layers alternately arranged with the dielectric layer in a first direction, and cover portions arranged on both end faces of the capacitance forming portion in the first direction. The laminated electronic component includes a main body including first and second faces facing each other in the first direction, third and fourth faces connected to the first and second faces and facing each other in a second direction, and fifth and sixth faces connected to the first to fourth faces and facing each other in a third direction, and external electrodes arranged on the main body. The cover portion includes a plurality of dummy electrode layers arranged at a distance from the capacitance forming portion in the first direction. The dummy electrode layers are arranged at a distance from each other in the second direction and include dummy electrodes connected to the external electrodes. Among the plurality of dummy electrode layers, the dummy electrode layer arranged at the position closest to the capacitance forming portion is arranged at a position separated from the capacitance forming portion by a distance d in the first direction. When the average dimension of the dielectric layer in the first direction is td, td < d can be satisfied.

Effects of the Invention

[0009] One of the various effects of the present invention is to improve the warpage strength of the laminated electronic component.

[0010] However, the diverse yet significant advantages and effects of the present invention are not limited to those described above and can be more easily understood in the process of describing specific embodiments of the present invention. [Brief explanation of the drawing]

[0011] [Figure 1] This is a schematic perspective view of a stacked electronic component according to one embodiment of the present invention. [Figure 2] This is a schematic separation perspective view showing the stacked structure of the internal electrode layer according to one embodiment of the present invention. [Figure 3] This figure schematically shows a cross-sectional view along the line I-I' in Figure 1 relating to one embodiment of the present invention. [Figure 4] This is a schematic, separated perspective view showing the laminated structure of the internal electrode layer according to another embodiment of the present invention. [Figure 5] This figure schematically shows a cross-sectional view along the line I-I' in Figure 1 according to another embodiment of the present invention. [Figure 6] This figure schematically shows a cross-sectional view along the line II-II' in Figure 1, according to one embodiment of the present invention. [Modes for carrying out the invention]

[0012] Embodiments of the present invention will be described below with reference to specific embodiments and accompanying drawings. However, embodiments of the present invention can be modified into several other forms, and the scope of the present invention is not limited to the embodiments described below. Furthermore, embodiments of the present invention are provided to give a more complete explanation of the present invention to a person of the ordinary skill. Accordingly, the shapes and sizes of elements in the drawings may be enlarged or reduced (or highlighted or simplified) for a clearer explanation, and elements indicated by the same reference numerals in the drawings are the same elements.

[0013] In the drawings, parts not relevant to the description are omitted in order to clearly describe the present invention. The sizes and thicknesses of the illustrated components are arbitrarily shown for convenience of description, and thus the present invention is not necessarily limited by the drawings. Also, components having the same function within the scope of the same concept are described using the same reference numerals. Further, throughout the specification, when a certain part "includes" a certain component, it means that other components can be further included, rather than excluding other components, unless there is a particularly contrary description.

[0014] In the drawings, the Z direction can be defined as the first direction, the stacking direction or the thickness (T) direction, the X direction as the second direction or the length (L) direction, and the Y direction as the third direction or the width (W) direction.

[0015] Multilayer electronic components FIG. 1 schematically shows a perspective view of a stacked electronic component according to an embodiment of the present invention. FIG. 2 schematically shows a separated perspective view showing the stacked structure of an internal electrode layer according to an embodiment of the present invention. FIG. 3 schematically shows a cross-sectional view taken along the line I-I' of FIG. 1 according to an embodiment of the present invention. FIG. 4 schematically shows a separated perspective view showing the stacked structure of an internal electrode layer according to another embodiment of the present invention. FIG. 5 schematically shows a cross-sectional view taken along the line I-I' of FIG. 1 according to another embodiment of the present invention. FIG. 6 schematically shows a cross-sectional view taken along the line II-II' of FIG. 1 according to an embodiment of the present invention.

[0016] Hereinafter, referring to FIGS. 1 to 6, a stacked electronic component according to an embodiment of the present invention will be described in detail. However, as an example of the stacked electronic component, a multilayer ceramic capacitor will be described, but the present invention can also be applied to various electronic products using a dielectric composition, such as an inductor, a piezoelectric element, a varistor, or a thermistor.

[0017] A stacked electronic component 100 according to an embodiment of the present invention includes a dielectric layer 111, a capacitance forming portion Ac including internal electrode layers alternately arranged with the dielectric layer 111 in a first direction, and cover portions 112 and 113 arranged on both end faces of the capacitance forming portion Ac in the first direction. The stacked electronic component 100 includes a main body 110 having first and second faces 1 and 2 facing each other in the first direction, third and fourth faces 3 and 4 facing each other in a second direction and connected to the first and second faces 1 and 2, and fifth and sixth faces 5 and 6 facing each other in a third direction and connected to the first to fourth faces 1, 2, 3, and 4, and external electrodes 131 and 132 arranged on the main body 110. The cover portions 112 and 113 include a plurality of dummy electrode layers 141 and 142 arranged at a distance from the capacitance forming portion Ac in the first direction. The dummy electrode layers 141 and 142 are arranged at a distance from each other in the second direction and include dummy electrodes 141-1, 141-2, 142-1, and 142-2 connected to the external electrodes 131 and 132. The dummy electrode layers 141 and 142 arranged at the position closest to the capacitance forming portion Ac among the plurality of dummy electrode layers 141 and 142 are arranged at a position separated from the capacitance forming portion Ac by a distance d in the first direction. When the average dimension of the dielectric layer 111 in the first direction is td, td < d can be satisfied.

[0018] The main body 110 may include a capacitance forming portion Ac in which the dielectric layer 111 and the internal electrode layers 121, 122, 221, and 222 are alternately stacked to form a capacitance.

[0019] There is no particular limitation on the specific shape of the main body 110. As shown in the figure, the main body 110 can be formed in a hexahedron shape or a shape similar thereto. Due to the shrinkage of the ceramic particles included in the main body 110 during the firing process, the main body 110 does not have a perfect hexahedron shape with straight lines, but can have a substantially hexahedron shape.

[0020] The main body 110 can have first and second faces 1 and 2 facing each other in the first direction, third and fourth faces 3 and 4 facing each other in a second direction and connected to the first and second faces 1 and 2, and fifth and sixth faces 5 and 6 facing each other in a third direction and connected to the first to fourth faces 1, 2, 3, and 4.

[0021] The plurality of dielectric layers 111 forming the body 110 are in a fired state, and the boundaries between adjacent dielectric layers 111 can be integrated so as to be difficult to confirm without using a Scanning Electron Microscope (SEM).

[0022] The raw material for forming the dielectric layer 111 is not limited as long as sufficient capacitance can be obtained. Generally, a perovskite (ABO3) - based material can be used. For example, a barium titanate - based material, a lead - composite perovskite - based material, or a strontium titanate - based material can be used. The barium titanate - based material can contain BaTiO3 - based ceramic particles. Examples of the ceramic particles include BaTiO3, (Ba 1-x Ca x )TiO3 (0 < x < 1), Ba(Ti 1-y Ca y )O3 (0 < y < 1), (Ba 1-x Ca x )(Ti 1-y Zr y )O3 (0 < x < 1, 0 < y < 1) or Ba(Ti 1-y Zr y )O3 (0 < y < 1), etc.

[0023] Also, various ceramic additives, organic solvents, binders, dispersants, etc. can be added to the raw material for forming the dielectric layer 111 according to the purpose of the present invention to particles such as barium titanate (BaTiO3).

[0024] On the other hand, in order to distinguish from the dielectric layers included in the cover portions 112 and 113 described later, the dielectric layer included in the capacitance forming portion Ac can be defined as the first dielectric layer, and the dielectric layers included in the cover portions 112 and 113 can be defined as the second dielectric layer.

[0025] Furthermore, the first and second dielectric layers can be formed using a dielectric material such as barium titanate (BaTiO3), and can therefore contain a dielectric microstructure after firing. The dielectric microstructure can include a plurality of dielectric crystal grains, grain boundaries arranged between adjacent dielectric crystal grains, and n-weighted points arranged at points where three or more grain boundaries meet, and can contain multiple dielectric crystal grains, grain boundaries, and n-weighted points, respectively.

[0026] The dimension td of the dielectric layer 111 in the first direction does not need to be particularly limited.

[0027] To ensure the reliability of the multilayer electronic component 100 in a high-voltage environment, the dimension td of the dielectric layer 111 in the first direction may be 10.0 μm or less. Furthermore, to achieve miniaturization and high capacitance of the multilayer electronic component 100, the dimension td of the dielectric layer 111 in the first direction may be 3.0 μm or less. To more easily achieve ultra-miniaturization and high capacitance, the dimension td of the dielectric layer 111 in the first direction may be 1.0 μm or less, preferably 0.6 μm or less, and more preferably 0.4 μm or less.

[0028] In this case, the dimension td of the dielectric layer 111 in the first direction may be a concept that includes the dimension td of at least one of the multiple dielectric layers 111 in the first direction, or it may be a concept that includes the dimension td of each of the dielectric layers 111 in the first direction.

[0029] Here, the dimension td of the dielectric layer 111 in the first direction can mean the dimension td of the dielectric layer 111 in the first direction that is positioned between the first and second internal electrodes 121 and 122.

[0030] On the other hand, the dimension td of the dielectric layer 111 in the first direction can mean the dimension, distance, size, or length of the dielectric layer 111 in the first direction, or it can mean the thickness of the dielectric layer 111.

[0031] Furthermore, the dimension td of the dielectric layer 111 in the first direction can mean the average dimension td of one dielectric layer 111 in the first direction, the average dimension td of each of multiple dielectric layers 111 in the first direction, or the average dimension td of multiple dielectric layers 111 in the first direction.

[0032] The average dimension of the dielectric layer 111 in the first direction can be measured by scanning the cross-sections of the main body 110 in the first and second directions with a scanning electron microscope (SEM) at 10,000x magnification. More specifically, the average dimension of a single dielectric layer in the first direction can mean the average value calculated by measuring the dimension in the first direction at five equally spaced points in the second direction of the single dielectric layer in the scanned image. These five equally spaced points can be specified by the capacitance forming section Ac. Furthermore, by extending this average value measurement to three dielectric layers and measuring the average values, the average dimension of multiple dielectric layers in the first direction can be further generalized.

[0033] In one embodiment of the present invention, the internal electrode layer may include a first internal electrode layer and a second internal electrode layer that are alternately arranged facing each other with the dielectric layer 111 in between.

[0034] The first internal electrode layer may include a first internal electrode 121 connected to a first external electrode 131, and the second internal electrode layer may include a second internal electrode 122 connected to a second external electrode 131.

[0035] More specifically, the first internal electrode 121 is separated from the fourth surface 4 and can be exposed through the third surface 3 while in contact with it, and the second internal electrode 122 is separated from the third surface 3 and can be exposed through the fourth surface 4 while in contact with it. The first external electrode 131 is positioned on the third surface 3 of the main body 110 and connected to the first internal electrode 121, and the second external electrode 132 is positioned on the fourth surface 4 of the main body 110 and can be connected to the second internal electrode 122.

[0036] In other words, the first internal electrode 121 is not connected to the second external electrode 132, but can be connected to the first external electrode 131, and the second internal electrode 122 is not connected to the first external electrode 131, but can be connected to the second external electrode 132. In this case, the first and second internal electrodes 121 and 122 can be electrically isolated from each other by a dielectric layer 111 arranged between them in a first direction.

[0037] Here, the main body 110 can be formed by alternately laminating a first ceramic green sheet printed with a paste for the first internal electrode, which will become the first internal electrode 121, and a second ceramic green sheet printed with a paste for the second internal electrode, which will become the second internal electrode 122, and then firing them. The printing method for the conductive pastes for the first and second internal electrodes can be a screen printing method or a gravure printing method, but the present invention is not limited thereto.

[0038] The materials forming the first and second internal electrodes 121 and 122 are not particularly limited, and any material with excellent electrical conductivity can be used. For example, the first and second internal electrodes 121 and 122 may include one or more of nickel (Ni), copper (Cu), palladium (Pd), silver (Ag), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), and alloys thereof.

[0039] In another embodiment of the present invention, the internal electrode layer may include a third internal electrode layer and a fourth internal electrode layer that are alternately arranged facing each other with the dielectric layer 111 in between.

[0040] The third internal electrode layer may include third and fourth internal electrodes 221 and 222, which are spaced apart from each other in a second direction and connected to the first and second external electrodes 131 and 132, respectively, and the fourth internal electrode layer may include a floating electrode 223 that is not connected to the first and second external electrodes 131 and 132.

[0041] More specifically, the third internal electrode 221 can be separated from the fourth surface 4 and exposed through the third surface 3 while in contact with it, and the fourth internal electrode 222 can be separated from the third surface 3 and exposed through the fourth surface 4 while in contact with it. Furthermore, the third internal electrode 221 and the fourth internal electrode 222 can be separated from each other in the second direction and not connected. The first external electrode 131 can be placed on the third surface 3 of the main body 110 and connected to the third internal electrode 221, and the second external electrode 132 can be placed on the fourth surface 4 of the main body 110 and connected to the fourth internal electrode 222.

[0042] In other words, the first internal electrode 121 is not connected to the second external electrode 132, but can be connected to the first external electrode 131, and the second internal electrode 122 is not connected to the first external electrode 131, but can be connected to the second external electrode 132. In this case, the first and second internal electrodes 121 and 122 are separated in the second direction, thereby electrically separating them from each other.

[0043] Furthermore, the floating electrode 223 does not need to be separated from the third and fourth surfaces 3 and 4 and connected to the first and second external electrodes 131 and 132.

[0044] Furthermore, the third internal electrode layer, which includes the first and second internal electrodes 121 and 122, and the fourth internal electrode layer, which includes the floating electrode 223, can be electrically isolated from each other by a dielectric layer 111 arranged between the first directions.

[0045] Here, the main body 110 can be formed by alternately laminating a first ceramic green sheet printed with pastes for the third and fourth internal electrodes 221 and 222, and a second ceramic green sheet printed with paste for the floating electrode 223, and then firing them. The printing method for the conductive pastes for the third and fourth internal electrodes and the paste for the floating electrode can be a screen printing method or a gravure printing method, but the present invention is not limited thereto.

[0046] The materials forming the third and fourth internal electrodes 221, 222 and the floating electrode 223 are not particularly limited, and any material with excellent electrical conductivity can be used. For example, the third and fourth internal electrodes 221, 222 and the floating electrode 223 may include one or more of nickel (Ni), copper (Cu), palladium (Pd), silver (Ag), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), and alloys thereof.

[0047] On the other hand, the dimensions of the internal electrode layer in the first direction do not need to be particularly limited.

[0048] In the following, the description of the dimensions of the internal electrode layers in the first direction may refer to the dimensions of the first and second internal electrode layers or the third and fourth internal electrode layers in the first direction, and more specifically, it may refer to one dimension te1 of the first internal electrode 121 and the second internal electrode 122, or one dimension te1 of the third internal electrode 221 and the fourth internal electrode 222, or one dimension te3 of the floating electrode 223 in the first direction.

[0049] To ensure the reliability of the multilayer electronic component 100 in a high-voltage environment, the dimensions te1 and te3 of the internal electrode layer in the first direction may be 3.0 μm or less. Furthermore, to achieve miniaturization and high capacitance of the multilayer electronic component 100, the dimensions te1 and te3 of the internal electrode layer in the first direction may be 1.0 μm or less. To more easily achieve ultra-miniaturization and high capacitance, the dimensions te1 and te3 of the internal electrode layer in the first direction may be 0.6 μm or less, and more preferably 0.4 μm or less.

[0050] In this case, the dimensions te1 and te3 of the internal electrode layer in the first direction may be a concept that includes the dimensions te1 and te3 of at least one of the multiple internal electrode layers in the first direction, or it may be a concept that includes the thicknesses te1 and te3 of all internal electrode layers.

[0051] On the one hand, the dimensions te1 and te3 of the internal electrode layer in the first direction can mean the dimension, distance, size, or length of the internal electrode layer in the first direction, or can mean the thickness of the internal electrode layer. Also, the dimensions te1 and te3 of the internal electrode layer in the first direction can mean the average dimension te1 and te3 of the internal electrode layer in one first direction, or can mean the average dimensions te1 and te3 of the internal electrode layers in the first direction.

[0052] The average dimension of the internal electrode layer in the first direction can be measured by scanning an image of the cross-section of the main body 110 in the first and second directions with a scanning electron microscope (SEM) at a magnification of 10,000 times. More specifically, the average dimension of one internal electrode layer in the first direction may be an average value calculated by measuring the dimensions in the first direction at five equally spaced points in the second direction for one internal electrode layer in the scanned image. The five equally spaced points can be specified by the capacitance forming portion Ac. Also, when such average value measurement is extended to three internal electrode layers to measure the average value, the average dimensions of the internal electrode layers in the first direction can be further generalized. Here, the internal electrode layer can mean one of the first internal electrode, the second internal electrode, the third internal electrode, the fourth internal electrode, or the floating electrode, and an ordinary technician can measure the dimension in the first direction or the average dimension in the first direction of each of the first internal electrode, the second internal electrode, the third internal electrode, the fourth internal electrode, or the floating electrode.

[0053] On the one hand, in one embodiment of the present invention, the average dimension td in the first direction of at least one of the plurality of dielectric layers and the average dimensions te1 and te3 in the first direction of at least one of the plurality of internal electrode layers can satisfy 2×te1 < td or 2×te3 < td.

[0054] In other words, the average dimension td in the first direction of one dielectric layer may be even larger than twice the average dimension te1 and te3 in the first direction of one internal electrode layer. Preferably, the average dimension td in the first direction of the plurality of dielectric layers may be even larger than twice the average dimensions te1 and te3 in the first direction of the plurality of internal electrode layers.

[0055] Generally, the main issue with high-voltage electrical components is reliability problems caused by a decrease in the breakdown voltage (BDV) under high-voltage environments.

[0056] Therefore, in order to prevent a decrease in dielectric breakdown voltage under high-voltage conditions, the dielectric breakdown voltage characteristics can be improved by making the average dimension td of the dielectric layer in the first direction larger than twice the average dimensions te1 and te3 of the internal electrode layer in the first direction.

[0057] If the average dimension td of the dielectric layer in the first direction is less than or equal to twice the average dimensions te1 and te3 of the internal electrode layers in the first direction, the dielectric breakdown voltage may decrease, and a short circuit between the internal electrode layers may occur.

[0058] On the other hand, the main body 110 may include cover portions 112 and 113 that are positioned on both end surfaces (end-surfaces) of the capacity forming portion Ac in the first direction.

[0059] Specifically, it may include a first cover portion 112 positioned on one end face of the volume-forming portion Ac in the first direction and a second cover portion 113 positioned on the other end face of the volume-forming portion Ac in the first direction. More specifically, for example, it may include a first cover portion 112 positioned on the upper part of the volume-forming portion Ac in the first direction and a second cover portion 113 positioned on the lower part of the volume-forming portion Ac in the first direction.

[0060] The first cover portion 112 and the second cover portion 113 can be formed by arranging or stacking a single second dielectric layer or two or more second dielectric layers in a first direction on the upper and lower surfaces of the capacitance forming portion Ac, respectively, and can essentially play a role in preventing damage to the internal electrode layer due to physical or chemical stress.

[0061] The first cover portion 112 and the second cover portion 113 do not include an internal electrode layer and may contain the same dielectric material as the first dielectric layer 111 of the capacitance forming portion Ac. That is, the first cover portion 112 and the second cover portion 113 may contain a dielectric material, for example, a barium titanate (BaTiO3) based dielectric material.

[0062] Furthermore, the dimension tc of the cover portions 112 and 113 in the first direction does not need to be particularly limited, and in the following description of the dimension tc of the cover portions 112 and 113 in the first direction, it may mean the dimension tc of the first cover portion 112 and the second cover portion 113, respectively.

[0063] However, in order to more easily achieve miniaturization and high capacitance of stacked electronic components, the dimension tc of the cover portions 112 and 113 in the first direction may be 400 μm or less, 380 μm or less, 200 μm or less, 100 μm or less, 50 μm or less, 30 μm or less, or 20 μm or less. The lower limit is not particularly limited, but may be 5 μm or more, 10 μm or more, 20 μm or more, 30 μm or more, 50 μm or more, or 100 μm or more.

[0064] Furthermore, the dimension tc of the cover portions 112 and 113 in the first direction may mean the average dimension tc of the first and second cover portions 112 and 113 in the first direction, or it may mean the average dimension tc of the first and second cover portions 112 and 113 in the first direction.

[0065] The average dimensions of the cover portions 112 and 113 in the first direction can be measured by scanning the cross-sections of the main body 110 in the first and second directions with a scanning electron microscope (SEM) at 10,000x magnification. More specifically, this can mean the average value calculated by measuring the dimensions in the first direction at five equally spaced points in the second direction within the scanned image of one cover portion.

[0066] In addition, the average dimension in the first direction of the cover portions 112 and 113 measured by the method described above can have substantially the same value as the average dimension in the first direction of the cover portions 112 and 113 in the cross-sections of the main body 110 in the first and third directions.

[0067] On the other hand, for a multilayer electronic component, it is necessary to improve the warping strength in order to ensure stability against external vibration or impact. Therefore, electrodes or the like that do not form a capacitance are arranged in the upper and lower region of the main body of the multilayer electronic component where the internal electrodes are not laminated to improve the warping strength. However, the optimal warping strength varies depending on the arrangement shape or position of the electrodes. When the region where the electrodes are arranged is increased for simply improving the warping strength, there is a problem that the unit manufacturing cost of the multilayer electronic component increases and the economic efficiency deteriorates. Therefore, it is necessary to solve this problem.

[0068] Therefore, in one embodiment of the present invention, the cover portions 112 and 113 include a plurality of dummy electrode layers 141 and 142 arranged at a distance from the capacitance forming portion Ac in the first direction. The dummy electrode layers 141 and 142 are arranged at a distance from each other in the second direction and include dummy electrodes 141-1, 141-2, 142-1, and 142-2 connected to the external electrodes 131 and 132. The dummy electrode layers 141 and 142 arranged at the position closest to the capacitance forming portion Ac among the plurality of dummy electrode layers 141 and 142 are arranged at a position separated by a distance d in the first direction from the capacitance forming portion Ac. When the average dimension in the first direction of the dielectric layer 111 is td, td < d can be satisfied.

[0069] Here, the dummy electrode layers 141 and 142 arranged at the position closest to the capacitance forming portion Ac among the plurality of dummy electrode layers 141 and 142 can mean the dummy electrode layers 141 and 142 arranged at the position closest to the internal electrode layer arranged in the outermost layer in the first direction among the capacitance forming portion Ac in the first direction. The dimension in the first direction between the internal electrode layer arranged in the outermost layer in the first direction of the capacitance forming portion Ac and the dummy electrode layers 141 and 142 can be set as d.

[0070] Here, the cover portions 112 and 113 can be formed by alternately laminating a third ceramic green sheet on which no dummy electrode paste is printed and a fourth ceramic green sheet on which the dummy electrode paste is printed, and then firing. At this time, it is also possible to continuously laminate the fourth ceramic green sheet on which the dummy electrode paste is printed and then fire. In this case, a plurality of dummy electrode layers 141 and 142 may be included with the second dielectric layer interposed therebetween with respect to the first direction.

[0071] At this time, as a method for printing the dummy electrode paste, a screen printing method, a gravure printing method, or the like can be used, but the present invention is not limited thereto.

[0072] Here, the lower limit value of the interval d at which the dummy electrode layers 141 and 142 are separated from the capacitance forming portion Ac may be larger than one average thickness td of the dielectric layer 111. That is, td < d can be satisfied.

[0073] When the interval d at which the dummy electrode layers 141 and 142 disposed at the position closest to the capacitance forming portion Ac among the plurality of dummy electrode layers 141 and 142 are separated from the capacitance forming portion Ac in the first direction is larger than the average dimension td in the first direction of the dielectric layer (td < d), the influence on the dummy electrode layers 141 and 142 from the current applied to the internal electrode layers 121 and 122 can be minimized, and thus it is possible to prevent a short failure of the unintended multilayer electronic component 100.

[0074] On the other hand, the plurality of dummy electrode layers 141 and 142 can be disposed at positions separated from the capacitance forming portion Ac by 42% or more and 71% or less among the cover portions 112 and 113.

[0075] That is, the plurality of dummy electrode layers 141 and 142 can be disposed within a region separated from the capacitance forming portion Ac by 42% or more and 71% or less among the cover portions 112 and 113.

[0076] To give a more specific example of the positions where the dummy electrode layers 141 and 142 are separated from the capacitance forming portion Ac in the first direction, if the average thickness of the cover portions 112 and 113, which are arranged on both end faces of the capacitance forming portion Ac in the first direction, is 380 μm, then it can be said that the dummy electrode layers 141 and 142 are arranged at a position where they are separated from the inner electrode layers 121 and 122, which are arranged on the outermost layers in both directions of the capacitance forming portion Ac, by 160 μm (42%) to 270 μm (71%) in the first direction.

[0077] By positioning the dummy electrode layers 141 and 142 at a distance of 42% to 71% from the capacitance forming portion Ac with respect to the first direction, the warpage strength of the stacked electronic component 100 can be further improved.

[0078] If the dummy electrodes 141 and 142 are positioned at a distance of less than 42% from the capacitance forming portion Ac with respect to the first direction, a short-circuit failure problem may occur in the stacked electronic component 100, or the effect of improving warpage strength may not be sufficiently improved. If the dummy electrodes 141 and 142c are positioned at a distance of more than 71% from the capacitance forming portion Ac with respect to the first direction, the warpage strength can be sufficiently improved, but if excessive external force is applied, the dummy electrodes 141 and 142 may break, making it difficult to ensure reliable mechanical strength, or the dummy electrodes 141 and 142 may be oxidized due to moisture penetration from the outside, and surface arcing may occur on a surface adjacent to one of the main body 110, for example, the first and second surfaces, where the dummy electrode layers 141 and 142 are located.

[0079] In this case, to improve warpage strength, it is sufficient for the dummy electrode layers 141 and 142 to be included in the cover portions 112 and 113, and they do not need to be included in all of the cover portions 112 and 113. However, placing the dummy electrode layers in the cover portion closer to the mounting surface can more effectively improve warpage strength.

[0080] For example, dummy electrode layers 141 and 142 can be placed on at least one of the first cover portion 112 located at the top of the capacitance forming portion Ac in the first direction and the second cover portion 113 located at the bottom in the second direction, preferably on the second cover portion 113. However, the arrangement is not limited to this, and if dummy electrode layers 141 and 142 are placed on all of the first and second cover portions 112 and 113, the warpage strength can be further improved.

[0081] In this case, the dummy electrode layer included in the first cover portion 112 can be designated as the first dummy electrode layer 141, and the dummy electrode layer included in the second cover portion 113 can be designated as the second dummy electrode layer 142. The first cover portion 112 can include a plurality of first dummy electrode layers 141 arranged spaced apart from each other in a first direction, and the second cover portion 113 can include a plurality of second dummy electrode layers 142 arranged spaced apart from each other in a first direction.

[0082] To give a more specific example of the dummy electrode layers 141 and 142, the dummy electrode layers 141 and 142 may include dummy electrodes 141-1, 141-2, 142-1, and 142-2 that are spaced apart from each other in a second direction and connected to the external electrodes 131 and 132.

[0083] In this case, the first dummy electrode layer 141 may include 1-1 and 1-2 dummy electrodes 141-1 and 141-2, respectively, which are connected to the first and second external electrodes 131 and 132, and the second dummy electrode layer 142 may include 2-1 and 2-2 dummy electrodes 142-1 and 142-2, respectively, which are connected to the first and second external electrodes 131 and 132.

[0084] Specifically, the first-first dummy electrode 141-1 can be separated from the fourth surface 4, exposed through the third surface 3 while in contact with it, and can be connected to the first external electrode 131 located on the third surface 3. The first-second dummy electrode 141-2 can be separated from the third surface 3, exposed through the fourth surface 4 while in contact with it, and can be connected to the second external electrode 132 located on the fourth surface 4.

[0085] The second-first dummy electrode 142-1 is separated from the fourth surface 4, can be exposed through the third surface 3 while in contact with it, and can be connected to the first external electrode 131 located on the third surface 3. The second-second dummy electrode 142-2 is separated from the third surface 3, can be exposed through the fourth surface 4 while in contact with it, and can be connected to the second external electrode 132 located on the fourth surface 4.

[0086] On the other hand, as described above, the dummy electrode layers 141 and 142 may include a plurality of dummy electrode layers 141 and 142 that are spaced apart from each other in the first direction.

[0087] In this case, the meaning that multiple dummy electrode layers 141 and 142 are arranged spaced apart from each other in the first direction can be interpreted as including dummy electrode layers 141 and 142 that are arranged alternately in the first direction with the second dielectric layer of the cover in between.

[0088] In other words, the first cover portion 112 can include a plurality of first dummy electrode layers 141 that are alternately arranged in the first direction with the second dielectric layer in between, and the second cover portion 113 can include a plurality of second dummy electrode layers 142 that are alternately arranged in the first direction with the second dielectric layer in between.

[0089] The warpage strength can be more effectively improved by including multiple first and second dummy electrode layers 141 and 142 in each of the first and second cover portions 112 and 113, respectively. In this case as well, all of the multiple first and second dummy electrode layers 141 and 142 can be positioned or located within a region of the cover portions 112 and 113 that is 42% to 71% away from the capacitance forming portion Ac with respect to the first direction.

[0090] On the other hand, the materials used to form the dummy electrode layers 141 and 142 are not particularly limited, and the same materials as those used for the internal electrode layers can be used. For example, the dummy electrode layers 141 and 142 may include one or more of the following: nickel (Ni), copper (Cu), palladium (Pd), silver (Ag), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), and alloys thereof.

[0091] However, this is not a limitation, and the dummy electrode layers 141 and 142 can be made of different materials than the internal electrode layers.

[0092] More specifically, the internal electrode layer may contain a first conductive metal as its main component, and the dummy electrode layers 141 and 142 may contain a second conductive metal as their main component, and the first and second conductive metals may be different conductive metals from each other.

[0093] In this case, the second conductive metal may have at least one of the following properties: tensile strength and Young's modulus, which is higher than that of the first conductive metal. Depending on the environment in which the multilayer electronic component 100 is used, a material with at least one of the following properties: tensile strength and Young's modulus, which is higher than that of the first conductive metal, can be used as the second conductive metal.

[0094] For example, if the first conductive metal is nickel (Ni), the second conductive metal may be at least one of tungsten (W), titanium (Ti), palladium (Pd) alloys, and platinum (Pt) alloys, which have a higher tensile strength than nickel (Ni). Here, palladium (Pd) alloys can mean all alloys containing palladium (Pd) that have a higher tensile strength than nickel (Ni), and platinum (Pt) alloys can include all alloys containing platinum (Pt) that have a higher tensile strength than nickel (Ni).

[0095] As yet another example, if the first conductive metal is nickel (Ni), the second conductive metal may be at least one of tungsten (W), titanium (Ti), palladium (Pd), and platinum (Pt), all of which have a higher elastic modulus than nickel (Ni).

[0096] The example given was that the first conductive metal is nickel (Ni), but the explanation is not limited to this, and the second conductive metal is not limited to the metals mentioned above.

[0097] On the other hand, the stacked electronic component 100 may include side margin regions 114 and 115, which are the end regions in the third direction of the internal electrode layer.

[0098] More specifically, the side margin regions 114 and 115 may include a first side margin region 114 located between the internal electrode layer and the fifth surface 5, and a second side margin region 115 located between the internal electrode layer and the sixth surface 6.

[0099] As shown in the figure, the side margin regions 114 and 115 can refer to the regions between the interface between the ends of the internal electrode layer in the third direction and the interface of the main body 110, with respect to the cross-sections of the main body 110 in the first and third directions.

[0100] The side margin regions 114 and 115 can refer to the ceramic green sheet region excluding the internal electrode layer when the paste for the internal electrode layer is applied to the ceramic green sheet applied to the volume-forming portion Ac, excluding the areas that will become the side margin regions 114 and 115.

[0101] The side margin regions 114 and 115 can essentially serve to prevent damage to the internal electrode layer due to physical or chemical stress.

[0102] The first side margin region 114 and the second side margin region 115 do not include an internal electrode layer and may contain the same material as the first dielectric layer 111, for example, they may correspond to a part of the first dielectric layer 111. That is, the first side margin region 114 and the second side margin region 115 may contain dielectric material, for example, barium titanate (BaTiO3) based dielectric material.

[0103] Furthermore, the dimension wm in the third direction of the side margin regions 114 and 115 does not need to be particularly limited, and in the following description of the dimension wm in the third direction of the side margin regions 114 and 115, it can refer to the dimension wm in the third direction of the first side margin region 114 and the second side margin region 115, respectively.

[0104] However, in order to more easily achieve miniaturization and high capacitance of the stacked electronic component 100, the dimension wm in the third direction of the side margin regions 114 and 115 can be 50 μm or less, preferably 30 μm or less, and more preferably 20 μm or less for ultra-small products.

[0105] Furthermore, the third-direction dimension wm of the side margin regions 114 and 115 can mean the average dimension wm of the third direction of the first and second side margin regions 114 and 115, respectively, or the average dimension wm of the third direction of the first and second side margin regions 114 and 115.

[0106] The average dimensions of the side margin regions 114 and 115 in the third direction can be measured by scanning the cross-sections of the main body 110 in the first and third directions with a scanning electron microscope (SEM) at 10,000x magnification. More specifically, it can mean the average value calculated by measuring the dimensions in the third direction at five equally spaced points in the first direction in an image scanned from one side margin region.

[0107] One embodiment of the present invention describes a structure in which a stacked electronic component 100 has two external electrodes 131 and 132, but the number and shape of the external electrodes 131 and 132 can be changed depending on the shape of the internal electrode layer and other purposes.

[0108] External electrodes 131 and 132 can be placed on the main body 110 and connected to the internal electrode layer.

[0109] More specifically, the external electrodes 131 and 132 may include first and second external electrodes 131 and 132 that are arranged on the third and fourth surfaces 3 and 4 of the main body 110, respectively, and connected to the internal electrode layer.

[0110] More specifically, in one embodiment of the present invention, the first and second external electrodes 131 and 132 can be connected to the first and second internal electrodes 121 and 122, respectively, which are contained in the first and second internal electrode layers. Furthermore, in another embodiment of the present invention, the first and second external electrodes 131 and 132 may be connected to the third and fourth internal electrodes 221 and 222, respectively, which are contained in the third internal electrode layer.

[0111] Furthermore, the external electrodes 131 and 132 may extend and be arranged on parts of the first and second surfaces 1 and 2 of the main body 110, or on parts of the fifth and sixth surfaces 5 and 6 of the main body 110. That is, the first external electrode 131 can be arranged on the third surface 3 of the main body 110 and on parts of the first, second, fifth, and sixth surfaces 1, 2, 5, and 6 of the main body 110, and the second external electrode 132 can be arranged on the fourth surface 4 of the main body 110 and on parts of the first, second, fifth, and sixth surfaces 1, 2, 5, and 6 of the main body 110.

[0112] The external electrodes 131 and 132 can be formed using any material that has electrical conductivity, such as metal, and the specific material can be determined by considering electrical properties, structural stability, etc. Furthermore, they can have a multilayer structure.

[0113] The conductive metals included in the external electrodes 131 and 132 can be materials with excellent electrical conductivity. For example, the conductive metals may include one or more selected from the group consisting of nickel (Ni), copper (Cu), palladium (Pd), silver (Ag), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), and alloys thereof, but are not particularly limited to these.

[0114] Furthermore, the external electrodes 131 and 132 may include an electrode layer placed on the main body 110 and a plating layer placed on the electrode layer.

[0115] In this case, the electrode layer may include at least one of the first electrode layers 131a, 132a arranged on the main body 110, and the second electrode layers 131b, 132b arranged on the first electrode layers 131a, 132a.

[0116] The plating layers 131c and 132c may include, but are not limited to, a first plating layer disposed on at least one of the first and second electrode layers, and at least one second plating layer disposed on the first plating layer. The drawings of the present invention show a case where the plating layer has one layer, but are not limited to this, and can include a structure in which multiple plating layers are stacked and arranged. The details of the electrode layers and plating layers will be described in more detail below.

[0117] The electrode layer may be formed by transferring a sheet containing a conductive metal onto the main body 110. Alternatively, it may be formed by applying a conductive paste for external electrodes containing a conductive metal to the main body 110 and then firing it, or by a dipping method in which the main body 110 is immersed in a conductive paste for external electrodes containing a conductive metal, but is not particularly limited to these methods.

[0118] The first electrode layers 131a and 132a may contain a third conductive metal and glass, and the second electrode layers 131b and 132b may contain a fourth conductive metal and resin.

[0119] The glass contained in the first electrode layers 131a and 132a can improve bonding with the main body 110, and the resin contained in the second electrode layers 131b and 132b can improve warp resistance.

[0120] The third conductive metal contained in the first electrode layers 131a and 132a and the fourth conductive metal contained in the second electrode layers 131b and 132b may be the same or different from each other. If the first and second electrode layers 131a, 132a, 131b, and 132b contain multiple conductive metals, they may contain conductive metals that are only partially the same, but are not particularly limited thereto.

[0121] The third conductive metal contained in the first electrode layers 131a and 132a can serve to electrically connect with the internal electrodes of the internal electrode layers.

[0122] The third conductive metal contained in the first electrode layers 131a and 132a is not particularly limited as long as it is a material that can be electrically connected to the internal electrodes of the internal electrode layers, and may include, for example, at least one of nickel (Ni), copper (Cu), palladium (Pd), silver (Ag), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), and alloys thereof.

[0123] The fourth conductive metal contained in the second electrode layers 131b and 132b can serve to electrically connect with the first electrode layers 131a and 132a.

[0124] The fourth conductive metal contained in the second electrode layers 131b and 132b is not particularly limited as long as it is a material that can be electrically connected to the first electrode layers 131a and 132a, and may include at least one of nickel (Ni), copper (Cu), palladium (Pd), silver (Ag), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), and alloys thereof.

[0125] The fourth conductive metal contained in the second electrode layers 131b and 132b may include at least one of spherical particles and flake-shaped particles. That is, the fourth conductive metal may consist only of flake-shaped particles, only of spherical particles, or in a mixed form of flake-shaped and spherical particles. Here, spherical particles may include forms that are not perfectly spherical, for example, forms in which the ratio of the length of the long axis to the short axis (long axis / short axis) is 1.45 or less. Flake-shaped particles mean particles having a flat and elongated shape, but are not particularly limited, for example, the ratio of the length of the long axis to the short axis (long axis / short axis) may be 1.95 or more. The lengths of the long axis and short axis of the spherical particles and flake-shaped particles can be measured from images obtained by scanning the cross-sections in the first and second directions, which are cut in the central part in the third direction of the stacked electronic component, with a scanning electron microscope (SEM).

[0126] The resin contained in the second electrode layers 131b and 132b is not particularly limited as long as it can perform the role of ensuring bonding and shock absorption and can be mixed with the fourth conductive metal particles to form a paste, for example, it can include epoxy resins.

[0127] Furthermore, the second electrode layers 131b and 132b may contain an intermetallic compound.

[0128] The inclusion of an intermetallic compound can further improve the electrical connectivity with the first electrode layers 131a and 132a. The intermetallic compound plays a role in improving electrical connectivity by linking multiple fourth conductive metal particles, and can also play a role in surrounding and connecting multiple fourth conductive metal particles to one another.

[0129] In this case, the intermetallic compound may include a metal having a melting point lower than the curing temperature of the resin. That is, because the intermetallic compound includes a metal having a melting point lower than the curing temperature of the resin, the metal with a melting point lower than the curing temperature of the resin melts during the drying and curing process, forming an intermetallic compound with some of the metal particles and surrounding the metal particles. In this case, the intermetallic compound may preferably include a low-melting-point metal of 300°C or lower.

[0130] For example, it may contain tin (Sn) having a melting point of 213-220°C. During the drying and hardening process, the tin (Sn) melts, and the molten tin (Sn) wets high-melting-point metal particles such as silver (Ag), nickel (Ni), or copper (Cu) by capillary action. It then reacts with some of the silver (Ag), nickel (Ni), or copper (Cu) metal particles to form intermetallic compounds such as Ag3Sn, Ni3Sn4, Cu6Sn5, and Cu3Sn. The silver (Ag), nickel (Ni), or copper (Cu) that do not participate in the reaction remain in the form of metal particles.

[0131] Therefore, the multiple fourth conductive metal particles may include one or more of silver (Ag), nickel (Ni), and copper (Cu), and the intermetallic compound may include one or more of Ag3Sn, Ni3Sn4, Cu6Sn5, and Cu3Sn.

[0132] The plating layers 131c and 132c can play a role in improving mounting characteristics.

[0133] The types of plating layers 131c and 132c are not particularly limited and may include, for example, at least one of nickel (Ni), tin (Sn), silver (Ag), palladium (Pd), and alloys thereof.

[0134] The plating layers 131c and 132c may be a single layer or multiple layers.

[0135] More specifically, the plating layer may be a nickel (Ni) plating layer or a tin (Sn) plating layer, and may be in a form in which a nickel (Ni) plating layer and a tin (Sn) plating layer are sequentially formed on the electrode layer, or may be in a form in which a tin (Sn) plating layer, a nickel (Ni) plating layer, and a tin (Sn) plating layer are sequentially formed. Furthermore, the plating layer may include multiple nickel (Ni) plating layers and / or multiple tin (Sn) plating layers.

[0136] There is no particular limit to the size of the stacked electronic component 100.

[0137] However, in order to simultaneously achieve improved warp resistance, miniaturization, and increased capacitance, the thickness of the dielectric layer and internal electrodes must be reduced, the number of layers increased, and dummy electrodes placed in the cover portion. Therefore, the effects of the present invention may become more pronounced in stacked electronic components 100 of size 3216 (length × width: 3.2 mm × 1.6 mm, with length and width satisfying an error of ±10%) or smaller.

[0138] The present invention will be described in more detail below through test examples, but this is intended to aid in a concrete understanding of the present invention, and the scope of the present invention is not limited by the examples.

[0139] (Example test) The following test examples 1 to 4 relate to a stacked electronic component in which first and second cover portions, each having an average dimension of 380 μm in the first direction, are arranged on both end faces in the first direction of the capacitance forming portion. The components were manufactured similarly, except that the dummy electrodes were arranged so that their positions d, separated from the capacitance forming portion with respect to the first direction, were different.

[0140] The first and second cover portions of Test Examples 1 to 4 each include a first and second dummy electrode layer, the first dummy electrode layer includes 1-1 and 1-2 dummy electrodes arranged apart from each other in a second direction, and the second dummy electrode layer includes 2-1 and 2-2 dummy electrodes arranged apart from each other in a second direction.

[0141] In Test Example 1, the dummy electrode layer was placed at a position separated from the capacitance formation area by the average dimension of the first dielectric layer in the first direction (10 μm), based on the first direction.

[0142] In Test Example 2, the dummy electrode layer was positioned 160 μm away from the capacitance forming section with respect to the first direction. Specifically, the dummy electrode layer was positioned 42% away from the inner electrode layer located in the outermost layer of the cover section in both directions of the first direction of the capacitance forming section.

[0143] In Test Example 3, the dummy electrode layer was positioned 270 μm away from the capacitance forming section with respect to the first direction. Specifically, the dummy electrode layer was positioned 71% away from the internal electrode layer located in the outermost layer of the cover section in both directions of the first direction of the capacitance forming section.

[0144] In Test Example 4, the dummy electrode layer was positioned 370 μm away from the capacitance forming section with respect to the first direction. That is, the dummy electrode layer was positioned at a distance of 10 μm from the first and second surfaces, which are both sides of the main body in the first direction, from the average dimension of the first dielectric layer in the first direction.

[0145] Table 1 below shows the results of the evaluation of the warp strength for the samples from Test Examples 1 to 3.

[0146] The warpage strength evaluation (AEC-Q200 conditions) was performed by mounting 20 samples onto a substrate for each of the three test examples (1 to 3). During the evaluation of the warpage strength, samples that showed a capacitance change of 10% or more or that developed a crack were evaluated as defective, while samples that showed a capacitance change of less than 10% and did not develop a crack were evaluated as good. The number of good samples out of the total number of samples based on the indentation depth (mm) of the warpage strength was rounded to one decimal place and expressed as a percentage (%).

[0147] [Table 1]

[0148] In Test Examples 2 and 3, where the dummy electrode layer was positioned at a distance of 42% to 71% from the capacitance forming section, relative to the first direction of the cover, excellent characteristics were observed in the evaluation of warpage strength. In contrast, in Test Example 1, where the dummy electrode layer was positioned at a distance of less than 42% from the capacitance forming section, relative to the first direction of the cover, poor characteristics were observed in the evaluation of warpage strength. Furthermore, in Test Example 4, where the dummy electrode layer was positioned at a distance of more than 71% from the capacitance forming section, relative to the first direction of the cover, the dummy electrode layer was positioned adjacent to the first and second surfaces of the main body, resulting in oxidation of at least a portion of the dummy electrode layer, causing problems such as arc discharge, and making it impossible to evaluate the warpage strength.

[0149] This confirms that when the dummy electrode is positioned at a distance of 42% to 71% from the capacitance forming portion, relative to the first direction of the cover portion, the characteristics of warpage strength and other properties are improved.

[0150] Although embodiments of the present invention have been described in detail above, the present invention is not limited by the embodiments described above and the accompanying drawings, but is limited by the claims provided. Therefore, within the scope of the technical idea of ​​the present invention as described in the claims, various forms of substitution, modification, and alteration are possible by persons with ordinary skill in the art, and these also fall within the scope of the present invention.

[0151] Furthermore, the expression “one embodiment” as used in this disclosure does not mean that each “example” is the same as the others, but is provided to highlight and explain the unique and distinct features of each. However, the embodiments presented above do not preclude their implementation in combination with features of other embodiments. For example, even if a matter described in one embodiment is not described in another embodiment, it can be understood as a description related to the other embodiment, unless there is a description in the other embodiment that contradicts or is inconsistent with that matter.

[0152] The terms used in this disclosure are used solely to describe one embodiment and are not intended to limit the disclosure. Where otherwise, singular expressions include plural expressions unless the context clearly indicates otherwise. [Explanation of symbols]

[0153] 100 Stacked Electronic Components 110 Main Unit 111 Dielectric layer 112, 113 Cover section 114, 115 Side margin area 121, 122, 221, 222 Internal electrode 223 Floating Electrode 131, 132 External electrode 141, 142 Dummy electrodes

Claims

1. A main body comprising a dielectric layer, a capacitance forming portion including an internal electrode layer alternately arranged with the dielectric layer in a first direction, and a cover portion disposed on both end faces of the capacitance forming portion in the first direction, the main body including first and second surfaces facing each other in the first direction, third and fourth surfaces connected to the first and second surfaces and facing each other in a second direction, and fifth and sixth surfaces connected to the first to fourth surfaces and facing each other in a third direction, The body includes an external electrode disposed on the main body, The cover portion includes a plurality of dummy electrode layers arranged at a distance from the volume forming portion in the first direction, and the dummy electrode layers include dummy electrodes arranged at a distance from each other in the second direction and connected to the external electrode. A stacked electronic component wherein the dummy electrode layer among the plurality of dummy electrode layers, which is positioned closest to the capacitance forming portion, is positioned at a distance d from the capacitance forming portion in the first direction, and when the average dimension of the dielectric layer in the first direction is td, td < d.

2. The stacked electronic component according to claim 1, wherein the plurality of dummy electrode layers are arranged in the cover portion at a distance of 42% to 71% from the capacitance forming portion.

3. The external electrodes include first and second external electrodes arranged at a distance from each other. The internal electrode layer includes first and second internal electrode layers that are alternately arranged in the first direction with respect to the dielectric layer, The stacked electronic component according to claim 1, wherein the first internal electrode layer includes a first internal electrode connected to the first external electrode, and the second internal electrode layer includes a second internal electrode connected to the second external electrode.

4. The cover portion includes a first cover portion disposed on one end face in the first direction of the volume forming portion, and a second cover portion disposed on the other end face in the first direction of the volume forming portion. The plurality of dummy electrode layers include a plurality of first dummy electrode layers included in the first cover portion and arranged apart from each other in the first direction, and a plurality of second dummy electrode layers included in the second cover portion and arranged apart from each other in the first direction. The first dummy electrode layer includes a first-1 dummy electrode and a first-2 dummy electrode, which are connected to the first and second external electrodes, respectively. The stacked electronic component according to claim 3, wherein the second dummy electrode layer includes a second-first dummy electrode and a second-second dummy electrode, which are connected to the first and second external electrodes, respectively.

5. The external electrodes include first and second external electrodes arranged at a distance from each other. The internal electrode layer includes third and fourth internal electrode layers that are alternately arranged in the first direction with respect to the dielectric layer, The third internal electrode layer includes third and fourth internal electrodes that are spaced apart from each other in the second direction and connected to the first and second external electrodes, respectively. The fourth internal electrode layer includes floating electrodes that are not connected to the first and second external electrodes. The stacked electronic component according to claim 1, wherein the dummy electrode includes first and second dummy electrodes connected to the first and second external electrodes, respectively.

6. The cover portion includes a first cover portion disposed on one end face in the first direction of the volume forming portion, and a second cover portion disposed on the other end face in the first direction of the volume forming portion. The plurality of dummy electrode layers include a plurality of first dummy electrode layers included in the first cover portion and arranged apart from each other in the first direction, and a plurality of second dummy electrode layers included in the second cover portion and arranged apart from each other in the first direction. The first dummy electrode layer includes a first-1 dummy electrode and a first-2 dummy electrode, which are connected to the first and second external electrodes, respectively. The stacked electronic component according to claim 5, wherein the second dummy electrode layer includes a second-first dummy electrode and a second-second dummy electrode, which are connected to the first and second external electrodes, respectively.

7. The internal electrode layer mainly contains a first conductive metal, and the dummy electrode mainly contains a second conductive metal. The stacked electronic component according to claim 1, wherein the first and second conductive metals are different conductive metals.

8. The laminated electronic component according to claim 7, wherein the second conductive metal has at least one of the tensile strength and elastic modulus higher than the first conductive metal.

9. The cover portion includes a first cover portion disposed on one end face in the first direction of the capacitance forming portion and including the first dummy electrode, and a second cover portion disposed on the other end face in the first direction of the capacitance forming portion and including the second dummy electrode. The stacked electronic component according to claim 5, wherein the average dimension of each of the first and second cover portions in the first direction is 400 μm or less.

10. The stacked electronic component according to claim 1, wherein td satisfies td ≤ 10 μm.

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