Display panel and method for manufacturing a display panel

Abstract

To provide a display panel and a method for manufacturing the same that can improve productivity for a pair of light-emitting elements (micro LEDs) arranged in different directions from each other, and prevent unevenness caused by defective light-emitting elements from being visible. [Solution] A display panel according to one embodiment of this specification comprises a substrate on which a plurality of pixels are arranged, each of the plurality of pixels having a first pattern region and a second pattern region surrounding the first pattern region; an insulating layer disposed on the substrate and having a first incised pattern disposed in the first pattern region; and a pair of light-emitting elements disposed on the first incised pattern of the insulating layer, wherein the first incised pattern has a length in a first direction and a length in a second direction different from the first direction, and the light-emitting region of each of the pair of light-emitting elements is offset in directions different from each other with respect to the extension line in the first direction or the second direction from the center of the first incised pattern.

Description

Technical Field

[0001] This specification relates to a display panel and a method for manufacturing the same, and specifically, to a display panel and a method for manufacturing the same that can improve productivity for a pair of light-emitting elements (for example, micro LEDs) arranged in different directions from each other and prevent unevenness caused by defective light-emitting elements from being visually recognized.

Background Art

[0002] <( Entering the full-fledged information age, the field of display devices that visually display electrical information signals is rapidly developing. Accordingly, research continues to achieve further thinning, weight reduction, power consumption reduction, etc. for various display devices.

[0003] Specific examples of display devices include a liquid crystal display device (LCD), a light-emitting display device (LED), a quantum dot display device, etc.

[0004] Among display devices, light-emitting display devices can include an organic light-emitting display device (OLED) that includes an organic substance as a light-emitting layer, a micro LED display device (Micro LED) that includes an inorganic substance as a light-emitting layer, etc.

[0005] Here, the micro LED display device has the advantages of being less affected by the external environment by using an inorganic substance that is resistant to moisture and oxygen as a light-emitting layer, having high reliability, and having a longer lifespan compared to an organic light-emitting display device. In addition, the micro LED display device has the advantage of being able to realize a flexible display device while having a structure that is even thinner than an organic light-emitting display device.

[0006] Micro-LED transfer technology is the process of transferring micro-LED chips (light-emitting element chips) grown on a growth substrate onto a panel substrate. As the size of micro-LED chips continues to decrease, research is ongoing on technologies for high-precision transfer onto panel substrates. [Overview of the project] [Problems that the invention aims to solve]

[0007] A display panel including microLEDs may have at least one subpixel unit for each pixel. The at least one subpixel unit may include a first light-emitting element (first subpixel) and a second light-emitting element (second subpixel) to prepare for the occurrence of defective chips during the process of successfully transferring the panel onto the substrate.

[0008] In this case, if one defective light-emitting element occurs in each subpixel unit, a problem may arise where unevenness due to the distance difference between the first and second light-emitting elements becomes visible.

[0009] Furthermore, depending on the uniformity of the adhesive layer, the light-emitting element may experience problems such as failure to transfer to the panel (non-transfer) or over-transfer.

[0010] This specification aims to provide a technology for improving the productivity of a pair of light-emitting elements (micro LEDs) arranged in different directions from one another, and for preventing the visibility of unevenness caused by defective light-emitting elements.

[0011] The problems that this specification seeks to solve are not limited to those mentioned above, and any other problems not mentioned can be clearly understood by a person with ordinary skill in the art to which the technical concept of this specification pertains, based on the following description. [Means for solving the problem]

[0012] A display panel according to one embodiment of this specification comprises a substrate on which a plurality of pixels are arranged, each of the plurality of pixels having a first pattern region and a second pattern region surrounding the first pattern region; an insulating layer disposed on the substrate and having a first incised pattern disposed in the first pattern region; and a pair of light-emitting elements disposed on the first incised pattern of the insulating layer, wherein the first incised pattern has a length in a first direction and a length in a second direction different from the first direction, and the light-emitting region of each of the pair of light-emitting elements is offset in directions different from each other with respect to the extension line in the first or second direction from the center of the first incised pattern. [Effects of the Invention]

[0013] A display panel according to one embodiment of this specification has the effect of preventing viewers from noticing inconsistencies in the display.

[0014] Furthermore, the display panel according to one embodiment of this specification has the effect of improving productivity in the process of transferring light-emitting elements.

[0015] Furthermore, the display panel according to one embodiment of this specification has the effect of preventing the light-emitting elements from being over-transferred onto the panel.

[0016] The effects described herein are not limited to those mentioned above, and any other effects not mentioned herein can be clearly understood by a person with ordinary skill in the art to which the technical concept of this specification pertains, based on the following description. [Brief explanation of the drawing]

[0017] [Figure 1] This is a schematic plan view of a display panel according to one embodiment of the present invention. [Figure 2] This is a schematic plan view of the pixels according to this specification according to one embodiment. [Figure 3] This is a plan view of the display panel according to the first embodiment of this specification. [Figure 4] This is a cross-sectional view of line I-I' in Figure 3. [Figure 5] It is a cross-sectional view taken along II-II' of FIG. 3. [Figure 6] It is a first modification example of the display panel of this specification according to the first embodiment. [Figure 7] It is a second modification example of the display panel of this specification according to the first embodiment. [Figure 8] It is a plan view of the display panel of this specification according to the second embodiment. [Figure 9] It is a cross-sectional view taken along III-III' of FIG. 8. [Figure 10] It is a first modification example of the display panel of this specification according to the second embodiment. [Figure 11a] It is a plan view of the display panel of this specification according to the third embodiment. [Figure 11b] It is a plan view showing a comparison of the first and second intaglio patterns of FIG. 11a. [Figure 12] It is a cross-sectional view taken along IV-IV' of FIG. 11a. [Figure 13] It is a plan view of the display panel of this specification according to the fourth embodiment. [Figure 14] It is a first modification example of the display panel of this specification according to the fourth embodiment. [Figure 15] It is a plan view of the display panel of this specification according to the fifth embodiment. [Figure 16] It is a first modification example of the display panel of this specification according to the fifth embodiment. [Figure 17] It is a plan view of the display panel of this specification according to the sixth embodiment. [Figure 18a] It is a process plan view of this specification according to the first embodiment. [Figure 18b] It is a process plan view of this specification according to the first embodiment. [Figure 18c] It is a process plan view of this specification according to the first embodiment. [Figure 18d] It is a process plan view of this specification according to the first embodiment. [Figure 18e] It is a process plan view of this specification according to the first embodiment. [Figure 19a]This is a cross-sectional view of the process according to the first embodiment of this specification. [Figure 19b] This is a cross-sectional view of the process according to the first embodiment of this specification. [Figure 19c] This is a cross-sectional view of the process according to the first embodiment of this specification. [Figure 19d] This is a cross-sectional view of the process according to the first embodiment of this specification. [Figure 19e] This is a cross-sectional view of the process according to the first embodiment of this specification. [Figure 19f] This is a cross-sectional view of the process according to the first embodiment of this specification. [Modes for carrying out the invention]

[0018] The advantages and features of this specification, and the methods for achieving them, will become clearer with reference to the embodiments described below in detail with the accompanying drawings. However, this specification is not limited to the embodiments disclosed below, and may be realized in a variety of different forms. These embodiments are provided merely to ensure the completeness of the disclosure and to fully inform those ordinary skill in the art to which this specification belongs of the scope of the specification, which is defined solely by the scope of the claims.

[0019] The shapes, sizes, proportions, angles, numbers, etc., disclosed in the drawings illustrating embodiments of this specification are illustrative and not limited to those shown herein. Furthermore, in describing this specification, if it is determined that a specific explanation of related prior art would unnecessarily obscure the gist of this specification, such detailed explanation will be omitted.

[0020] Wherever "equipped with," "possess," "consist of," etc., are used as referred to herein, other parts may be added unless "only" is used. When a component is expressed singularly, it includes cases where it includes multiple components unless otherwise explicitly stated.

[0021] When interpreting the constituent elements, it shall be assumed that they include a margin of error, even if there is no other explicit statement.

[0022] When describing the relative positions of two parts, for example, when the relative positions of two parts are described as "on top," "above," "below," or "to the side," one or more other parts may be located between the two parts unless "immediately" or "directly" is used.

[0023] An element or layer being referred to as "on" another element or layer includes all cases where another layer or other element is directly above or between other elements.

[0024] Furthermore, while terms such as "first," "second," etc., are used to describe various components, these components are not limited by these terms. These terms are simply used to distinguish one component from others. Therefore, the first component referred to below may also be the second component within the technical concept of this specification.

[0025] Throughout the specification, the same reference numeral refers to the same component.

[0026] The dimensions and thicknesses of each component shown in the drawings are illustrated for illustrative purposes only and are not necessarily limited to the dimensions and thicknesses of the components illustrated herein.

[0027] Each of the features of the various embodiments described herein can be partially or entirely combined or combined with one another, enabling various technical interlocks and drives, and each embodiment can be implemented independently of the others, or together through their interrelationships.

[0028] In this specification, “apparatus” may include display devices such as liquid crystal modules (LCMs) and organic light-emitting display modules (OLED modules), which comprise a display panel and a drive unit for driving the display panel. It may also include set electronic apparatuses or set devices, such as complete products or final products including LCMs, OLED modules, etc., including notebook computers, televisions, computer monitors, equipment apparatuses including other forms of vehicle or automotive apparatuses or vehicles, and mobile electronic apparatuses such as smartphones or electronic pads.

[0029] Therefore, the term "display device" in this specification may include the display device itself, such as an LCM or OLED module, and a set of devices that are application products or end-consumer devices including an LCM or OLED module.

[0030] Furthermore, in some embodiments, an LCM or OLED module, consisting of a display panel and a drive unit, can be referred to as a "display device," while the complete electronic device including the LCM or OLED module can be distinguished and referred to as a "set device." For example, a display device may include a liquid crystal (LCD) or organic light-emitting (OLED) display panel and a source PCB, which is a control unit for driving the display panel. A set device may further include a set PCB, which is a set control unit electrically connected to the source PCB and drives the entire set device.

[0031] The display panels used in the embodiments described herein may include, but are not limited to, any form of display panel, such as liquid crystal display panels, organic light-emitting diode (OLED) display panels, and electroluminescent display panels.

[0032] Each of the features of the various embodiments described herein can be partially or entirely combined or combined with one another, enabling various technical interlocks and drives, and each embodiment can be implemented independently of the others, or together through their interrelationships.

[0033] Various embodiments of the present invention will be described in detail below with reference to the attached drawings. The scales of the components shown in the drawings are different from those of actual objects for illustrative purposes and are not limited to those shown in the drawings.

[0034] Figure 1 is a schematic plan view of a display panel according to this specification according to one embodiment, and Figure 2 is a schematic plan view of pixels according to this specification according to one embodiment.

[0035] As shown in Figures 1 and 2, the horizontal direction X and vertical direction Y of the display panel 1 can be the length direction and width direction of the display panel 1, respectively. The horizontal direction X and vertical direction Y of the display panel 1 can also be expressed as the row direction and column direction. The thickness direction Z can mean the direction perpendicular to the plane having the horizontal direction X and vertical direction Y of the display panel 1. The display panel 1 can have a cross-section in the thickness direction Z.

[0036] As shown in Figures 1 and 2, a display panel 1 according to one embodiment of this specification comprises a substrate (10 in Figure 4) having a plurality of pixels P each comprising a first pattern area IA1 and a second pattern area IA2 surrounding the first pattern area IA1; an insulating layer (40 in Figure 4) disposed on the substrate 10 and having a first engraved pattern IP1 disposed in the first pattern area IA1; and a pair of light-emitting elements LDs disposed on the first engraved pattern IP1 of the insulating layer 40, wherein the first engraved pattern IP1 has a length in a first direction and a length in a second direction, and the light-emitting area E of each of the pair of light-emitting elements LDs (see Figure 4) can be offset in different directions (e.g., opposite directions) with respect to the extension line in the first direction or the second direction from the center of the first engraved pattern IP1.

[0037] The display panel 1 can provide information, videos, and / or images to the user. For example, the display panel 1 may have a display area AA and a non-display area NA. For example, the circuit board (10 in Figure 4) may have a display area AA and a non-display area NA.

[0038] The substrate 10 can be made of an insulating material. For example, the substrate 10 can be made of glass or resin. The substrate 10 can also be made of a flexible material. For example, the substrate 10 can be made of a flexible plastic material such as polyimide (PI). However, the embodiments described herein are not limited to these.

[0039] Display area AA may be the area where an image is displayed. Display area AA of the substrate 10 or display panel 1 can be configured in various shapes depending on the design of the display device. For example, display area AA can be configured as a rectangle with rounded corners, but the embodiments of this specification are not limited to this. To give another example, display area AA can be configured as a rectangle with right-angled corners, a circle, etc., but the embodiments of this specification are not limited to these.

[0040] The display area AA may comprise a plurality of pixels P. Each of the plurality of pixels P may consist of a plurality of subpixel units SP (SP1, SP2, SP3). Each of the plurality of subpixel units SP may contain a plurality of light-emitting elements LD (LD1-1, LD1-2, LD2-1, LD2-2, LD3-1, LD3-2). The plurality of light-emitting elements LD may be configured differently depending on the type of display device. For example, if the display device is an inorganic light-emitting display device, the light-emitting elements may be LEDs (Light-emitting Diodes), Micro LEDs (Micro Light-emitting Diodes), or Mini LEDs (Mini Light-emitting Diodes), but the embodiments described herein are not limited thereto.

[0041] The non-display area NA may be an area where the image is not displayed. Various wirings and circuits for driving multiple pixels P of the display area AA may be arranged in the non-display area NA. For example, various wirings and drive circuits may be mounted in the non-display area NA, and pads to which integrated circuits and printed circuits are connected may be arranged, but the embodiments of this specification are not limited thereto.

[0042] For example, the drive circuit may be a data drive circuit and / or a gate drive circuit, but the embodiments of this specification are not limited thereto. Wiring and the like may be provided to supply control signals for controlling the drive circuit. For example, the control signals may include various timing signals, including a clock signal, an input data enable signal, and a synchronization signal, but the embodiments of this specification are not limited thereto. The control signals may be received via a pad. For example, link wiring and the like for transmitting signals may be provided in the non-display area NA. For example, drive components such as a flexible circuit board and a printed circuit board may be connected to the pad.

[0043] Multiple pixels P may be included in the display area AA, each comprising at least one subpixel unit. Multiple pixels P may be arranged in a matrix configuration, forming multiple rows and multiple columns, but the display panel herein is not limited to this.

[0044] Each of the multiple pixels P may comprise a first subpixel unit SP1, a second subpixel unit SP2, and a third subpixel unit SP3. The multiple subpixel units SP (SP1, SP2, SP3) can be arranged in various ways. For example, the first to third subpixel units SP1, SP2, SP3 can be arranged side by side in the X-axis direction. The arrangement of the subpixel units SP will be specifically described below in the embodiments. However, the number of subpixel units SP constituting one pixel P is illustrative and the embodiments described herein are not limited thereto.

[0045] The first to third subpixel units SP1, SP2, and SP3 can emit different colors from each other. For example, one of the first subpixel unit SP1, the second subpixel unit SP2, and the third subpixel unit SP3 may be a red subpixel unit, another may be a green subpixel unit, and the remaining one may be a blue subpixel unit. The types of subpixel units are illustrative, and the embodiments described herein are not limited thereto.

[0046] Each of the first to third subpixel units SP1, SP2, and SP3 may include at least one or more light-emitting elements LDs. The light-emitting elements can constitute the subpixels of each subpixel unit. For example, the first subpixel unit SP1 may consist of a pair of first-first light-emitting elements LD1-1 and first-second light-emitting elements LD1-2, the second subpixel unit SP2 may consist of a pair of second-first light-emitting elements LD2-1 and second-second light-emitting elements LD2-2, and the third subpixel unit SP3 may consist of a pair of third-first light-emitting elements LD3-1 and third-second light-emitting elements LD3-2. However, the number of light-emitting elements included in a single subpixel unit is illustrative, and the embodiments described herein are not limited thereto.

[0047] Multiple signal lines may be arranged in the region between multiple subpixel units SP. These signal lines may extend in a column direction from between the multiple subpixel units SP. These signal lines may be lines that transmit pixel voltage from a pixel driver circuit (PD in Figure 4) to the multiple subpixel units SP.

[0048] For example, multiple signal lines can be electrically connected to the pixel electrodes (55a, 55b in Figure 4) of multiple pixel drive circuits PD and multiple subpixel units SP. The pixel voltage output from the pixel drive circuit PD can be transmitted to the pixel electrodes 55a, 55b of the multiple subpixel units SP via the multiple signal lines. For example, the pixel electrodes 55a, 55b may be electrodes electrically connected to the first electrodes (93a, 93b in Figure 4) of the light-emitting element LD. This allows the pixel voltage from the signal lines to be transmitted to the first electrodes (93a, 93b in Figure 4) of the light-emitting element LD via the pixel electrodes 55a, 55b.

[0049] Therefore, instead of forming multiple transistors and storage capacitors in each of the multiple subpixel units SP, the structure of the display panel 1 can be simplified by using a pixel driving circuit that integrates multiple pixel circuits. Furthermore, by integrating the circuits that are located in each of the multiple subpixel units SP into a single pixel driving circuit PD, highly efficient, low-power driving may be possible.

[0050] Each of the plurality of pixels P according to one embodiment may comprise at least one first pattern region IA1 (IA1-1, IA1-2, IA1-3) and a second pattern region IA2 surrounding the first pattern region IA1. The first and second pattern regions IA1 and IA2 may include groove-shaped patterns formed in the insulating layer (40 in Figure 4). Here, the groove-shaped patterns can be formed by removing a certain thickness from the upper surface of the insulating layers 40, 140, and 240.

[0051] Each first pattern region IA1 according to one embodiment can correspond to each subpixel unit SP. That is, each first pattern region IA1 according to one embodiment can comprise each subpixel unit SP. Since a plurality of subpixel units SP are composed of multiple subpixel units SP, at least one or more first pattern regions IA1 can be composed of multiple subpixel units SP. For example, at least one or more first pattern regions IA1 can comprise a 1-1 pattern region IA1-1, a 1-2 pattern region IA1-2, and a 1-3 pattern region IA1-3.

[0052] A single subpixel unit SP can be placed within each first pattern region IA1. A single first pattern region IA1 may comprise a pair of light-emitting elements. For example, the 1-1 pattern region IA1-1 may comprise the 1-1 light-emitting element LD1-1 and the 1-2 light-emitting element LD1-2 of the first subpixel unit SP1. For example, the 1-2 pattern region IA1-2 may comprise the 2-1 light-emitting element LD2-1 and the 2-2 light-emitting element LD2-2 of the second subpixel unit SP2. For example, the 1-3 pattern region IA1-3 may comprise the 3-1 light-emitting element LD3-1 and the 3-2 light-emitting element LD3-2 of the third subpixel unit SP3.

[0053] The second pattern region IA2 may comprise at least one second incised pattern (IP2 in Figure 3). At least one second incised pattern IP2 may be arranged to correspond to each of at least several subpixel units SP. For example, if there are three subpixel units SP1, SP2, and SP3, the second incised pattern IP2 may consist of at least three, each corresponding to one of the subpixel units SP1, SP2, and SP3.

[0054] The second incised pattern IP2 can serve as a space to which the light-emitting element LDs are temporarily transferred during the stamping process. Therefore, the second incised pattern IP2 can be positioned adjacent to the first pattern region IA1 on which the light-emitting element LDs are placed, at a predetermined distance from it.

[0055] The second pattern region IA2 may further comprise at least one first dummy pattern DP1 and at least one second dummy pattern DP2. The first and second dummy patterns DP1 and DP2 may be dummy regions where the light-emitting element LD is not even temporarily fixed during the stamping process. Therefore, the first and second dummy patterns DP1 and DP2 can improve the degree of freedom in the design of the light-emitting element LD and improve the uniformity of the adhesive layer in contact with the light-emitting element LD.

[0056] In the following embodiments, the first pattern region IA1 and the second pattern region IA2 will be described in detail.

[0057] Figure 3 is a plan view of the display panel according to the first embodiment of this specification. Figure 4 is a cross-sectional view taken along line I-I' in Figure 3, and Figure 5 is a cross-sectional view taken along line II-II' in Figure 3.

[0058] As shown in Figures 3 to 5, the display panel according to the specification according to the first embodiment may have a plurality of pixels P on the substrate 10. The display panel according to the specification according to the first embodiment may have one first engraved pattern IP1 (IP1-1, IP1-2, IP1-3) as a first pattern area IA1 of each pixel P, and a plurality of second engraved patterns IP2 as a second pattern area IA2. A pair of light-emitting elements LDs (LD1-1, LD1-2, LD2-1, LD2-2, LD3-1, LD3-2) may be arranged in each first engraved pattern IP.

[0059] Multiple pixels P can be arranged in a matrix configuration, forming multiple rows and multiple columns. However, this embodiment is not limited to this.

[0060] The distance between adjacent pixels P can constitute a first pitch PP. The first pitch PP can be measured as the distance between the centers of the light-emitting elements LD at corresponding positions for two adjacent pixels P in the length or width direction. However, the measurement criteria for the first pitch PP in this specification are not limited to this. For example, the first pitch PP can also be measured as the distance between the centers of two adjacent pixels P in the length or width direction.

[0061] Each pixel P may comprise multiple subpixel units SP (SP1, SP2, SP3). The multiple subpixel units SP may comprise a first subpixel unit SP1, a second subpixel unit SP2, and a third subpixel unit SP3.

[0062] Multiple subpixel units SP can be arranged in various ways. Multiple subpixel units SP according to the first embodiment can be spaced apart from each other by a predetermined distance in the row direction. A second incised pattern IP2 can be placed in the space between the multiple subpixel units SP that is spaced apart.

[0063] The distance between subpixel units SP may consist of the distance of a second pitch SPP. The second pitch SPP can be measured as the distance between the centers of adjacent subpixel units SP. The second pitch SPP can also be measured as the shortest distance between the centers of the first engraved pattern IP1. However, the measurement criteria for the second pitch SPP in this specification are not limited to these. For example, the second pitch SPP can be measured as the distance between the left end of the first subpixel unit SP1 and the left end of the second subpixel unit SP2.

[0064] The first to third subpixel units SP1, SP2, and SP3 may each comprise a pair of light-emitting elements LDs (LD1-1, LD1-2, LD2-1, LD2-2, LD3-1, and LD3-2). Each light-emitting element LD may constitute one subpixel. For example, the first subpixel unit SP1 may comprise the 1-1 light-emitting element LD1-1 and the 1-2 light-emitting elements LD1-2, the second subpixel unit SP2 may comprise the 2-1 light-emitting element LD2-1 and the 2-2 light-emitting elements LD2-2, and the third subpixel unit SP3 may comprise the 3-1 light-emitting element LD3-1 and the 3-2 light-emitting elements LD3-2.

[0065] When using micro-LEDs as light-emitting diodes (LDs), multiple micro-LEDs can be formed on a wafer, and the display panel 1 can be manufactured by transferring the micro-LEDs to the substrate 10 of the display panel 1. However, various defects may occur during the process of transferring multiple micro-sized light-emitting diodes (LDs) from the wafer to the substrate 10.

[0066] For example, in some subpixels, a defect may occur where the light-emitting diode (LD) is not transferred, or a defect may occur where the light-emitting diode is transferred outside its designated position due to alignment errors. Furthermore, even if the transfer process proceeds normally, the transferred light-emitting diode itself may be defective. Therefore, considering defects during the transfer process of multiple light-emitting diodes, multiple identical light-emitting diodes can be transferred to a single subpixel unit. After performing illumination tests on the multiple light-emitting diodes, only the one that receives a normal result can be used.

[0067] In a pair of light-emitting diodes (LDs), one may be the main (or primary) light-emitting diode, and the other may be a redundant light-emitting diode. The redundant light-emitting diode may be an extra light-emitting diode transferred in case of failure of the main light-emitting diode. When the main light-emitting diode fails, the redundant light-emitting diode can be used in its place. Therefore, by transferring both the main light-emitting diode and the redundant light-emitting diode to a single subpixel unit SP, the degradation of display quality due to failure of the main light-emitting diode or the redundant light-emitting diode can be minimized. Even if only one of the main subpixel and the redundant subpixel is driven, color representation is possible with the subpixel unit, which can improve yield.

[0068] For example, the main light-emitting element (or main subpixel) can be used as the first-first light-emitting element LD1-1, the second-first light-emitting element LD2-1, and the third-first light-emitting element LD3-1, and the redundant light-emitting elements (or redundant subpixel) can be used as the first-second light-emitting element LD1-2, the second-second light-emitting element LD2-2, and the third-second light-emitting element LD3-2.

[0069] A pair of light-emitting diodes (LDs) can be arranged in various ways. In the first embodiment, a pair of light-emitting diodes (LDs) can be arranged side by side in the Y-axis direction.

[0070] The light-emitting regions of each of the pair of light-emitting elements LDs can be arranged in different directions from each other. For example, when the first incised pattern IP1 (IP1-1, IP1-2, IP1-3) has a length in a first direction and a length in a second direction, the light-emitting regions of each of the pair of light-emitting elements LDs can be arranged to be offset in different directions (e.g., opposite directions) from the center of the first incised pattern IP1 with respect to the extensions of the first direction or the second direction. In the pair of light-emitting elements LDs according to the first embodiment, the respective light-emitting regions E can be arranged to face each other.

[0071] The light-emitting region E may tend to be biased towards one side of the light-emitting element LD. The light-emitting region E of the light-emitting element LD may be biased towards the side where the active layers 96a and 96b are located. The active layers 96a and 96b of the light-emitting element LD can overlap with the first electrodes 93a and 93b of the light-emitting element LD. As a result, the light-emitting region E according to this specification can overlap with the first electrodes 93a and 93b of the light-emitting element LD.

[0072] In the display panel according to the first embodiment of this specification, the light-emitting regions E of a pair of light-emitting elements LDs can be arranged to face each other. By arranging the pair of light-emitting elements LDs side by side in the Y-axis direction, the respective light-emitting regions E of the pair of light-emitting elements LDs can also be arranged adjacent to each other in the Y-axis direction. For example, the pair of light-emitting elements LDs according to the first embodiment can be arranged so that their respective light-emitting regions E face each other and are vertically symmetrical with respect to an arbitrary X-axis.

[0073] The display panel according to the first embodiment of this specification can achieve a constant wavelength dispersion of color. If the light-emitting regions E of a pair of light-emitting elements LDs are arranged adjacent to each other, the color bias in the pair of light-emitting elements LDs can be significantly reduced. As a result, the display panel according to this specification has the effect of improving the visibility of unevenness in stamp areas. Here, unevenness in stamp areas can refer to differences in color perception due to various causes such as non-uniformity of color wavelength dispersion.

[0074] A first distance D1 may be the distance between a pair of light-emitting elements LDs. The first distance D1 may be measured as the distance between the centers of each light-emitting element. However, the measurement criteria for the first distance D1 in this specification are not limited to this. For example, the first distance D1 may also be measured as the distance between the upper end of the first-1 light-emitting element LD1-1 and the upper end of the first-2 light-emitting element LD1-2.

[0075] The first distance D1 of the display panel according to this specification may consist of a viewing distance reference, a distance smaller than the binocular function relative to the pixel distance. The first distance D1 can be derived by calculating the minimum perceptible pixel spacing at the viewing distance. Binocular function can be expressed as binocular visual acuity, binocular resolution, etc. Binocular function may mean the visual ability that represents how accurately details can be distinguished when both eyes (two eyes) work together to perceive an object. Binocular function relative to the pixel distance can be measured as the angle between pixels that can be perceived as being closest to a pixel on a vertical line between the viewer and the screen, assuming that the pixels are located on a vertical line between the viewer and the screen.

[0076] For example, the binocular vision function for a pixel distance relative to a viewer with visual acuity of 1.0 may be 1 / 60 degrees (°). As yet another example, the binocular vision function for a pixel distance relative to a viewer with visual acuity of 2.0 may be 1 / 120 degrees.

[0077] The minimum perceptual pixel spacing α at a viewing distance can be calculated via binocular vision function BR and viewing distance VD. Viewing distance VD can represent the vertical distance between the viewer and the screen. The minimum perceptual pixel spacing α at viewing distance VD can be calculated using Equation 1, as follows:

[0078] [Equation 1] α = 2 × VD × tan(radians((BR) × (1 / 2)))

[0079] For example, if the viewing distance is 3m and the binocular vision function is 1 / 60 of a degree based on a visual acuity of 1.0, substituting VD=3 and BR=1 / 60 into equation 1 above, the minimum perceptual pixel interval α at the viewing distance can be derived to be approximately 872.6646.

[0080] The minimum perceptible pixel spacing α at the viewing distance can determine the first pitch PP, and the determined first pitch PP can determine the first distance D1, which is the distance between a pair of light-emitting elements.

[0081] To ensure that the distance difference between pixels P is not perceived by the viewer, the first pitch PP can be set to a value smaller than the minimum perceptible pixel interval α at the viewing distance. For example, the first pitch PP can be set to less than half of the minimum perceptible pixel interval α at the viewing distance.

[0082] The first distance D1 between a pair of light-emitting elements can be smaller than the first pitch PP. For example, the first distance D1 may be at least half of the first pitch PP, or it may be less than or equal to one-tenth of the first pitch PP. However, in the display panels of this specification, the first distance D1 is not limited to these values ​​and may be formed at distances narrower than one-tenth of the first pitch PP, such as one-eleventh, one-twelfth, one-thirteenth, ..., one-n (where n is a number greater than 10) of the first pitch PP. The first distance D1 between a pair of light-emitting elements can be set to position the first and second light-emitting elements as close together as possible.

[0083] The display panel described herein transfers a pair of light-emitting elements LDs via a 2nd stamping method, and the first distance D1 can be formed at a distance smaller than the binocular vision function. The implemented first distance D1 can often be formed at or less than half of the first pitch PP, and at least at or less than one-tenth of the first pitch PP. Alternatively, the first distance D1 can be formed at or between half and one-tenth of the first pitch PP. This makes it possible for the display panel described herein to prevent viewers from perceiving uneven defects even if defects occur in subpixels continuously in each subpixel unit.

[0084] By adopting a secondary stamping method, the productivity (capa drop) for transferring a pair of light-emitting diodes (LDs) arranged in different directions can be improved. In the secondary stamping method, in order to prevent cluster defects that occur during primary stamping, the distance (second distance, D2) between each first engraved pattern IP1 (IP1-1, IP1-2, IP1-3) and the second engraved pattern IP2 can be set to a predetermined distance.

[0085] To illustrate Figure 3 in conjunction with Figure 2, the display panel according to the first embodiment of this specification may include a plurality of first pattern regions (IA1-1, IA1-2, IA1-3 in Figure 2) comprising a first-first incised pattern IP1-1, a first-second incised pattern IP1-2, and a first-third incised pattern IP1-3, and a plurality of second incised patterns IP2 as a second pattern region (IA2 in Figure 2).

[0086] The multiple first incised patterns IP1 may comprise the 1-1 incised pattern IP1-1, the 1-2 incised pattern IP1-2, and the 1-3 incised pattern IP1-3. Each of the 1-1 to 1-3 incised patterns IP1-1, IP1-2, and IP1-3 can be separated from each other by a second incised pattern IP2. The second incised pattern IP2 can be positioned on one side of each of the 1-1 to 1-3 incised patterns IP1-1, IP1-2, and IP1-3. The 1-1 incised pattern IP1-1 and the second incised pattern IP2 will be described in detail as an example with reference to the cross-sectional views in Figures 4 and 5.

[0087] As shown in Figures 4 and 5, a display panel according to this specification according to one embodiment may include a plurality of insulating layers 20, 30, 40, 50, 60, 70 on a substrate 10, a drive circuit having at least one transistor T between the plurality of insulating layers 20, 30, 40, 50, 60, 70, adhesive layers 45, 47, and a pair of light-emitting elements LD (LD1-1, LD1-2). The plurality of insulating layers 20, 30, 40, 50, 60, 70 may be arranged on the substrate 10 in order as a first insulating layer 20, a second insulating layer 30, a third insulating layer 40, a fourth insulating layer 50, a fifth insulating layer 60, and a sixth insulating layer 70.

[0088] At least one transistor T may comprise a gate electrode 11, a semiconductor layer 21, an ohmic contact layer 23, a source electrode 31, and a drain electrode 33.

[0089] The gate electrode 11 can be placed on the substrate 10. The gate electrode 11 can be formed in the same layer as the reflective layer 13 and the common power wiring 15 on the substrate 10. For example, the gate electrode 11 may be a single layer or multiple layers made of one of the following materials or an alloy thereof: molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu).

[0090] The semiconductor layer 21 can be placed on the first insulating layer 20 so as to overlap with the gate electrode 11. For example, the semiconductor layer 21 can be composed of a semiconductor material consisting of any one of amorphous silicon, polycrystalline silicon, oxide, and organic material, but this embodiment is not limited to these.

[0091] The ohmic contact layer 23 can be placed on the semiconductor layer 21. The ohmic contact layer 23 is for ohmic contact between the semiconductor layer 21 and the source and drain electrodes 31, 33 and can be omitted.

[0092] The source electrode 31 can be positioned on the ohmic contact layer 23 so as to overlap one side of the semiconductor layer 21. The drain electrode 33 can be positioned on the other side of the ohmic contact layer 23 so as to be separated from the source electrode 31. The source and drain electrodes 31 and 33 can be formed together. For example, the source and drain electrodes 31 and 33 can consist of a single layer of a metallic material such as molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), or copper (Cu), or alloys thereof, or they can consist of a multilayer structure utilizing these materials.

[0093] The reflective layer 13 on the substrate 10 can be provided at least below the light-emitting region of each light-emitting element LD1-1, LD1-2. For example, the reflective layer 13 can overlap with all of each light-emitting element LD1-1, LD1-2 to form a single pattern. However, this embodiment is not limited thereto.

[0094] The common power supply wiring 15 on the substrate 10 can extend from the non-display area NA to the display area AA. The common power supply wiring 15 can supply pixel driving power, provided from the pad portion of the non-display area NA, to a pair of light-emitting elements LD.

[0095] The first insulating layer 20 can cover the gate electrode 11, reflective layer 13, and common power wiring 15, etc., formed on the substrate 10. The first insulating layer 20 can be formed over at least the entire display area AA. The first insulating layer 20 may refer to a commonly used gate insulating layer. For example, the first insulating layer 20 can consist of a single layer or multiple layers made of an inorganic material, such as silicon oxide (SiOx) or silicon nitride (SiNx). However, this embodiment is not limited thereto.

[0096] The second insulating layer 30 can cover a drive circuit comprising at least one transistor T on the first insulating layer 20. The second insulating layer 30 is formed over at least the entire display area AA and can contact the first insulating layer 20 in some areas. The second insulating layer 30 may mean a commonly used interlayer insulating layer. For example, the second insulating layer 30 may consist of an inorganic material such as silicon oxide (SiOx) or silicon nitride (SiNx), or an organic material such as benzocyclobutene or photoacryl. Such a second insulating layer 30 may be omitted, however, this embodiment is not limited thereto.

[0097] The third insulating layer 40 can be placed on the second insulating layer 30. The third insulating layer 40 can be formed over at least the entire display area AA. For example, the third insulating layer 40 can be made of an organic material such as benzocyclobutene or photoacrylic. However, this embodiment is not limited thereto.

[0098] The third insulating layer 40 may comprise at least one first incised pattern IP1 (IP1-1, IP1-2, IP1-3) and at least one second incised pattern IP2. The first and second incised patterns IP1 and IP2 may be in a form in which the thickness of the third insulating layer 40 is partially removed from the top surface. The first and second incised patterns IP1 and IP2 may be spaces in which multiple light-emitting diodes (LDs) are fixed during the stamping process. The term "fixing space" does not necessarily mean a space in which the light-emitting diodes (LDs) are fixed. For example, the fixing space may include both a space in which the light-emitting diodes (LDs) are temporarily fixed and then detached during the stamping process, and a space in which they are transferred and fixed.

[0099] The first and second incised patterns IP1 and IP2 can guide the positions of the multiple light-emitting elements (LDs) during the transfer process for transferring them to the display panel 1. The multiple light-emitting elements (LDs) can be transferred onto the first and second incised patterns IP1 and IP2 during the transfer process for the multiple light-emitting elements (LDs).

[0100] For example, a pair of light-emitting elements LD1-1 and LD1-2 can be arranged in the first-first incised pattern IP1-1 with a first adhesive layer 45 in between. The first-first incised pattern IP1-1 may have a predetermined area large enough to accommodate a pair of light-emitting elements LD1-1 and LD1-2 separated by a first distance D1. For example, if each light-emitting element LD is formed with a Y-axis length longer than the X-axis length, and the pair of light-emitting elements LD1-1 and LD1-2 are arranged in the Y-axis direction, the first-first incised pattern IP1-1 can be made so that the Y-axis length is longer than the X-axis length.

[0101] A second adhesive layer 47 may be formed on each second incised pattern IP2. In the display panel according to the first embodiment of this specification, one second incised pattern IP2 may be formed such that one first-1 incised pattern IP1-1 corresponds to one second incised pattern IP2. The second incised pattern IP2 may be a region on which one of a pair of light-emitting elements LD1-1, LD1-2 formed on the first-1 incised pattern IP1-1 during the stamping process is temporarily fixed. Therefore, the second incised pattern IP2 according to this embodiment may have a smaller area on the plane of the display panel than the first-1 incised pattern IP1-1.

[0102] The first-1 incised pattern IP1-1 and the second incised pattern IP2 can form a second distance D2. In the secondary stamping method, multiple LED chips during the primary stamping process can be transferred to the first-1 incised pattern IP1-1 and the second incised pattern IP2. The second distance D2 may be a predetermined distance to prevent clustering defects of light-emitting elements, etc., during the primary stamping process. For example, the second distance D2 may be less than or equal to half of the second pitch SPP, which is the shortest distance between subpixel units SP.

[0103] The adhesive layers 45 and 47 can be placed on the respective incised patterns IP1 and IP2 of the third insulating layer 40. The adhesive layers 45 and 47 may comprise a first adhesive layer 45 placed on each first incised pattern IP1 and a second adhesive layer 47 placed on each second incised pattern IP2. For example, the first and second adhesive layers 45 and 47 may include optically clear adhesive (OCA), optically clear resin (OCR), or pressure-sensitive adhesive (PSA). However, this embodiment is not limited thereto.

[0104] The first adhesive layer 45 can be placed on each of the first incised patterns IP1. The first adhesive layer 45 can be formed along the side and bottom surfaces of the first-1 incised patterns IP1-1. The first adhesive layer 45 can consist of a bottom surface ca1 in contact with the bottom surface of the first-1 incised patterns IP1-1, an upper surface ca2 in contact with the light-emitting elements LD1-1 and LD1-2, and a groove H. The groove H of the first adhesive layer 45 can consist of a bottom surface ca3 adjacent to the substrate 10 side of the upper surface ca2, and a side surface ca4 between the upper surface ca2 and the bottom surface ca3.

[0105] To improve the contact capability of the electrodes 93a, 93b, 91a, and 91b of the light-emitting elements LD1-1 and LD1-2, an etching process can be performed after transferring the light-emitting elements LD1-1 and LD1-2 to the adhesive layer. During this process, the adhesive layer in areas not overlapping with the light-emitting elements LD1-1 and LD1-2 is etched, and grooves H of the first adhesive layer 45 can be formed.

[0106] This can result in a difference in the thickness of the first adhesive layer 45. The first adhesive layer 45 can have a first thickness t1 between the lower surface ca1 and the bottom surface ca3 of the groove H, and a second thickness t2 between the upper surface ca2 and the lower surface ca1. As a result of the etching process, the first thickness t1 can be made thinner than the second thickness t2.

[0107] A second adhesive layer 47 can be placed on a second incised pattern IP2. The second adhesive layer 47 can be formed along the sides and bottom of the second incised pattern IP2. The second incised pattern IP2 can consist of a bottom surface cb1 in contact with the third insulating layer 40 and an upper surface cb2 facing the bottom surface cb1. A third thickness t3 can be formed between the upper surface cb2 and the bottom surface cb1 of the second incised pattern IP2. When the first and second adhesive layers 45 and 47 are formed in the same process, the third thickness t3 can be similar to the first thickness t1 as a result of the etching process. The third thickness t3 can also be configured to be thinner than the second thickness t2.

[0108] The first and second adhesive layers 45, 47 can be placed over the entire third insulating layer 40, which has the first-1 incised pattern IP1-1 and the second incised pattern IP2, prior to the etching process. The etching process can remove the adhesive layers that are located on the upper surface of the third insulating layer 40, excluding the first-1 incised pattern IP1-1 and the second incised pattern IP2. However, the display panels herein are not limited thereto, and adhesive layer material may be partially present on the upper surface of the third insulating layer 40.

[0109] A pair of first-first and first-second light-emitting elements LD1-1 and LD1-2 can be arranged on the first adhesive layer 45. In one example, each of the first-first and first-second light-emitting elements LD1-1 and LD1-2 may comprise a light-emitting layer, first electrodes (or anode terminals) 93a, 93b, and second electrodes (or cathode terminals) 91a, 91b.

[0110] The light-emitting layer can emit light through the recombination of electrons and holes caused by an electric current flowing between the first electrodes 93a, 93b and the second electrodes 91a, 91b. An example of a light-emitting layer may comprise first semiconductor layers 94a, 94b, active layers 96a, 96b, and second semiconductor layers 98a, 98b.

[0111] The first semiconductor layers 94a and 94b can supply electrons to the active layers 96a and 96b. For example, the first semiconductor layers 94a and 94b can be made of an n-GaN-based semiconductor material, and as the n-GaN-based semiconductor material, GaN, AlGaN, InGaN, or AlInGaN may be used. Here, as impurities used for doping the first semiconductor layers 94a and 94b, Si, Ge, Se, Te, or C may be used.

[0112] The active layers 96a and 96b can be provided on one side of the first semiconductor layers 94a and 94b. Such active layers 96a and 96b can have a multi-quantum well (MQW) structure having a well layer and a barrier layer with a band gap higher than that of the well layer. For example, the active layers 96a and 96b can have a multi-quantum well structure such as InGaN / GaN.

[0113] The second semiconductor layers 98a and 98b are provided on the active layers 96a and 96b and can provide holes to the active layers 96a and 96b. For example, the second semiconductor layers 98a and 98b can be made of a p-GaN-based semiconductor material, and as the p-GaN-based semiconductor material, GaN, AlGaN, InGaN, or AlInGaN may be used. Here, the impurities used for doping the second semiconductor layers 98a and 98b may be Mg, Zn, or Be.

[0114] The first electrodes 93a and 93b can be provided on the second semiconductor layers 98a and 98b. Such first electrodes 93a and 93b can be connected to the source electrode 31 of at least one transistor T.

[0115] The second electrodes 91a and 91b can be provided on the other side of the first semiconductor layers 94a and 94b so as to be electrically isolated from the active layers 96a and 96b and the second semiconductor layers 98a and 98b. Such second electrodes 91a and 91b can be connected to the common power supply wiring 15.

[0116] For example, each of the first and second electrodes 93a, 93b, 91a, and 91b may be made of a material containing one or more metallic substances and alloys thereof, such as Au, W, Pt, Si, Ir, Ag, Cu, Ni, Ti, or Cr. Another example is that each of the first and second electrodes 93a, 93b, 91a, and 91b may be made of a transparent conductive material, and such transparent conductive material may, but is not limited to, ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide).

[0117] The first-first and first-second light-emitting elements LD1-1 and LD1-2 can emit light through the recombination of electrons and holes by an electric current flowing between their respective first electrodes 93a and 93b and second electrodes 91a and 91b. For example, the light emitted from the first-first and first-second light-emitting elements LD1-1 and LD1-2 can pass through their respective first and second electrodes 93a, 93b, 91a, and 91b and be emitted to the outside. The light emitted from the first-first and first-second light-emitting elements LD1-1 and LD1-2 can pass through their respective first and second electrodes 93a, 93b, 91a, and 91b and be emitted in a second direction opposite to a first direction toward the bottom surface of the first-first engraved pattern IP1-1, thereby displaying an image.

[0118] The fourth insulating layer 50 can be placed on the third insulating layer 40 on which the adhesive layers 45, 47 and the light-emitting element LD are formed. The fourth insulating layer 50 can be formed over the entire display area AA, except for the upper surface of the light-emitting element LD. The fourth insulating layer 50 can expose the upper surface of the light-emitting element LD for contact with the electrodes 91a, 91b, 93a, 93b on the upper surface of the light-emitting element LD.

[0119] The fourth insulating layer 50 is composed of a photoresist material containing a black organic pigment. The fourth insulating layer 50 is a structure that surrounds the light-emitting region of the light-emitting element LD, and a material containing a black pigment may be used. For example, the fourth insulating layer 50 may consist of an inorganic substance such as silicon oxide (SiOx) or silicon nitride (SiNx) containing a black pigment, or an organic substance such as benzocyclobutene or photoacryl. However, this embodiment is not limited thereto.

[0120] The fifth insulating layer 60 is positioned on a portion of the fourth insulating layer 50 and can be positioned at least between the first and second electrodes 93a, 91a of the first-1 light-emitting element LD1-1 and at least between the first and second electrodes 93b, 91b of the first-2 light-emitting element LD1-2. The fifth insulating layer 60 can prevent short circuits between the first and second electrodes 93a, 93b, 91a, 91b. The upper surface of the fifth insulating layer 60 positioned on a portion of the fourth insulating layer 50 can be positioned higher than the upper surface of the light-emitting element LD in the Z-axis direction relative to the substrate 10. For example, the fifth insulating layer 60 can be configured to protrude from the light-emitting element LD in the Z-axis direction relative to the substrate 10.

[0121] For example, the fifth insulating layer 60 may be made of an organic material such as benzocyclobutene or photoacrylic. However, this embodiment is not limited thereto.

[0122] The first and second pixel electrodes 55a, 55b and the first and second common electrodes 51a, 51b can be arranged on the substrate 10 on which the fifth insulating layer 60 is formed.

[0123] The first pixel electrode 55a in contact with the first-first light-emitting element LD1-1 and the second pixel electrode 55b in contact with the first-second light-emitting element LD1-2 can be formed integrally and connected in series. However, this embodiment is not limited thereto. For example, the first and second pixel electrodes 55a and 55b can be formed separately and connected in parallel.

[0124] The first and second pixel electrodes 55a, 55b are connected in series, and the two first electrodes 93a, 93b can be connected to the source electrode 31 of at least one transistor T. Such first and second pixel electrodes 55a, 55b can be defined as anode electrodes. For example, the first and second pixel electrodes 55a, 55b can be provided on the top and side surfaces of a fifth insulating layer 60 that overlaps with the first electrodes 93a, 93b of the first-1 and first-2 light-emitting elements LD1-1, LD1-2, and on the side and bottom surfaces of a fourth insulating layer 50 positioned between the first-1 and first-2 light-emitting elements LD1-1, LD1-2.

[0125] Parts of the pixel electrodes 55a and 55b can be electrically connected to the source electrode 31 of at least one transistor T via contact holes provided through the second and third insulating layers 30 and 40. The first pixel electrode 55a can be connected to the first electrode 93a of the first-1 light-emitting element LD1-1, which is exposed between the fourth insulating layer 50 and the fifth insulating layer 60. The second pixel electrode 55b can be electrically connected to the first electrode 93b of the first-2 light-emitting element LD1-2, which is exposed between the fourth insulating layer 50 and the fifth insulating layer 60.

[0126] As a result, the first electrodes 93a and 93b can be electrically connected to the source electrode 31 of at least one transistor T via the first and second pixel electrodes 55a and 55b. For example, if the display device is a top-emission type, the pixel electrodes 55a and 55b can be made of a transparent conductive material. For example, if the display device is a bottom-emission type, the pixel electrodes 55a and 55b can be made of a light-reflective conductive material.

[0127] As the transparent conductive material, ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide) may be used, but are not limited to these. As the light-reflecting conductive material, Al, Ag, Au, Pt, or Cu may be used, but are not limited to these. When the pixel electrodes 55a and 55b are made of a light-reflecting conductive material, they may consist of a single layer containing the light-reflecting conductive material or a multilayer in which the single layer is stacked.

[0128] The first and second common electrodes 51a and 51b can be electrically connected. For example, the first and second common electrodes 51a and 51b can be integrally formed on the outside of the first and second light-emitting elements LD1-1 and LD1-2. However, this embodiment is not limited thereto. Also, the common electrodes 51a and 51b can be made of the same material as the pixel electrodes 55a and 55b.

[0129] The common electrodes 51a and 51b can electrically connect the second electrodes 91a and 91b of the first-1 and first-2 light-emitting elements LD1-1 and LD1-2, respectively, to the common power supply wiring 15. In some cases, the common electrodes 51a and 51b can be defined as cathode electrodes. The common electrodes 51a and 51b can be positioned along the top, side, and bottom surfaces of the fourth insulating layer 50, and along the side and top surfaces of the fifth insulating layer 60.

[0130] For example, the first common electrode 51a can overlap with the second electrode 91a exposed between the fourth insulating layer 50 and the fifth insulating layer 60. For example, the second common electrode 51b can overlap with the second electrode 91b exposed between the fourth insulating layer 50 and the fifth insulating layer 60.

[0131] In one example, one side of the second common electrode 51b can be electrically connected to the common power wiring 15 via a contact hole provided through the first to fourth insulating layers 20, 30, 40, and 50. In one example, one side of the first common electrode 51a can be electrically connected to the second electrode 91a of the first-1 light-emitting element LD1-1, and the other side of the second common electrode 51b can be electrically connected to the second electrode 91b of the first-2 light-emitting element LD1-2. As a result, the second electrodes 91a and 91b of the first-1 and first-2 light-emitting elements LD1-1 and LD1-2 can be electrically connected to the common power wiring 15 via the common electrodes 51a and 51b.

[0132] In one example, the pixel electrodes 55a, 55b and the common electrodes 51a, 51b can be formed simultaneously by an electrode patterning process utilizing a deposition process for depositing electrode material, a photolithography process, and an etching process. As a result, the display panel according to this embodiment can simultaneously form the pixel electrodes 55a, 55b and the common electrodes 51a, 51b that connect the light-emitting element LD to the pixel driving circuit PD. Furthermore, the display panel according to this embodiment can simplify the electrode connection process. In addition, the display panel according to this embodiment can significantly reduce the process time for connecting the light-emitting element LD and the pixel driving circuit PD, thereby improving the productivity of the display panel.

[0133] The sixth insulating layer 70 can be placed on the substrate 10 on which the pixels and common electrodes 55a, 55b, 51a, 51b are formed. The sixth insulating layer 70 can be placed around a pair of light-emitting elements LD1-1, LD1-2. For example, the sixth insulating layer 70 can be in contact with the upper surfaces of the pixels and common electrodes 55a, 55b, 51a, 51b in some areas, as shown in Figure 4. For example, the sixth insulating layer 70 can be in contact with the ends of the pixels and common electrodes 55a, 55b, 51a, 51b in some areas, as shown in Figure 5. However, the display panel according to this specification is not limited thereto.

[0134] The sixth insulating layer 70 can overlap with the fifth insulating layer 60, which is partially positioned on the fourth insulating layer 50. Therefore, the sixth insulating layer 70 positioned on the protruding fifth insulating layer 60 can prevent color mixing between adjacent subpixel units SP.

[0135] For example, the sixth insulating layer 70 may consist of a material containing a black pigment. For example, the sixth insulating layer 70 may consist of an inorganic substance such as silicon oxide (SiOx) or silicon nitride (SiNx), or an organic substance such as benzocyclobutene or photoacrylic. Such a sixth insulating layer 70 may be omitted. However, this embodiment is not limited thereto.

[0136] A transparent buffer layer 80 may be placed on the sixth insulating layer 70. The transparent buffer layer 80 can be placed on the substrate 10 on which the sixth insulating layer 70 is formed, providing a flat surface. The transparent buffer layer 80 can cover at least the entire display area AA of the substrate 10. The transparent buffer layer 80 can protect the light-emitting element LD and the circuit formed on the substrate 10 from external impacts. For example, the transparent buffer layer 80 may be made of, but is not limited to, OCA (optical clear adhesive) or OCR (optical clear resin).

[0137] In the following embodiments, we will omit explanations of the same configurations as those of the display panel according to the first embodiment.

[0138] Figure 6 shows a first modified example of the display panel according to the first embodiment of this specification. Figure 6 is a schematic plan view of one of the multiple pixels P.

[0139] As shown in Figure 6 by linking Figure 2, the display panel according to the Specified Spectrum, according to the first modification of the first embodiment, may have a plurality of first pattern regions (IA1 in Figure 2) comprising a plurality of first engraved patterns IP1, and a second pattern region IA2 comprising a plurality of second engraved patterns IP2. Here, each first engraved pattern IP1 may include a subpixel unit SP comprising a pair of light-emitting elements LD1 and LD2.

[0140] The multiple first engraved patterns IP1 according to this embodiment can be arranged spaced apart from each other in the X-axis direction. The distance between each of the first engraved patterns IP1 can be a predetermined distance to prevent clumping defects during the primary stamping process. For example, the distance between each of the first engraved patterns IP1 can be formed to be 2 chip pitch or more.

[0141] Each first engraved pattern IP1 may be formed with a length in the Y-axis direction that is longer than the X-axis direction, such that a pair of light-emitting elements LD1 and LD2 are arranged inside in the Y-axis direction. Each first engraved pattern IP1 may be provided in a size that allows a pair of light-emitting elements LD1 and LD2 to be spaced apart by a predetermined first distance D1.

[0142] In this embodiment, a plurality of second incised patterns IP2 can be arranged corresponding to each of the first incised patterns IP1. Each second incised pattern IP2 can be arranged on one side of each of the first incised patterns IP1 with respect to the Y-axis direction. Furthermore, in the secondary stamping method, in order to prevent clumping defects during the primary stamping process, each second incised pattern IP2 can be separated from the corresponding first incised pattern IP1 by a predetermined second distance D2 or more in the Y-axis direction. For example, the second distance D2 may be 1 / 2 or less of the second pitch SPP.

[0143] The second incised pattern IP2 may be a region where one of the pair of light-emitting elements LD1 and LD2 is temporarily transferred during the primary stamping process. Therefore, the second incised pattern IP2 may have an area corresponding to at least one light-emitting element.

[0144] Each subpixel unit SP according to this embodiment may be contained within each first incised pattern IP1. Each subpixel unit SP may comprise a pair of first and second light-emitting elements LD1 and LD2. The pair of light-emitting elements LD1 and LD2 may be arranged side by side in the Y-axis direction.

[0145] A pair of light-emitting elements LD1 and LD2 can be arranged such that their respective light-emitting regions face each other. Here, the light-emitting region may include the region where the first electrode E1 of each of the pair of light-emitting elements LD1 and LD2 is located. As a result, the display panel according to this specification can achieve a constant wavelength dispersion of color by arranging the light-emitting regions of the pair of light-emitting elements LD1 and LD2 adjacent to each other.

[0146] The first and second light-emitting elements LD1 and LD2 may each include a first electrode E1 and a second electrode E2. Here, the first electrode E1 is in a region that overlaps with the active layer of the light-emitting element and can overlap with most of the light-emitting region. As a result, the display panel of this embodiment can achieve a constant wavelength dispersion of color by arranging the first electrodes E1 to face each other.

[0147] The distance between the first and second light-emitting elements LD1 and LD2 may be a first distance D1. The first distance D1 of the display panel according to this specification may be a distance smaller than the binocular vision function. For example, the first distance D1 may be formed to be less than or equal to half of the first pitch PP, and less than or equal to one-tenth of the first pitch PP.

[0148] The display panel described herein can transfer a pair of light-emitting elements LD1 and LD2 via a 2nd stamping method, and form a first distance D1 smaller than the minimum perceptible pixel interval at the viewing distance. This has the effect of making it impossible for viewers to perceive uneven defects even if defects occur continuously in subpixels in each subpixel unit. When the 2nd stamping method is adopted, productivity can be improved for transferring a pair of light-emitting elements LD1 and LD2 that are arranged in different directions from each other.

[0149] Figure 7 shows a second modified example of the display panel according to the first embodiment of this specification. Figure 7 is a schematic plan view of one of the multiple pixels P.

[0150] As shown in Figure 7 by linking Figure 2, the display panel according to the present specification, according to a second modification of the first embodiment, may have a first pattern region (IA1 in Figure 2) comprising a plurality of first engraved patterns IP1, and a second pattern region (IA2 in Figure 2) comprising a plurality of second engraved patterns IP2. One first engraved pattern IP1 may include a subpixel unit SP comprising a pair of light-emitting elements LD1, LD2.

[0151] In this embodiment, a plurality of first incised patterns IP1 can be arranged spaced apart from each other in the X-axis direction. A single second incised pattern IP2 can be placed in the space between the plurality of first incised patterns IP1.

[0152] Each first engraved pattern IP1 may be formed with a length in the X-axis direction that is longer than the Y-axis direction, such that a pair of light-emitting elements LD1 and LD2 are arranged inside in the X-axis direction. Each first engraved pattern IP1 may be provided in a size that allows a pair of light-emitting elements LD1 and LD2 to be spaced apart by a predetermined first distance D1.

[0153] In this embodiment, a plurality of second incised patterns IP2 can be arranged corresponding to each of the first incised patterns IP1. Each second incised pattern IP2 can be arranged on one side of each of the first incised patterns IP1 with respect to the X-axis direction. In the secondary stamping method, in order to prevent clumping defects during the primary stamping process, each second incised pattern IP2 can be separated from the corresponding first incised pattern IP1 by a predetermined second distance D2 in the X-axis direction. For example, the second distance D2 may be 1 / 2 or less of the second pitch SPP.

[0154] The second incised pattern IP2 may be a region where one of the pair of light-emitting elements LD1 and LD2 is temporarily transferred during the primary stamping process. Therefore, the second incised pattern IP2 may have an area corresponding to at least one light-emitting element.

[0155] The subpixel unit SP according to this embodiment may comprise a pair of first and second light-emitting elements LD1 and LD2. The pair of light-emitting elements LD1 and LD2 may be arranged side by side in the X-axis direction. The light-emitting regions of the pair of light-emitting elements LD1 and LD2 may be arranged in opposite directions with respect to the Y-axis direction. As a result, the display panel according to this specification can achieve a constant wavelength dispersion of color by arranging the light-emitting regions of the pair of light-emitting elements LD1 and LD2 adjacent to each other with respect to the X=Y axis (diagonal direction).

[0156] The first and second light-emitting elements LD1 and LD2 may each include a first electrode E1 and a second electrode E2. The first electrode E1 is in a region that overlaps with the active layer of the light-emitting element and can overlap with most of the light-emitting region.

[0157] The distance between the first and second light-emitting elements LD1 and LD2 may be a first distance D1. The first distance D1 of the display panel according to this specification may be a distance smaller than the binocular vision function. For example, the first distance D1 may be formed to be less than or equal to half of the first pitch PP, and less than or equal to one-tenth of the first pitch PP.

[0158] The display panel described herein can transfer a pair of light-emitting elements LD1 and LD2 via a 2nd stamping method, and form a first distance D1 smaller than the minimum perceptible pixel interval at the viewing distance. This has the effect of making it impossible for viewers to perceive uneven defects even if defects occur continuously in subpixels in each subpixel unit. When the 2nd stamping method is adopted, productivity can be improved for transferring a pair of light-emitting elements LD1 and LD2 that are arranged in different directions from each other.

[0159] Figure 8 is a plan view of the display panel according to the second embodiment of this specification, and Figure 9 is a cross-sectional view taken along line III-III' in Figure 8. Figure 8 is a schematic plan view of one of a plurality of pixels P.

[0160] As shown in Figures 8 and 9, the display panel according to this embodiment comprises a third insulating layer 140 comprising 11th and 12th engraved patterns IP11 and IP12, a first adhesive layer 145a, 145b and a second adhesive layer (not shown) on the third insulating layer 140, a fourth insulating layer 150 covering the first adhesive layer 145a, 145b and the second adhesive layer (not shown) and exposing the light-emitting elements LD1 and LD2, a fifth insulating layer 160 disposed on a part of the fourth insulating layer 150, pixel electrodes 155a and 155b that contact the first electrodes 93a and 93b of the light-emitting elements LD1 and LD2, common electrodes 151a and 151b that contact the second electrodes 91a and 91b, a sixth insulating layer 170 disposed around the light-emitting elements LD1 and LD2, and a transparent buffer layer 180 that flattens the non-planar surface on the substrate 10.

[0161] As shown in Figures 8 and 9 by connecting Figure 2, the display panel according to the present invention according to the second embodiment may have a plurality of first pattern regions (IA1-1, IA1-2, IA1-3 in Figure 2) each comprising an eleventh incised pattern IP11, a twelfth incised pattern IP12, and a protruding pattern EP, and a plurality of second incised patterns IP2 as a second pattern region (IA2 in Figure 2).

[0162] Multiple first pattern regions, each comprising an eleventh incised pattern IP11, a twelfth incised pattern IP12, and a protruding pattern EP, can be spaced apart from each other in the X-axis direction. A second incised pattern IP2 can be placed between each of the first pattern regions as a second pattern region.

[0163] The 11th and 12th incised patterns IP11 and IP12 can be spaced apart from each other in the Y-axis direction. A first light-emitting element LD1 can be placed inside the 11th incised pattern IP11, and a second light-emitting element LD2 can be placed inside the 12th incised pattern IP12. Each of the 11th and 12th incised patterns IP11 and IP12 can be provided with a size corresponding to at least the area of ​​the light-emitting element. For example, if the length of the light-emitting element is longer in the Y-axis direction than in the X-axis direction, each of the 11th and 12th incised patterns IP11 and IP12 can be formed with a length in the Y-axis direction that is longer than in the X-axis direction.

[0164] The protruding pattern EP can be positioned between the 11th and 12th incised patterns IP11 and IP12. The protruding pattern EP can be made along the length of the 11th and 12th incised patterns IP11 and IP12 in the X-axis direction. The protruding pattern EP can be integral with the third insulating layer 140. The protruding pattern EP can be formed together with the formation of the 11th and 12th incised patterns IP11 and IP12 of the third insulating layer 140.

[0165] As shown in Figure 9, the protruding pattern EP may have a form that protrudes in the Z-axis direction (away from the substrate 10) from the bottom surface of the 11th and 12th incised patterns IP11 and IP12. The protruding pattern EP may have sides of the adjacent 11th and 12th incised patterns IP11 and IP12. The protruding pattern EP may partially overlap the 11th and 12th incised patterns IP11 and IP12.

[0166] The protruding pattern EP can prevent interference between two light-emitting elements when transferring the light-emitting elements to the 11th and 12th incised patterns IP11 and IP12 during the light-emitting element transfer process. The 11th and 12th incised patterns IP11 and IP12 can guide the positions of multiple light-emitting elements LDs during the transfer process in which multiple light-emitting elements LDs are transferred to the display panel 1.

[0167] In this embodiment, by configuring a protruding pattern EP, protrusions 100a can be further provided on the protruding pattern EP. The protrusions 100a may include a first protrusion 150a of the fourth insulating layer 150, a second protrusion 160a of the fifth insulating layer 160, and a third protrusion 170a of the sixth insulating layer 170. The first to third protrusions 150a, 160a, and 170a can be naturally formed during the formation of the insulating layers of the protruding pattern EP due to its protruding shape. The first to third protrusions 150a, 160a, and 170a may be omitted or selectively formed, depending on the circumstances.

[0168] By forming a protruding pattern EP, the first adhesive layer can be positioned on each of the 11th and 12th incised patterns IP11 and IP12. Therefore, the first adhesive layer according to this embodiment may comprise a first adhesive layer 145a positioned on the 11th incised pattern IP11 and a first adhesive layer 145b positioned on the 12th incised pattern IP12.

[0169] In this embodiment, the multiple second incised patterns IP2 can be arranged in correspondence to either one of the 11th and 12th incised patterns IP11 and IP12. Each second incised pattern IP2 can be arranged on either side of the 11th and 12th incised patterns IP11 and IP12 with respect to the X-axis direction. Furthermore, in the secondary stamping method, in order to prevent clumping defects during the primary stamping process, each second incised pattern IP2 can be separated from the corresponding 11th and 12th incised patterns IP11 and IP12 by a predetermined second distance D2 in the X-axis direction. For example, the second distance D2 can be formed to be 1 / 2 or less of the second pitch SPP.

[0170] The second incised pattern IP2 may be a region where one of the pair of light-emitting elements LD1 and LD2 is temporarily transferred during the primary stamping process. Therefore, the second incised pattern IP2 may have an area corresponding to at least one light-emitting element.

[0171] A first light-emitting element LD1 can be positioned in an eleventh incised pattern IP11, and a second light-emitting element LD2 can be positioned in a twelfth incised pattern IP12. Such a pair of first and second light-emitting elements LD1 and LD2 can constitute a subpixel unit SP. The first electrodes E1 of each of the pair of light-emitting elements LD1 and LD2 can be positioned facing each other. The first electrodes E1 of the light-emitting elements are in a region that overlaps with the active layer of the light-emitting element and can overlap with most of the light-emitting region. This allows the display panel according to this specification to have a constant wavelength dispersion of color.

[0172] The distance between the first and second light-emitting elements LD1 and LD2 may be a first distance D1. The first distance D1 of the display panel according to this specification may be a distance smaller than the binocular viewing distance. For example, the first distance D1 may be less than or equal to half of the first pitch PP, and less than or equal to one-tenth of the first pitch PP. This has the effect that even if defects occur in subpixels continuously in each subpixel unit, the viewer will not perceive the uneven defects. Furthermore, by adopting a secondary stamping method, the productivity of transferring a pair of light-emitting elements LD1 and LD2, which are arranged in different directions from each other, can be improved.

[0173] Figure 10 shows a first modified example of the display panel according to the second embodiment of this specification. Figure 10 is a schematic plan view of one of a plurality of pixels P.

[0174] As shown in Figure 10 by linking Figure 2, the display panel according to the present specification according to the first modified example of the second embodiment may have a first plurality of first pattern regions (IA1-1, IA1-2, IA1-3 in Figure 2) each comprising an eleventh engraved pattern IP11, a twelfth engraved pattern IP12, and a protruding pattern EP, and a second pattern region (IA2 in Figure 2) comprising a plurality of second engraved patterns IP2.

[0175] Multiple first pattern regions, each comprising an eleventh incised pattern IP11, a twelfth incised pattern IP12, and a protruding pattern EP, can be spaced apart from each other in the X-axis direction. A second incised pattern IP2 can be positioned as a second pattern region between each of the first pattern regions.

[0176] The eleventh and twelfth incised patterns IP11 and IP12 can be spaced apart from each other in the X-axis direction. A first light-emitting element LD1 may be placed inside the eleventh incised pattern IP11. A second light-emitting element LD2 may be placed inside the twelfth incised pattern IP12.

[0177] Each of the 11th and 12th incised patterns IP11 and IP12 can be provided with a size corresponding to at least the area of ​​the light-emitting element. For example, if the area of ​​the light-emitting element is longer in the Y-axis direction than in the X-axis direction, each of the 11th and 12th incised patterns IP11 and IP12 can be formed with a length in the Y-axis direction that is longer than in the X-axis direction.

[0178] The protruding pattern EP can be positioned between the 11th and 12th engraved patterns IP11 and IP12. The protruding pattern EP can be made along the Y-axis length of the 11th and 12th engraved patterns IP11 and IP12. The protruding pattern EP can be integral with the third insulating layer (140 in Figure 9). The protruding pattern EP is not limited to the location shown in Figure 10 and can partially overlap with the adjacent sides of the 11th and 12th engraved patterns IP11 and IP12.

[0179] In this embodiment, a plurality of second incised patterns IP2 can be arranged in correspondence with the 11th and 12th incised patterns IP11 and IP12. Each second incised pattern IP2 can be arranged on either side of the 11th and 12th incised patterns IP11 and IP12 with respect to the X-axis direction. In the secondary stamping method, in order to prevent clumping defects during the primary stamping process, each second incised pattern IP2 can be separated from the corresponding 11th and 12th incised patterns IP11 and IP12 by a predetermined second distance D2 in the X-axis direction. For example, the second distance D2 may be 1 / 2 or less of the second pitch SPP.

[0180] The second incised pattern IP2 may be a region where one of the pair of light-emitting elements LD1 and LD2 is temporarily transferred during the primary stamping process. Therefore, the second incised pattern IP2 may have an area corresponding to at least one light-emitting element.

[0181] A first light-emitting element LD1 can be placed in an eleventh incised pattern IP11, and a second light-emitting element LD2 can be placed in a twelfth incised pattern IP12. Such a pair of first and second light-emitting elements LD1 and LD2 can constitute a subpixel unit SP. In this case, the pair of light-emitting elements LD1 and LD2 can be arranged so that their respective light-emitting regions are in opposite directions with respect to the Y-axis. As a result, the display panel according to this specification can achieve a constant wavelength dispersion of color by arranging the light-emitting regions of the pair of light-emitting elements LD1 and LD2 adjacent to each other with respect to the X=Y axis.

[0182] The distance between the first and second light-emitting elements LD1 and LD2 may be a first distance D1. The first distance D1 of the display panel according to this specification may be a distance smaller than the binocular viewing distance. For example, the first distance D1 may be less than or equal to half of the first pitch PP, and less than or equal to one-tenth of the first pitch PP. This has the effect that even if defects occur in subpixels continuously in each subpixel unit, the viewer will not perceive the uneven defects. Furthermore, by adopting a secondary stamping method, the productivity of transferring a pair of light-emitting elements LD1 and LD2, which are arranged in different directions from each other, can be improved.

[0183] Figure 11a is a plan view of the display panel according to the third embodiment of this specification, and Figure 11b is a plan view comparing the first and second incised patterns of Figure 11a. Figure 12 is a cross-sectional view of IV-IV' in Figure 11a, where Figure 11a is a schematic plan view of one pixel P among a plurality of pixels P.

[0184] As shown in Figures 11a to 12, the display panel according to this embodiment comprises a third insulating layer 240 comprising 11th and 12th incised patterns IP11 and IP12, first and second adhesive layers 245 and 247 on the third insulating layer 240, a fourth insulating layer 250 covering the first and second adhesive layers 245 and 247 and exposing the light-emitting elements LD1 and LD2, a fifth insulating layer 260 disposed on a part of the fourth insulating layer 250, a common electrode 251b that contacts the second electrode 91b of the light-emitting elements LD1 and LD2, a sixth insulating layer 270 disposed around the light-emitting elements LD1 and LD2, and a transparent buffer layer 280 that flattens the non-flat surfaces on the substrate 10.

[0185] As shown in Figure 11a when Figure 2 is connected, the display panel of the Specified Specification according to the third embodiment may have a plurality of first pattern regions (IA1-1, IA1-2, IA1-3 in Figure 2) each comprising an eleventh engraved pattern IP11, a twelfth engraved pattern IP12, and a protruding pattern EP, and a plurality of second engraved patterns IP2 as a second pattern region (IA2 in Figure 2).

[0186] As shown in Figures 11a and 11b, in the display panel according to this embodiment, the first area A1 of each of the 11th and 12th incised patterns IP11 and IP12 may be configured to be larger than the second area A2 of the second incised pattern IP2. As shown in Figure 12, the first length A1-a of each of the 11th and 12th incised patterns IP11 and IP12 with respect to the X axis may be configured to be longer than the second length A2-a of the second incised pattern IP2.

[0187] The 11th and 12th incised patterns IP11 and IP12 may be regions where light-emitting elements LD1 and LD2 are transferred and adhered during the stamping process. In contrast, the second incised pattern IP2 may be a non-transfer region where one of the pair of light-emitting elements LD1 and LD2 can be transferred and temporarily fixed during the stamping process, but ultimately not transferred.

[0188] The 11th and 12th incised patterns IP11 and IP12 are formed to be significantly larger than the area of ​​the light-emitting elements LD1 and LD2, allowing relatively strong pressure to be applied. Forming them to be larger than the area of ​​the light-emitting elements LD1 and LD2 may mean that they can be formed to be larger than the second incised pattern IP2. Applying relatively strong pressure may mean that even greater pressure is applied to the 11th and 12th incised patterns IP11 and IP12 than to the second incised pattern IP2. Therefore, even if the adhesive layer is formed substantially unevenly on the 11th and 12th incised patterns IP11 and IP12, or if a pressure difference occurs in the donor, the transfer is performed with a relatively large force, thus reducing the defect rate of untransferred light-emitting elements.

[0189] Figure 13 is a plan view of the display panel according to the fourth embodiment of this specification. Figure 13 is a schematic plan view of one of the multiple pixels P.

[0190] As shown in Figure 13 by linking Figure 2, the display panel according to the fourth embodiment of this specification may have a first engraved pattern IP1 in each of a plurality of first pattern regions (IA1-1, IA1-2, IA1-3 in Figure 2), and a plurality of second engraved patterns IP2 and a plurality of first dummy engraved patterns DP1 in a second pattern region (IA2 in Figure 2). For example, the first dummy engraved pattern DP1 can be formed in the same way as the second engraved pattern IP2.

[0191] The second incised pattern IP2 and the first dummy incised pattern DP1 can be placed on one side of each of the multiple first incised patterns IP1. The second incised pattern IP2 and the first dummy incised pattern DP1 can be placed corresponding to each of the pair of light-emitting elements LD1 and LD2 placed on the first incised pattern IP1. As shown in Figure 13, if the pair of light-emitting elements LD1 and LD2 are arranged side by side in the Y-axis direction, the second incised pattern IP2 and the first dummy incised pattern DP1 can also be arranged side by side in the Y-axis direction.

[0192] For example, the first dummy incised pattern DP1 can be positioned corresponding to one side of the first light-emitting element LD1, and the second incised pattern IP2 can be positioned corresponding to one side of the second light-emitting element LD2. Compared to previous embodiments, the display panel according to this embodiment can further include the first dummy incised pattern DP1 as a configuration that is positioned corresponding to the light-emitting elements. This can improve the degree of freedom in the transfer direction of the display panel according to this embodiment. Furthermore, the first dummy incised pattern DP1 can further accommodate an adhesive layer, allowing for a more uniform thickness of the adhesive layer within the incised pattern.

[0193] Figure 14 shows a first modified example of the display panel according to the fourth embodiment of this specification. Figure 14 is a schematic plan view of one of a plurality of pixels P.

[0194] As shown in Figure 14 by linking Figure 2, the display panel according to the present specification according to the first modified example of the fourth embodiment may have a first engraved pattern IP1 in each of a plurality of first pattern regions (IA1-1, IA1-2, IA1-3 in Figure 2), and a second pattern region (IA2 in Figure 2) may have a plurality of second engraved patterns IP2 and a plurality of first dummy engraved patterns DP1.

[0195] The second incised pattern IP2 and the first dummy incised pattern DP1 can be placed on one side of each of the multiple first incised patterns IP1. Further areas where the second incised pattern IP2 is not placed on the other side of the first incised pattern IP1 positioned at the edge of pixel P may include the first dummy pattern DP1, etc.

[0196] For example, a first dummy incised pattern DP1 and a second incised pattern IP2 can be arranged in the Y-axis direction on one side of each of the first incised pattern IP1 arranged in one row, the first incised pattern IP1 arranged in two rows, and the first incised pattern IP1 arranged in three rows, while two first dummy incised patterns DP1 can be arranged in the Y-axis direction on the other side of the first incised pattern IP1 arranged in one row.

[0197] The display panel according to this embodiment can further improve the degree of freedom in the transfer direction by further comprising a first dummy incised pattern DP1. In addition, it is possible to accommodate more adhesive layers as first dummy incised patterns DP1, and the thickness of the adhesive layer within the incised pattern can be formed more uniformly.

[0198] Figure 15 is a plan view of the display panel according to the fifth embodiment of this specification. Figure 15 is a schematic plan view of one of the multiple pixels P.

[0199] As shown in Figure 15 by linking Figure 2, the display panel according to the fifth embodiment of this specification may have a first engraved pattern IP1 in each of a plurality of first pattern regions (IA1-1, IA1-2, IA1-3 in Figure 2), and a second pattern region (IA2 in Figure 2) may have a plurality of second engraved patterns IP2, a plurality of first dummy engraved patterns DP1, and a plurality of second dummy engraved patterns DP2.

[0200] The second incised pattern IP2 and the first dummy incised pattern DP1 can be placed on one side of each of the multiple first incised patterns IP1. Further areas where the second incised pattern IP2 is not placed on the other side of the first incised pattern IP1 positioned at the edge of pixel P may include the first dummy pattern DP1, etc.

[0201] The second dummy incised pattern DP2 can be arranged in the Y-axis direction in relation to each of the multiple first incised patterns IP1, the multiple second incised patterns IP2, and the multiple first dummy incised patterns DP1. That is, the first dummy incised pattern DP1 and the second dummy incised pattern DP2 can have an arrangement structure that surrounds the first incised pattern IP1, etc.

[0202] For example, seven second dummy incised patterns DP2 can be arranged in a row. For example, in two rows, corresponding to each of the seven second dummy incised patterns DP2, the first dummy incised pattern DP1, the first incised pattern IP1, the first dummy incised pattern DP1, the first incised pattern IP1, the first dummy incised pattern DP1, the first incised pattern IP1, and the first dummy incised pattern DP1 can be arranged from left to right.

[0203] For example, in three rows, the first dummy incised pattern DP1, the first incised pattern IP1, the second incised pattern IP2, the first incised pattern IP1, the second incised pattern IP2, the first incised pattern IP1, and the second incised pattern IP2 may be arranged from left to right, corresponding to each of the seven second dummy incised patterns DP2. For example, in four rows, seven second dummy incised patterns DP2 may be arranged, corresponding to each of the seven second dummy incised patterns DP2.

[0204] Compared to previous embodiments, the display panel according to this embodiment further includes a second dummy inscription pattern DP2, thereby improving the degree of freedom in the transfer direction and the uniformity of the adhesive layer thickness.

[0205] Figure 16 is a first modified example of the display panel according to the fifth embodiment of this specification. Figure 16 is a schematic plan view of one of a plurality of pixels P.

[0206] As shown in Figure 16 by linking Figure 2, the display panel according to the Specified Specification of the First Modified Example of the Fifth Embodiment comprises a first engraved pattern IP1 in each of a plurality of first pattern regions (IA1-1, IA1-2, IA1-3 in Figure 2), and a second pattern region (IA2 in Figure 2) may comprise a plurality of second engraved patterns IP2, a plurality of first dummy engraved patterns DP1, and a plurality of second dummy engraved patterns DP2.

[0207] The second incised pattern IP2 and the first dummy incised pattern DP1 can be placed on one side of each of the multiple first incised patterns IP1. In addition, the first dummy pattern DP1 and the like can be further placed in the region of the first incised pattern IP1 located at the edge of the pixel P, where the second incised pattern IP2 is not placed on the other side, which is in the opposite direction from the aforementioned side.

[0208] The second dummy incised pattern DP2 can be arranged in both the X-axis and Y-axis directions, corresponding to each of the multiple first incised patterns IP1, the multiple second incised patterns IP2, and the multiple first dummy incised patterns DP1. That is, the second dummy incised pattern DP2 can have an arrangement structure that surrounds the multiple first incised patterns IP1, the multiple second incised patterns IP2, and the multiple first dummy incised patterns DP1.

[0209] For example, nine second dummy incised patterns DP2 can be arranged in a row. For example, in two rows, corresponding to each of the nine second dummy incised patterns DP2, the following can be arranged from left to right: second dummy incised pattern DP2, first dummy incised pattern DP1, first incised pattern IP1, first dummy incised pattern DP1, first incised pattern IP1, first dummy incised pattern DP1, first incised pattern IP1, first dummy incised pattern DP1, and second dummy incised pattern DP2. For example, in three rows, the following could be arranged from left to right, corresponding to each of the nine second dummy incised patterns DP2: second dummy incised pattern DP2, first dummy incised pattern DP1, first incised pattern IP1, second incised pattern IP2, first incised pattern IP1, second incised pattern IP2, first incised pattern IP1, second incised pattern IP2, and second dummy incised pattern DP2. For example, in four rows, nine second dummy incised patterns DP2 could be arranged, corresponding to each of the nine second dummy incised patterns DP2.

[0210] The second dummy incised patterns DP2, etc., positioned at both ends in the X-axis direction relative to the first incised pattern IP1, can make the thickness of the adhesive layer within the second incised pattern IP2, which is the region where the light-emitting element is temporarily transferred, uniform during the primary stamping process. Therefore, the display panel according to this specification can prevent the light-emitting element from being over-transferred to the second incised pattern IP2 during the primary stamping process. Here, the second dummy incised patterns DP2, etc., positioned in the X-axis direction relative to the first incised pattern IP1 may refer to four second dummy incised patterns DP2 positioned at both ends of the second and third rows, as shown in Figure 16.

[0211] Figure 17 is a plan view of the display panel according to the sixth embodiment of this specification. Figure 17 is a schematic plan view of one of the multiple pixels P.

[0212] As shown in Figure 17 by linking Figure 2, the display panel according to the sixth embodiment of this specification includes a plurality of first pattern regions (IA1-1, IA1-2, IA1-3 in Figure 2) each comprising an eleventh incised pattern IP11, a twelfth incised pattern IP12, and a protruding pattern EP, and a second pattern region (IA2 in Figure 2) comprising a plurality of second incised patterns IP2, a plurality of first dummy incised patterns DP1, and a plurality of second dummy incised patterns DP2.

[0213] This embodiment relates to the arrangement structure of a first dummy incised pattern DP1 and a second dummy incised pattern DP2 when a plurality of first pattern regions, each comprising an eleventh incised pattern IP11, a twelfth incised pattern IP12, and a protruding pattern EP, are spaced apart from each other in the X-axis direction.

[0214] The second incised pattern IP2 can be positioned on one side of the 11th and 12th incised patterns IP11 and IP12 with respect to the X axis. The first dummy incised pattern DP1 can be positioned on the other side of the 11th and 12th incised patterns IP11 and IP12 where the second incised pattern IP2 is not positioned with respect to the X axis.

[0215] The second dummy incised pattern DP2 can be arranged to surround the eleventh and twelfth incised patterns IP11 and IP12, the second incised pattern IP2, and the first dummy incised pattern DP1.

[0216] For example, twelve second dummy incised patterns DP2 can be arranged in a row. For example, in two rows, corresponding to each of the twelve second dummy incised patterns DP2, the second dummy incised pattern DP2, the first dummy incised pattern DP1, the eleventh incised pattern IP11, the twelfth incised pattern IP12, the second incised pattern IP2, the eleventh incised pattern IP11, the twelfth incised pattern IP12, the second incised pattern IP2, the eleventh incised pattern IP11, the twelfth incised pattern IP12, the second incised pattern IP2, and the second dummy incised pattern DP2 can be arranged from left to right. For example, in three rows, twelve second dummy incised patterns DP2 can be arranged, corresponding to each of the twelve second dummy incised patterns DP2.

[0217] As a result, the display panel according to this embodiment has the effect of improving the degree of freedom in the transfer direction and improving the uniformity of the adhesive layer thickness.

[0218] Figures 18a to 18e and 19a to 19f are plan views and cross-sectional views of the process according to this specification according to the first embodiment.

[0219] Figure 18a shows the same process steps as Figure 19a, Figure 18b shows the same process steps as Figure 19b, Figure 18c shows the same process steps as Figure 19c, and Figure 18e shows the same process steps as Figure 19d.

[0220] In Figures 18a to 18e and Figures 19a to 19f, for explanatory purposes, the incised patterns IP1-1, IP1-2, and IP1-3 shown in Figures 3 to 5 are illustrated and described as the first incised pattern IP1, the light-emitting elements LD1-2, LD2-1, and LD3-1 shown in Figures 1-1, 2-1, and 3-1 are illustrated and described as the first light-emitting element LD1, and the light-emitting elements LD1-2, LD2-2, and LD3-2 shown in Figures 1-2, 2-2, and 3-2 are illustrated and described as the second light-emitting element LD2. The first electrodes 93a and 93b in Figure 19f are the same as the first electrode E1 in Figures 18a to 18e, and the second electrodes 91a and 91b in Figure 19f are the same as the second electrode E2 in Figures 18a to 18e.

[0221] In Figures 19a to 19f, the I-I' section (left) is a cross-sectional view with respect to the Y-axis with respect to pixel P, and the II-II' section (right) is a cross-sectional view with respect to the X-axis with respect to pixel P. Furthermore, as shown in Figures 18a to 19f, the XY coordinate system in the panel and the x'y' coordinate system in the donor are considered to be independent of each other.

[0222] As shown in Figures 18a and 19a, a first engraved pattern IP1 and a second engraved pattern IP2 can be arranged alternately in the lateral direction (X-axis direction) X on the substrate 10 of the panel.

[0223] The primary adhesive layer 1145 can be positioned on the front surface of the insulating layer 40' of the 1st layer 3. Since the primary adhesive layer 1145 is fluid, it can flow into the interior of the first and second incised patterns IP1 and IP2, which are located at relatively lower positions. Therefore, the primary adhesive layer 1145 can be formed with a relatively small thickness on the upper part of the insulating layer 40' of the 1st layer 3, excluding the first and second incised patterns IP1 and IP2.

[0224] The first incised pattern IP1 may be a region where light-emitting elements LD1 and LD2 are transferred and bonded. The second incised pattern IP2 may be a region where light-emitting elements LD1 and LD2 are temporarily fixed and debonded after the primary stamping process. The 1-stage 2 adhesive layer 1145b formed on the second incised pattern IP2 may have a lower surface adhesion strength than the 1-stage 1 adhesive layer 1145a formed on the first incised pattern IP1. For this reason, the surface of the 1-stage 2 adhesive layer 1145b may be in a partially cured state.

[0225] A donor can have multiple first light-emitting elements LD1 and multiple second light-emitting elements LD2 arranged alternately in the x' axis direction x'. Each second light-emitting element LD2 on the donor can be positioned corresponding to a first incised pattern IP1, and each first light-emitting element LD1 on the donor can be positioned corresponding to a second incised pattern IP2. Alternatively, each first light-emitting element LD1 on the donor can be positioned corresponding to a first incised pattern IP1, and each second light-emitting element LD2 on the donor can be positioned corresponding to a second incised pattern IP2.

[0226] Multiple first and second light-emitting elements LD1 and LD2 may be arranged in such a way that their respective first electrodes E1 are aligned in the same direction. That is, multiple first and second light-emitting elements LD1 and LD2 may have their respective light-emitting regions aligned in the same direction with respect to the extension of the donor in the length or width direction. For example, multiple first and second light-emitting elements LD1 and LD2 may be arranged in such a way that their respective light-emitting regions are aligned in the y' axis direction y' of the donor.

[0227] The insulating layer 20' of the first stage 1, the insulating layer 30' of the second stage 1, and the insulating layer 40' of the third stage 1 may be in a state where no contact holes are formed to expose the pixel drive circuit PD and the common power supply wiring 15.

[0228] As shown in Figures 18b and 19b, the panel and donor can be aligned and a primary stamping process can be performed. Multiple first and second light-emitting elements LD1 and LD2 can be transferred from the donor to the panel. For example, the second light-emitting element LD2 can be transferred onto the adhesive layer 1145a of the first incised pattern IP1, and the first light-emitting element LD1 can be fixed onto the adhesive layer 1145b of the second incised pattern IP2.

[0229] As shown in Figures 18c and 19c, the first light-emitting element LD1 transferred to the 1-stage 2 adhesive layer 1145b can be bonded to the donor. This is because the adhesive strength of the 1-stage 2 adhesive layer 1145b is relatively low. On the panel, the state in which the second light-emitting element LD2, etc., is transferred to the 1-stage 1 adhesive layer 1145a of the first incised pattern IP1 can be maintained by the adhesive strength of the 1-stage 1 adhesive layer 1145a.

[0230] As shown in Figure 18d, the donor can be rotated 180 degrees counterclockwise while maintaining a parallel position. The first light-emitting element LD1 on the donor can have the positions of the first electrode E1 and the second electrode E2 reversed.

[0231] As shown in Figures 18e and 19d, the first light-emitting elements LD1 can be transferred to the panel. Each first light-emitting element LD1 can be transferred to the adhesive layer 1145a of the first incised pattern IP1, with a separation distance of first distance D1 from the second light-emitting element LD2.

[0232] As shown in Figure 19e, an etching process can be performed to improve the contact ability of electrodes 93a, 93b, 91a, and 91b. The primary adhesive layer 1145 located on top of the insulating layer 40' of the first and second incised patterns IP1 and IP2 can be removed. The adhesive layer 1145a of the first and second stages can be masked by removing the areas that do not overlap with the light-emitting elements LD1 and LD2, thereby forming the first adhesive layer 45.

[0233] The first adhesive layer 45 may have grooves H formed in areas that do not overlap with the light-emitting elements LD1 and LD2. The second adhesive layer 1145b may be etched to a thickness similar to that of the first adhesive layer 45 to form a second adhesive layer 47.

[0234] As shown in Figure 19f, a fourth insulating layer 50 and a fifth insulating layer 60 are formed on the substrate 10 on which the first and second adhesive layers 45 and 47 are formed, and contact holes CH can be formed that penetrate the first to fourth insulating layers 20, 30, 40, and 50 to expose a part of the common power wiring 15 and a part of the pixel driving circuit PD. Next, on the substrate 10 on which the fifth insulating layer 60 is formed, pixel electrodes 51a and 51b, common electrodes 55a and 55b, a sixth insulating layer 70, and a transparent buffer layer 80 can be formed in order.

[0235] Thus, the display panel according to this specification can employ a secondary stamping method in the process of transferring a pair of light-emitting elements LD1 and LD2 that are arranged in different directions from one another, by forming a second incised pattern IP2.

[0236] If, for a pair of light-emitting elements comprising a first light-emitting element and a second light-emitting element, the first light-emitting element, which is positioned in one direction on the wafer, is aligned with the donor before being transferred to the panel, and the second light-emitting element, which is positioned in two directions on the wafer, is aligned with the donor before being transferred to the panel, then the process of aligning with the donor on the wafer may take a relatively long time.

[0237] In this specification, by configuring a second incised pattern IP2, all light-emitting elements on the wafer can be aligned to a donor at once, and pairs of light-emitting elements can be positioned in opposite directions. This can improve the productivity (capa drop) of the display panel described herein. In other words, the number of panels that can be produced in a given time can be increased.

[0238] The display panel described herein employs a secondary stamping method, which allows a pair of light-emitting elements, arranged in different directions from each other, to be positioned close to a first distance that is smaller than the binocular vision function, based on the viewing distance, thereby making it impossible for viewers to perceive unevenness or defects. While embodiments of the present invention have been described in more detail above with reference to the attached drawings, the present invention is not necessarily limited to these embodiments and can be modified and implemented in various ways without departing from the technical concept of the present invention.

[0239] Therefore, the embodiments disclosed in this invention are not intended to limit the technical concept of the invention, but rather to represent it, and the scope of the technical concept of the invention is not limited by such embodiments.

[0240] Therefore, the embodiments described above should be understood in all respects as illustrative and not limiting.

[0241] The scope of protection of this invention shall be interpreted as defined by the claims, and any technical ideas within an equivalent scope shall be interpreted as being included within the scope of the rights of this invention. [Explanation of Symbols]

[0242] 1 Display Panel NA hidden area AA display area P pixels SP Subpixel Unit IA1 First pattern region IA2 Second pattern region IP1 First incision pattern IP2 Second Incision Pattern LD light-emitting element E Emission region 45 First adhesive layer 47. Second adhesive layer

Claims

1. A substrate having a plurality of pixels arranged thereon, wherein each of the plurality of pixels has a first pattern region and a second pattern region surrounding the first pattern region, An insulating layer disposed on the substrate and having a first incised pattern disposed in the first pattern region, A pair of light-emitting elements are arranged on the first engraved pattern of the insulating layer, Equipped with, The first engraved pattern has a length in a first direction and a length in a second direction different from the first direction. The light-emitting regions of each of the pair of light-emitting elements are offset in different directions from each other with respect to the extension line of the first direction or the second direction from the center of the first incised pattern. Display panel.

2. The display panel has a plane having a length direction and a width direction, and a cross-section in the thickness direction, The shortest distance between the centers of adjacent pixels in the length or width direction of the display panel is determined by a first pitch. The shortest distance between the centers of the pair of light-emitting elements is the first distance, The first distance is less than or equal to half of the first pitch. The display panel according to claim 1.

3. The display panel according to claim 2, wherein the first distance is 1 / 10 or less of the first pitch.

4. The pair of light-emitting elements are arranged side by side in the width direction of the display panel, The light-emitting regions of each of the pair of light-emitting elements are arranged to face each other. The display panel according to claim 2.

5. The insulating layer comprises a plurality of first incised patterns in a plurality of first pattern regions, and a plurality of second incised patterns in a second pattern region. The first engraved patterns are arranged to be spaced apart from each other in the longitudinal direction. One of the second engraved patterns is positioned on one side of each of the first engraved patterns in the width direction. The display panel according to claim 4.

6. The pair of light-emitting elements are arranged in the longitudinal direction of the display panel, Each of the light-emitting regions of the pair of light-emitting elements is arranged in the diagonal direction. The display panel according to claim 2.

7. The insulating layer comprises a plurality of first incised patterns in a plurality of first pattern regions, and a plurality of second incised patterns in a second pattern region. The first engraved patterns are arranged to be spaced apart from each other in the longitudinal direction. The second incised pattern is positioned between the first incised patterns which are spaced apart from each other. The display panel according to claim 6.

8. The insulating layer further comprises a first adhesive layer disposed between the first engraved pattern and the pair of light-emitting elements, The first adhesive layer is The upper surface in contact with the pair of light-emitting elements, The lower surface in contact with the insulating layer, A groove is located around the pair of light-emitting elements, and the groove consists of a bottom surface between the top surface and the bottom surface, and a side surface between the top surface and the bottom surface. Equipped with, The space between the lower surface and the bottom surface has a first thickness. The space between the upper surface and the lower surface has a second thickness greater than the first thickness. The display panel according to claim 1.

9. The display panel according to claim 8, wherein the insulating layer further comprises a second incised pattern disposed on one side of the first incised pattern in the second pattern region.

10. The pair of light-emitting elements are micro-light-emitting elements, The second engraved pattern serves as a space in which the pair of light-emitting elements are temporarily transferred during the stamping process. The display panel according to claim 9.

11. The first incised pattern consists of multiple elements. The shortest distance between the centers of the plurality of first engraved patterns is the second pitch. The shortest distance between the center of the first incised pattern and the center of the second incised pattern is the second distance. The second distance is less than or equal to half of the second pitch. The display panel according to claim 9.

12. The insulating layer further comprises a second adhesive layer arranged in the second incised pattern of the insulating layer, The second adhesive layer described above is The lower surface in contact with the insulating layer, The upper surface of the second adhesive layer facing the lower surface, Equipped with, The space between the lower and upper surfaces of the second adhesive layer has a third thickness that is smaller than the second thickness. The display panel according to claim 9.

13. The first incised pattern is, The first incised pattern, The first and second incised patterns, Equipped with, The insulating layer further comprises a protruding pattern positioned between the first-1 incised pattern and the first-2 incised pattern as the first pattern region, The pair of light-emitting elements are arranged in each of the 1-1 and 1-2 incised patterns. The display panel according to claim 9.

14. The display panel according to claim 13, wherein the protruding pattern is formed integrally with the insulating layer.

15. The display panel according to claim 13, wherein the area of ​​each of the 1-1 and 1-2 incised patterns is greater than the area of ​​the second incised pattern.

16. The insulating layer further comprises a first dummy incised pattern disposed in the second pattern region, The second incised pattern and the first dummy incised pattern are arranged on one side of the first incised pattern so as to correspond to each of the pair of light-emitting elements. The display panel according to claim 9.

17. The display panel has a plane having a length direction and a width direction, and a cross-section in the thickness direction, The insulating layer further comprises a second dummy incised pattern disposed in the second pattern region, The second dummy incised pattern is arranged on the plane so as to surround the first incised pattern, the second incised pattern, and the first dummy incised pattern. The display panel according to claim 16.

18. A first step is to prepare a substrate on which an insulating layer having a first incised pattern and a second incised pattern is formed, A second step of forming a first adhesive layer on the first incised pattern and a second adhesive layer having lower adhesive strength than the first adhesive layer on the second incised pattern, A third step involves preparing a donor in which the first light-emitting element and the second light-emitting element are arranged, A fourth step involves bonding the donor to the substrate so that the first light-emitting element and the second light-emitting element are joined to the first engraved pattern. A fifth step of detaching the donor from the substrate, Includes, The first engraved pattern has a length in a first direction and a length in a second direction, The light-emitting regions of the first light-emitting element and the second light-emitting element are offset in different directions from each other with respect to the extension line of the first direction or the second direction from the center of the first incised pattern. A method for manufacturing a display panel.

19. The fourth step described above is: Step 4-1 involves aligning the donor to the substrate such that the first light-emitting element corresponds to the first adhesive layer and the second light-emitting element corresponds to the second adhesive layer, Step 4-2 involves primary stamping the donor onto the substrate, With the second light-emitting element attached to the donor, the fourth-third step involves removing the donor from the substrate, The fourth-fourth step involves rotating the donor 180 degrees while maintaining its position facing the substrate, Steps 4-5 include: Secondary stamping the donor, which has been rotated 180 degrees so that the second light-emitting element is separated from the first light-emitting element and corresponds to the first adhesive layer, Steps 4-6 involve detaching the donor from the substrate, A method for manufacturing a display panel according to claim 18, further comprising:

20. The method for manufacturing a display panel according to claim 19, wherein in the third step, the light-emitting regions of the first light-emitting element and the second light-emitting element are offset in the same direction with respect to the extension line in the length or width direction of the donor.

21. The display panel has a plane having a length direction and a width direction, and a cross-section in the thickness direction, The display panel further includes multiple pixels, Each of the plurality of pixels comprises the first incised pattern and the second incised pattern, The shortest distance between the centers of the plurality of adjacent pixels in the length direction or width direction of the display panel is determined by a first pitch. The shortest distance between the center of the first light-emitting element and the center of the second light-emitting element is the first distance. The first distance is less than or equal to half of the first pitch. A method for manufacturing a display panel according to claim 19.

22. The first and second light-emitting elements are arranged in the width direction of the display panel, The light-emitting regions of the first light-emitting element and the second light-emitting element are arranged to face each other. A method for manufacturing a display panel according to claim 21.

23. The first and second light-emitting elements are arranged in the longitudinal direction of the display panel, The light-emitting regions of the first light-emitting element and the second light-emitting element are arranged in a diagonal direction. A method for manufacturing a display panel according to claim 21.

24. The first incised pattern consists of multiple elements. The shortest distance between the centers of the plurality of first engraved patterns is the second pitch. The shortest distance between the center of the first incised pattern and the center of the second incised pattern is the second distance. The second distance is less than or equal to half of the second pitch. A method for manufacturing a display panel according to claim 21.

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