Inductor array design for high-density vertical power supply applications

Abstract

This invention provides inductor arrays and inductor cells for vertical power supply in high-density computing applications. [Solution] An inductor cell 400 for vertical power supply, configured as an inductor in a power supply path, includes a first plate 412, a second plate 412, a power conductor 402, an inductor core 406, and a ground conductor 404. The power conductor extends vertically between the first plate and the second plate. The inductor core extends vertically between the first plate and the second plate. The ground conductor extends vertically between the first plate and the second plate. The power conductor supplies power along the vertical direction between the first plate and the second plate.

Description

Technical Field

[0001] The present disclosure relates to an inductor array and related inductor cells. More particularly, some embodiments of the present disclosure relate to an inductor array for vertical power supply in high-density computing applications.

Background Art

[0002] A computing system includes a plurality of chips and related electronics such as a power supply module. High computing density is desirable. To achieve high computing density, the area of the related electronics is limited. The power supply capabilities and efficiency typically have a significant impact on system performance.

Summary of the Invention

[0003] The systems, methods, and devices of the present disclosure each have several innovative embodiments, and only one of them alone bears all of the desirable attributes disclosed herein. Details of one or more implementations of the subject matter described herein are set forth in the accompanying drawings and the following description.

[0004] In some aspects, the techniques described herein relate to an inductor cell that includes a first plate, a second plate, a power conductor extending vertically between the first plate and the second plate, an inductor core extending vertically between the first plate and the second plate, and a ground conductor extending vertically between the first plate and the second plate. The power conductor is configured to supply power vertically along the first plate and the second plate, and the inductor cell is configured as an inductor in a power supply path.

[0005] In some aspects, the techniques described herein relate to an inductor cell, wherein the first plate includes a power plane and a ground plane. The power plane is electrically connected to the power conductor, and the ground plane is electrically connected to the ground conductor.

[0006] In some embodiments, the technology described herein relates to an inductor cell, where the power plane is positioned above, below, or overlapping with the ground plane.

[0007] In some embodiments, the technology described herein relates to an inductor cell, and the ground conductor includes a plurality of soldering points for attaching the ground plane to the ground conductor.

[0008] In some embodiments, the technology described herein relates to an inductor cell and further includes a plurality of vias configured to electrically connect a power plane or a ground plane, respectively.

[0009] In some embodiments, the technology described herein relates to an inductor cell, wherein the first plate includes a first printed circuit board (PCB), and the second plate includes a second PCB.

[0010] In some embodiments, the technology described herein relates to an inductor cell, wherein the inductor core at least partially surrounds a power conductor and the ground conductor at least partially surrounds the inductor core.

[0011] In some embodiments, the technology described herein relates to an inductor cell in which the inductor core is continuous, the power conductor comprises two power conductor pieces, and the ground conductor comprises two ground conductor pieces, and supplies power under two-phase operation.

[0012] In some embodiments, the technology described herein relates to an inductor cell in which the inductor core is continuous, the power conductor comprises a plurality of power conductor pieces, and the ground conductor comprises a plurality of ground conductor pieces, and supplies power under polyphase operation.

[0013] In some embodiments, the technology described herein relates to an inductor array, the inductor array comprising a plurality of inductor cells arranged in an array, each of the plurality of inductor cells comprising a power conductor, an inductor core, a ground conductor, a first plate, and a second plate, the power conductor, the inductor core, and the ground conductor being arranged between the first plate and the second plate, power being supplied through the power conductor along a perpendicular direction between the first plate and the second plate, and the ground conductor providing a return current path.

[0014] In some embodiments, the technology described herein relates to an inductor array, wherein the power conductor is continuous, the ground conductor is continuous, and the inductor cells are configured to supply power under single-phase operation.

[0015] In some embodiments, the technology described herein relates to an inductor array in which the power conductor comprises two power conductor pieces and the ground conductor comprises two ground conductor pieces, and supplies power under two-phase operation.

[0016] In some embodiments, the technology described herein relates to an inductor array in which the power conductor comprises four power conductor pieces and the ground conductor comprises four ground conductor pieces, and supplies power under four-phase operation.

[0017] In some embodiments, the technology described herein relates to an inductor array, wherein the inductor core at least partially surrounds a power conductor and the ground conductor at least partially surrounds the inductor core.

[0018] In some embodiments, the technology described herein relates to an inductor array, where the power conductor is substantially cylindrical.

[0019] In some embodiments, the technology described herein relates to an inductor array, wherein the grounding conductor includes one or more grounding legs configured to facilitate soldering between the grounding conductor and a first plate.

[0020] In some embodiments, the technology described herein relates to a computing system comprising an array of chips comprising a plurality of chips and an array of power transmission modules comprising a plurality of power transmission modules, each power transmission module of the plurality of power transmission modules being positioned perpendicular to each of the plurality of chips and configured to supply power perpendicular to each of the plurality of chips, each power transmission module of the plurality of power transmission modules comprising an inductor cell, the inductor cell comprising a power conductor, a ground conductor around the power conductor, a first printed circuit board, and a second printed circuit board, the power conductor and the ground conductor being positioned between the first printed circuit board and the second printed circuit board and configured to supply power between the first printed circuit board and the second printed circuit board.

[0021] In some embodiments, the technology described herein relates to a computing system, and the system on a wafer includes an array of chips.

[0022] In some embodiments, the technology described herein relates to a computing system in which each of a plurality of power transmission modules includes a buck converter, and the inductor cell is the output inductor of the buck converter.

[0023] In some embodiments, the technology described herein relates to a computing system in which each of a plurality of power transmission modules includes a capacitor and a driver-integrated (positive) metal oxide semiconductor field-effect transistor layer, and an inductor cell is positioned perpendicularly between the capacitor and the driver-integrated metal oxide semiconductor field-effect transistor layer. [Brief explanation of the drawing]

[0024] Throughout the drawings, reference numbers are reused to indicate correspondences between the referenced elements. The drawings are provided to illustrate examples of the subject matter described herein and are not intended to limit its scope.

[0025] Embodiments of the present disclosure are described with reference to the accompanying drawings, in which like reference numerals refer to like elements.

[0026] [Figure 1] FIG. is a schematic diagram of a system on a wafer assembly including an array of chips and an array of power supply modules configured to provide power supply perpendicular to the chips, according to some embodiments of the present disclosure.

[0027] [Figure 2] FIG. is a schematic diagram of an array of power supply modules according to some embodiments of the present disclosure.

[0028] [Figure 3] FIG. is a schematic diagram of an array of power supply modules configured to supply power perpendicular to an array of chips, according to some embodiments of the present disclosure.

[0029] [Figure 4] FIG. shows a perspective view of an exemplary inductor cell for vertical power supply, according to some embodiments of the present disclosure.

[0030] [Figure 5A] FIG. shows the exemplary inductor cell of FIG. 4 at various stages of an exemplary assembly process, according to some embodiments of the present disclosure. [Figure 5B] FIG. shows the exemplary inductor cell of FIG. 4 at various stages of an exemplary assembly process, according to some embodiments of the present disclosure. [Figure 5C] FIG. shows the exemplary inductor cell of FIG. 4 at various stages of an exemplary assembly process, according to some embodiments of the present disclosure. [Figure 5D] FIG. shows the exemplary inductor cell of FIG. 4 at various stages of an exemplary assembly process, according to some embodiments of the present disclosure. [Figure 5E] FIG. shows the exemplary inductor cell of FIG. 4 at various stages of an exemplary assembly process, according to some embodiments of the present disclosure.

[0031] [Figure 6A] This disclosure illustrates a two-phase vertical power supply using the exemplary inductor cell shown in Figure 4, according to several embodiments of this disclosure. [Figure 6B] This disclosure illustrates a two-phase vertical power supply using the exemplary inductor cell shown in Figure 4, according to several embodiments of this disclosure.

[0032] [Figure 7A] The physical characteristics relating to an exemplary inductor cell, which may be the same as or similar to the exemplary inductor cell in Figure 4 for vertical power supply, according to some embodiments of this disclosure are shown.

[0033] [Figure 7B] Figure 7A shows an inductor array formed by an exemplary inductor cell according to some embodiments of the present disclosure.

[0034] [Figure 8] This is an exemplary block diagram of components of a power supply module for vertical power supply according to some embodiments of the present disclosure. [Modes for carrying out the invention]

[0035] The following detailed descriptions of specific embodiments present various descriptions of those specific embodiments. However, the technological innovations described herein can be implemented in numerous different ways, for example, as defined and encompassed by the claims. In this description, similar reference numbers and / or terms refer to drawings in which identical or functionally similar elements may be shown. It will be understood that the elements shown in the drawings are not necessarily drawn to scale. Furthermore, it will be understood that a particular embodiment may include more elements and / or subsets of elements shown in the drawings than those shown. In addition, some embodiments may incorporate any suitable combination of features from two or more drawings. Headings are provided for convenience only and do not affect the claims or their meaning.

[0036] Generally speaking, one or more embodiments of the present disclosure relate to systems and methods that utilize array-based inductor designs to facilitate vertical power supply. More specifically, some embodiments of the present disclosure relate to vertical power supply using inductor cells, each of which provides a vertical connection for power supply. Compared to horizontal power supply, vertical connections for power supply can achieve more efficient power transfer from one layer of a vertical power supply system (e.g., a power supply module, a buck converter, a voltage regulator module, etc.) (e.g., an upper printed circuit board (PCB)) to another layer of the vertical power supply system (e.g., a lower PCB). Vertical power supply systems may also be better suited to supporting high-density computing applications, including supplying relatively large amounts of power under or inside limited physical space that may not be achievable with horizontal power supply.

[0037] In some embodiments, multiple inductors can be integrated into one or more inductor arrays that can be integrated into a vertical power supply system. The inductor arrays can be assembled or manufactured as a single component, thereby simplifying the integration process of the vertical power supply system. An inductor array can generally contain N × M inductors (for example, N inductor cells in a first array direction and M inductor cells in a second array direction, where the second array direction is orthogonal to the first array direction). The number of inductors in the inductor array can be flexibly adjusted based on the specific application supported by the vertical power supply system.

[0038] In some embodiments, the inductor array may include multiple inductors spatially arranged in a stacked structure. The inductor array can be configured for multiphase (e.g., two-phase, four-phase, etc.) operation. Each phase of the inductor array may correspond to a phase of a buck converter. By configuring the inductor array to be two-phase or four-phase based on the application, the vertical power supply system can advantageously enable more efficient multiphase power conversion and power supply in the vertical direction.

[0039] Furthermore, and / or optionally, parameters related to the inductor array of a vertical power supply system can be customized to suit specific applications. For example, various inductor parameters such as resistance, inductance, saturation current, and / or size can be adjusted based on the switching frequency, output current, and / or efficiency targets of the DC-DC buck converter.

[0040] A power supply system typically includes components such as inductors, capacitors, transformers, or semiconductor devices for converting, controlling, and regulating power. For example, a power supply system can use its components to power various loads or convert power from one form to another (e.g., alternating current (AC) to DC, DC to AC, or DC to DC). Traditionally, power supply systems use horizontal power supply, where components such as inductors are surface-mounted on a printed circuit board (PCB).

[0041] As technology advances, application areas such as data centers, artificial intelligence (AI) training, or machine learning systems are becoming more widespread. In these applications, high-density and efficient power supply may be desired and / or critical, as these applications typically involve support from power supply systems capable of handling high power densities and providing efficient data exchange via high-bandwidth interconnects. However, horizontal power supply systems may not be able to meet the demanding power requirements from these applications due to their resistance, inductance, and / or limited scalability.

[0042] To address at least some of the identified technical problems described above, several embodiments of the disclosed technology relate to vertical power supply systems that use array-based inductor designs to provide specific power density and efficiency for high-density computing applications. A vertical power supply system can provide vertical power supply using one or more inductor cells, each of which provides a vertical connection for power supply. In some embodiments, the inductor cells of a vertical power supply system can be used with several components to form a power-efficient and compact inductor array that can be integrated into a vertical power supply system (e.g., a power supply module, a buck converter, a voltage regulator module, etc.).

[0043] For example, an inductor cell may include at least an inductor core, a power conductor, and a ground conductor. In some embodiments, the inductor core may be a powder core. The powder core may be made from fine powder magnetic material bonded together to provide suitable permeability, relatively low core loss, distributed voids, and / or thermal stability. The power conductor can carry current from a power source to the inductor. The power conductor can handle specific current levels with desired resistance and power loss. The ground conductor can provide a voltage reference for the inductor cell and can provide a return path for the current. The power conductor may be at least partially surrounded by the powder core, and the powder core may be at least partially surrounded by the ground conductor. The power conductor and the ground conductor may be oriented vertically to facilitate vertical power transmission.

[0044] An inductor cell may further include a ground plane and a power plane. The ground plane may include an area of ​​conductive material (e.g., copper) that serves as a common reference point for the inductor cell and / or the electrical circuit associated with the inductor cell. The ground plane may be electrically connected to a ground conductor to provide a low-impedance path for the return current and help reduce electromagnetic interference (EMI) and noise. The power plane may include an area of ​​conductive material that is electrically connected to a power conductor to supply current and provide a low-impedance path that contributes to reducing voltage drop and power loss.

[0045] In some embodiments, the power conductors, inductor core (e.g., powder core), and ground conductor of the inductor cell may be mounted and / or sandwiched between two PCBs. The two PCBs may include insulating material such as glass fiber or epoxy resin, and conductive traces etched onto the surfaces and / or layers of the two PCBs. The two PCBs can provide mechanical support and electrical interconnection for the power conductors, powder core, and ground conductor. The ground plane may be mounted on one layer of the PCB, and the power plane may be mounted on another layer of the PCB.

[0046] Furthermore, and / or optionally, an inductor cell may include multiple vias. Multiple vias can provide vertical interconnections connecting the power plane and the ground plane and / or connecting layers of the PCB. Vias can facilitate the flow of current between the power conductor and the ground conductor, thereby enabling efficient vertical power supply between PCBs. Furthermore, and / or optionally, an inductor cell may include one or more soldering points (e.g., grounding feet) that can be used to securely attach various components to one another (e.g., attaching the ground conductor to the ground plane). Advantageously, one or more soldering points can provide reliable electrical connections between components of the inductor cell and help maintain the structural integrity of the vertical power supply system.

[0047] In some embodiments, multiple inductors can be integrated with each other to form an inductor array. The inductor array can be soldered between multiple PCBs stacked together to support various applications. For example, an inductor array may be included in a DC-DC buck converter. As described above, an inductor array can generally contain N × M inductors (e.g., N inductor cells in a first array direction and M inductor cells in a second array direction, where N and M are positive integers). The number of inductors in the inductor array can be flexibly adjusted based on the specific application supported by the vertical power supply system. In some applications, an inductor array may contain 6 × 6 inductors, 3 × 3 inductors, and so on.

[0048] In some embodiments, an inductor array may include multiple inductors spatially arranged in a stacked structure. At least some portions of the inductor array may be configured for multiphase (e.g., single-phase, two-phase, four-phase, etc.) operation based on the supported application. When configured to operate in a single-phase configuration, the inductor cell can be powered in a single phase. In a single-phase configuration, the power conductor of the inductor cell may include a single conductor rather than multiple conductor pieces. The ground conductor of the inductor cell may include a single conductor rather than multiple conductor pieces. Compared to two-phase or four-phase, a single-phase configuration may be easier to implement. On the other hand, two-phase or four-phase inductor cell configurations can achieve higher power density and / or power efficiency.

[0049] In a two-phase configuration, an inductor cell can supply power in two separate phases (e.g., 0 degrees and 180 degrees). In a two-phase configuration, the power conductor of the inductor cell can contain two conduction pieces. The ground conductor of the inductor cell can also contain two conduction pieces. Compared to a single-phase configuration, a two-phase configuration of an inductor cell can achieve improved power supply efficiency and better load balancing.

[0050] In a four-phase configuration, an inductor cell can supply power in four distinct phases (e.g., 45°, 135°, 225°, and 315°). In a four-phase configuration, the power conductor of the inductor cell can contain four conduction pieces. The ground conductor of the inductor cell can contain four conduction pieces. Four-phase inductor arrays can be implemented in applications with demanding power specifications, such as high-performance computing and advanced AI training systems. By distributing the power load across four distinct phases, the inductor cell can reduce and / or minimize voltage ripple, improve transient response, and enhance the overall performance of the power supply system. In some applications, each phase of the inductor array can correspond to a phase of a buck converter. By configuring the inductor array as single-phase, two-phase, or four-phase inductor cells based on the application, vertical power supply systems can advantageously enable more efficient multiphase power conversion and power supply in the vertical direction.

[0051] Furthermore, and / or optionally, parameters related to the inductor array of a vertical power supply system can be customized to suit specific applications. For example, various inductor parameters such as resistance, inductance, saturation current, and / or size (e.g., the thickness, length, diameter, and width of the power conductor, ground conductor, and / or powder core of the inductor cell) can be selected based on the switching frequency, output current, and / or efficiency targets of the DC-DC buck converter to meet the power requirements of high-density computing applications such as AI training and machine learning.

[0052] In some embodiments, the resistance of an inductor cell can be customized by selecting an appropriate material for the power conductor and optimizing its cross-sectional area. For example, resistance can be reduced by using a highly conductive material such as copper and increasing the thickness of the conductor. In some embodiments, the inductance of an inductor cell can be adjusted by changing the core material and / or geometric shape of the inductor cell. For example, the inductance can be increased by using a powder core with high magnetic permeability. In some embodiments, the saturation current associated with the inductor cell can be customized so that the inductor cell can handle the peak current demands of the application without degrading performance. Customization of the saturation current can be achieved by selecting a material with a high saturation magnetic flux density (e.g., a powder core or another suitable material used for an inductor core) and adjusting the core shape to distribute the magnetic flux uniformly. Furthermore, increasing the cross-sectional area of ​​the powder core or inductor core, power conductor, and / or ground conductor can help manage higher currents. In some embodiments, the size of the inductor cell can be selected based on one or more of the switching frequency, output current, or efficiency targets of the buck converter. For example, compact, vertically-oriented designs related to power and ground conductors can be used in applications with limited space, while larger inductor cell sizes can be used in applications or systems where space is less constrained.

[0053] As used herein, vertical power supply can refer to supplying power from a first circuit (e.g., a power supply module) to a second circuit (e.g., an integrated circuit (IC), an array of ICs, an array of chips, a system-on-a-chip (SOC), etc.) located on a substrate, in a direction perpendicular to, or otherwise not parallel to, the plane defined by the substrate (e.g., a printed circuit board (PCB), semiconductor components, an organic substrate, an inorganic substrate, etc.). For example, power can be supplied perpendicularly from a power supply module to an array of chips located on a PCB, in a direction perpendicular to the plane defined by the PCB. The PCB can be mounted to a computing server (e.g., by using mounting holes with standoffs to raise and secure the PCB above the chassis surface of the computing server).

[0054] While aspects of this disclosure are described with reference to exemplary components, interactions, and routines, those skilled in the art will understand that one or more aspects of this disclosure may be implemented according to various environments, system architectures, customer computing device architectures, etc. Similarly, references to specific devices such as inductor cells or inductor arrays should be considered general references and are not intended to provide additional meaning or configurations for individual inductor cells or inductor arrays. Furthermore, examples and exemplary configurations are not intended to be limiting and should not be construed as limiting the scope of this disclosure. Moreover, examples are intended to be illustrative in nature and should not be construed as limiting.

[0055] • Exemplary vertical power supply system Figure 1 is a schematic diagram of a system-on-wafer (SOW) assembly 100, which includes an array of power supply modules 102 and an array of chips 104 positioned to receive power signals vertically from the power supply modules 102. The SOW may include an array of chips 104 and a substrate 106. The substrate 106 may include multiple wiring layers. The SOW assembly includes one or more wafer-level packaging structures around the SOW. The SOW assembly 100 can be incorporated into a processing system having high computational density. Such a processing system may be used and / or specifically configured for high-performance computing and / or computationally intensive applications such as neural network training and / or processing, machine learning, and artificial intelligence. The processing system may generate data for an autopilot system for a vehicle.

[0056] As shown in Figure 1, the array of chips 104 is located on a substrate 106. The array can contain multiple chips 104, each being an instance of a computing chip for a distributed computing application. Each chip 104 in the array can be an integrated circuit die. Each chip 104 in the array can be a State-of-Concept (SOC). The chips 104 can interface with each other (for example, through one or more input / output blocks of the chip 104) to implement distributed computing functions. For example, each chip 104 may be electrically connected to each adjacent chip 104 directly adjacent to it in a row or column of the array. The chips 104 can be placed close to each other to facilitate short paths between chips and achieve high computing density. Each chip 104 can perform computing operations that include one or more of the following: computing, storage, and communication outside the chip.

[0057] An array of power supply modules 102 includes multiple power supply modules 102 arranged to supply power vertically to each chip 104. Each power supply module 102 can implement a power conversion path having multiple power conversion stages. Vertical power supply can improve performance compared to lateral power supply by reducing DC losses. The shorter the path between the power supply modules 102 and the chip 104, which are arranged vertically to each other, the lower the resistive losses. To achieve high computation density and vertical power supply, the power supply modules 102 can have the same or similar footprint as the chip 104. In such a design, the array of power supply modules 102 should not create any additional spacing between the chips 104. As shown in Figure 1, each power supply module 102 can be aligned with its respective chip 104 and positioned vertically to each chip.

[0058] Each power supply module 102 can be a packaged component including a power conversion path, the power conversion path including multiple power conversion stages. Alternatively, the power conversion paths of multiple chips 104 can be implemented as an array of power conversion circuits on multiple stacked PCBs. Each power supply module 102 may include inductor cells according to any suitable principles and advantages disclosed herein. An array of power supply modules 102 may include an inductor array according to any suitable principles and advantages disclosed herein.

[0059] Figure 2 shows an array 200 of power supply modules 102A, 102B, 102C, 102D, 102E, 102F, 102G, 102H, and 102I. These power supply modules 102A-102I can supply power signals perpendicularly to the chips via electrical connections that extend perpendicularly between the power supply modules 102A-102I and their respective chips. The power supply modules 102A-102I can be positioned below or above their respective chips. The power signals supplied perpendicularly are provided orthogonally to the main surface of the chip.

[0060] Figure 3 is a schematic diagram of an array of power supply modules 102A-102C arranged to supply power perpendicularly to an array of chips 104A-104C according to one embodiment. As shown in Figure 3, chips 104A, 104B, and 104C are arranged on a substrate or printed circuit board 106. On the opposite side of the substrate or printed circuit board 106 are the power supply modules 102A, 102B, and 102C associated with each chip. Power supply modules 102A-102C may include inductor cells according to any suitable principles and advantages disclosed herein. Power supply modules 102A, 102B, and 102C may be, for example, the power supply modules of array 200 in Figure 2.

[0061] Power supply modules 102A-102C can transmit power signals vertically to chips 104A-104C. For example, as shown in Figure 3, power signals can be transmitted vertically from power supply modules 102A-102C to chips 104A-104C via vertical electrical connections 308A, 308B, 308C, 310A, 310B, and 310C. These electrical connections extend vertically from power supply modules 102A-102C to chips 104A-104C. The electrical connections can be made by pogo pins and / or other suitable vertical connectors.

[0062] In some embodiments, chips 104A-104C may be located on a printed circuit board (e.g., separated from the wafer and then mounted on the circuit board). In certain embodiments, chips 104A-104C may be part of a SOW assembly. The SOW assembly may include wafer-level packaging. In some such embodiments, the system on the wafer containing chip 104 may be an integrated fan-out (InFO) wafer.

[0063] In addition to simplifying designs by reducing the complex routing required for routing signals within a plane, vertical power supply can achieve one or more other advantages. By supplying power vertically, power losses that typically occur when signals travel laterally across a PCB can be significantly reduced due to shorter supply paths and correspondingly reduced resistance in those paths. Such reductions not only reduce DC IR losses (e.g., the drop in available voltage at load devices such as chips) but also reduce parasitic loop inductance associated with current loops, thereby reducing capacitance for circuit decoupling. Such vertically arranged block arrays can enable high computation density and high-speed communication between dies in the array, which can be advantageous for AI machine learning applications and other applications where high computational power and high-speed communication are significant advantages.

[0064] An exemplary power supply module 102 is a voltage regulation module. The VRM can convert a DC voltage to a lower voltage and a higher current to supply the power supply voltage to a chip. The VRM can receive a high-voltage, low-current input signal and generate a high-current, low-voltage output signal. The VRM may include multiple power conversion stages according to any suitable principles and advantages disclosed herein. The high-current, low-voltage output may have a current of several hundred amperes and a voltage of less than 1 volt in a particular application.

[0065] In some embodiments, each of the power supply modules 102 in Figure 1, 102A-102I in Figure 2, and 102A-102C in Figure 3 may include one or more inductor cells (e.g., inductor arrays) as described below. Inductor arrays facilitate vertical power supply from the power supply modules to the circuit, which can advantageously support AI machine learning applications and other applications where high computing power and high-speed communication are significant advantages.

[0066] • Inductor cell for vertical power supply Figure 4 shows a perspective view of an exemplary inductor cell 400 for vertical power supply according to several embodiments of the present disclosure. As described above, the inductor cell 400 can be arranged in the power supply modules of Figures 1 to 3 for vertical power supply. As shown in Figure 4, the inductor cell 400 includes a power conductor 402, a ground conductor 404, a powder core 406, a power plane 408, a ground plane 410, and two printed circuit boards (PCBs) 412. One of the PCBs 412 can be an upper plate for the inductor cell 400. The upper plate can be positioned above the power conductor 402, the powder core 406, and the ground conductor 404. The other of the PCBs 412 can be a bottom plate for the inductor cell 400. The bottom plate can be positioned below the power conductor 402, the powder core 406, and the ground conductor 404.

[0067] In some embodiments, the powder core 406 can be made from finely powdered magnetic materials bonded together to provide suitable permeability, relatively low core loss, distributed voids, and / or thermal stability. The powder core 406 can surround the power conductor 402. In some embodiments, the powder core 406 can be replaced with another suitable inductor core.

[0068] The power conductor 402 can carry current from the power source through the inductor cell 400. The power conductor 402 can handle specific current levels with desired resistance and power loss. As shown in Figure 4, the power conductor 402 is oriented vertically and can carry current from the power source (not shown in Figure 4) through the inductor cell 400.

[0069] The grounding conductor 404 can provide a voltage reference for the inductor cell 400 and can provide a return path for the current. The grounding conductor 404 can be oriented vertically to facilitate vertical power supply. As shown in Figure 4, the power conductor 402 can be at least partially surrounded by the powder core 406. The powder core 406 can be at least partially surrounded by the grounding conductor 404.

[0070] In some embodiments, the ground plane 410 may include an area of ​​conductive material (e.g., copper and / or another metal or alloy) that serves as a common reference point for the inductor cell 400 or the electrical circuit associated with the inductor cell 400. The ground plane 410 may be electrically connected to a ground conductor 404 to provide a low-impedance path for the return current and / or to help reduce electromagnetic interference (EMI) and noise.

[0071] The power plane 408 may include areas of conductive material, which are electrically connected to the power conductor 402 to provide a low-impedance path for the supply current, and may also help reduce voltage drop and power loss. In some embodiments, the power plane 408 may be above, below, or overlapping with the ground plane 410.

[0072] As shown in Figure 4, the power conductor 402, powder core 406, and ground conductor 404 of the inductor cell 400 may be mounted and / or sandwiched between two PCBs 412 (e.g., an upper plate and a bottom plate). The two PCBs 412 may include insulating material such as glass fiber or epoxy resin, and conductive traces etched onto the surfaces and / or layers of the two PCBs 412. The two PCBs 412 can provide mechanical support and electrical interconnection for the power conductor 402, powder core 406, and ground conductor 404. In some embodiments, the ground plane 410 may be mounted on one layer of the PCB 412. The power plane 408 may be mounted on another layer of the PCB 412. The PCB 412 can advantageously facilitate the integration of the inductor cell 400 into an inductor array (e.g., the inductor array in Figure 7B) for implementing a vertical power supply system.

[0073] • An exemplary process for assembling an inductor cell Figures 5A, 5B, 5C, 5D, and 5E illustrate an exemplary process for assembling the exemplary inductor cell 400 of Figure 4 according to several embodiments of the present disclosure. The inductor cell 400 is shown at different stages of the exemplary assembly process in Figures 5A, 5B, 5C, 5D, and 5E.

[0074] The process of assembling the inductor cell 400 can begin from Figure 5A. As shown in Figure 5A, the power conductor 402 is placed inside the powder core 406. Thus, the powder core 406 surrounds the power conductor 402. The powder core 406 can provide the inductor cell 400 with the desired magnetic properties.

[0075] As shown in Figure 5B, the grounding conductor 404 is further arranged around the powder core 406. As described above, the grounding conductor 404 can provide a return path for the current associated with the inductor cell 400. Furthermore, grounding feet 504 are fabricated and incorporated into the grounding conductor 404. The grounding feet 504 can facilitate soldering to other components (e.g., the grounding plane 410) and provide mechanical support to the inductor cell 400.

[0076] As shown in Figure 5C, the ground plane 410 can be attached to and integrated with the inductor cell 400. More specifically, the ground plane 410 may be electrically connected to the ground conductor 404. As described above, the ground plane 410 can be attached to or fixed to the ground conductor 404 via ground legs 504. The ground plane 410 can provide a low-impedance path for the return current and help reduce electromagnetic interference (EMI) and noise.

[0077] As shown in Figure 5D, the power plane 408 can be further mounted and integrated with the inductor cell 400. In some embodiments, the power plane 408 is electrically connected to the power conductor 402. As described above, the power plane 408 can provide a low-impedance path for the supply current, which can help reduce voltage drop and power loss.

[0078] As shown in Figure 5E, multiple vias 514 can be added to the inductor cell 400. Multiple vias 514 can provide vertical interconnections connecting power planes 408 to each other, or ground planes 410 to each other, thereby enabling efficient vertical power supply from one PCB 412 (e.g., bottom plate) to the other PCB 412 (e.g., top plate). Multiple vias 514 can facilitate the flow of current between the power conductor 402 and the ground conductor 404, thereby ensuring reliable electrical connections and maintaining the structural integrity of the inductor cell 400. In some embodiments, two more PCBs 412 can be further positioned above and below the ground conductor 404, powder core 406, and power conductor 402, respectively, to obtain the inductor cell 400 shown in Figure 4.

[0079] • Example of two-phase vertical power supply Figures 6A and 6B illustrate two-phase vertical power supply using the exemplary inductor cell 400 of Figure 4 according to several embodiments of the present disclosure. More specifically, Figures 6A and 6B show partial perspective views of the inductor cell 400 configured for two-phase vertical power supply. As described above, in a two-phase configuration, the inductor cell 400 can supply power in two separate phases (e.g., 0° and 180°). In a two-phase configuration, the power conductor 402 of the inductor cell may include two conductor pieces (e.g., conductor piece 402-1 and conductor piece 402-2). The ground conductor 404 of the inductor cell 400 may include two conductor pieces (e.g., conductor piece 404-1 and conductor piece 404-2). Compared to a single-phase configuration, when the inductor cell 400 is configured in a two-phase configuration, it can achieve improved power supply efficiency and better load balancing.

[0080] Figure 6A shows an inductor cell 400 that supplies power vertically with a 0-degree phase. As shown in Figure 6A, the current supplied by the power conductors 402 (e.g., conductor piece 402-1 and conductor piece 402-2) is in phase (e.g., flows simultaneously in the same direction). The current returned by the ground conductor 404 (e.g., conductor piece 404-1 and conductor piece 404-2) is also in phase.

[0081] Figure 6B shows an inductor cell 400 that supplies power vertically with a 180-degree phase difference. As shown in Figure 6B, the current supplied by the power conductors 402 (e.g., conductor pieces 402-1 and 402-2) is out of phase (e.g., flows simultaneously in opposite directions). The current returned by the ground conductor 404 (e.g., conductor pieces 404-1 and 404-2) is also out of phase.

[0082] • Inductor array for vertical power supply Figure 7A shows physical characteristics relating to an exemplary inductor cell 700 for vertical power supply according to several embodiments of the present disclosure. The inductor cell 700 may be the same as or similar to the exemplary inductor cell 400 in Figure 4. As shown in Figure 7A, the inductor cell 700 includes a power conductor 702, a ground conductor 704, a powder core 706, and a PCB 712. The inductor cell 700 is one embodiment of an inductor cell for a specific vertical power supply application. The PCB 712 may have a square shape, with each side measuring 13 millimeters (mm). The height of the inductor cell 700 is 5 mm.

[0083] As shown in Figure 7A, the material permeability (e.g., Mat.perm) of the powder core 706 used in the inductor cell 700 is 60. This value represents the permeability of the core material, which affects the inductance and efficiency of the inductor cell 700. The inductance (L) of the inductor cell 700 is 46 nanohenries (nH). This value represents the ability of the inductor to store energy in its magnetic field.

[0084] As shown in Figure 7A, the power conductor 702, the ground conductor 704, and the powder core 706 are oriented vertically to facilitate vertical power supply. The power conductor 702 and the powder core 706 are surrounded by the ground conductor 704.

[0085] Figure 7B shows an inductor array 750 formed by the exemplary inductor cells of Figure 7A, according to some embodiments of the present disclosure. As shown in Figure 7B, the inductor array 750 includes a plurality of inductor cells 700 arranged in a grid pattern. The inductor array 750 can implement inductors for an array of power transmission modules. The inductor cells 700 of the inductor array can be included in a voltage converter, such as a buck converter.

[0086] As described above, each inductor cell 700 within the inductor array 750 contains power conductors, ground conductors, and powder cores, all oriented vertically to facilitate vertical power supply. The inductor cells are labeled with identifiers such as "Top1_1 Bot1_1," "Top1_2 Bot1_2," etc., indicating their location within the inductor array 750. The labels "Top" and "Bot" refer to the top and bottom plates of each inductor cell 700, respectively.

[0087] As shown in Figure 7B, the inductor array 750 corresponds to a 3x3 grid or array consisting of nine inductor cells 700. Each inductor cell 700 is positioned adjacent to its neighboring inductor cells 700, forming a compact and efficient layout for vertical power supply. This arrangement allows multiple inductor cells 700 to be integrated into a single inductor array 750, making it suitable for high-density computing applications requiring efficient power supply. It should be noted that the inductor array 750 can be customized to include different numbers of inductor cells based on specific application requirements. The modularity of the inductor array 750 enables design scalability and flexibility, making it suitable for a variety of high-performance computing and advanced AI training systems.

[0088] • Exemplary block diagram of a power supply module Figure 8 shows an exemplary block diagram of the components of a power supply module 800 for vertical power supply according to several embodiments of the present disclosure. The power supply module 800 may be the same as or similar to the power supply module 102 in Figure 1, the power supply modules 102A-102I in Figure 2, and / or the power supply modules 102A-102C in Figure 3. The power supply module 800 may also be called a power transmission module. As shown in Figure 8, the power supply module 800 includes an output capacitor 810, an inductor cell 820, and a driver transistor layer 830. The inductor cell 820 is sandwiched vertically between the output capacitor 810 and the driver transistor layer 830.

[0089] In some embodiments, the inductor cell 820 may include one or more inductor cells (e.g., one or more inductor cells 400). As described above, the inductor cell 820 may be stacked vertically between the output capacitor 810 and the driver transistor layer 830 to facilitate vertical power supply along the vertical direction.

[0090] In some embodiments, the output capacitor 810 may include one or more capacitors positioned above the inductor cell 820 and the driver transistor layer 830. The output capacitor 810 may interface with a semiconductor chip (e.g., a semiconductor chip in the array of chips 104 shown in Figure 1). The output capacitor 810 may smooth voltage fluctuations so that the power supply module 800 can provide a stable output voltage (e.g., to the array of chips 104).

[0091] In some embodiments, the driver transistor layer 830 may include one or more metal-oxide-semiconductor field-effect transistors. For example, the driver transistor layer 830 may include a driver-integrated metal-oxide-semiconductor field-effect transistor (DrMOS). In a DrMOS, the metal-oxide-semiconductor field-effect transistor can be integrated on-chip together with the power field-effect transistor. The driver transistor layer 830 can control the flow of current through the inductor cell 820 to regulate the power supplied by the power supply module 800.

[0092] ·Conclusion The foregoing disclosure is not intended to limit this disclosure to the exact form or specific field of use disclosed. Therefore, various alternative embodiments and / or modifications to this disclosure, whether expressly described or implied herein, are possible in light of this disclosure. While embodiments of this disclosure have been described in this manner, those skilled in the art will recognize that modifications in form and detail can be made without departing from the scope of this disclosure. Therefore, this disclosure is limited solely by the claims.

[0093] It should be understood that not all objectives or benefits will necessarily be achieved by following any specific example described herein. Therefore, for example, a person skilled in the art will recognize that some examples may be manipulated to achieve or optimize one benefit or set of benefits taught herein, without necessarily achieving other objectives or benefits that may be taught or suggested herein.

[0094] All processes described herein can be fully automated by being implemented in software code modules executed by a computing system including a computer or processor. The code modules may be stored in any type of non-temporary computer-readable medium or other computer storage device. Some or all of the methods may be implemented in dedicated computer hardware.

[0095] Many other variations not described herein will be apparent from this disclosure. For example, depending on the embodiment, any particular operation, event, or function of any of the algorithms described herein may be executed in a different order, and may be added, merged, or completely excluded (e.g., not all described actions or events are necessary for the implementation of the algorithm). Furthermore, in some examples, the operations or events may be executed not sequentially, but concurrently, for example, through multithreading, interrupt handling, or via multiple processors or processor cores, or on other parallel architectures. In addition, different tasks or processes may be executed by different machines and / or computing systems that can work together.

[0096] The various exemplary logic blocks and modules described in relation to the embodiments disclosed herein may be implemented or executed by machines such as processing units or processors, digital signal processors ("DSPs"), application-specific integrated circuits ("ASICs"), field-programmable gate arrays ("FPGAs") or other programmable logic devices, discrete gate or transistor logic, discrete hardware components, or any combination thereof, designed to perform the functions described herein. The processor may be a microprocessor, but in alternative examples, the processor may be a controller, microcontroller, or state machine, or a combination thereof. The processor may include electrical circuits for processing computer-executable instructions. In some embodiments, the processor includes an FPGA or other programmable device that performs logic operations without processing computer-executable instructions. The processor may also be implemented as a combination of computing devices, for example, a combination of a DSP and a microprocessor, multiple microprocessors, a microprocessor combined with a DSP core, or any other such configuration. Although this specification primarily describes digital technologies, the processor may also include primarily analog components. Computing environments can include, but are not limited to, any type of computer system based on a microprocessor, mainframe computer, digital signal processor, portable computing device, device controller, or in-device computing engine, to name a few.

[0097] Elements of methods, processes, routines, or algorithms described in relation to embodiments disclosed herein can be directly embodied in hardware, software modules executed by a processor device, or a combination of the two. Software modules can reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disks, removable disks, CD-ROMs, or any other form of non-temporary computer-readable storage medium. Exemplary storage media can be coupled to a processor device so that the processor device can read information from and write information to the storage media. Alternatively, the storage media may be integrated into the processor device. The processor device and storage media can reside within an ASIC. The ASIC can reside within a user terminal. Alternatively, the processor device and storage media can reside as separate components within a user terminal.

[0098] Processes described herein or shown in the figures of this disclosure can be initiated on demand when started by a user or system administrator in response to an event such as a predetermined or dynamically determined schedule, or in response to any other event. Once such a process is initiated, a set of executable program instructions stored in one or more non-temporary computer-readable media (e.g., hard drives, flash memory, removable media) can be loaded into the memory (e.g., RAM) of a server or other computing device. The executable instructions may then be executed by the hardware-based computer processor of the computing device. In some embodiments, such a process or part thereof can be implemented in series or in parallel on multiple computing devices and / or multiple processors.

[0099] In particular, conditional language such as “can,” “could,” “might,” or “may” is generally understood in context to convey that some examples include some features, elements, and / or processes, but others do not, unless otherwise specified. Thus, such conditional language is not generally intended to imply that features, elements, and / or processes are in any way for the examples, or that these examples necessarily involve logic for determining whether these features, elements, and / or processes should be included in or performed in any particular example, with or without user input or prompting.

[0100] Disjunctive language, such as the phrase "at least one of X, Y, or Z," is generally understood in its context to indicate that an item, term, etc., can be X, Y, Z, or any combination thereof (e.g., X, Y, and / or Z), unless otherwise specified. Therefore, such disjunctive language should not, in general, imply that several examples require at least one X, at least one Y, or at least one Z to exist, respectively.

[0101] Any process description, element, or block in the flowcharts described herein and / or shown in the accompanying drawings should be understood as potentially representing a module, segment, or portion of code containing executable instructions for performing a particular logical function or element in the process. The examples described herein include alternative examples in which, depending on the function included, elements or functions may be omitted or executed in a different order than those shown or described, including substantially simultaneously or in reverse order, as will be understood by those skilled in the art.

[0102] It should be emphasized that many variations and modifications can be made to the above examples, and that these elements should be understood to be found in other acceptable examples. All such modifications and variations are intended to be included within the scope of this disclosure.

[0103] Any process description, element, or block in the flowcharts described herein and / or shown in the accompanying drawings should be understood as potentially representing a module, segment, or portion of code containing executable instructions for performing a particular logical function or element in the process. The examples described herein include implementations in which, as understood by those skilled in the art, elements or functions may be omitted or executed in a different order than those shown or described, including substantially simultaneously or in reverse order, depending on the function included.

[0104] Unless otherwise specified, articles such as "a" or "an" should generally be interpreted as including one or more of the listed items. Therefore, phrases such as "devices configured as" are intended to include one or more of the enumerated devices. Such one or more enumerated devices can also be collectively configured to perform the stated enumeration. For example, "processors configured to perform enumerations A, B, and C" could include a first processor configured to perform enumeration A, working in conjunction with a second processor configured to perform enumerations B and C.

Claims

1. An inductor cell, The first plate and The second plate, A power conductor extending perpendicularly between the first plate and the second plate, Between the first plate and the second plate is the vertically extending inductor core, Between the first plate and the second plate is the vertically extending grounding conductor, Equipped with, The power conductor is configured to supply power between the first plate and the second plate along the vertical direction, The inductor cell is an inductor cell configured as an inductor in a power supply path.

2. The inductor cell according to claim 1, wherein the first plate includes a power plane and a ground plane, the power plane being electrically connected to the power conductor and the ground plane being electrically connected to the ground conductor.

3. The inductor cell according to claim 2, wherein the grounding conductor includes a plurality of soldering points for attaching the grounding plane to the grounding conductor.

4. The inductor cell according to claim 2, further comprising a plurality of vias configured to electrically connect the power plane to another power plane.

5. The inductor cell according to claim 2, further comprising a plurality of vias configured to electrically connect the ground plane to another ground plane.

6. The inductor cell according to claim 1, wherein the first plate includes a first printed circuit board (PCB), and the second plate includes a second PCB.

7. The inductor cell according to claim 1, wherein the inductor core at least partially surrounds the power conductor, and the ground conductor at least partially surrounds the inductor core.

8. The inductor cell according to claim 1, wherein the inductor core is continuous, the power conductor includes two power conductor pieces, and the ground conductor includes two ground conductor pieces, and supplies the power under two-phase operation.

9. The inductor cell according to claim 1, wherein the inductor core is continuous, the power conductor includes a plurality of power conductor pieces, and the ground conductor includes a plurality of ground conductor pieces, and supplies the power under multiphase operation.

10. An inductor array, The array comprises multiple inductor cells arranged in a plurality of inductor cells, each of which is Power conductor and, Inductor core and Grounding conductor and, The first plate and A second plate, comprising, The power conductor, the inductor core, and the ground conductor are arranged between the first plate and the second plate. An inductor array through which power is supplied perpendicularly between the first plate and the second plate via the power conductor.

11. The inductor array according to claim 10, wherein the power conductor is continuous, the ground conductor is continuous, and each of the plurality of inductor cells is configured to supply the power under single-phase operation.

12. The inductor array according to claim 10, wherein the power conductor comprises four power conductor pieces, and the ground conductor comprises four ground conductor pieces, and supplies the power under four-phase operation.

13. The inductor array according to claim 10, wherein the power conductor comprises two power conductor pieces, and the ground conductor comprises two ground conductor pieces, supplying the power under two-phase operation.

14. The inductor array according to claim 10, wherein the inductor core at least partially surrounds the power conductor, and the ground conductor at least partially surrounds the inductor core.

15. The inductor array according to claim 10, wherein the power conductor is substantially cylindrical.

16. The inductor array according to claim 10, wherein the grounding conductor includes one or more grounding legs configured to facilitate soldering between the grounding conductor and the first plate.

17. A computing system, An array of chips containing multiple chips, An array of power transmission modules including multiple power transmission modules, Each of the plurality of power transmission modules is positioned perpendicular to each of the plurality of chips and is configured to supply power perpendicular to each of the plurality of chips. Each of the aforementioned plurality of power transmission modules includes an inductor cell, and the inductor cell is Power conductor and, The ground conductor surrounding the aforementioned power conductor, The first printed circuit board and A second printed circuit board is provided, A computing system in which the power conductor and the ground conductor are arranged between the first printed circuit board and the second printed circuit board, and are arranged to supply power between the first printed circuit board and the second printed circuit board.

18. The computing system according to claim 17, wherein the system on wafer includes an array of the chips.

19. The computing system according to claim 17, wherein each of the plurality of power transmission modules includes a buck converter, and the inductor cell is the output inductor of the buck converter.

20. Each of the power transmission modules of the plurality of power transmission modules is: Capacitors and, Includes a metal oxide semiconductor field-effect transistor layer with a built-in driver, The computing system according to claim 17, wherein the inductor cell is arranged perpendicularly between the capacitor and the metal oxide semiconductor field-effect transistor layer with a built-in driver.

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