Wiring board and method for manufacturing the same

Abstract

To provide a wiring board that prevents cracks and scratches from progressing on the glass substrate, thereby ensuring sufficient manufacturing yield and durability. [Solution] A wiring board in which insulating layers made of a resin material are formed on the front and back surfaces of a glass substrate, wherein the peripheral edge in the planar direction of the insulating layer is located inward in the planar direction from the peripheral surface of the glass substrate, and has an exposed region at the peripheral edge of the glass substrate in which the front and back surfaces of the glass substrate are exposed.

Description

Technical Field

[0001] The present invention relates to a wiring board having a structure in which an insulating layer and a wiring pattern are laminated on both the front and back surfaces of a glass substrate in multiple layers, and a method for manufacturing the same.

Background Art

[0002] As a substrate for next-generation semiconductor packages, glass substrates have attracted attention as a replacement for conventional silicon substrates, greatly expanding the possibilities of next-generation semiconductor devices. As such a wiring board using a glass substrate, a wiring board having a laminated portion in which a plurality of resin insulating layers are laminated on both surfaces of a glass base material is known (see, for example, Patent Document 1). This wiring board is cut and processed so that the end face of the glass base material and the end face of the laminated portion are flush on the peripheral surface where the glass base material is exposed. And in this wiring board, the surface roughness of the end face of the glass base material is set to be smaller than the surface roughness of the end face of the laminated portion, aiming to prevent the occurrence of cracks on the end face of the glass base material.

[0003] Also, as another conventional technique, a wiring board having a structure in which the end face (peripheral surface) of a core board made of glass and the end faces of insulating layers formed on both surfaces of this core board are flush, and the end faces of the core board and the insulating layers are covered with resin is disclosed (see, for example, Patent Document 2).

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0005] In these conventional technologies, numerous wiring boards are arranged in a matrix in the planar direction on a large glass substrate or core substrate. Subsequently, the insulating layer, wiring layer, and glass substrate are cut together (singulation) along grid-like cutting lines to separate the wiring boards into individual pieces. As a result, the glass substrate or core substrate and the laminated portion or insulating layer overlap so that they are flush with the cut edge (circumferential surface) of the glass substrate or core substrate. There is a difference between the thermal expansion coefficient of the glass substrate or core substrate and the thermal expansion coefficient of the laminated portion or insulating layer formed on both sides of them. Therefore, in the above conventional technologies, if a fine crack occurs on the edge (circumferential surface) of the glass substrate or core substrate due to cutting, tensile stress is generated inside the glass substrate due to the difference in thermal expansion coefficients between the glass substrate and the laminated portion. This tensile stress is feared to cause the crack to propagate further. For this reason, ensuring sufficient manufacturing yield and durability of the wiring boards has been a challenge in the above conventional technologies.

[0006] The present invention has been made in view of the above problems, and aims to provide a wiring board and a method for manufacturing the same that ensure sufficient manufacturing yield and durability by preventing cracks or scratches from progressing into the interior of the glass substrate even if such cracks or scratches occur in the glass substrate. [Means for solving the problem]

[0007] To solve the above-mentioned problems, an embodiment of the present invention is a wiring board in which an insulating layer made of a resin material is formed on each of the front and back surfaces of a glass substrate, wherein the peripheral edge of the insulating layer in the planar direction is located inward from the peripheral surface of the glass substrate in the planar direction, and has an exposed region at the peripheral edge of the glass substrate in which the front and back surfaces of the glass substrate are exposed.

[0008] In the above embodiment, it is preferable that the width dimension of the exposed area is set to be longer than the length extending inward in the plane direction of a crack that may occur on the circumferential surface of the glass substrate.

[0009] In the above embodiment, it is preferable that wiring patterns are formed on both the front and back surfaces of the glass substrate.

[0010] Another aspect of the present invention is characterized by comprising the steps of: forming a wiring pattern and an insulating layer on each of the front and back surfaces of a glass substrate having a size that includes an area on which a plurality of wiring boards are to be manufactured, defined by scribe lines arranged in a grid; peeling off the insulating layer in a strip shape along the scribe lines and having a width dimension that straddles the scribe lines on each of the front and back surfaces of the glass substrate to form an exposed area on the glass substrate; and cutting the glass substrate along the scribe lines to separate it into individual wiring boards.

[0011] In the above embodiment, it is preferable that the width dimension of the exposed area in the cut wiring board is longer than the length extending inward in the plane direction of a crack that may occur on the peripheral surface of the glass substrate.

[0012] In the above embodiment, it is preferable that wiring patterns are formed on both the front and back surfaces of the glass substrate.

[0013] In the above embodiment, it is preferable to peel off the insulating layer by laser irradiation to form the exposed region. [Effects of the Invention]

[0014] The wiring board and its manufacturing method according to the present invention have the effect of preventing cracks and scratches from progressing on the glass substrate, thereby realizing a wiring board with sufficient manufacturing yield and durability. [Brief explanation of the drawing]

[0015] [Figure 1] Figure 1 is a cross-sectional view of a wiring board according to an embodiment of the present invention. [Figure 2] Figure 2 is a cross-sectional view of a glass substrate used in a method for manufacturing a wiring board according to an embodiment of the present invention. [Figure 3]FIG. 3 is a cross-sectional view showing a state in which a plurality of wiring boards are not cut in the method for manufacturing a wiring board according to an embodiment of the present invention. [Figure 4] FIG. 4 is a cross-sectional view showing a state in which an insulating layer is peeled off in the method for manufacturing a wiring board according to an embodiment of the present invention. [Figure 5] FIG. 5 is a perspective view showing a glass substrate having an insulating layer or the like formed on both front and back surfaces in the method for manufacturing a wiring board according to an embodiment of the present invention. [Figure 6] FIG. 6 is a perspective view showing a state in which an exposed area is formed on a glass substrate having an insulating layer or the like formed on both front and back surfaces in the method for manufacturing a wiring board according to an embodiment of the present invention. [Figure 7] FIG. 7 is a perspective view showing a scribe line for cutting a glass substrate after forming an exposed area in the method for manufacturing a wiring board according to an embodiment of the present invention. [Figure 8] FIG. 8 is a perspective view showing a state in which a wiring board is cut along a scribe line in the method for manufacturing a wiring board according to an embodiment of the present invention. [Figure 9] FIG. 9 is an enlarged cross-sectional view of a peripheral portion of a wiring board according to an embodiment of the present invention. [Figure 10] FIG. 10 is an enlarged cross-sectional view showing a state of a peripheral portion of a wiring board after a lapse of a predetermined time according to an embodiment of the present invention. [Figure 11] FIG. 11 is an enlarged cross-sectional view of a peripheral portion of a conventional wiring board. [Figure 12] FIG. 12 is an enlarged cross-sectional view showing a state of a peripheral portion of a conventional wiring board after a lapse of a predetermined time.

Embodiments for Carrying Out the Invention

[0016] Details of a wiring board and a method for manufacturing the same according to an embodiment of the present invention will be described below with reference to the drawings. However, it should be noted that the drawings are schematic, and the number of each member, the dimensions of each member, the ratio of dimensions, the shape, etc. are different from the actual ones. Also, there are portions where the relationship, ratio, and shape of the dimensions of each other are different between the drawings.

[0017] [Embodiment] (Configuration) As shown in FIG. 1, the wiring board 20 according to the present embodiment includes a glass substrate 1, a stacked portion provided on the surface 1A side of the glass substrate 1, and a stacked portion provided on the back surface 1B side of the glass substrate 1.

[0018] In the present embodiment, as the material of the glass substrate 1, aluminosilicate glass, soda glass, borosilicate glass, quartz glass, non-alkali glass, etc. can be used.

[0019] Through-hole conductors 2 penetrating in the thickness direction are formed at appropriate positions on the glass substrate 1.

[0020] The stacked portion provided on the surface 1A side of the glass substrate 1 has a plurality of chip connection bumps 10 on its surface, and can mount and connect semiconductor chip components and the like.

[0021] The stacked portion provided on the back surface 1B side side surface 1B side of the glass substrate 1 has motherboard connection bumps 18 formed on the back surface for connection to a motherboard (not shown).

[0022] On the surface 1A side of the glass substrate 1, sequentially, a first wiring pattern 3, a first insulating layer 4, a second wiring pattern 5, a second insulating layer 6, via-hole conductors 7, a third wiring pattern 8, a third insulating layer 9, and chip connection bumps 10 are provided.

[0023] The first wiring pattern 3 is connected to the through-hole conductor 2. The first insulating layer 4 is formed to cover the first wiring pattern 3. On the first insulating layer 4, the second wiring pattern 5, which is electrically connected to the first wiring pattern 3, is patterned. The second insulating layer 6 is laminated on the second wiring pattern 5. The third wiring pattern 8 is patterned on the second insulating layer 6. The third wiring pattern 8 is connected to the second wiring pattern 5 via the via-hole conductor 7. The third wiring pattern 8 is covered with the third insulating layer 9. On the third insulating layer 9, the chip connection bump 10, which is connected to the third wiring pattern 8, is formed to protrude.

[0024] As mentioned above, the materials for the first insulating layer 4, the second insulating layer 6, and the third insulating layer 9 can be resin materials such as polyimide resin, thermosetting epoxy resin, fluororesin, or acrylic resin.

[0025] As shown in Figure 1, the first insulating layer 4, the second insulating layer 6, and the third insulating layer 9 have a laminated structure in which they overlap with the same planar shape. The circumferential surfaces of these first insulating layer 4, second insulating layer 6, and third insulating layer 9 are formed to be flush with each other. Furthermore, the peripheral edges of these first insulating layer 4, second insulating layer 6, and third insulating layer 9 in the planar direction are located inward from the end face (circumferential surface) of the glass substrate 1 by a length of the peeling width W. As a result, the peripheral edge of the glass substrate 1 has an exposed region 19 in which the surface 1A of the glass substrate 1 is exposed.

[0026] The back surface 1B of the glass substrate 1 is provided with, in order, a fourth wiring pattern 11, a fourth insulating layer 12, a fifth wiring pattern 13, a fifth insulating layer 14, a via hole conductor 15, a sixth wiring pattern 16, a sixth insulating layer 17, and a bump 18 for motherboard connection.

[0027] The fourth wiring pattern 11 is connected to the through-hole conductor 2 on the back surface 1B side of the glass substrate 1. The fourth insulating layer 12 is formed to cover the fourth wiring pattern 11. On the fourth insulating layer 12, the fifth wiring pattern 13 is formed, which is electrically connected to the fourth wiring pattern 11. The fifth insulating layer 14 is laminated on the fifth wiring pattern 13. The sixth wiring pattern 16 is formed on this fifth insulating layer 14. This sixth wiring pattern 16 is connected to the fifth wiring pattern 13 via the via-hole conductor 15. The sixth wiring pattern 16 is covered with the sixth insulating layer 17. On this sixth insulating layer 17, a motherboard connection bump 18 is formed to protrude and is connected to the sixth wiring pattern 16.

[0028] As mentioned above, the materials for the fourth insulating layer 12, the fifth insulating layer 14, and the sixth insulating layer 17 can be resin materials such as polyimide resin, thermosetting epoxy resin, fluororesin, or acrylic resin.

[0029] The fourth insulating layer 12, the fifth insulating layer 14, and the sixth insulating layer 17 have a laminated structure in which they overlap with the same planar shape (see Figure 1). The circumferential surfaces of these fourth insulating layer 12, fifth insulating layer 14, and sixth insulating layer 17 are formed to be flush with each other. Furthermore, the peripheral edges of these fourth insulating layer 12, fifth insulating layer 14, and sixth insulating layer 17 in the planar direction are located inward from the end face (circumferential surface) of the glass substrate 1 by a length of the peeling width W. As a result, the peripheral edge of the glass substrate 1 has an exposed region 19 in which the back surface 1B of the glass substrate 1 is exposed.

[0030] In the wiring board 20 according to this embodiment, the peeling width W (width dimension) of the exposed area 19 is set to be longer than the length d extending inward in the plane direction of the crack CR1 present on the circumferential surface of the glass substrate 1 (see Figure 9). Crack CR1 is an example of a crack that may occur on the circumferential surface of the glass substrate 1. Cracks of various lengths may occur on the circumferential surface of the glass substrate 1, but crack CR1 is an example of the longest crack among those that may occur. If the peeling width W of the exposed area 19 is at least longer than the length d of crack CR1, tensile stress will not be generated inside the glass substrate 1, and the propagation of the crack into the interior of the glass substrate can be suppressed.

[0031] (Effects / Actions) The operation and effects of the wiring board 20 according to this embodiment will be described below. Figure 9 is a cross-sectional diagram illustrating the schematic configuration of this embodiment, showing a state in which a laminated portion LA1 is formed on the front surface 1A of the glass substrate 1 and a laminated portion LA2 is formed on the back surface 1B. In this embodiment, the laminated portion LA1 is composed of a first insulating layer 4, a second insulating layer 6, and a third insulating layer 9, etc. The laminated portion LA2 is composed of a fourth insulating layer 12, a fifth insulating layer 14, and a sixth insulating layer 17, etc.

[0032] In the wiring board 20 according to this embodiment, the peeling width W of the exposed area 19 on the front surface 1A and back surface 1B of the glass substrate 1 is set to be longer than the length d of the crack CR1 extending inward in the plane direction, thereby improving manufacturing yield and durability.

[0033] In other words, when the wiring board 20 is affected by the passage of time or environmental changes (temperature changes), the glass substrate 1 experiences tensile stress F1 and thickness-direction stress F2, as shown in Figure 10, due to the difference in thermal expansion coefficients between the glass substrate 1 and the laminated parts LA1 and LA2. The tensile stress F1 is a force acting in the plane direction of the glass substrate 1, and the thickness-direction stress F2 is a moment force acting in a direction perpendicular to the substrate surface of the glass substrate 1 in response to the tensile force F1.

[0034] In this embodiment, the region where the stress F2 in the thickness direction acts is the region 1D inside the substrate enclosed by the dashed line, as shown in Figure 10. Since there are no cracks CR in this region 1D inside the substrate, even when subjected to the stress F2 in the thickness direction, the propagation of cracks CR originating from cracks CR and the occurrence of cracks can be suppressed.

[0035] Here, we will consider a comparative example to this embodiment. Figures 11 and 12 are cross-sectional explanatory diagrams showing a comparative example. The wiring board shown in Figure 11 has an end face (cut surface) where the laminated parts LA1 and LA2 and the end face (circumferential surface) 1C of the glass substrate 1 are formed flush. When the wiring board 20 is affected by the passage of time or environmental changes (temperature changes), as shown in Figure 12, the glass substrate 1 is subjected to tensile stress F1 and thickness-direction stress F2 due to the difference in thermal expansion coefficients between the glass substrate 1 and the laminated parts LA1 and LA2. The tensile stress F1 acts in the plane direction of the glass substrate 1, and the thickness-direction stress F2 acts in a direction perpendicular to the substrate surface of the glass substrate 1 due to the action of the tensile stress F1. As a result, the thickness-direction stress F2 causes the crack CR1 shown in Figure 11 to propagate, generating a large crack CR2 as shown in Figure 12.

[0036] (Manufacturing method for wiring boards) The method for manufacturing a wiring board according to an embodiment of the present invention will be described below with reference to Figures 2 to 8.

[0037] First, a glass substrate 1 is prepared as shown in Figure 2. This glass substrate 1 is a core substrate of a size that includes an area on which multiple wiring boards 20 are fabricated, as defined by scribe lines S (see Figure 7) set in a grid pattern. In this manufacturing method, multiple wiring boards 20 are fabricated on a single glass substrate 1 at once. Therefore, the insulating layers and other laminates are deposited over the entire surface of the glass substrate 1.

[0038] Next, as shown in Figure 3, through-hole conductors 2 that penetrate in the thickness direction are formed in the glass substrate 1 using a well-known method.

[0039] Next, as shown in Figure 5, a laminated portion LA1 is fabricated on the front surface 1A of the glass substrate 1, and a laminated portion LA2 is fabricated on the back surface 1B.

[0040] Specifically, on the surface 1A side of the glass substrate 1, a first wiring pattern 3 connected to the through-hole conductor 2, a first insulating layer 4 formed to cover the first wiring pattern 3, a second wiring pattern 5, a second insulating layer 6, a via-hole conductor 7, a third wiring pattern 8, a third insulating layer 9, and chip connection bumps 10 are formed in sequence.

[0041] On the first insulating layer 4 described above, a second wiring pattern 5 is formed to be electrically connected to the first wiring pattern 3. A second insulating layer 6 is laminated on the second wiring pattern 5. A third wiring pattern 8 is formed on this second insulating layer 6. The third wiring pattern 8 is formed to be connected to the second wiring pattern 5 via via hole conductors 7. The third wiring pattern 8 is covered with a third insulating layer 9, and a chip connection bump 10 is formed on the third insulating layer 9 to protrude and be connected to the third wiring pattern 8.

[0042] On the back surface 1B of the glass substrate 1, a fourth wiring pattern 11, a fourth insulating layer 12, a fifth wiring pattern 13, a fifth insulating layer 14, a via hole conductor 15, a sixth wiring pattern 16, a sixth insulating layer 17, and a motherboard connection bump 18 are formed in sequence.

[0043] The fourth wiring pattern 11 is formed to connect to the through-hole conductor 2 on the back surface 1B side of the glass substrate 1. The fourth insulating layer 12 is formed to cover the fourth wiring pattern 11. A fifth wiring pattern 13 is formed on the fourth insulating layer 12, which is electrically connected to the fourth wiring pattern 11. A fifth insulating layer 14 is laminated on the fifth wiring pattern 13. A sixth wiring pattern 16 is formed on this fifth insulating layer 14. The sixth wiring pattern 16 is formed to connect to the fifth wiring pattern 13 via the via-hole conductor 15. The sixth insulating layer 17 is formed to cover the sixth wiring pattern 16. A motherboard connection bump 18, which is connected to the sixth wiring pattern 16, is formed to protrude from this sixth insulating layer 17.

[0044] As described above, after the manufacturing process of the front and back surfaces of the glass substrate 1, exposed regions 19 are formed along the scribe lines S on the front surface 1A and back surface 1B of the glass substrate 1, as shown in Figures 3, 4, and 6. As shown in Figure 4, this exposed region 19 is strip-shaped with a width dimension of 2W, which is twice the peeling width W, spanning the scribe line S (see Figure 6). In order to form the exposed region 19, the laminated portions LA1 and LA2 in the region between the insulating layer cut lines C1 and C2 shown in Figures 3 and 4 are peeled off by laser irradiation.

[0045] Next, as shown in Figure 4, the glass substrate 1 is cut (singulated) along the scribe line S, and as shown in Figure 8, it is separated into individual wiring boards 20, completing the manufacturing process.

[0046] In the method for manufacturing a wiring board according to this embodiment, the peeling width W of the exposed area 19 in the cut wiring board 20 (see Figures 1 and 4) is set to be longer than the length d of the crack extending inward in the plane direction from the circumferential surface of the glass substrate 1 (see Figure 9).

[0047] According to the wiring board manufacturing method of this embodiment, the manufacturing yield of the wiring board 20 can be improved, and a wiring board 20 with durability against the passage of time and environmental changes can be realized.

[0048] [Other embodiments] Although the wiring board and its manufacturing method of the present invention have been described above, the descriptions and drawings that constitute part of the disclosure of embodiments should not be understood as limiting this invention. Various alternative embodiments, examples, and operational techniques will become apparent to those skilled in the art from this disclosure.

[0049] For example, in the above embodiment, laser irradiation was performed to remove the laminated portions LA1 and LA2, but the invention is not limited to this. [Explanation of Symbols]

[0050] C1, C2 Insulation Layer Cut-off Lines CR1 Crack CR2 crack (after heating) d. Crack depth (length) F1 Tensile stress F2 Stress in the thickness direction LA1,LA2 Laminated section S. Scribeline W: Peeling width (width of exposed area) 1. Glass substrate 1A surface 1B Back side 1C end face 2 Through-hole conductors 3. First wiring pattern 4. First insulating layer 5. Second wiring pattern 6. Second insulating layer 7 Via hole conductor 8. Third wiring pattern 9. Third insulating layer 10 Bumps for chip connection 11. Fourth wiring pattern 12. Fourth insulating layer 13. Fifth wiring pattern 14. Fifth insulating layer 15 via hole conductor 16. Wiring Pattern #6 17. Sixth insulating layer 18 Motherboard connection bumps 19 Exposure area 20 Wiring board (interposer)

Claims

1. A wiring board having insulating layers made of resin material formed on both the front and back surfaces of a glass substrate, The wiring board is characterized in that the peripheral edge of the insulating layer in the planar direction is located inward from the peripheral surface of the glass substrate in the planar direction, and has an exposed region at the peripheral edge of the glass substrate in which the front and back surfaces of the glass substrate are exposed.

2. The wiring board according to claim 1, wherein the width dimension of the exposed area is set to be longer than the length extending inward in the plane direction of a crack that may occur on the circumferential surface of the glass substrate.

3. The wiring substrate according to claim 1, wherein wiring patterns are formed on the front and back surfaces of the glass substrate, respectively.

4. A process of forming wiring patterns and insulating layers on each of the front and back surfaces of a glass substrate, the size of which includes an area where multiple wiring boards are fabricated, as defined by scribe lines arranged in a grid, A step of peeling off the insulating layer in a strip shape having a width dimension that spans the scribe line along the scribe line on each of the front and back surfaces of the glass substrate to form an exposed area on the glass substrate, A method for manufacturing a wiring board, comprising the step of cutting the glass substrate along the scribe line to separate it into individual wiring boards.

5. The method for manufacturing a wiring board according to claim 4, wherein the width dimension of the exposed area in the cut wiring board is longer than the length extending inward in the plane direction of a crack that may occur on the peripheral surface of the glass substrate.

6. The method for manufacturing a wiring substrate according to claim 4, wherein wiring patterns are formed on the front and back surfaces of the glass substrate, respectively.

7. The method for manufacturing a wiring board according to claim 4, wherein the insulating layer is peeled off by laser irradiation to form the exposed region.

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