COMMUNICATION METHOD, APPARATUS, AND SYSTEM

Abstract

This application discloses a communication method. The method includes: a first device generates and sends a first optical signal, the first optical signal being a signal obtained by combining a first clock signal with a downlink digital signal, the first clock signal including a first transmission delay; a second clock signal being obtained by transmitting the first clock signal over a transmission link, the sum of the transmission delay of the transmission link and the first transmission delay being zero; and a second device performs time synchronization based on the second clock signal. In the technical solution of this application, the digital-analog hybrid transmission and simultaneous transmission of the clock signal and the downlink digital signal can be completed via one transmission link, and an independent clock signal transmission link does not need to be established. In addition, after transmitting the first clock signal over the transmission link, the first transmission delay in the first clock signal can be offset by the transmission delay of the transmission link, and the transmission delay of the transmission link does not need to be measured or calculated, thereby improving the accuracy of time synchronization.

Description

[Technical Field]

[0001] TECHNICAL FIELD This application relates to the field of communications technology, and in particular to communications methods, devices, and systems. [Background technology]

[0002] Currently, the time synchronization solution is usually that a first device measures the transmission delay of a transmission link, and then transmits the transmission delay and local end timestamp information via the transmission link to a second device, and the second device can implement time synchronization with the first device by demodulating the timestamp information and the transmission delay.

[0003] In a real scenario, the accuracy of measuring the transmission delay by the first device may be affected by many factors, resulting in poor time synchronization accuracy for the second device. Summary of the Invention

[0004] The present application provides a communication method for improving the accuracy of time synchronization. The present application also provides a corresponding apparatus and system.

[0005] A first aspect of the present application provides a communication method, the method including: a first device generating a first optical signal, the first optical signal being a signal obtained by combining a first clock signal with a downlink digital signal, the first clock signal including a first transmission delay; the first device sending the first optical signal; a second clock signal being obtained by transmitting the first clock signal on a transmission link between the first device and a second device, the sum of the transmission delay of the transmission link and the first transmission delay being zero; and the second clock signal being used by the second device to perform time synchronization.

[0006] In the present application, the communication method may be applied to an open radio access network (O-RAN), the first device may be an O-RAN distributed unit (O-DU), and the second device may be an O-RAN radio unit (O-RU). Obviously, the communication method may also be applied to another system that needs to implement time synchronization, and the first device and the second device may alternatively be other devices, which is not limited in the present application.

[0007] In this application, the first optical signal is a signal obtained through hybrid transmission of the first clock signal and the downlink digital signal. Hybrid transmission refers to transmission in a hybrid manner and may be understood as combining the first clock signal with a spectral position of the downlink digital signal and then transmitting the combined signal as a whole.

[0008] In the present application, the first clock signal may be an analog signal. In the phase expression form of the first clock signal, the first transmission delay may be understood as the inverse of the transmission delay of the transmission link.

[0009] From the above solution, it can be seen that the first device may combine the first clock signal with the downlink digital signal for transmission, and complete digital-analog hybrid transmission and simultaneous transmission of the clock signal and the downlink digital signal through one transmission link, and no independent clock signal transmission link needs to be established. In addition, after transmitting the first clock signal on the transmission link, the first transmission delay in the first clock signal transmitted by the first device may be offset by the transmission delay of the transmission link, and the transmission delay of the transmission link does not need to be measured or calculated, thereby improving the accuracy of time synchronization of the second device.

[0010] In a possible implementation, the first clock signal is combined with a first frequency band of the downlink digital signal.

[0011] In this possible implementation, the first frequency band may be a pre-specified frequency band in the spectrum of the downlink digital signal, and the first frequency band may include one or more frequencies. Since the combined frequency bands are pre-specified, the second device can easily filter the clock signal in the downlink digital signal.

[0012] In a possible implementation, the first frequency band includes a first spectral null, and the first clock signal is combined with a first spectral null of the downlink digital signal, the first spectral null being an arbitrary power valley point on the spectrum of the downlink digital signal.

[0013] In this implementation, the power valley point refers to the position of the trough in the spectrum of the downlink digital signal. Setting the clock signal to the power valley point can help the second device obtain the clock signal through filtering, thereby reducing the impact on the downlink digital signal.

[0014] It should be noted that the first clock signal may be associated with a first spectral null in the first frequency band or may be associated on one or more frequencies other than the first spectral null, which is not a limitation of the present application.

[0015] In a possible implementation, the transmission link is a fiber optic link.

[0016] In a possible implementation, the method further includes: the first device processes the third clock signal and the fourth clock signal to obtain a first clock signal, the third clock signal being obtained by filtering a second optical signal from the second device on the transmission link, the third clock signal being a clock signal obtained by transmitting a clock source signal on the transmission link in a round-trip manner, and the fourth clock signal being a frequency-multiplied signal of the clock source signal.

[0017] In this possible implementation, the third clock signal may include twice the transmission delay of the transmission link. Obviously, if the third clock signal is obtained by transmitting the clock source signal n times, the third clock signal may alternatively include 2n transmission delays of the transmission link. The fourth clock signal may be a frequency-tripled signal of the clock source signal, or may be a frequency-multiplied signal of another multiple, provided that the first clock signal including the first transmission delay can be obtained by processing the third clock signal and the fourth clock signal. In this application, the multiple of the transmission delay of the transmission link in the third clock signal and the multiple of the frequency of the fourth clock signal relative to that of the clock source signal are not limited. From this implementation, it can be seen that the first clock signal including the first transmission delay can be determined by transmitting a clock signal between the first device and the second device in a round-trip manner. In this way, the accuracy of obtaining the first transmission delay can be improved.

[0018] In a possible implementation, the first device processing the third clock signal and the fourth clock signal to obtain the first clock signal includes: the first device performing frequency mixing on the third clock signal and the fourth clock signal to obtain a phase difference clock signal between the third clock signal and the fourth clock signal; and the first device obtaining the first clock signal based on the phase difference clock signal.

[0019] In this possible implementation, frequency mixing is performed on the third clock signal and the fourth clock signal to obtain a phase difference clock signal between the third clock signal and the fourth clock signal, thereby obtaining a first transmission delay including the negative transmission delay of the transmission link, and therefore the time synchronization is not affected by the transmission delay of the transmission link.

[0020] In a possible implementation, the first device obtaining the first clock signal based on the phase difference clock signal includes: the first device performing frequency division on the phase difference clock signal to obtain the first clock signal.

[0021] In this possible implementation, the frequency of the clock signal may be reduced through frequency division, so that the first clock signal may be within the spectral range of the downlink digital signal.

[0022] In a possible implementation, the method further includes: the first device generating a third optical signal, the third optical signal being a signal obtained by combining a clock source signal with the downlink digital signal; the first device sending the third optical signal, the third clock signal being obtained by transmitting the clock source signal over the transmission link in a round-trip manner.

[0023] In this possible implementation, before the first clock signal is transmitted, a digital-analog hybrid transmission is performed on the clock source signal and the downlink digital signal to obtain a third clock signal, and then the first clock signal is obtained based on the above description and time synchronization is performed.

[0024] In a possible implementation, the clock source signal is combined with a second frequency band of the downlink digital signal.

[0025] In this possible implementation, the second frequency band may be a pre-designated frequency band on the spectrum of the downlink digital signal, and the second frequency band may include one or more frequencies. In the present application, the second frequency band may or may not overlap with the first frequency band. In order to allow the second device to better distinguish between a signal generated by transmitting a clock source signal on the transmission link and the second clock signal, the second frequency band generally does not overlap with the first frequency band. In this way, the second device can obtain the clock signal through filtering for different purposes and perform different procedures.

[0026] In a possible implementation, the second frequency band includes a second spectral null, and the clock source signal is combined with the second spectral null of the downlink digital signal, the second spectral null being any power valley point other than the power valley point corresponding to the first spectral null on the spectrum of the downlink digital signal.

[0027] In this possible implementation, the clock source signal is combined with another valley point of the downlink digital signal, so that the second device can obtain the clock signal through filtering, and the impact on the downlink digital signal can be reduced.

[0028] A second aspect of the present application provides a communication method. The method may be applied to a second device communicating with a first device via a transmission link. The method includes: the second device receives a first optical signal, the first optical signal being a signal obtained by combining a first clock signal with a downlink digital signal, the first clock signal including a first transmission delay, and the second clock signal being obtained by transmitting the first clock signal on the transmission link; the second device obtains a second clock signal from the first optical signal through filtering; and the second device performs time synchronization based on the second clock signal.

[0029] In this application, a first optical signal is from a first device and is transmitted to a second device via a transmission link.

[0030] In a second aspect, the second clock signal has no transmission delay because the first transmission delay is canceled in the process of transmitting the first clock signal over the transmission link, and the second device may perform time synchronization using the second clock signal, thereby improving the accuracy of the time synchronization.

[0031] In a possible implementation, the second clock signal is combined with a first frequency band of the downlink digital signal, and the second device obtaining the second clock signal from the first optical signal through filtering includes: the second device obtaining the second clock signal from the first frequency band through filtering.

[0032] In this possible implementation, the second device may obtain the second clock signal from the first frequency band through filtering, and thus the accuracy of filtering the second clock signal may be improved.

[0033] In a possible implementation, the first frequency band includes a first spectral null, and the first clock signal is combined with a first spectral null of the downlink digital signal, the first spectral null being an arbitrary power valley point on the spectrum of the downlink digital signal.

[0034] In a possible implementation, the transmission link is a fiber optic link.

[0035] In a possible implementation, the method further includes: the second device sends a second optical signal over the transmission link, the second optical signal including a clock signal obtained by transmitting a clock source signal on the transmission link.

[0036] In this possible implementation, the clock signal obtained by transmitting a clock source signal on the transmission link is a clock signal obtained by transmitting a clock source signal to a second device on the transmission link, and the second optical signal can be a signal obtained by combining the clock signal obtained by transmitting a clock source signal to a second device on the transmission link with the uplink digital signal. For the combination method, please refer to the above combination method of the first clock signal and the downlink digital signal for understanding.

[0037] In a possible implementation, before the second device sends the second optical signal over the transmission link, the method further includes: the second device obtains a clock signal from the received third optical signal through filtering, the clock signal obtained through filtering is a signal obtained by transmitting a clock source signal on the transmission link, and the third optical signal is a signal obtained by combining the clock source signal with the downlink digital signal; and the second device generates the second optical signal based on the clock signal obtained through filtering.

[0038] In this possible implementation, after obtaining a signal obtained by transmitting a clock source signal on the transmission link from the third optical signal through filtering, the second device may feed back a clock signal including a transmission delay of the transmission link to the first device, thereby allowing the first device to obtain the first clock signal.

[0039] In a possible implementation, the clock source signal is combined with a second frequency band of the downlink digital signal, and the second device obtaining the clock signal from the received third optical signal through filtering includes: the second device obtaining the clock source signal from the second frequency band of the downlink digital signal through filtering.

[0040] In a possible implementation, the second frequency band includes a second spectral null, and the clock source signal is combined with the second spectral null of the downlink digital signal, the second spectral null being any power valley point other than the power valley point corresponding to the first spectral null on the spectrum of the downlink digital signal.

[0041] A third aspect of the present application provides a communication system including a first device, a transmission link, and a second device. The first device communicates with a second device via the transmission link. The first device generates a first optical signal, the first optical signal being a signal obtained by combining a first clock signal with a downlink digital signal, the first clock signal including a first transmission delay. The second device receives the first optical signal from the first device, and the second clock signal is obtained by transmitting the first clock signal on the transmission link, the sum of the transmission delay of the transmission link and the first transmission delay being zero. The second device obtains a second clock signal from the first optical signal through filtering. The second device performs time synchronization based on the second clock signal.

[0042] In the communication system provided in the third aspect, the first device may combine the first clock signal with the downlink digital signal for transmission, and complete digital-analog hybrid transmission and simultaneous transmission of the clock signal and the downlink digital signal via one transmission link, without the need to establish an independent clock signal transmission link. In addition, after transmitting the first clock signal on the transmission link, the first transmission delay in the first clock signal transmitted by the first device may be offset by the transmission delay of the transmission link, and the transmission delay of the transmission link does not need to be measured or calculated, thereby improving the accuracy of time synchronization of the second device.

[0043] A fourth aspect of the present application provides a communication device including a coupler, a laser, and a circulator.

[0044] The coupler is configured to combine a first clock signal with the downlink digital signal to obtain a first combined signal, the first clock signal including a first transmission delay.

[0045] The laser is configured to generate a first optical signal based on the first combined signal.

[0046] The circulator is configured to send a first optical signal through a transmission link between the distribution device and the communication device, and a second clock signal is obtained when the first clock signal passes through the transmission link, and a sum of a transmission delay of the transmission link and the first transmission delay is zero, and the second clock signal is used by the communication device to perform time synchronization.

[0047] In this application, a coupler may combine a digital signal with a clock signal and may combine a clock signal with a position of the digital signal.

[0048] The circulator may separate the uplink optical signal from the downlink optical signal. The circulator may have three or four interfaces. Taking three interfaces as an example, the interface numbers may be Interface 1, Interface 2, and Interface 3, respectively. The optical signal input from Interface 1 may be output from Interface 2, and the optical signal input from Interface 2 may be output from Interface 3.

[0049] In a fourth aspect, the distributed device may be an O-DU, and the communication device may be an O-RU. The O-DU may combine the first clock signal with the downlink digital signal for transmission, and complete digital-analog hybrid transmission and simultaneous transmission of the clock signal and the downlink digital signal via one transmission link, without the need to establish an independent clock signal transmission link. In addition, after transmission of the first clock signal on the transmission link, a first transmission delay in the first clock signal transmitted by the O-DU may be offset by a transmission delay of the transmission link, and the transmission delay of the transmission link does not need to be measured or calculated, thereby improving the accuracy of time synchronization of the O-RU.

[0050] In a possible implementation, the first clock signal is combined with a first frequency band of the downlink digital signal.

[0051] In a possible implementation, the first frequency band includes a first spectral null, and the first clock signal is combined with a first spectral null of the downlink digital signal, the first spectral null being an arbitrary power valley point on the spectrum of the downlink digital signal.

[0052] In a possible implementation, the transmission link is a fiber optic link.

[0053] In a possible implementation, the communication device further includes a photoelectric detector, a first filter, a frequency multiplier, and a signal processing component.

[0054] The photoelectric detector is configured to convert the second optical signal received by the circulator into an electrical signal.

[0055] The first filter is configured to derive a third clock signal from the electrical signal through filtering, the third clock signal being a clock signal obtained by transmitting a clock source signal over the transmission link in a round-trip manner.

[0056] The frequency multiplier is configured to perform frequency multiplication on the clock source signal to obtain a fourth clock source signal.

[0057] The signal processing component is configured to process the third clock signal and the fourth clock signal to obtain the first clock signal.

[0058] In this possible implementation, the first filter may be a bandpass filter, and through filtering, may generally obtain signals with high frequencies. The frequency multiplier may amplify the frequency of the signal, for example, by two, three, or more times. The amplification factor depends on the frequency multiplication capability of the frequency multiplier. The signal processing component may be a combination of two or more devices, or may be a single device.

[0059] In a possible implementation, the signal processing components include a frequency mixer, a second filter, and a frequency divider.

[0060] The frequency mixer is configured to perform frequency mixing on the third clock signal and the fourth clock signal to obtain a phase difference clock signal between the third clock signal and the fourth clock signal.

[0061] The second filter is configured to obtain a phase difference clock signal from the signal output by the frequency mixer through filtering.

[0062] The frequency divider is configured to perform frequency division on the phase-shifted clock signal to obtain a first clock signal.

[0063] In this possible implementation, the frequency mixer may perform a difference or addition on the two signals. The second filter may be a bandpass filter, which may obtain a phase-difference clock signal through filtering. The frequency divider may reduce the frequency of the signal, for example, to half the original frequency or to another value. The degree of frequency reduction depends on the frequency reduction capability of the frequency divider.

[0064] In a possible implementation, the distribution device further includes a clock source module.

[0065] The clock source module is configured to output a clock source signal.

[0066] The coupler is further configured to combine the clock source signal with the downlink digital signal to obtain a second combined signal.

[0067] The laser is further configured to generate a third optical signal based on the second combined signal.

[0068] The circulator is further configured to send the third optical signal over the transmission link.

[0069] In this possible implementation, the clock source module may receive a global positioning system (GPS) clock source signal.

[0070] In a possible implementation, the clock source signal is combined with a second frequency band of the downlink digital signal.

[0071] In a possible implementation, the second frequency band includes a second spectral null, and the clock source signal is combined with the second spectral null of the downlink digital signal, the second spectral null being any power valley point other than the power valley point corresponding to the first spectral null on the spectrum of the downlink digital signal.

[0072] A fifth aspect of the present application provides a communication device including a circulator, a photoelectric detector, a first filter, and a time synchronization module.

[0073] The circulator is configured to receive a first optical signal from the communication device via a transmission link connected to the communication device, the first optical signal being a signal obtained by combining a first clock signal with a downlink digital signal, the first clock signal including a first transmission delay, and the second clock signal being obtained by transmitting the first clock signal on the transmission link.

[0074] The photodetector is configured to convert the first optical signal into a first electrical signal.

[0075] The first filter is configured to derive a second clock signal from the first electrical signal through filtering.

[0076] The time synchronization module is configured to perform time synchronization based on a second clock signal.

[0077] In a fifth aspect, the first filter may be a bandpass filter.

[0078] In a fifth aspect, the second clock signal has no transmission delay because the first transmission delay is canceled in the process of transmitting the first clock signal over the transmission link, and the second device may perform time synchronization using the second clock signal, thereby improving the accuracy of the time synchronization.

[0079] In a possible implementation, the second clock signal is combined with a first frequency band of the downlink digital signal, and the first filter is configured to obtain the second clock signal from the first frequency band through filtering.

[0080] In a possible implementation, the second frequency band includes a second spectral null, the clock source signal is combined with the second spectral null of the downlink digital signal, and the first spectral null is an arbitrary power valley point on the spectrum of the downlink digital signal.

[0081] In a possible implementation, the transmission link is a fiber optic link.

[0082] In a possible implementation, the circulator is further configured to send a second optical signal over the transmission link, the second optical signal including a clock signal obtained by transmitting a clock source signal on the transmission link.

[0083] In a possible implementation, the communication device further includes a second filter, a coupler, and a laser.

[0084] The circulator is further configured to receive a third optical signal via the transmission link, the third optical signal being a signal obtained by combining the clock source signal with the downlink digital signal.

[0085] The photodetector is further configured to convert the third optical signal into a second electrical signal.

[0086] The second filter is configured to obtain a clock source signal from the second electrical signal through filtering, and the clock signal obtained through filtering is a signal obtained by transmitting the clock source signal on the transmission link.

[0087] The coupler is configured to combine and filter the clock source signal and the first uplink digital signal to obtain a combined signal.

[0088] The laser is configured to generate a second optical signal based on the combined signal.

[0089] In this possible implementation, the second filter may be a bandpass filter, and the frequency range obtained through the filtering performed by the bandpass filter is different from the frequency range obtained through the filtering performed by the first filter.

[0090] In a possible implementation, the clock source signal is combined with a second frequency band of the downlink digital signal, the frequency of the second frequency band being different from the frequency of the first frequency band.

[0091] The second filter is configured to obtain the clock signal from a second frequency band of the downlink digital signal through filtering.

[0092] In a possible implementation, the second frequency band includes a second spectral null, and the clock source signal is combined with the second spectral null of the downlink digital signal, the second spectral null being any power valley point other than the power valley point corresponding to the first spectral null on the spectrum of the downlink digital signal.

[0093] A sixth aspect of the present application provides a communication system including a first device, a transmission link, and a second device, wherein the first device communicates with the second device via the transmission link, the first device being a communication device according to the third aspect or any one of the possible implementations of the third aspect, and the second device being a communication device according to the fourth aspect or any one of the possible implementations of the fourth aspect.

[0094] A seventh aspect of the present application provides a communication device including a communication interface, a processor, and a memory, wherein the communication interface and the processor are coupled to the memory, and the memory is configured to store a program or instructions that, when executed by the processor, enable the communication device to perform a method according to the first aspect or any one of the possible implementations of the first aspect.

[0095] An eighth aspect of the present application provides a communication device including a communication interface, a processor, and a memory, wherein the communication interface and the processor are coupled to the memory, and the memory is configured to store a program or instructions that, when executed by the processor, enable the communication device to perform a method according to the second aspect or any one of the possible implementations of the second aspect.

[0096] A ninth aspect of the present application provides a computer-readable storage medium storing instructions that, when executed on a computing device, enable the computing device to perform a method according to the first aspect or any one of the possible implementations of the first aspect.

[0097] A tenth aspect of the present application provides a computer-readable storage medium storing instructions that, when executed on a computing device, enable the computing device to perform a method according to the second aspect or any one of the possible implementations of the second aspect.

[0098] An eleventh aspect of the present application provides a computer program product, the computer program product comprising computer program code that, when executed on a computing device, enables the computing device to perform a method according to the first aspect or any one of the possible implementations of the first aspect.

[0099] A twelfth aspect of the present application provides a computer program product, the computer program product comprising computer program code that, when executed on a computing device, enables the computing device to perform a method according to the second aspect or any one of the possible implementations of the second aspect.

[0100] A thirteenth aspect of the present application provides a computer program product and a chip system. The chip system includes one or more interface circuits and one or more processors. The interface circuits and the processors are interconnected via lines. The interface circuits are configured to receive signals from a memory of a communication device and send the signals to the processor, the signals including computer instructions stored in the memory. When the processor executes the computer instructions, the chip system performs a method according to the first aspect or any one of possible implementations of the first aspect.

[0101] A fourteenth aspect of the present application provides a computer program product and a chip system. The chip system includes one or more interface circuits and one or more processors. The interface circuits and processors are interconnected via lines. The interface circuits are configured to receive signals from a memory of a communication device and send the signals to the processor, the signals including computer instructions stored in the memory. When the processor executes the computer instructions, the chip system performs a method according to the second aspect or any one of possible implementations of the second aspect.

[0102] In this application, for the technical effects of the third to fourth aspects and any one of their possible implementations, please refer to the technical effects of the first aspect, the second aspect, and their possible implementations for understanding. [Brief explanation of the drawings]

[0103] In order to more clearly describe the technical solutions in the embodiments of the present application, the following will briefly describe the accompanying drawings for illustrating the embodiments. It is obvious that the accompanying drawings in the following description only illustrate some embodiments of the present application, and those skilled in the art can still derive other drawings from these accompanying drawings without creative efforts.

[0104] [Figure 1A]1 is a diagram of an architecture of a communication system according to an embodiment of the present application; [Figure 1B] FIG. 2 is another architecture diagram of a communication system according to an embodiment of the present application. [Figure 2] 1 is a diagram of a communication method according to an embodiment of the present application; [Figure 3A] 2 is a diagram of a spectrum of a downlink digital signal according to an embodiment of the present application; [Figure 3B] 1 is a diagram of a spectrum obtained by combining a downlink digital signal with a clock signal according to an embodiment of the present application; [Figure 4] FIG. 1 is a diagram of another communication method according to an embodiment of the present application. [Figure 5A] 1 is a diagram of a spectrum in which a downlink digital signal and a clock source signal are combined according to an embodiment of the present application; [Figure 5B] FIG. 10 is another spectrum diagram of an uplink digital signal combined with a clock signal according to an embodiment of the present application. [Figure 6A(1)] FIG. 2 is another architecture diagram of a communication system according to an embodiment of the present application. [Figure 6A(2)] FIG. 2 is another architecture diagram of a communication system according to an embodiment of the present application. [Figure 6B(1)] FIG. 2 is another architecture diagram of a communication system according to an embodiment of the present application. [Figure 6B(2)] FIG. 2 is another architecture diagram of a communication system according to an embodiment of the present application. [Figure 7] 1 is a diagram of the structure of a communication device according to an embodiment of the present application; [Figure 8] FIG. 2 is a diagram of another structure of a communication device according to an embodiment of the present application. [Figure 9] FIG. 2 is a diagram of another structure of a communication device according to an embodiment of the present application. [Figure 10] FIG. 2 is a diagram of another structure of a communication device according to an embodiment of the present application. DETAILED DESCRIPTION OF THE INVENTION

[0105] The embodiments of the present application provide a communication method for improving the accuracy of time synchronization. The present application further provides a corresponding apparatus and system. Detailed descriptions are provided separately below.

[0106] The following clearly and completely describes the technical solutions in the embodiments of the present application with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part, not all of the embodiments of the present application. All other embodiments obtained by those skilled in the art based on the embodiments of the present application without creative efforts shall fall within the protection scope of the present application.

[0107] FIG. 1A is a diagram of the architecture of a communication system according to an embodiment of the present application.

[0108] Please refer to FIG. 1A. The communication system provided in this embodiment of the present application includes a first device 101, a second device 102A, a second device 102B, ..., and a second device 102N. The first device 101 is connected to the second device 102A via a transmission link 103A, the first device 101 is connected to the second device 102B via a transmission link 103B, ..., and the first device 101 is connected to the second device 102N via a transmission link 103N. The transmission links 103A, 103B, ..., and 103N may be fiber optic links. Obviously, these transmission links may alternatively be non-fiber optic links, for example, coaxial cables.

[0109] The first device 101 may obtain a clock source signal from a clock information device, then transmit the clock source signal to the second device 102A via transmission link 103A, transmit the clock source signal to the second device 102B via transmission link 103B, ..., transmit the clock source signal to the second device 102N via transmission link 103N. Different second devices perform time synchronization based on the received clock source signals. The clock information device may provide any one of the following clock source signals: the BeiDou Navigation Satellite System (BDS), the United States' Global Positioning System (GPS), the Russian Global Navigation Satellite System (GLONASS), the European Union's Galileo Navigation Satellite System (GALILEO), and the Quasi-Zenith Satellite System (QZSS).

[0110] FIG. 1B is a diagram of another architecture of a communication system according to an embodiment of the present application.

[0111] As shown in FIG. 1B , the communication system 1000 includes a radio access network (RAN) 100 and a core network (CN) 200. The RAN 100 includes at least one RAN node (e.g., 110a and 110b in FIG. 1B , collectively referred to as 110) and at least one terminal (e.g., 120a to 120j in FIG. 1B , collectively referred to as 120). The RAN 100 may also include another RAN node, e.g., a wireless relay device and / or a wireless backhaul device (not shown in FIG. 1B ). The terminal 120 is connected to the RAN node 110 in a wireless manner. The RAN node 110 is connected to the core network 200 in a wireless or wired manner. The core network device in the core network 200 and the RAN node 110 in the RAN 100 may be different physical devices or may be the same physical device that integrates the logical functions of a core network and a radio access network.

[0112] The RAN 100 may be a cellular system related to the 3rd generation partnership project (3GPP), such as a fourth generation (4G) mobile communication system, a fifth generation (5G) mobile communication system, or a future-oriented evolved system (e.g., a sixth generation (6G) mobile communication system). Alternatively, the RAN 100 may be an open RAN (O-RAN or ORAN) or a cloud radio access network (CRAN). Alternatively, the RAN 100 may be a communication system that integrates two or more of the above systems.

[0113] The RAN node 110, sometimes also referred to as an access network device, RAN entity, access node, etc., forms part of a communication system and helps terminals implement wireless access. The RAN nodes 110 in the communication system 1000 may be the same type of node or different types of nodes. In some scenarios, the roles of the RAN node 110 and the terminal 120 are relative. For example, the network element 120i in FIG. 1B may be a helicopter or an unmanned aerial vehicle and may be configured as a mobile base station. To a terminal 120j accessing the RAN 100 through the network element 120i, the network element 120i is a base station. However, to the base station 110a, the network element 120i is a terminal. Both the RAN node 110 and the terminal 120 are sometimes referred to as communication devices. For example, the network elements 110a and 110b in FIG. 1B may be understood as communication devices with base station functionality, and the network elements 120a through 120j may be understood as communication devices with terminal functionality.

[0114] In possible scenarios, the RAN node may be a base station, an evolved NodeB (eNodeB), an access point (AP), a transmission reception point (TRP), a next generation NodeB (gNB), a next generation base station in a 6G mobile communication system, a base station in a future mobile communication system, etc. The RAN node may be a macro base station (e.g., 110a in FIG. 1B), a micro base station or an indoor base station (e.g., 110b in FIG. 1B), a relay node or a donor node, or a radio controller in a CRAN scenario. Optionally, the RAN node may alternatively be a server, a wearable device, a vehicle, an in-vehicle device, etc. For example, an access network device in a vehicle-to-everything (V2X) technology may be a road side unit (RSU).

[0115] In another possible scenario, multiple RAN nodes cooperate to help terminals implement radio access, and different RAN nodes independently implement some functions of a base station. For example, a RAN node may be a central unit (CU), a distributed unit (DU), a CU-control plane (CP), a CU-user plane (UP), a radio unit (RU), etc. The CU and DU may be located separately or may be included in the same network element, e.g., a baseband unit (BBU). The RU may be included in a radio frequency device or radio frequency unit, e.g., a remote radio unit (RRU), an active antenna unit (AAU), or a remote radio head (RRH).

[0116] In different systems, the CU (or CU-CP and CU-UP), DU, or RU may have different names, but those skilled in the art will understand their meanings. For example, in an ORAN system, the CU may also be called an O-CU (open CU), the DU may also be called an O-DU, the CU-CP may also be called an O-CU-CP, the CU-UP may also be called an O-CU-UP, and the RU may also be called an O-RU. For ease of explanation, this application uses the CU, CU-CP, CU-UP, DU, and RU as illustrative examples. Any one of the CU (or CU-CP or CU-UP), DU, and RU in this application may be implemented by using a software module, a hardware module, or a combination thereof.

[0117] A terminal may also be referred to as a terminal device, user equipment (UE), mobile station, mobile terminal, etc. Terminals may be widely used in various scenarios, such as device-to-device (D2D), vehicle-to-everything (V2X) communication, machine-type communication (MTC), Internet of Things (IoT), virtual reality, augmented reality, industrial control, autonomous driving, telemedicine, smart grid, smart furniture, smart office, smart wearable, smart transportation, smart city, etc. A terminal may be a mobile phone, a tablet computer, a computer with wireless transceiver functionality, a wearable device, a vehicle, an unmanned aerial vehicle, a helicopter, an airplane, a ship, a robot, a robotic arm, a smart home device, etc. The device form of the terminal is not limited in the embodiments of the present application.

[0118] In the communication system of FIG. 1A or FIG. 1B, when clock synchronization is implemented, the clock source signal needs to be transmitted through a transmission link, which causes a transmission delay in the transmission process. This affects the accuracy of time synchronization. To improve the accuracy of time synchronization, an embodiment of the present application provides a communication method based on the communication system shown in FIG. 1A or FIG. 1B. The communication method will be described below with reference to the accompanying drawings.

[0119] In the embodiment of the present application, the first device may be a distributed unit (DU), and the second device may be a radio unit (RU). In another communication system where time synchronization needs to be implemented, the first device and the second device may alternatively be other devices, which is not limited in the present application.

[0120] 2 is a diagram of a communication method according to an embodiment of the present application. Please refer to FIG. 2. The method may include the following steps:

[0121] 201: A first device generates a first optical signal, where the first optical signal is a signal obtained by combining a first clock signal with a downlink digital signal.

[0122] In this application, the first optical signal is a signal obtained through hybrid transmission of a first clock signal and a downlink digital signal. The first clock signal includes a first transmission delay. Hybrid transmission refers to transmission in a hybrid manner and may be understood as combining the first clock signal with a spectral position of the downlink digital signal and then transmitting the combined signal as a whole.

[0123] In the present application, the first clock signal may be an analog signal. In the phase expression form of the first clock signal, the first transmission delay may be understood as the reciprocal of the transmission delay of the transmission link. In the present application, the transmission delay of the transmission link is the delay occurring during one-way transmission of the signal on the transmission link.

[0124] The first clock signal may be obtained by performing a single round-trip transmission of the clock source signal over the transmission link.

[0125]

number

[0126] If the phase of the first clock signal is expressed as

[0127]

number

[0128] It can be expressed as:

[0129]

number

[0130] represents the phase of the clock source signal,

[0131]

number

[0132] represents the phase of the first clock signal,

[0133]

number

[0134] represents the initial phase, ω 0 represents the initial frequency, t represents the time instant, τ(t) represents the transmission delay of the transmission link at time instant t, and −τ(t) represents the first transmission delay.

[0135]

number

[0136] represents the coefficient of ω0, and N may be understood as the coefficient of the frequency divider. The value of N can be an integer greater than 2, or obviously, N can be equal to 1 or a positive number less than 1.

[0137]

number

[0138] The function of may be understood as implementing a frequency reduction or frequency increase with respect to ω. In the phase relationship, N ≠ 2 generally. In this manner, the frequency of the first clock signal may differ from the frequency of the clock source signal, and the second device may effectively distinguish between the first clock signal and the clock source signal.

[0139] The first clock signal described above is obtained by performing one round-trip transmission of the clock source signal on the transmission link. It may be understood that the first clock signal may alternatively be obtained by performing at least two round-trip transmissions of the clock source signal on the transmission link. Two round-trip transmissions are used as an example. When the phase of the clock source signal is

[0140]

number

[0141] If the phase of the first clock signal is expressed as

[0142]

number

[0143] It can be expressed as:

[0144]

number

[0145] represents the coefficient of ω0, and N may be understood as the coefficient of the frequency divider. The value of N may be an integer greater than 4. Obviously, N may alternatively be equal to 1, 2, or 3, or a positive number less than 1.

[0146]

number

[0147] The function of may be understood as implementing a frequency reduction or frequency increase with respect to ω. In the phase relationship, N ≠ 4 is generally true. In this manner, the frequency of the first clock signal may differ from the frequency of the clock source signal, and the second device may effectively distinguish between the first clock signal and the clock source signal.

[0148] In this embodiment of the present application, the first clock signal including −τ(t) may be obtained regardless of the number of round-trip transmissions of the clock source signal on the transmission link, and differs only by the coefficient of ω0.

[0149] 202: A first device sends a first optical signal. In response, a second device receives the first optical signal.

[0150] The second clock signal is obtained by transmitting the first clock signal over a transmission link between the first device and the second device, and the sum of the transmission delay of the transmission link and the first transmission delay is zero.

[0151] The phase representation of the second clock signal is

[0152]

number

[0153] It can be expressed as:

[0154]

number

[0155] From the relationship, it can be seen that the transmission delay of the transmission link is cancelled out, and the second device is not affected by the transmission delay of the transmission link when performing time synchronization.

[0156] Optionally, the transmission link may be a fiber optic link.

[0157] 203: A second device obtains a second clock signal from the first optical signal through filtering.

[0158] 204: The second device performs time synchronization based on the second clock signal.

[0159] In this embodiment of the present application, after the second clock signal is obtained, the second clock signal may be directly used to perform time synchronization, or frequency processing may be performed on the second clock signal.

[0160]

number

[0161] If ≡ 1, a frequency multiplication operation may be performed on the second clock signal.

[0162]

number

[0163] If ≠ 1, the second clock signal may be subjected to a frequency reduction process. In this way, the processed clock signal and the clock source signal used for time synchronization have the same frequency and phase, which is more conducive to improving the accuracy of time synchronization.

[0164] From the above solution, it can be seen that the first device can combine the first clock signal with the downlink digital signal for transmission, completing digital-analog hybrid and simultaneous transmission of the clock signal and the downlink digital signal via a single transmission link. In this way, the accuracy of time synchronization is improved, and a separate clock signal transmission link does not need to be established. This can reduce the number of optical transceiver modules (e.g., lasers and circulators) in the first device and the second device, further reducing the use of optical fiber, thereby reducing the deployment difficulty and complexity of the communication system. In addition, after transmitting the first clock signal over the transmission link, the first transmission delay in the first clock signal transmitted by the first device can be offset by the transmission delay of the transmission link, and the transmission delay of the transmission link does not need to be measured or calculated, thereby improving the accuracy of time synchronization of the second device.

[0165] Optionally, in the above solution, combining the first clock signal with the downlink digital signal may be combining the first clock signal with a first frequency band of the downlink digital signal. The first frequency band may be a pre-designated frequency band in the spectrum of the downlink digital signal. The first frequency band may include one or more frequencies, and the one or more frequencies may include a first spectral null, which may be any power valley point in the spectrum of the downlink digital signal. The first clock signal may be combined with the first spectral null in the first frequency band, or with one or more frequencies other than the first spectral null. This is not a limitation in the present application.

[0166] For example, the first spectral null is an arbitrary power valley point on the spectrum of the downlink digital signal. Figure 3A is a diagram of the spectrum of the downlink digital signal, and Figure 3B is a diagram of another spectrum obtained by combining the first clock signal with the downlink digital signal.

[0167] In this embodiment of the present application, the downlink digital signal or the uplink digital signal after sampling, quantization, and coding is generally transmitted by using a digital modulation format, for example, the most common Non-Return-to-Zero (NRZ) code pattern. Obviously, the downlink digital signal or the uplink digital signal after sampling, quantization, and coding in this application is not limited to being transmitted by using the NRZ code pattern, and other code patterns with spectral structures may be used to implement digital-analog hybrid transmission using a clock signal.

[0168] In FIG. 3A, an NRZ code pattern is used as an example. The power of the spectrum of the downlink digital signal at different frequency positions is different. As the frequency changes, multiple troughs appear on the spectrum, and the frequencies at the trough positions may be called spectral nulls or valley points, such as valley point 1 and valley point 2 shown in FIG. 3A. The frequency at valley point 1 is lower than the frequency at valley point 2. In the case of a downlink digital signal or an uplink digital signal, the valley points generally appear periodically. If the frequency at valley point 1 is expressed as x gigahertz (GHz), the frequency at valley point 2 is 2x (GHz). If the spectrum continues to expand, the frequencies at subsequent valley points are all integer multiples of x. It can be seen that the frequency at each valley point can be expressed as nx (GHz), where n is a positive integer.

[0169] Generally, the energy of a digital signal at a valley point is weak. As shown in FIG. 3B, the first clock signal may be combined with Valley Point 1 in the first frequency band. In this way, the first clock signal and the downlink digital signal do not interfere with each other after being combined, and spectrum resources can be fully utilized. The second optical signal is obtained by transmitting the first clock signal on the transmission link. After receiving the first optical signal, the second device may obtain the second clock signal from Valley Point 1 of the downlink digital signal through filtering. Note that combining the first clock signal with Valley Point 1 is merely an example. Alternatively, the first clock signal may be combined with another frequency in the first frequency band. Either of these can implement digital-analog hybrid transmission of the first clock signal and the downlink digital signal.

[0170] Optionally, the first clock signal may be obtained by the first device by using a third clock signal and a fourth clock signal, where the third clock signal is obtained by the first device from a second optical signal of the second device through filtering, the third clock signal is a clock signal obtained by transmitting a clock source signal on the transmission link in a round-trip manner, and the fourth clock signal is a frequency-multiplied signal of the clock source signal.

[0171] With reference to the accompanying drawings, a process of deriving a third clock signal and a fourth clock signal based on a clock source signal to further derive a first clock signal will be described below.

[0172] 4 is a diagram of another communication method according to an embodiment of the present application. Please refer to FIG. 4. The method may include the following steps.

[0173] 401: A first device sends a third optical signal to a second device, and the third optical signal is obtained by combining a clock source signal with a downlink digital signal. Correspondingly, the second device receives the third optical signal from the first device.

[0174] As explained above, the first clock signal in a different phase format is transmitted on the transmission link as a clock source signal.

[0175]

number

[0176] The phase form of the first clock signal can be obtained by performing one or more round-trip transmissions of

[0177]

number

[0178] For the format of the downlink digital signal, see the description in FIG. 3A. The clock source signal may be combined with a second frequency band of the downlink digital signal. The second frequency band may include one or more frequencies, and the one or more frequencies may include a second spectral null, which may be any power valley point on the spectrum of the downlink digital signal. The clock source signal may be combined with the second spectral null in the second frequency band, or may be combined with one or more frequencies other than the second spectral null. This is not a limitation in the present application.

[0179] In the present application, the second frequency band may or may not overlap with the first frequency band. In order to allow the second device to better distinguish between the signal generated by transmitting the clock source signal on the transmission link and the second clock signal, the second frequency band generally does not overlap with the first frequency band. When the frequency range of the first frequency band is (xp) GHz to (x+q) GHz, the frequency range of the second frequency band may be (2x-p) GHz to (2x+q) GHz. Obviously, the frequency range of the second frequency band may alternatively be another value interval. This is not limited in the present application.

[0180] As described above, the first clock signal may be combined with a first spectral null on the spectrum of the downlink digital signal, and the clock source signal may be combined with a second spectral null on the spectrum of the downlink digital signal. The second spectral null may be any power valley point other than the power valley point corresponding to the first spectral null on the spectrum of the downlink digital signal, for example, valley point 2 in FIG. 3B. For the combined signal when the clock source signal is combined with valley point 2 on the spectrum of the downlink digital signal, see the description in FIG. 5A.

[0181] Obviously, the clock source signal may alternatively be combined with one or more frequencies other than the second spectral null in the second frequency band, which is not a limitation of the present application.

[0182] 402: A second device obtains a clock signal from a third optical signal through filtering, where the clock signal obtained through filtering is a signal obtained by transmitting a clock source signal on a transmission link.

[0183] The clock signal obtained through filtering is

[0184]

number

[0185] and includes the transmission delay τ of the transmission link.

[0186] 403: A second device sends a second optical signal to the first device via a transmission link, the second optical signal being a signal obtained by combining a clock signal obtained through filtering with an uplink digital signal.

[0187] In this embodiment of the present application, the clock signal obtained through filtering can be combined with a frequency band on the spectrum of the uplink digital signal or one or more frequencies in this frequency band. Figure 5B is used as an example. The clock signal obtained through filtering is combined with valley point 2 of the uplink digital signal.

[0188] 404: The first device obtains a third clock signal from the second optical signal through filtering.

[0189] The phase of the third clock signal is

[0190]

number

[0191] It can be expressed as:

[0192] In this embodiment of the present application, the third clock signal may include twice the transmission delay of the transmission link, i.e., 2τ(t). Note that if the third clock signal is obtained by performing n round-trip transmissions of the clock source signal, the third clock signal may alternatively include 2n times the transmission delay of the transmission link, i.e., 2nτ(t).

[0193] 405: The first device performs frequency mixing on the third clock signal and the fourth clock signal to obtain a phase difference clock signal between the third clock signal and the fourth clock signal.

[0194] In this embodiment of the present application, the fourth clock signal may be a frequency-tripled signal of the clock source signal, or may be a frequency-multiplied signal of another multiple, provided that obviously, the first clock signal including the first transmission delay can be obtained by performing processing such as frequency mixing or frequency mixing and then frequency division on the third clock signal and the fourth clock signal. In the present application, the multiple of the transmission delay of the transmission link of the third clock signal and the multiple of the frequency of the fourth clock signal relative to that of the clock source signal are not limited.

[0195] If the fourth clock signal is three times the frequency of the clock source signal, the phase of the fourth clock signal is

[0196]

number

[0197] It can be expressed as:

[0198] Phase-shifted clock signal

[0199]

number

[0200] teeth,

[0201]

number

[0202] and

[0203]

number

[0204] can be obtained by performing frequency mixing on

[0205] 406: The first device performs frequency division on the phase-difference clock signal to obtain a first clock signal.

[0206] The frequency of the clock signal may be reduced through frequency division, so that the first clock signal may be within the spectral range of the downlink digital signal. If the transmission bandwidth of the transmission link is sufficiently large, frequency division may not be performed.

[0207] According to N

[0208]

number

[0209] When frequency division is performed on the first clock signal

[0210]

number

[0211] can be obtained, where N is the coefficient of the frequency divider,

[0212]

number

[0213] is that of ω0 and is obtained by the frequency divider

[0214]

number

[0215] are coefficients obtained by performing frequency division on

[0216] Then, one time synchronization of the second device is completed with reference to the description of the embodiment corresponding to Fig. 2. It can be seen from the description of Fig. 3B that the time synchronization process provided in the embodiment of the present application can be repeatedly performed, thereby further improving the accuracy of time synchronization.

[0217]

[0010] An embodiment of the present application further provides another communication system. The communication system includes a first device and at least one second device. The first device is connected to each of the second devices via a transmission link. The transmission link may be an optical fiber link. For an understanding of the architecture of the communication system, please refer to Figure 1A.

[0218] Based on the communication system shown in FIG. 1A, and further with reference to FIGS. 6A(1) and 6A(2) and 6B(1) and 6B(2), the communication system provided in the embodiments of the present application and the time synchronization process based on this communication system can be further understood.

[0219] 6A(1) and 6A(2) are diagrams of another architecture of a communication system according to an embodiment of the present application. Please refer to FIG. 6A(1) and FIG. 6A(2). The communication system includes a first device 600 and a second device 620. The first device 600 is connected to the second device 620 via an optical fiber link 640.

[0220] The first device 600 may include a clock source module 601, a coupler 602, a laser 603, a circulator 604, a photoelectric detector 605, a power splitter 606, a filter 607, a filter 608, a frequency multiplier 609, and a signal processing component 610. The signal processing component 610 may include a frequency mixer 611 and a filter 612, and may further include a frequency divider 613. If the bandwidth of the optical fiber link 640 is sufficiently large and no frequency reduction needs to be performed on the signal, the frequency divider may not be included. Obviously, the signal processing component 610 may alternatively be implemented using a combination of other devices, provided that frequency mixing and filtering processing on the signal can be implemented. This is not limited in the present application. The filter 607 may be a low-pass filter and configured to filter the uplink digital signal. The filter 608 and the filter 612 may be band-pass filters. The two bandpass filters are configured to obtain a clock signal through filtering, and the frequencies of the clock signals obtained through filtering may be different.

[0221] The second device 620 may include a circulator 621, a photoelectric detector 622, a power splitter 623, a filter 624, a power splitter 625, a filter 626, a coupler 627, a laser 628, a filter 629, and a time synchronization module 630. The filter 624 may be a low-pass filter and configured to filter the downlink digital signal. The filter 626 and the filter 629 may be band-pass filters. The two band-pass filters are configured to obtain a clock signal through filtering, and the frequencies of the clock signals obtained through filtering may be different.

[0222] In the time synchronization process, the clock source module 601 provides a clock source signal A1, which may be obtained from a GPS clock by the clock source module 601. The phase expression format of the clock source signal A1 may be as follows:

[0223]

number

[0224]

number

[0225] represents the initial phase, ω0 represents the initial frequency, and t represents the time point.

[0226] Clock source module 601 provides clock source signal A1 to coupler 602. Coupler 602 combines clock source signal A1 with the downlink digital signal, combining clock source signal A1 with a second frequency band on the spectrum of the downlink digital signal, or one or more frequencies in the second frequency band, for example, may combine clock source signal A1 with valley point 2 in the second frequency band on the spectrum of the downlink digital signal, and then provides the combined signal to laser 603. Laser 603 converts the combined signal into optical signal 1 and transmits optical signal 1 to circulator 604. Circulator 604 transmits optical signal 1 to second device 620 via optical fiber link 640.

[0227] After receiving optical signal 1, circulator 621 in second device 620 sends optical signal 1 to photoelectric detector 622. Photoelectric detector 622 converts optical signal 1 into electrical signal 1. Then, photoelectric detector 622 sends electrical signal 1 to power splitter 623. Power splitter 623 performs power division on electrical signal 1 to obtain electrical signal 2. Power splitter 623 sends electrical signal 2 to filter 624 and power splitter 625. Filter 624 may obtain a downlink digital signal from received electrical signal 2 through filtering. Power splitter 625 performs power division on received electrical signal 2 to obtain electrical signal 3, and then sends electrical signal 3 to filter 626 and filter 629. A clock signal cannot be obtained from electrical signal 3 through filtering by using the frequency of filter 629, and filter 626 may obtain clock signal A2 from electrical signal 3 through filtering. The phase representation of clock signal A2 can be expressed as follows:

[0228]

number

[0229] τ represents the transmission delay of the fiber optic link.

[0230] The filter 626 sends the clock signal A2 to the coupler 627, which combines the clock signal A2 with the uplink digital signal to obtain a combined signal, which can be referred to as combining the downlink digital signal with the clock source signal A1.

[0231] Coupler 627 transmits the combined signal to laser 628. Laser 628 converts the combined signal to optical signal 2, which then transmits the optical signal to circulator 621. Circulator 621 transmits optical signal 2 to first device 600 via a fiber optic link.

[0232] After receiving optical signal 2, circulator 604 in first device 600 sends optical signal 2 to photoelectric detector 605. Photoelectric detector 605 converts optical signal 2 into electrical signal 4, and photoelectric detector 605 sends electrical signal 4 to power splitter 606. Power splitter 606 performs power division on electrical signal 4 to obtain electrical signal 5, and then sends electrical signal 5 to filter 607 and filter 608. Filter 607 may obtain an uplink digital signal from electrical signal 5 through filtering. Filter 608 may obtain clock signal A3 from electrical signal 5 through filtering. The phase expression of clock signal A3 may be expressed as follows:

[0233]

number

[0234] 2τ(t) represents twice the transmission delay of the fiber optic link.

[0235] The frequency multiplier 609 may perform a frequency multiplication process on the clock signal A1. When the process is performed based on frequency tripling, a clock signal A4 may be obtained, and the phase expression of the clock signal A4 may be expressed as follows:

[0236]

number

[0237] The filter 608 may send the clock signal A3 to the frequency mixer 611, and the frequency multiplier 609 may also send the clock signal A4 to the frequency mixer 611. The frequency mixer 611 may perform frequency mixing on the clock signal A3 and the clock signal A4 to obtain a frequency-mixed signal, which includes a phase-difference clock signal A5. After the frequency mixer 611 sends the frequency-mixed signal to the filter 612, the filter 612 may obtain the phase-difference clock signal A5 from the frequency-mixed signal through filtering. The phase expression of the phase-difference clock signal A5 may be expressed as follows:

[0238]

number

[0239] The filter 612 may send the phase difference clock signal A5 to the frequency divider 613, which may perform frequency division on the phase difference clock signal A5 to obtain a clock signal A6. The phase expression of the clock signal A6 may be expressed as follows:

[0240]

number

[0241] N is the frequency divider coefficient. For N=4,

[0242]

number

[0243] and the frequency of A6

[0244]

number

[0245] is half the frequency ω0 of clock source signal A.

[0246] The frequency divider 613 transmits the clock signal A6 to the coupler 602. The coupler 602 may combine the clock signal A6 with the downlink digital signal.

[0247]

number

[0248] In this case, the coupler combines the clock signal with valley point 1 of the downlink digital signal and then sends the combined signal to laser 603. Laser 603 converts the combined signal to optical signal 3 and then sends optical signal 3 to circulator 604. Circulator 604 sends optical signal 3 to second device 620 via fiber optic link 640.

[0249] After receiving the optical signal 3, the circulator 621 in the second device 620 sends the optical signal 3 to a photoelectric detector 622. The photoelectric detector 622 converts the optical signal 3 into an electrical signal 5. The photoelectric detector 622 then sends the electrical signal 5 to a power splitter 623. The power splitter 623 performs power division on the electrical signal 5 to obtain an electrical signal 6. The power splitter 623 sends the electrical signal 6 to a filter 624 and a power splitter 625. The filter 624 may obtain a downlink digital signal from the received electrical signal 6 through filtering. The power splitter 625 performs power division on the received electrical signal 6 to obtain an electrical signal 7, which is then sent to a filter 626 and a filter 629. A clock signal cannot be obtained from the electrical signal 7 through filtering by using the frequency of the filter 626, and the filter 629 may obtain a clock signal A7 from the electrical signal 7 through filtering. The phase representation of clock signal A7 can be expressed as follows:

[0250]

number

[0251] From a comparison of clock signal A7 and clock signal A6, it can be seen that the transmission delay τ of the fiber optic link is cancelled out in the process of transmission over the fiber optic link.

[0252] The time synchronization module 630 may perform time synchronization using the clock signal A7. The time synchronization module may further include a device such as a frequency multiplier. When the frequency of the clock signal A7 is multiplied by N, the clock signal and the clock source signal used for time synchronization may be kept at the same frequency and phase, thereby improving the accuracy of the time synchronization.

[0253] 6A(1) and 6A(2), it should be noted that one first device 600 may complete time synchronization with each of multiple second devices 620 via the illustrated photoelectric device. Alternatively, as shown in FIG. 6B(1) and 6B(2), time synchronization with a corresponding second device 620 may be completed via each of multiple time synchronization components in the first device 600.

[0254] 6B(1) and 6B(2) are diagrams of another architecture of a communication system according to an embodiment of the present application. Please refer to FIG. 6B(1) and FIG. 6B(2). A first device 600 includes multiple time synchronization components, each of which includes the photoelectric device shown in the first device 600 of FIG. 6A(1) and FIG. 6A(2). One time synchronization component corresponds to one second device 620, and time synchronization of different second devices 620 is completed through different time synchronization components.

[0255] For the above communication method, the embodiment of the present application further provides a corresponding communication device.

[0256] 7 is a structural diagram of a communication device according to an embodiment of the present application. Please refer to Fig. 7. The communication device 700 provided in this embodiment of the present application includes: a processing module 701 and a transceiver module 702.

[0257] The processing module 701 is configured to generate a first optical signal, the first optical signal being a signal obtained by combining a first clock signal with a downlink digital signal, the first clock signal including a first transmission delay.

[0258] The transceiver module 702 is configured to send a first optical signal, and the second clock signal is obtained by transmitting the first clock signal on a transmission link, wherein the sum of the transmission delay of the transmission link and the first transmission delay is zero, and the second clock signal is used for time synchronization.

[0259] Optionally, the first clock signal is combined with a first frequency band of the downlink digital signal.

[0260] Optionally, the first frequency band includes a first spectral null, and the first clock signal is combined with a first spectral null of the downlink digital signal, the first spectral null being any power valley point on the spectrum of the downlink digital signal.

[0261] Optionally, the transmission link is a fiber optic link.

[0262] Optionally, the processing module 701 is further configured to process the third clock signal and the fourth clock signal to obtain the first clock signal, wherein the third clock signal is obtained by filtering the second optical signal from the transmission link, the third clock signal is a clock signal obtained by transmitting a clock source signal on the transmission link in a round-trip manner, and the fourth clock signal is a frequency-multiplied signal of the clock source signal.

[0263] Optionally, the processing module 701 is particularly configured to perform frequency mixing on the third clock signal and the fourth clock signal to obtain a phase difference clock signal between the third clock signal and the fourth clock signal, and obtain the first clock signal based on the phase difference clock signal.

[0264] Optionally, the processing module 701 is particularly configured to perform frequency division on the phase-difference clock signal to obtain a first clock signal.

[0265] Optionally, the processing module 701 is further configured to generate a third optical signal, where the third optical signal is a signal obtained by combining the clock source signal with the downlink digital signal.

[0266] The transceiver module 702 is further configured to send a third optical signal, the third clock signal being obtained by transmitting a clock source signal over the transmission link in a round-trip manner.

[0267] Optionally, the clock source signal is combined with a second frequency band of the downlink digital signal.

[0268] Optionally, the second frequency band includes a second spectral null, and the clock source signal is combined with the second spectral null of the downlink digital signal, the second spectral null being any power valley point other than a power valley point corresponding to the first spectral null on the spectrum of the downlink digital signal.

[0269] For the communication device described in this embodiment of the present application, please refer to the first device or the function of the first device in Figures 2 to 6B(1) and 6B(2) for understanding.

[0270] 8 is a structural diagram of a communication device according to an embodiment of the present application. Please refer to Fig. 8. The communication device 800 provided in this embodiment of the present application includes: a processing module 801 and a transceiver module 802.

[0271] The transceiver 802 is configured to receive a first optical signal, the first optical signal being a signal obtained by combining a first clock signal with a downlink digital signal, the first clock signal including a first transmission delay, and a second clock signal obtained by transmitting the first clock signal over a transmission link.

[0272] The processing module 801 is configured to derive a second clock signal from the first optical signal through filtering, and perform time synchronization based on the second clock signal.

[0273] Optionally, the second clock signal is combined with the first frequency band of the downlink digital signal.

[0274] Optionally, the processing module 801 is specifically configured to obtain the second clock signal from the first frequency band through filtering.

[0275] Optionally, the first frequency band includes a first spectral null, and the first clock signal is combined with a first spectral null of the downlink digital signal, the first spectral null being any power valley point on the spectrum of the downlink digital signal.

[0276] Optionally, the transmission link is a fiber optic link.

[0277] Optionally, the transceiver module 802 is further configured to send a second optical signal over the transmission link, the second optical signal including a clock signal obtained by transmitting a clock source signal on the transmission link.

[0278] Optionally, the transceiver module 802 is further configured to receive a third optical signal.

[0279] The processing module 801 is configured to obtain a clock signal from the received third optical signal through filtering, the clock signal obtained through filtering is a signal obtained by transmitting a clock source signal on the transmission link, and the third optical signal is a signal obtained by combining the clock source signal with the downlink digital signal. The second device generates the second optical signal based on the clock signal obtained through filtering.

[0280] Optionally, the clock source signal is combined with a second frequency band of the downlink digital signal.

[0281] Optionally, the processing module 801 is specifically configured to obtain the clock source signal from a second frequency band of the downlink digital signal through filtering.

[0282] Optionally, the second frequency band includes a second spectral null, and the clock source signal is combined with the second spectral null of the downlink digital signal, the second spectral null being any power valley point other than a power valley point corresponding to the first spectral null on the spectrum of the downlink digital signal.

[0283] For the communication device described in this embodiment of the present application, please refer to the second device or the function of the second device in Figures 2 to 6B(1) and 6B(2) for understanding.

[0284] FIG. 9 is a diagram of a structure when the communication device is the first device. As shown in FIG. 9, the first device 900 provided in this embodiment of the present application includes a processor 901, a communication interface 902, a memory 903, a bus 904, and a laser 905. The processor 901, the communication interface 902, and the memory 903 are connected to each other using the bus 904. The laser 905 may convert a data signal generated by the processor 901 into an optical signal. The communication interface 902 may be a circulator. In this embodiment of the present application, the processor 901 is configured to control and manage the behavior of the first device 900. For example, the processor 901 is configured to perform clock signal processing. The communication interface 902 is configured to support the first device 900 in performing communication. For example, the communication interface 902 may receive and send optical signals. The memory 903 is configured to store program codes and data for the first device 900.

[0285] The processor 901 may be a central processing unit, a general-purpose processor, a digital signal processor, an application-specific integrated circuit, a field programmable gate array or other programmable logic device, a transistor logic device, a hardware component, or any combination thereof. The processor may implement or execute various exemplary logic blocks, modules, and circuits described with reference to the subject matter disclosed herein. Alternatively, the processor may be a combination of processors that implement computing functions, such as a combination of one or more microprocessors, or a combination of a digital signal processor and a microprocessor. The bus 904 may be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. Buses may be categorized as address buses, data buses, control buses, etc. For ease of representation, only one bold line is used to represent a bus in FIG. 9, but this does not imply that there is only one bus or only one type of bus.

[0286] When the first device is a chip, the chip includes a transceiver unit and a processing unit. The transceiver unit may be an input / output circuit or a communication interface. The processing unit may be a processor, a microprocessor, an integrated circuit, or a logic circuit integrated on the chip.

[0287] When the communication device is the second device, FIG. 10 is a diagram of the structure of a second device 1000 according to an embodiment of the present application. The second device 1000 may be applied to the system shown in FIG. 1 or FIG. 2. For example, the second device 1000 may be the second device in the communication system of FIG. 1A or the second device in the communication system of FIG. 1B, and is configured to perform the functions of the second device in the above method embodiment. It should be understood that the following is merely an example. In future communication systems, the second device may have other forms and compositions.

[0288] For example, in a 5G communication system, the second device 1000 may include a CU, a DU, and an AAU. Compared with the second device in an LTE communication system, which includes one or more radio frequency units, such as an RRU, and one or more BBUs, The non-real-time part of the original BBU is separated and redefined as a CU, which is responsible for processing non-real-time protocols and services, some physical layer processing functions of the BBU are combined with the original RRU and passive antenna into an AAU, and the remaining functions of the BBU are redefined as a DU, which is responsible for processing physical layer protocols and real-time services. In short, the CU and DU are distinguished based on the real-time performance of the processed content, and the AAU is a combination of the RRU and the antenna.

[0289] The CU, DU, and AAU may be deployed separately or together. Therefore, there may be multiple network deployment configurations. A possible deployment configuration is shown in FIG. 10 and corresponds to the conventional 4G second device. The CU and DU are deployed on the same hardware. It should be understood that FIG. 10 is merely an example and does not constitute a limitation on the scope of protection of the present application. For example, the deployment configuration may alternatively be that the DU is deployed in a BBU equipment room, or the CU or DU is deployed centrally, or the CU is centralized at a higher level.

[0290] The AAU 1100 may implement a transceiver function and is referred to as a transceiver unit 1100, corresponding to the transceiver module 802 in FIG. 8 . Optionally, the transceiver unit 1100 may also be referred to as a transceiver machine, transceiver circuit, transceiver, etc., and may include at least one antenna 1101 and a radio frequency unit 1102. Alternatively, the transceiver unit 1100 may include a receiving unit and a transmitting unit. The receiving unit may correspond to a receiver (or may be referred to as a receiver machine or receiving circuit), and the transmitting unit may correspond to a transmitter (or may be referred to as a transmitter machine or transmitting circuit). The CU and DU 1200 may implement internal processing functions and are referred to as a processing unit 1200, corresponding to the processing module 801 in FIG. 8 . Optionally, the processing unit 1200 may control a second device, etc., and may be referred to as a controller. The AAU, CU, and DU may be physically co-located or physically separate.

[0291] In addition, the second device is not limited to the form shown in Figure 10 and may alternatively be in another form. For example, the second device may include a BBU and an adaptive radio unit (ARU), or may include a BBU and an AAU, or may be customer premises equipment (CPE), or may be in another form. This is not a limitation in this application.

[0292] In an example, the processing unit 1200 may include one or more boards. The multiple boards may jointly support a radio access network of a single access standard (such as an LTE network) or each support a radio access network of a different access standard (such as an LTE network, a 5G network, a future network, or another network). The CU and DU 1200 further include a memory 1201 and a processor 1202. The memory 1201 is configured to store necessary instructions and data. The processor 1202 is configured to control the second device to perform necessary actions. For example, the processor 1202 is configured to control the second device to perform the operation procedures related to the second device in the above method embodiments. The memory 1201 and the processor 1202 may service one or more boards. In other words, the memory and the processor may be individually disposed on each board. Alternatively, multiple boards may share the same memory and the same processor. In addition, necessary circuits may be further disposed on each board.

[0293] It should be understood that the second device 1000 shown in FIG. 10 can implement the functions of the second device in the method embodiments of FIGS. 2 to 6B(1) and 6B(2). The operations and / or functions of the units in the second device 1000 are individually used to implement the corresponding procedures performed by the second device in the method embodiments of the present application. To avoid repetition, detailed descriptions are appropriately omitted herein. The structure of the second device shown in FIG. 10 is merely a possible form and does not constitute any limitation to this embodiment of the present application. In accordance with the present application, there may be other forms of second device structures in the future.

[0294] The CU and DU 1200 may be implemented by the first device and configured to perform the actions described in the above method embodiments, and the AAU 1100 may be sent to or received from the first device and configured to perform the actions described in the above method embodiments. For details, please refer to the descriptions in the above method embodiments. The details will not be described again in this specification.

[0295] An embodiment of the present application further provides a computer program product including instructions, which, when executed on a computer, enable the computer to perform the methods in the embodiments shown in Figures 2 to 6B(1) and 6B(2).

[0296] An embodiment of the present application further provides a computer-readable storage medium containing computer instructions that, when executed on a computer, enable the computer to perform the methods in the embodiments shown in Figures 2 to 6B(1) and 6B(2).

[0297] An embodiment of the present application further provides a chip device including a processor, connected to a memory, and configured to invoke a program stored in the memory to enable the processor to perform the methods in the embodiments shown in Figures 2 to 6B(1) and 6B(2).

[0298] The processor may be a general-purpose central processing unit, a microprocessor, an application-specific integrated circuit (ASIC), or one or more integrated circuits configured to control program execution of the method in the embodiment shown in Figure 4. The memory may be a read-only memory (ROM), another type of static storage device capable of storing static information and instructions, a random access memory (RAM), etc.

[0299] For the sake of convenience and brief description, those skilled in the art can clearly understand that the detailed work processes of the above systems, devices, and units are not described in detail again herein, and should be referred to the corresponding processes in the above method embodiments.

[0300] In some embodiments provided in this application, it should be understood that the disclosed systems, devices, and methods may be implemented in other manners. For example, the described device embodiments are merely examples. For example, the division into units is merely a logical functional division. In actual implementation, there may be other divisions. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not implemented. In addition, the shown or discussed mutual or direct couplings or communication connections may be implemented by using some interfaces. Indirect couplings or communication connections between devices or units may be implemented in electronic, mechanical, or other forms.

[0301] The units described as separate parts may or may not be physically separate, and the parts shown as units may or may not be physical units, and may be located in one location or distributed over multiple network units. Some or all of the units may be selected based on actual requirements to achieve the objectives of the solutions of the embodiments.

[0302] In addition, the functional units in the embodiments of the present application may be integrated into one processing unit, and each of the units may exist physically alone, or two or more units may be integrated into one unit. The integrated unit may be implemented in the form of hardware or in the form of a software functional unit.

[0303] When an integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, the integrated unit may be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application or a part that essentially contributes to all or part of the technical solution may be implemented in the form of a software product. A computer software product is stored in a storage medium and includes several instructions that enable a computer device (which may be a personal computer, a server, a wireless device, etc.) to perform all or part of the steps of the method in the embodiments of the present application. The above storage medium includes any medium that can store program code, such as a USB flash drive, a removable hard disk, a ROM, a RAM, a magnetic disk, or an optical disk.

[0304] In conclusion, the above embodiments are only intended to describe the technical solutions of the present application, and are not intended to limit the present application. Although the present application has been described in detail with reference to the above embodiments, it should be understood that those skilled in the art may still make modifications to the technical solutions described in the above embodiments, or make equivalent substitutions to some technical features thereof, without departing from the scope of the technical solutions of the embodiments of the present application.

Claims

1. 1. A communication method comprising: generating a first optical signal, the first optical signal being a signal obtained by combining a first clock signal with a downlink digital signal, the first clock signal including a first transmission delay; sending the first optical signal, wherein a second clock signal is obtained by transmitting the first clock signal on a transmission link, a sum of a transmission delay of the transmission link and the first transmission delay is zero, and the second clock signal is used for time synchronization; A communication method, including:

2. The method of claim 1 , wherein the first clock signal is combined with a first frequency band of the downlink digital signal.

3. 3. The method of claim 2, wherein the first frequency band includes a first spectral null, the first clock signal is combined with the first spectral null of the downlink digital signal, and the first spectral null is an arbitrary power valley point on the spectrum of the downlink digital signal.

4. 4. A method according to any one of claims 1 to 3, wherein the transmission link is a fibre optic link.

5. The method comprises: processing a third clock signal and a fourth clock signal to obtain the first clock signal, wherein the third clock signal is obtained by filtering a second optical signal from the transmission link, the third clock signal is a clock signal obtained by transmitting a clock source signal on the transmission link in a round-trip manner, and the fourth clock signal is a frequency-multiplied signal of the clock source signal; The method of any one of claims 1 to 4, further comprising:

6. The step of processing the third clock signal and the fourth clock signal to obtain the first clock signal includes: performing frequency mixing on the third clock signal and the fourth clock signal to obtain a phase difference clock signal between the third clock signal and the fourth clock signal; obtaining the first clock signal based on the phase difference clock signal; 6. The method of claim 5, comprising:

7. The step of obtaining the first clock signal based on the phase difference clock signal includes: performing frequency division on the phase-difference clock signal to obtain the first clock signal; 7. The method of claim 6, comprising:

8. The method comprises: generating a third optical signal, the third optical signal being a signal obtained by combining the clock source signal with the downlink digital signal; sending the third optical signal, wherein the third clock signal is obtained by transmitting the clock source signal over the transmission link in a round-trip manner; The method of any one of claims 5 to 7, further comprising:

9. The method of claim 8 , wherein the clock source signal is combined with a second frequency band of the downlink digital signal.

10. 10. The method of claim 9, wherein the second frequency band includes a second spectral null, the clock source signal is combined with the second spectral null of the downlink digital signal, and the second spectral null is any power valley point other than the power valley point corresponding to the first spectral null on the spectrum of the downlink digital signal.

11. 1. A communication system comprising a first device, a transmission link, and a second device, wherein the first device communicates with the second device via the transmission link; the first device generates a first optical signal, the first optical signal being a signal obtained by combining a first clock signal with a downlink digital signal, the first clock signal including a first transmission delay; the second device receives the first optical signal from the first device, and a second clock signal is obtained by transmitting the first clock signal on the transmission link, and a sum of a transmission delay of the transmission link and the first transmission delay is zero; the second device deriving the second clock signal from the first optical signal through filtering; the second device performs time synchronization based on the second clock signal; Communication system.

12. 1. A communication device comprising a coupler, a laser, and a circulator, the coupler is configured to combine a first clock signal with a downlink digital signal to obtain a first combined signal, the first clock signal including a first transmission delay; the laser is configured to generate a first optical signal based on the first combined signal; the circulator is configured to send the first optical signal through a transmission link between a distribution device and a wireless device, a second clock signal is obtained when the first clock signal passes through the transmission link, a sum of a transmission delay of the transmission link and the first transmission delay is zero, and the second clock signal is used by the wireless device to perform time synchronization; Communication equipment.

13. 13. The communications device of claim 12, wherein the first clock signal is associated with a first frequency band of the downlink digital signal.

14. 14. The communications device of claim 13, wherein the first frequency band includes a first spectral null, the first clock signal is combined with the first spectral null of the downlink digital signal, and the first spectral null is an arbitrary power valley point on the spectrum of the downlink digital signal.

15. 15. A communication device according to any one of claims 12 to 14, wherein the transmission link is a fibre optic link.

16. the dispersion device further comprising a photoelectric detector, a first filter, a frequency multiplier, and signal processing components; the photoelectric detector is configured to convert the second optical signal received by the circulator into an electrical signal; the first filter is configured to derive a third clock signal from the electrical signal through filtering, the third clock signal being a clock signal derived by transmitting a clock source signal over the transmission link in a round-trip manner; the frequency multiplier is configured to perform frequency multiplication on the clock source signal to obtain a fourth clock source signal; the signal processing component is configured to process the third clock signal and the fourth clock signal to obtain the first clock signal.

16. A communication device according to any one of claims 12 to 15.

17. the signal processing component comprises a frequency mixer, a second filter, and a frequency divider; the frequency mixer is configured to perform frequency mixing on the third clock signal and the fourth clock signal to obtain a phase difference clock signal between the third clock signal and the fourth clock signal; the second filter is configured to obtain the phase difference clock signal through filtering from the signal output by the frequency mixer; The frequency divider is configured to perform frequency division on the phase-shifted clock signal to obtain the first clock signal.

17. The communication device of claim 16.

18. the distribution device further comprises a clock source module; the clock source module is configured to output the clock source signal; the coupler is further configured to combine the clock source signal with the downlink digital signal to obtain the second combined signal; the laser is further configured to generate a third optical signal based on the second combined signal; the circulator further configured to send the third optical signal over the transmission link.

18. A communication device according to claim 16 or 17.

19. 20. The communications device of claim 18, wherein the clock source signal is combined with a second frequency band of the downlink digital signal.

20. 20. The communications device of claim 19, wherein the second frequency band includes a second spectral null, the clock source signal is combined with the second spectral null of the downlink digital signal, and the second spectral null is any power valley point other than the power valley point corresponding to the first spectral null on the spectrum of the downlink digital signal.

21. A communication system comprising a first device and a second device, The first device is a communication device according to any one of claims 12 to 20, the second device performs time synchronization based on a clock signal provided by the first device; Communication system.

22. 11. A communication device comprising a communication interface, a processor, and a memory, wherein the communication interface and the processor are coupled to the memory, and the memory is configured to store a program or instructions that, when executed by the processor, enable the communication device to perform a method according to any one of claims 1 to 10.

23. A communication device comprising a unit adapted to perform the method according to any one of claims 1 to 10.

24. 11. A computer-readable storage medium storing instructions that, when executed on a computing device, enable the computing device to perform the method of any one of claims 1 to 10.

25. 11. A computer program product comprising computer program code that, when executed on a computing device, enables the computing device to perform the method of any one of claims 1 to 10.

Images