Display devices with variable image resolution

Abstract

A method for operating a display device including a pixel array addressed by a set of data lines and a set of scan lines is disclosed. The method includes: addressing the set of data lines with first image data; transmitting a first scan signal to the first pixel line using the first scan line to move the first image data to the first pixel line; activating the first pixel line to emit light; transmitting a second scan signal to the second pixel line using the second scan line, without addressing the set of data lines with image data after the set of data lines has been addressed with the first image data; and activating the second pixel line to emit light after the second scan signal has been transmitted.

Description

Technical Field

[0001] This document generally relates to display devices.

Background Art

[0002] An electronic device can include a display device on which visual images are displayed. If the resolution of the visual images presented on the display is high, a more detailed presentation of the content can be provided to the user.

Summary of the Invention

[0003] This document describes techniques, methods, systems, and other mechanisms for providing a display device that can operate in a higher resolution mode and a lower resolution mode. In some examples, the display device can enter the low resolution mode in response to the display device, or a computing system including the display device, entering a battery saving mode. The computing system can be, for example, a personal computer, a mobile phone, a smartphone, a smartwatch, or a smart TV.

[0004] When a computing device experiences a low battery level, it may enter a battery saving mode, in which the display screen content (e.g., user experience (UX) images) can be simplified, the screen content can include non-color images, the processing speed can decrease, the frequency of application updates can be low, and / or the frequency of network transmissions can be low.

[0005] By adopting battery-saving mode, the device's power consumption can be reduced. However, if the display is always on display (AOD) and presenting content, the power consumption of the display module may remain the same and not decrease. Therefore, the amount of battery savings is limited. Switching the display to a low-resolution mode may allow the computing system to remain in always-on display mode while reducing the display's battery consumption.

[0006] The techniques disclosed can be implemented in display devices, such as AMOLED displays. In some examples, the display device includes a multiplexer for routing image data from a data driver to data lines in a pixel circuit. In low-resolution modes, the multiplexer can operate at a reduced frequency, which is part of the operating frequency in higher-resolution modes. For example, the multiplexer can operate at a reduced frequency, which is half the operating frequency in higher-resolution modes. To reduce the operating frequency of the multiplexer, the multiplexer signal can be controlled to toggle for less than the line time of all pixel rows. In some cases, the multiplexer signal can be toggled for odd-numbered pixel rows only, or for even-numbered pixel rows only.

[0007] Multiplexer circuits may have parasitic capacitance, including that resulting from the inclusion of parallel-connected TFT switches. The multiplexer switch control signals may frequently cycle between high-voltage and low-voltage states. Therefore, the multiplexer can consume a significant amount of power in the display. In some examples, the multiplexer consumes 6.7% of the total driving power consumption in always-on display mode. The advantages of the disclosed technique include reducing the power consumption of the display device during always-on display mode. In some examples, power consumption is reduced by more than 3.4% in low-resolution mode compared to higher-resolution mode.

[0008] In addition to describing the embodiments described below, this disclosure describes the following embodiments.

[0009] Embodiment 1 relates to a method for operating a display device including a pixel array addressed by a set of data lines and a set of scan lines, the method comprising the display device presenting a first frame of image content, the presenting comprising: addressing a set of data lines with first image data of a first portion of the first frame of image content; transmitting a first scan signal to a first pixel line using a first scan line of the set of scan lines to move first image data from the set of data lines to a first pixel line of the pixel array; activating the first pixel line to emit light after the first scan signal has been transmitted to the first pixel line; transmitting a second scan signal to a second pixel line of the pixel array using a second scan line of the set of scan lines without addressing the set of data lines with image data after the set of data lines has been addressed with first image data; and activating the second pixel line to emit light after the second scan signal has been transmitted to the second pixel line.

[0010] Embodiment 2 is a method according to one of the prior embodiments, wherein after a first scan signal is transmitted to a first pixel line, the first image data addressed to a set of data lines is attenuated in intensity to an attenuated version of the first image data, and the attenuated version of the first image data is moved to the second pixel line by transmitting a second scan signal to a second pixel line.

[0011] Embodiment 3 is a method according to any one of the prior embodiments, wherein the first image data includes a set of voltages that define the intensity of light emitted by corresponding pixels in a first pixel line.

[0012] Embodiment 4 is a method according to any one of the prior embodiments, wherein the second pixel line is the pixel line immediately adjacent in the pixel array after the first pixel line.

[0013] Embodiment 5 is a method according to any one of the prior embodiments, wherein the first portion of the first frame of the image content is the first line of the image content from the first frame of the image content, and the second portion of the first frame of the image content is the second line of the image content from the first frame of the image content.

[0014] Embodiment 6 is a method according to any one of the prior embodiments, wherein addressing a set of data lines with first image data comprises using a plurality of multiplexers to route the first image data to the set of data lines, each of the plurality of multiplexers being configured to route the image data to a corresponding subset of data lines in the set of data lines such that the set of data lines comprises a plurality of subsets of data lines corresponding to the plurality of multiplexers.

[0015] Embodiment 7 is a method according to Embodiment 6, wherein a plurality of multiplexers receive first image data from a display device integrated circuit, which is a component of a display device.

[0016] Embodiment 8 is a method according to either Embodiment 6 or 7, wherein transmitting a second scan signal to a second pixel line is performed by a display device after a set of data lines has been addressed with first image data, and multiple multiplexers do not route the image data to the set of data lines.

[0017] Embodiment 9 is the method according to Embodiment 6, wherein the display device includes a display driver integrated circuit, and addressing a set of data lines with first image data includes the display driver integrated circuit sending control signals to a plurality of multiplexers to route the first image data onto the set of data lines, wherein the display driver integrated circuit does not send control signals to the plurality of multiplexers between sending a first scan signal and sending a second scan signal to route the image data onto the set of data lines.

[0018] Embodiment 10 is the method according to Embodiment 9, wherein the display driver integrated circuit receives a second image data, the second image data being for a second portion of a first frame of image content and specifying a second pixel line, and the second image data is not routed to a set of data lines by a set of multiplexers, at least in part due to the display driver integrated circuit not sending a control signal to the multiplexers between sending a first scan signal and sending the second image data for routing the image data onto a set of data lines.

[0019] Embodiment 11 is a method according to any one of the prior embodiments, wherein presenting a first frame of image content includes: addressing a set of data lines with a third image data of a third portion of the first frame of image content; transmitting a third scan signal to a third pixel line using a third scan line of a set of scan lines to move third image data from the set of data lines to a third pixel line of a pixel array; activating the third pixel line to emit light after the third scan signal has been transmitted to the third pixel line; transmitting a fourth scan signal to a fourth pixel line of a pixel array using a fourth scan line of a set of scan lines without addressing the set of data lines with image data after the set of data lines has been addressed with the third image data; and activating the fourth pixel line to emit light after the fourth scan signal has been transmitted to the fourth pixel line.

[0020] Embodiment 12 is a method according to one of the prior embodiments, wherein the display device transmits a second scan signal to a second pixel line without addressing a set of data lines with image data as a result of the display device operating in a low-resolution operating mode.

[0021] Embodiment 13 is a method of Embodiment 12, wherein the display device receives a signal indicating that the display device will switch from a higher resolution operating mode to a lower resolution operating mode as a result of the battery of the device housing the display device being determined to have a power level below a threshold power level.

[0022] Embodiment 14 is a method according to any one of Embodiments 1 to 10, wherein the display device presents a first frame of image content while the display device is in a low-resolution operating mode, the method includes receiving a signal indicating that the display device is switching from a low-resolution operating mode to a higher-resolution operating mode adapted to present the image content at a higher resolution than when the display device is in the low-resolution mode, the method includes the display device presenting a second frame of image content while the display device is in the higher-resolution operating mode, the presentation of the second frame of image content includes addressing a set of data lines with a third image data of a first portion of the second frame of image content, and the third image data with data lines A method comprising: sending a third scan signal to a first pixel line using the first scan line of a set of scan lines to move the data from a set of scan lines to a first pixel line; activating the first pixel line to emit light after the third scan signal has been sent to the first pixel line; addressing a set of data lines with a fourth image data of a second portion of a second frame of image content; sending a fourth scan signal to a second pixel line using the second scan line of a set of scan lines to move the fourth image data from the set of data lines to a second pixel line; and activating the second pixel line to emit light after the fourth scan signal has been sent to the second pixel line.

[0023] Embodiment 15 is a method according to either Embodiment 13 or 14, wherein the low-resolution operating mode of the display device provides the same horizontal resolution as the higher-resolution operating mode, and the low-resolution operating mode of the display device results in a decrease in vertical resolution compared to the higher-resolution operating mode.

[0024] Embodiment 16 is the method of Embodiment 15, wherein the reduction in vertical resolution provided by the lower-resolution operating mode compared to the higher-resolution operating mode is due to the display device not addressing the set of data lines in the image data after the first scan signal has been transmitted to the first pixel line and before the second scan signal has been transmitted to the second pixel line.

[0025] Embodiment 17 is a method according to any one of Embodiments 14, 15, or 16, wherein addressing a set of data lines with image data comprises using a multiplexer to route the image data to the set of data lines, and the low-resolution operating mode is adapted to consume less power resources than the higher-resolution operating mode as a result of the multiplexer not routing image data to a set of data lines of some of the pixel lines in the pixel array.

[0026] Embodiment 18 relates to a display device comprising a pixel array including a plurality of pixel rows, a set of data lines, and a set of scan lines, each scan line corresponding to one of the plurality of pixel rows, and the display device further comprises a controller configured to perform an operation, the operation comprising: operating the display device in a first resolution mode, which includes using the set of data lines and the set of scan lines to address all pixel rows of the plurality of pixel rows with first image data of a first frame of image content; and operating the display device in a second resolution mode, which includes using the set of data lines and the set of scan lines to address fewer pixel rows than all pixel rows of the plurality of pixel rows with second image data of a second frame of image content.

[0027] Embodiment 19 is the display device described in Embodiment 18, wherein addressing all pixel rows of a plurality of pixel rows with the first image data of the first frame of image content includes sequentially transmitting a scan signal to each of the plurality of pixel rows using a set of scan lines, and writing a part of the first image data to a set of data lines before transmitting each scan signal and after transmitting the immediately preceding scan signal. The display device is as described above.

[0028] Embodiment 20 is the display device described in Embodiment 18, wherein addressing all pixel rows of a plurality of pixel rows with the first image data of the first frame of image content includes sequentially transmitting a scan signal to each of the plurality of pixel rows using a set of scan lines. The transmitting includes transmitting a first scan signal to the first pixel row of the plurality of pixel rows, and transmitting a second scan signal to the second pixel row of the plurality of pixel rows without writing image data to a set of data lines between transmitting the first scan signal and transmitting the second scan signal. The second pixel row is the pixel row immediately adjacent to the first pixel row. The display device is as described above.

[0029] In other embodiments, a display device is provided that includes a pixel array including a plurality of pixel rows, a set of data lines, and a set of scan lines, where each scan line corresponds to one of the plurality of pixel rows, and the display device further includes a controller configured to perform operations including the method of Embodiment 1 and any optional features thereof.

[0030] Details of one or more embodiments are set forth in the accompanying drawings and the description below. Other features, objects, and advantages will be apparent from the description and drawings, and from the claims.

Brief Description of Drawings

[0031] [Figure 1] This diagram shows an example of a display system for electronic devices. [Figure 2] Figures A and B show the pixel circuit diagrams of a display device and their corresponding timing diagrams. [Figure 3A] A partial diagram of an exemplary display panel circuit, including a set of multiplexers, is shown. [Figure 3B] Figure 3A shows an exemplary timing diagram of a portion of the exemplary pixel circuit in a higher resolution mode. [Figure 4] Figure 3A shows an exemplary timing diagram of a portion of the exemplary pixel circuit in low-resolution mode. [Figure 5] A diagram of a portion of an exemplary pixel circuit in low-resolution mode is shown. [Figure 6A] This flowchart shows the process for operating display devices with different resolutions. [Figure 6B] This flowchart shows the process for operating display devices with different resolutions. [Modes for carrying out the invention]

[0032] Similar reference symbols in various drawings indicate similar elements. This document generally describes a mechanism for providing display devices that can operate at different resolutions.

[0033] Figure 1 is a diagram of an exemplary display system 100 of a computing device 190. The display system 100 is an OLED display system including an array of light-emitting pixels 112. Each light-emitting pixel includes an OLED. The OLED display is driven by drivers including a SCAN / EM driver 108 and a data driver 110. The SCAN / EM driver 108 may be an integrated, i.e., stacked row-line driver. Generally, the data driver 110 provides data signals (e.g., voltage data (VDATA)) to data lines (e.g., D1-D3), the SCAN / EM driver 108 provides a SCAN signal to one of the selected scan lines (e.g., SCAN1) to move the data signals from the data lines to the pixels of the selected scan lines, and the SCAN / EM driver 108 provides an EMISSION signal to one of the selected emission lines (e.g., E1) to light up the OLED of the selected row according to the image data specified by the data signal. Figure 1 shows a display system 100 having a SCAN / EM driver 108 on one side of the display, but the SCAN / EM driver 108 may be located on both the left and right sides of the display to improve driving performance (for example, speed can be improved by placing the SCAN driver on the left side of the display and the EM driver on the right side of the display).

[0034] The pixel array 112 includes a plurality of light-emitting pixels, for example, pixels P11 to P34. A pixel is a small element of a display that can change color based on image data supplied to the pixel. Each pixel includes an OLED and circuitry that addresses the OLED by a data value, stores the data value, and drives the OLED with an intensity based on the data value (for example, the components shown in Figure 2A). Each pixel in the pixel array 112 can be individually addressed to generate different intensities of color produced by the pixel.

[0035] Each pixel displays light corresponding to the supplied image data, maintaining a nearly stable brightness throughout the entire frame time. Frame time, or frame period, is the amount of time between the start of one frame and the start of the next. Frame time can be the reciprocal of the display system's frame rate. For example, a frame rate of 60 frames per second (fps) corresponds to a frame time of 1 / 60th of a second, or 0.0167 seconds.

[0036] The pixel array 112 extends in a plane and includes rows and columns. Each row extends horizontally across the pixel array 112. For example, the first row 120 of the pixel array 112 contains pixels P11, P21, and P31. Each column extends vertically downward across the pixel array 112. For example, the first column 130 of the pixel array 112 contains pixels P11, P12, P13, and P14. Figure 1 shows only a few pixels for simplicity. In reality, the pixel array 112 may contain thousands or even millions of pixels. Increasing the number of pixels within a display of the same size results in higher image resolution.

[0037] The display system 100 includes a display driver integrated circuit (DDIC) 106 that receives display input data 102. In some examples, the DDIC 106 receives the display input data 102 from a system-on-a-chip (SoC) 105. The DDIC 106 may be, for example, a semiconductor integrated circuit or a state machine. The DDIC 106 generates signals with appropriate voltage, current, timing, and demultiplexing to display an image on the display panel 104 according to the display input data 102. In some examples, the DDIC 106 may be a microcontroller and may incorporate RAM, flash memory, EEPROM, ROM, etc.

[0038] The DDIC 106 includes a timing controller 134, a clock signal generator 136, and a data signal generator 138. The DDIC 106 generates a control signal 142. The control signal 142 may include, for example, signals that control the display frame start time and display frame stop time for each frame presented by the display panel 104, where a frame represents a single image in a series of images presented by the display panel 104. In an example where each frame presented by the display panel includes multiple light emission cycles, the control signal 142, or other signals not shown in Figure 1, may control the display light emission start time and display light emission stop time for each light emission cycle of the display panel 104.

[0039] In some examples, the SCAN / EM driver 108, the data driver 110, or both may be integrated with the DDIC 106. The SCAN / EM driver supplies SCAN and EM signals to rows of the pixel array 112. For example, the SCAN / EM driver 108 supplies scan signals via scan lines S1-S4 and EM signals via EM lines E1-E4 to rows of pixels, so that each row of pixels in the pixel array 112 is addressed by the scan lines and corresponding emission lines. For example, the first row 120 of the pixel array 112 is addressed by scan line SCAN1 and emission line E1.

[0040] The data driver 110 supplies signals to the rows of the pixel array 112. For example, based on image data signals 144 from the data signal generator 138, the data driver 110 outputs data values ​​to a set of multiplexers 114 in panel 104 via the source amplifier output signal line SAN (e.g., a set of source amplifier signal lines SA1, SA2, and SA3). The set of multiplexers 114 in panel 104 receive data values ​​from the corresponding set of source amplifier output signal line SAN and route the received data values ​​among more data lines. For example, Figure 1 shows a single MUX 114 configured to receive a stream of data values ​​from the data driver 110 via source output signal line SA1 and distribute the stream of data values ​​one at a time among data signal lines D1-3. In practice, there would be multiple MUXs. Each MUX is supplied with data values ​​from the data driver 110 via its corresponding source control signal line. The operation of the multiplexers 114 is described in more detail with reference to Figure 3A.

[0041] The data driver 110 supplies data voltages via data lines D1 to D3. In some examples, each of data lines D1 to D3 represents multiple data lines. For example, a pixel P11 may contain three subpixels (e.g., a red subpixel P11R, a green subpixel P11G, and a blue subpixel P11B), and data line D1 may represent three corresponding data lines, each addressing a corresponding subpixel of pixel P11.

[0042] The control signal 142 can be used to drive the SCAN / EM driver 108 and the data driver 110. Thus, the DDIC 106 controls the timing of the scan signal, EM signal, and data signal.

[0043] The display system 100 includes a power supply 150. The power supply 150 provides a first supply voltage ELVDD and a second supply voltage ELVSS, both of which are supplied to each pixel of the pixel array 112. In some examples, the power supply 150 may be integrated with a DDIC 106.

[0044] Each pixel in the pixel array 112 can be addressed by a horizontal scan line, a horizontal EM line, and a vertical data line. For example, pixel P11 can be addressed by data line D1, scan line S1, and EM line E1. In another example, pixel P23 can be addressed by data line D2, scan line S3, and EM line E3.

[0045] Scanlines are addressed sequentially for each frame. The scan direction determines the order in which the scanlines are addressed (for example, the direction in which a row of pixels receives a data value and then lights up with an intensity based on the received data value). In the display system 100, the scan direction is from the top of the pixel array 112 to the bottom of the pixel array 112. For example, scanline S1 is addressed first, followed by scanline S2, then S3, and so on. In some embodiments, all rows of pixels are programmed with data values ​​using the SCAN signal (one row at a time), and then the display device activates all rows of pixels with an intensity based on the programmed data values. In some embodiments, the display device can activate rows of pixels while other rows of pixels are still being programmed, resulting in a delay of several rows between the row currently receiving the SCAN signal and the row of pixels that is being activated and beginning to light up.

[0046] Figure 1 shows that each row is addressed by a single scanline, but each row may be addressed by multiple scanlines (e.g., nSCAN and pSCAN). Figure 1 shows exemplary components of an OLED display, but the techniques described may be applied to other flat panel display technologies that involve arrays of pixels. For example, this technique can be applied to light-emitting diodes (LEDs), liquid crystal displays (LCDs), and plasma display panels (PDPs).

[0047] Figure 2A shows a diagram of a pixel circuit of a display device, which includes an LED and a corresponding driver circuit for the pixel circuit. Figure 2A may also show a more detailed diagram of a single pixel from the array of pixels shown in Figure 1. The components shown in Figure 2A may be referred to as “pixel circuits” in this disclosure, but the disclosure may also refer to such components simply as “pixels.” Furthermore, the pixels shown in Figure 2A may represent subpixels.

[0048] The pixel circuit may be an active-matrix OLED (AMOLED) pixel circuit. The pixel circuit receives an emission signal (EM) on the emission line, a scan signal on the scan signal line, and a data voltage (VDATA) signal on the data line. The pixel circuit 200 receives a first supply voltage ELVDD on the first voltage supply line, a second supply voltage ELVSS on the second voltage supply line, and an initial reference voltage VINIT on the initial voltage supply line.

[0049] The pixel circuit includes an organic light-emitting diode (OLED). The OLED contains a layer of organic compound that emits light in response to an electric current. The organic layer is placed between two electrodes, namely the anode and the cathode. The OLED is driven by a drive transistor T1, which receives a supply voltage ELVDD and acts as a current source to drive the OLED and cause it to emit light.

[0050] The pixel also includes a storage capacitor CST and transistors T2-T7. The operation of the pixel is defined by the states of the control signals SCAN, EM, and VDATA. The amount / level of the OLED current (IOLED) is set by the voltage present at the gate terminal of the driver transistor T1, which is referred to herein as the "G" node.

[0051] The drive transistor T1 has a threshold voltage VTH between its gate terminal and its source terminal. When the voltage between the gate terminal and source terminal of the drive transistor T1 exceeds the threshold voltage VTH, it forms a conductive path from the source terminal to the gate terminal. The amount of current IOLED flowing through the conductive path via the drive transistor T1 corresponds to the amount by which the voltage between the gate terminal and source terminal exceeds the threshold voltage VTH.

[0052] Figure 2B shows a timing diagram of the control signals provided to and received by the pixels shown in Figure 2A. These control signals repeatedly transition during the operation of the display system 100 between the initialization stage, programming stage, and emission stage.

[0053] At the end of the emission stage, the EM signal transitions to the off state (for example, by changing from a low state to a high state). This transition turns off transistors T5 and T6, thereby cutting off the current supplied from ELVDD to the OLED, and thus stopping light emission by the OLED. Since the EM signal can be supplied to an entire line of pixels, this transition can turn off all pixels in a pixel line.

[0054] During the initialization stage, the SCAN[n-1] signal is turned on (for example, by changing from a high state to a low state), which turns on transistor T4 for a certain period of time and initializes the G node to the initialization voltage VINIT. Since the SCAN[n-1] signal may be provided to the entire pixel line, during this initialization stage, any data values ​​previously stored in each pixel in the pixel line may be erased. The SCAN[n-1] signal may also be the SCAN[n] signal provided to the preceding row by the state machine of the SCAN / EM driver 108.

[0055] During the programming stage, the SCAN[n] signal is turned on (for example, by going low), which turns on transistors T2, T3, and T7 for a certain period of time. This causes the voltage value on the voltage data VDATA line to pass through transistors T2, T1, and T3 to the G node, setting the G node to a value based on the VDATA line (for example, the voltage on VDATA minus the effect of the transistor threshold voltage). Since the SCAN signal can be supplied to the entire pixel line, this programming stage can move the data voltage value from each data line of each pixel to each pixel's G node for each pixel in the pixel line.

[0056] During the emission stage, the EM signal is turned on (for example, by going low), thereby turning on transistors T5 and T6. Current flows from ELVDD through transistors T5, T1, and T6 to the anode of the OLED. Since the EM signal is supplied to the entire pixel line, all pixels in the pixel line can become active.

[0057] The current level supplied to each pixel's OLED is determined by the voltage present at the pixel's G-node (for example, the G-node voltage level is programmed by the voltage data VDATA line). The intensity or brightness of the light emitted by the OLED directly correlates with the amount of current IOLED applied to the OLED, with higher currents corresponding to greater light intensity compared to lower currents. The energy storage capacitor CST maintains the voltage at the G-node so that the OLED continues to emit light at approximately the same level for the duration of the emission stage.

[0058] The voltage at the G node may drop slightly during the emission stage. Therefore, the current applied to the OLED and the intensity of the light emitted by the OLED may decrease or increase slightly during the emission stage, depending on the type of pixel circuit design (for example, in p-channel transistors within the pixel circuit, a lower voltage level at the G node results in a higher IOLED and a higher intensity of OLED light).

[0059] Figure 3A shows a partial diagram of an exemplary display panel circuit 300, including a set of multiplexers 114. The set of multiplexers 114 includes multiplexer 114a and multiplexer 114b, each represented by the circuit in the respective dotted box in Figure 3A. Multiplexer 114a receives a series of image data values ​​on the source amplifier signal line SA1 as input and selectively routes the series of image data values ​​between data lines D11 to D23 (for example, routing one data value to D11, then the next data value to D12, then the next data value to D13, and so on, routing one data value to one data line). Similarly, multiplexer 114b receives a series of image data values ​​on the source amplifier signal line SA2 as input and selectively routes the series of image data values ​​to data lines D31 to D43.

[0060] The display panel circuit 300 includes pixel rows r1, r2, r3, and r4. Each pixel row is shown as containing two pixels, each containing a red subpixel (R), a green subpixel (G), and a blue subpixel (B). A set of three subpixels forms one pixel. For example, pixel P11 in Figure 1 contains subpixels R11, G11, and B11 in Figure 3A. Pixel P23 in Figure 1 contains subpixels R23, G23, and B23 in Figure 3A.

[0061] The display panel circuit 300 includes data lines D11 to D43. Each data line addresses a column of subpixels, including a single subpixel from each row. For example, data line D11 addresses subpixel R11 of row r1, subpixel R12 of row r2, subpixel R13 of row r3, and subpixel R14 of row r4. Data line D23 addresses subpixel B21 of row r1, subpixel B22 of row r2, subpixel B23 of row r3, and subpixel B24 of row r4.

[0062] High-resolution flat-panel displays can include a large number of column data lines. For example, a watch display with a 384x384 pixel array can use a total of 1152 column data lines to address the pixel array, with each column data line connected to a DDIC106. If all column data lines were directly connected to the DDIC, the DDIC could become physically larger to accommodate the connections of 1152 column data lines. Such a design may also require a large display bezel for line-tracing designs. Multiplexers can be used to reduce the size of the DDIC106 and the bezel.

[0063] Referring to Figure 3A, the display panel circuit 300 includes multiplexer activation lines M1 to M6, each used to control the operation (e.g., on / off state) of one or more transistor switches in one or more of the multiplexers based on activation signals received from other components (e.g., DDIC 106). For example, multiplexer activation line M3 controls the on / off state of switch SW13 in multiplexer 114a and switch SW33 in multiplexer 114b. Multiplexer activation line M6 controls the on / off state of switch SW23 in multiplexer 114a and SW43 in multiplexer 114b.

[0064] The DDIC106 outputs image data values ​​on source amplifier signal lines SA1 and SA2. In Figure 3A, each source amplifier signal line is connected to a set of six adjacent data lines via multiplexers (e.g., 114a, 114b). For example, multiplexer 114a connects SA1 to data lines D11 to D23 via switches controlled by multiplexer activation lines M1 to M6, respectively. Similarly, multiplexer 114b connects SA2 to data lines D31 to D43 via switches controlled by multiplexer activation lines M1 to M6, respectively. Although not shown, additional source amplifier output lines can be connected to an additional set of six corresponding adjacent data lines.

[0065] During display operation, the DDIC106 outputs image data (e.g., VDATA) to source amplifier signal lines SA1 and SA2 to control the pixel values. For example, the DDIC106 can output image data for subpixel B11 to the first source amplifier signal line SA1, while simultaneously activating the multiplexer activation line M3, causing switch SW13 to turn ON. Thus, the image data provided by source amplifier signal line SA1 is written to data line D13. When the scan signal is turned ON for row r1, the image data moves from data line D13 to subpixel B11. When the emission signal activates row r1, subpixel B11 emits light with the brightness and color specified in the image data.

[0066] An exemplary set of multiplexers 114 includes two multiplexers, e.g., multiplexers 114a and 114b, each being a 1:6 multiplexer. A 1:6 multiplexer has six outputs for each input. Some embodiments include multiplexers having more or fewer outputs per input. For example, a display system could include a 1:10 multiplexer with ten outputs per input, or a 1:2 multiplexer with two outputs per input.

[0067] The number of multiplexers in a set of multiplexers may be proportional to the number of subpixels in a row of the pixel array, the number of data lines in the display, or both. For example, an exemplary display system with 600 subpixels per row may have 600 data lines. The display system may include 100 1:6 multiplexers, each of which has outputs connected to six data lines.

[0068] Figure 3B shows an exemplary timing diagram 350 of signals transmitted on some of the circuit lines of the exemplary display panel circuit 300 of Figure 3A operating in a higher resolution mode. When operating in high resolution mode, the DDIC 106 outputs subpixel image data of the pixel circuit 300 (to source amplifier signal lines SA1 and SA2). The DDIC 106 transmits activation signals on multiplexer activation lines M1 to M6 to route the image data transmitted on source amplifier signal lines SA1 and SA2 between the data lines of the relevant pixels.

[0069] For example, at time t1, the DDIC106 outputs image data of subpixel R11 to source amplifier line SA1 and image data of subpixel R31 to source amplifier line SA2. At time t1, the DDIC106 outputs an activation signal to multiplexer activation line M1, turning on the switch that connects source amplifier line SA1 to data line D11 and source amplifier line SA2 to data line D31. Therefore, the image data of subpixel R11 is written to data line D11, and the image data of subpixel R31 is written to data line D31.

[0070] At time t2, MUX114a and 114b route the image data between all of their respective outputs, thus writing the image data of row r1 to the data lines across the pixel array. Next, the scan driver turns on the scan signal SCAN1, for example by setting SCAN1 to a low value. As illustrated with reference to Figures 2A and 2B, the scan signal SCAN1 turns on transistors T2, T3, and T7 for a certain period of time for the subpixels in row r1. The scan signal SCAN1 moves multiple image data values ​​on each of the multiple data lines from the data lines to the respective subpixels of row r1. For example, the scan signal SCAN1 moves the first image data value from data line D11 to subpixel R11, and the second image data value from data line D31 to subpixel R31. At time t3, the source amplifier signals SA1 and SA2 begin outputting the image data of the next consecutive row, for example, the image data values ​​of the subpixels in row r2.

[0071] The duration between time t1 and time t3 is the row line time 310 for row r1. In higher resolution modes, at each row line time interval, the image data of a row of pixels is written to the data line. Therefore, the operation of the pixel circuit 300 between time t3 and time t5, during row line time 312, is similar to the operation of the pixel circuit 300 during the previous row line time 310.

[0072] In higher resolution mode, the DDIC106 continuously writes image data for each subpixel in a consecutive row, from the first row of the pixel array to the last row. At the end of each row line time, a new row line time begins, and image data for the next row is written to the data line.

[0073] The multiplexer activation lines M1-M6, which include parallel-connected TFT switches, may have significant parasitic capacitance. Furthermore, the multiplexer activation signal frequently alternates between high-voltage and low-voltage states. The voltage difference between the high-voltage (off) and low-voltage (on) states can be, for example, 12 volts or more. As a result, the multiplexer can consume a significant amount of power in the display. In some examples, the multiplexer consumes 6.7% of the total driving power consumption of a display operating in always-on display mode.

[0074] When a device, such as computing device 190, experiences a low battery level, the device may enter a battery-saving mode. In some examples, computing device 190 can enter battery-saving mode in response to receiving user input indicating the selection of battery-saving mode. In some examples, battery-saving mode may simplify the content of the display screen, which may include non-color images. This can reduce the power consumption of computing device 190. However, if the display remains in the AOD state, the power consumed by the display circuitry may not be reduced. One reason for this is that the multiplexer in the display continuously switches transistors to route image data between data lines.

[0075] Figure 4 shows an exemplary timing diagram 400 of a portion of the exemplary panel display circuit 300 of Figure 3A operating in low-resolution mode. In timing diagram 400, during the first line time 410 from t6 to t8, the operation of the pixel circuit 300 is the same as during the first line time 310 in timing diagram 350 of Figure 3B. For example, at time t6, the DDIC output line SA1 contains image data for subpixel R11, and the output line SA2 contains image data for subpixel R31. At time t6, the DDIC 106 outputs an activation signal to the multiplexer activation line M1, turning on the switch that connects source amplifier line SA1 to data line D11 and source amplifier line SA2 to data line D31. Thus, the image data for subpixel R11 is written to data line D11, and the image data for subpixel R31 is written to data line D31.

[0076] At time t7 in timing diagram 400, as at time t2 in timing diagram 350, all MUX switches cycle on and off, writing the image data of row r1 to the data lines across the pixel array. The scan driver turns on the scan signal SCAN1. The scan signal SCAN1 moves the image data from the data lines to each subpixel of row r1. For example, the scan signal SCAN1 moves the image data from data line D11 to subpixel R11 and from data line D31 to subpixel R31.

[0077] At time t8, source amplifier signal lines SA1 and SA2 are not providing any image data to the subpixels of line r2, which is the next consecutive line after line r1. DDIC106 controls source amplifier signal lines SA1 and SA2 to remain off or idle for the line line time 412 between time t8 and time t10. In some examples, setting source amplifier signal lines SA1 and SA2 to off may involve disconnecting source amplifier signal lines SA1 and SA2 so that they are not connected to the multiplexer 114 (or, although source amplifier signal lines SA1 and SA2 are connected to the multiplexer 114, they are disconnected from DDIC106, so that the corresponding output terminals of DDIC106 are disconnected from the internal circuitry and therefore "float").

[0078] The DDIC106 controls the multiplexer activation line to remain in the "off" state during the line time 412 between time t8 and time t10. Therefore, the multiplexer switch remains open, i.e., off, and does not toggle during the line time 412. Consequently, no image data is written to the data line of line r2 during the line time 412.

[0079] At time t9, the scan driver turns on the scan signal SCAN2, which is sent to all pixels in row r2 via the scan signal line. The scan signal SCAN2 turns on transistors T2, T3, and T7 for a certain period of time for the subpixels in row r2. Since no new image data is written to the data line during row line time 412, any image data that may move from the data line to the subpixels in row r2 may represent an attenuated version of the image data provided to the data line between times t6 and t7. For example, data values ​​provided to the data line between times t6 and t7 may remain on those data lines after the activation of SCAN1 temporarily connects these data lines to the corresponding pixels in row r1 and programs those pixels with the corresponding data values.

[0080] When the scan signal SCAN2 is turned on and no new data has been written to the data lines of the subpixels in row r2, the subpixels in row r2 receive residual voltages from the data lines that remain from the previous image data, and receive image data that may have been written to, for example, the data lines of row r1 and attenuated to an amount imperceptible to the end user viewing the display. The effect of scanning a row without initially writing new data to the row is explained in more detail with reference to Figure 5.

[0081] At time t10, the DDIC105 resumes writing image data to the next consecutive row on the source amplifier signal lines SA1 and SA2 (e.g., the subpixel of row r3). ​​During the row line time 414 between time t10 and time t11, the multiplexer is controlled by the multiplexer activation lines M1-M6, which sequentially turn on and off to write image data for the subpixel of row r3 to the data line.

[0082] During low-resolution mode, the pattern shown in timing diagram 400 is repeated, and the DDIC 106 alternately writes image data to the pixel rows. In the exemplary pixel circuit 300, the DDIC 106 writes image data to rows r1 and r3, skipping the writing of image data to rows r2 and r4. Thus, in low-resolution mode, the display system operates at half frequency for multiplexer operation, and at half frequency for the DDIC 106 outputting image data using source amplifier signal lines SA1 and SA2. The multiplexer 114 and the circuit within the DDIC 106 that pushes image data to source amplifier signal lines SA1 and SA2 are idle during the alternating row line time.

[0083] By operating the display in a low-resolution mode, which includes operating at half frequency for multiplexer operation and half frequency for the DDIC source amplifier signal, the power consumption of the multiplexer and source amplifier can be reduced to, for example, about half the power consumption used in higher-resolution modes. Operating the display in low-resolution mode may reduce visual quality because the vertical resolution of the display image is halved (for example, so that each set of two rows can show the same row / copied row of image content having half the unique pixel content presented by the display). Low-resolution mode can be implemented by a battery-saving mode so that the reduction in visual quality of the image is not perceptible to the user.

[0084] The exemplary timing diagram 400 shows image data being written to alternating pixel rows starting from the first row r1, but other variations of the low-resolution mode are possible. In some examples, image data can be written to alternating pixel rows starting from the second row r2. For example, DDIC106 can write image data to rows r2 and r4 and skip writing image data to rows r1 and r3. In some examples, the multiplexer signal can be toggled for odd-numbered pixel rows only or for even-numbered pixel rows only.

[0085] In some cases, the DDIC106 can skip writing image data for two or more consecutive rows. For example, the DDIC106 can write image data for row r1, skip writing image data for rows r2 and r3, and then write image data for row r4. Skipping the writing of two or more consecutive rows of image data can reduce power consumption by lowering the image resolution compared to skipping only every other row. In some cases, the DDIC106 can enter a first low-resolution mode in which individual rows are skipped between rows of new image data. The SoC may decide that further power reduction is needed and can instruct the DDIC106 to enter a second low-resolution mode in which multiple rows are skipped between rows of new image data.

[0086] In some cases, the DDIC106 can write image data for two or more consecutive rows. For example, the DDIC106 can write image data for rows r1 and r2, and skip writing image data for row r3. Writing image data for two or more consecutive rows can increase image resolution by increasing power consumption compared to writing image data for a single alternating row.

[0087] Exemplary timing diagram 400 shows that both the multiplexer switch and the source amplifier signal are idle during line time 412, but other variations are possible. In some examples, DDIC 106 can idle the multiplexer switch during line time 412 without idling the source amplifier output. For example, multiplexer circuits M1-M6 can keep the multiplexer switch in the off state, while DDIC 106 continues to output data values ​​to source amplifier signal lines SA1 and SA2. In these examples, multiplexer 114 receives data values ​​on source amplifier signal lines SA1 and SA2, but does not route the image data to either data line.

[0088] In some examples, the DDIC106 can idle the source amplifier output for a line time of 412 without idling the multiplexer switch. For example, the DDIC106 can turn off the circuit that images the data on source amplifier signal lines SA1 and SA2, while activation signals are sent to multiplexer activation lines M1-M6 to sequentially turn the multiplexer switch on and off. In these examples, the MUX continues to cycle but does not provide new image data to the data lines.

[0089] If a scan signal is turned on for a specific row, and no new data has been written to the data line of a subpixel within that row, the subpixel within that row receives the residual voltage remaining from the previous image data from the data line.

[0090] The data lines D11 to D43 of the exemplary pixel circuit 300 each have parasitic capacitance (CDATA). The CDATA of each data line D11 to D43 can be used as temporary storage for image data (VDATA) before the SCAN signal becomes active. For example, image data is written to data line D11 at time t6, and the scan signal SCAN1 is turned on at time t7. Between times t6 and t7, the image data of subpixel R11 is stored in the CDATA of D11.

[0091] After image data is written to the pixel circuit by the SCAN signal, the CDATA can continue to store the image data. This is because, generally, the CDATA is much larger than the CST in the pixel circuit, and the charge that the CDATA transfers to the CST can reduce the attenuation of the CDATA's voltage level. For example, after the scan signal SCAN1 is turned off at t12, the CDATA of D11 continues to store the amount of image data (e.g., voltage) written for subpixel R11. The image data stored by the CDATA may decay over time.

[0092] When the next row's SCAN is activated, the remaining charge in CDATA can be reused to charge the capacitor (CST) of the next row's subpixel. For example, the scan signal SCAN2 is turned on at time t9. The residual image data from data line D11 is moved to subpixel R12. Similarly, the residual image data from data line D12, attenuated from the image data written to subpixel G11, is moved to subpixel G12. In this way, the subpixel in row r2 receives, from its respective data line, an attenuated version of the image data written to the subpixel in row r1. Similarly, the subpixel in row r4 receives, from its respective data line, an attenuated version of the image data written to the subpixel in row r3.

[0093] Figure 5 shows a partial diagram of an exemplary pixel circuit 500 in low-resolution mode. In the exemplary display panel circuit 500, new image data is written to the data lines during the row line times of rows r1 and r3. No new image data is written to the data lines during the row line times of rows r2 and r4. Therefore, each subpixel of row r2 receives from its respective data line a degraded version of the image data written to the subpixel of row r1 connected to the same data line. Each subpixel of row r4 receives from its respective data line a degraded version of the image data written to the subpixel of row r3 connected to the same data line.

[0094] As a result of alternately writing new image data to pixel rows in low-resolution mode, the pixels of pixel circuit 500 have half the vertical image resolution compared to high-resolution mode, where new image data is written to each pixel row. In Figure 5, different pixel values, such as the brightness values ​​of pixels, are represented by different patterns. As shown in Figure 5, the subpixels in row r2 emit light with approximately the same pixel value as the subpixels in row r1. Therefore, the appearance of the subpixels in row r2 is similar to that of the subpixels in row r1. The subpixels in row r4 emit light with approximately the same pixel value as the subpixels in row r3. Therefore, the appearance of the subpixels in row r4 is similar to that of the subpixels in row r3.

[0095] The circuitry within the DDIC106 may be configured to operate in low-resolution mode, but there may also be circuitry within a system-on-a-chip (SOC) that provides image data to the DDIC106 configured to operate in low-resolution mode, and / or programming performed by the system-on-a-chip. For example, the SOC may make a decision to enter low-resolution mode (e.g., as a result of the remaining battery capacity falling below a threshold level), and as a result the SOC may (1) signal the DDIC106 to put the DDIC106 into low-resolution mode, and (2) generate frames of image content with reduced horizontal resolution such that each frame of image content sent to the DDIC106 by the SOC has half the number of lines of the original image content. The DDIC106 may then vertically stretch its reduced amount of image content across the entire display using the techniques described herein. The power consumption of the SOC may be reduced during its low-resolution mode because the SOC generates frames of image content to send to the DDIC106 at a lower resolution, at least in part (for example, half of the image content is prepared by the processing circuitry and the other half is amplified for transmission to the DDIC106 via the signal lines).

[0096] Figures 6A and 6B show flowcharts illustrating the process of operating display devices or systems with different resolutions. The process may be carried out by a display system, or a computing device including a display system, such as computing device 190.

[0097] In box 600, the display device operates in low-resolution mode. For example, DDIC 106 may receive a signal from SoC 105 instructing DDIC 106 to enter low-resolution mode. In some examples, DDIC 106 receives a signal from SoC 105 indicating that device 190 has entered battery-saving mode. In response to receiving the signal indicating that device 190 has entered battery-saving mode, the DDIC may decide to operate in low-resolution mode. The operations of boxes 610-630 (described below) may be performed while the display device is operating in low-resolution mode.

[0098] In box 610, the display device addresses a set of data lines with image data of a portion of the frame of the image content. For example, DDIC106 can address a set of data lines, including data lines D11-D43 (Figure 3A), with image data of a portion of the first frame of the image content. In some examples, the first portion of the first frame of the image content is the first line of the image content from the first frame of the image content.

[0099] In some examples, addressing a set of data lines by image data involves using multiple multiplexers to route the image data to the set of data lines. For example, DDIC can address a set of data lines using a set of multiplexers 114. Each multiplexer in the set of multiplexers 114 is configured to route image data to a corresponding subset of data lines within the set of data lines. For example, multiplexer 114a (Figure 3A) receives a stream of image data via source amplifier line SA1 and routes the image data to a subset of data lines including data lines D11-D23 (for example, each image data value in the stream of image data is routed periodically and repeatedly to a different data line in the set of data lines, one at a time). A multiplexer receiving image data via source amplifier line SA2 routes the image data to a subset of data lines including data lines D31-D43.

[0100] The multiplexer receives first image data from the DDIC, which is a component of the display device. For example, a set of multiplexers 114 receives first image data from the DDIC 106 via source amplifier lines SA1 and SA2. The display device addresses a set of data lines D11 to D43 with the first image data. In some examples, the DDIC 106 sends control signals 142 (e.g., the multiplexer activation signals described above) to multiple multiplexers to route the first image data to the set of data lines. In some examples, the first image data includes a set of voltages (VDATA) that define the intensity of light emitted by the corresponding pixels in the first pixel line. For example, a set of image data values ​​provided to the multiplexer 114a via source amplifier signal line SA1 includes a set of voltages that define the intensity of light emitted by subpixels R11 to G21 in row r1.

[0101] In box 620, the display device uses a first scan line to send a first scan signal to the first pixel line in order to move image data from a set of data lines to the first pixel line. For example, the display device may send a scan signal SCAN1 to a subpixel of row r1 in order to move image data from data lines D11-D23 to the subpixel of row r1 (e.g., the "G" node of each subpixel).

[0102] In box 622, the display device activates a first pixel line to emit light after a first scan signal has been transmitted to the first pixel line. For example, the display device activates a subpixel of row r1 to emit light after a scan signal SCAN1 has been transmitted to the subpixel of row r1. The display device can activate a subpixel of row r1 by transmitting an emission signal using an emission line, for example, the EM line E1 shown in Figure 1. The first pixel line emits light at a defined / programmed intensity after the first scan signal has been transmitted to the first pixel line. The subpixels R11 to G21 of row r1 emit light at a defined / programmed intensity after the scan signal SCAN1 has been transmitted to the subpixels of row r1.

[0103] In box 624, the display device transmits a second scan signal to a second pixel line. The second pixel line may be the pixel line immediately adjacent in the pixel array after the first pixel line. For example, the second pixel line may contain subpixels of row r2. In some examples, the display device transmits a second scan signal using a second scan line (e.g., a different conductor from the first scan line) after addressing a set of data lines with the first image data, but without addressing a set of data lines with the image data. For example, the display device may transmit a scan signal SCAN1 and then a scan signal SCAN2 without addressing a set of data lines with the image data.

[0104] In some embodiments, the DDIC 106 does not send control signals to the set of multiplexers 114 between sending the first scan signal SCAN1 and sending the second scan signal SCAN2. Therefore, the multiplexer switches controlled by the multiplexer activation lines M1-M6 may remain off between the first scan signal SCAN1 and the second scan signal SCAN2. In examples where each multiplexer switch includes a transistor, the voltage present at the gate of the transistor remains below a threshold voltage defined between the gate and source of the transistor during the duration between SCAN1 and SCAN2, and as a result, the transistor does not establish a conductive path between its source and gate. In some embodiments, after the first scan signal SCAN1 is sent to a first pixel line, e.g., a subpixel in row r1, the first image data addressed to the set of data lines is attenuated in intensity to an attenuated version of the first image data.

[0105] In box 626, the attenuated version of the image data moves to a second pixel line. In some examples, the attenuated version of the first image data moves to a second pixel line by sending a second scan signal SCAN2 to a second pixel line, for example, a subpixel of row r2. Sending the second scan signal SCAN2 to a second pixel line is performed by the display device after a set of data lines has been addressed with the first image data, without multiple multiplexers routing the image data to the set of data lines.

[0106] In box 630, the display device activates a second pixel line to emit light. For example, the display device may activate a subpixel of row r2 to emit light after the scan signal SCAN2 has been sent to the subpixel of row r2. The display device may activate a subpixel of row r2 by transmitting an emission signal using an emission line, for example, the EM line E2. The second pixel line emits light at an intensity defined by the attenuated version of the image data received from the corresponding data line. Subpixels R12-G22 of row r2 emit light at a defined intensity after the scan signal SCAN2 has been sent to the subpixel of row r2. The SCAN2 signal may be transmitted via the second scan line in a sequence that sequentially sends the scan line from the top to the bottom of the display, one scan row at a time, immediately after the SCAN1 signal has been sent to the first scan line.

[0107] In box 640, the display device determines whether to switch resolution modes. For example, the display device may receive a signal indicating that it will switch from a low-resolution operating mode to a higher-resolution operating mode, for example, (i) as a result of it being determined that the battery of the device housing the display device has a power level above a threshold power level, or (ii) as a result of the device receiving user input to turn off the low-resolution operating mode. The computing device or a display device located within it may decide to switch to a higher-resolution mode. If the display device does not switch refresh rates, the operation of box 600 is performed again. If the display device switches to a different resolution mode and the different resolution mode is a higher resolution mode, the operation of box 650 is performed as shown in Figure 6B.

[0108] In box 650, the display device operates in a higher resolution mode. For example, the higher resolution mode is adapted to present image content at a higher resolution than when the display device is in a lower resolution mode. In some examples, the higher resolution mode may be the normal display operating resolution mode. In some examples, the DDIC 106 may receive a signal from the SoC 105 instructing the DDIC 106 to enter lower resolution mode. In some examples, the DDIC 106 may receive a signal from the SoC 105 indicating that device 190 has exited battery-saving mode. In response to receiving the signal indicating that device 190 has exited battery-saving mode, the DDIC may decide to operate in higher resolution mode.

[0109] In box 660, the display device addresses a set of data lines with image data of the first frame portion of the image content. For example, DDIC106 can address a set of data lines, including data lines D11-D43, with image data of a portion of the frame of the image content. In some examples, the first frame portion of the image content is the first line of the image content from the frame of the image content.

[0110] In box 666, the display device uses the first scan line to send a third scan signal to the first pixel line in order to move image data from the set of data lines to the first pixel line. For example, the display device may send a scan signal to a subpixel of row r1 in order to move image data from data lines D11-D23 to a subpixel of row r1.

[0111] In box 670, the display device activates a first pixel line to emit light after a third scan signal is sent to that pixel line. For example, the display device may activate a subpixel in row r1 to emit light after a third scan signal is sent to row r1.

[0112] In box 672, the display device addresses a set of data lines with image data from a second frame portion of the image content. In some examples, the second frame portion of the image content is the second line of the image content from the frame of the image content.

[0113] In box 674, the display device uses the second scan line to send a fourth scan signal to the second pixel line in order to move image data from the set of data lines to the second pixel line. For example, the display device may send a fourth scan signal to a subpixel of row r2 in order to move image data from the data line to a subpixel of row r2.

[0114] In box 680, the display device activates a second pixel line to emit light after a fourth scan signal is sent to that pixel line. For example, the display device may activate a subpixel in row r2 to emit light after a fourth scan signal is sent to row r2.

[0115] In box 690, the display device determines whether to switch resolution modes. For example, the display device may receive a signal indicating that it will switch from a higher resolution operating mode to a lower resolution operating mode, for example, as a result of (i) it being determined that the battery of the device housing the display device has a power level below a threshold power level, or (ii) as a result of receiving user input to activate a different resolution mode (e.g., activate a lower resolution mode). The computing device or a display device located within it may decide to switch to a lower resolution mode. If the display device does not switch refresh rates, the operation of box 650 is performed again. If the display device switches to a different resolution mode, and that different resolution mode is a lower resolution mode, the operation of box 600 is performed.

[0116] A low-resolution operating mode of a display device can provide the same horizontal resolution (e.g., the same number of unique vertical lines in the image data) as a higher-resolution operating mode. A low-resolution operating mode of a display device can result in a decrease in vertical resolution (e.g., a reduction in the number of unique horizontal lines in the data) compared to a higher-resolution operating mode. The decrease in vertical resolution provided by the low-resolution operating mode compared to a higher-resolution operating mode may be due to the display device not addressing a set of data lines in the image data after the first scan signal has been sent to a first pixel line and before the scan signal has been sent to a second pixel line. In some examples, addressing a set of data lines in the image data involves using a multiplexer to route the image data to the set of data lines, and the low-resolution operating mode is adapted to consume fewer power resources than the higher-resolution operating mode as a result of the multiplexer not routing the image data to a set of data lines for some of the pixel lines in the pixel array.

[0117] In some cases, a dynamic multiplexer control process can be used. The operation of the multiplexer can be dynamically controlled according to the image content. For example, when two or more consecutive rows of pixels in the image content are all the same color (e.g., black), the multiplexer circuit may be kept idle with the multiplexer switch turned off. The multiplexer switch may be turned off from the second row of black areas until the next non-black content. Thus, row-by-row dynamic control of the multiplexer circuit can be achieved.

[0118] In some examples, image content analysis performed to identify consecutive black rows can be performed by the DDIC106, which dynamically controls the multiplexer signal. In some examples, image content analysis performed to identify consecutive black rows can be performed by the SoC105, which can send a signal to the DDIC106 indicating rows where the multiplexer will remain idle. In the examples described below, the DDIC106 performs the image content analysis.

[0119] The DDIC 106 receives display input data 102 from the SoC. The DDIC analyzes the display input data 102 and can determine if the display input data 102 contains two or more consecutive black lines.

[0120] The DDIC106 can write data to the data line for the first line of all black pixels, and then switch off the multiplexer switch for the line time of the remaining black lines. The black value is written to the data line during the line time of the first black row. During the line time of the second black row, the decayed version of the image data moves from the data line to the subpixels of the second black row. Thus, the second row appears black, but no new image data is written to the data line of the second row.

[0121] Depending on the capacitance difference between the parasitic capacitance of the data line (CDATA) and the capacitance of the subpixel's energy storage capacitor CST, the maximum number of rows that can be charged to the black data voltage without recharging the CDATA can be changed. In some examples, in order to maintain a sufficiently high VDATA on the data line so that the pixel appears black, the CDATA may need to be recharged at intervals of 10, 15, or 20 rows.

[0122] For example, the display input data 102 may include 25 consecutive rows of black pixels and a 26th row of at least one non-black pixel. The DDIC can be configured to refresh the CDATA at 10-pixel intervals. Thus, the DDIC can control the multiplexer 114 to write image data to the data lines during the row line time of the first black row. The DDIC can also control the multiplexer 114 to remain idle during the row line time of the second to the eleventh black row. During the row line time of the second to the tenth black row, the image data on the data lines decays.

[0123] The DDIC 106 can toggle the multiplexer 114 during the line line time of the 11th black row, writing new black image data to the data line. The DDIC 106 can control the multiplexer 114 to remain idle during the line line time of the 12th to 20th black rows. The DDIC can toggle the multiplexer 114 during the line line time of the 21st black row to refresh the black image data on the data line again.

[0124] The DDIC106 can control the multiplexer 114 to remain idle between the 22nd to the 25th black row. The 26th row contains at least one non-black pixel. Therefore, the DDIC106 can toggle the multiplexer 114 during the row line time of the 26th row to move the image data of the 26th row to the data line.

[0125] The power consumption of the multiplexer 114 can be reduced by keeping it idle for the duration of the row line time for all black rows. In some examples, instead of idling the multiplexer 114, or in addition to idling it, the DDIC 106 can idle source amplifier signals, such as SA1 and SA2, for multiple consecutive black rows. Idlening the source amplifier signals in addition to idling the multiplexer switch can result in improved power savings.

[0126] The subject matter and functional operating embodiments described herein can be implemented on any suitable electronic device, such as a personal computer, mobile phone, smartphone, smartwatch, smart TV, mobile audio or video player, game console, or one or more combinations of these devices.

[0127] The electronic device may include various components such as memory, a processor, a display, and input / output units. The input / output unit may include, for example, a transceiver capable of communicating with one or more networks to send and receive data. The display may be any suitable display for displaying images, including, for example, a cathode ray tube (CRT), a liquid crystal display (LCD), or a light-emitting diode (LED) display.

[0128] Various implementations of the systems and methods described herein can be realized in digital electronic circuits, integrated circuits, specially designed ASICs (application-specific integrated circuits), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include embodiments in one or more computer programs executable and / or interpretable on a programmable system including at least one programmable processor, the at least one programmable processor may be dedicated or general-purpose and coupled to receive data and instructions from a storage system, at least one input device, and at least one output device, and to transmit data and instructions to them.

[0129] Embodiments can be implemented as one or more computer program products, such as one or more modules of computer program instructions encoded on a computer-readable medium for execution by a data processing device or for controlling the operation of a data processing device. The computer-readable medium may be a machine-readable storage device, a machine-readable storage substrate, a memory device, a composition of a material that affects a machine-readable propagating signal, or one or more combinations thereof. The term “data processing device” encompasses all devices and machines for processing data, including, for example, a programmable processor, a computer, or multiple processors or computers. In addition to hardware, the device may include code that makes up the execution environment of the computer program, such as processor firmware, a protocol stack, a database management system, an operating system, or code that constitutes one or more combinations thereof. A propagating signal is an artificially generated signal, such as a mechanically generated electrical signal, optical signal, or electromagnetic signal, which is generated to encode information for transmission to a suitable receiving device.

[0130] A computer program (also known as a program, software, software application, script, or code) can be written in any form of programming language, including compiled or interpreted languages, and can be deployed in any form, including as a standalone program or as a module, component, subroutine, or other unit suitable for use in a computing environment. A computer program does not necessarily correspond to a file in a file system. A program may be stored in part of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program of interest, or in multiple collaborative files (e.g., a file that stores one or more modules, subprograms, or parts of code). A computer program may be deployed to run on one computer, or on multiple computers located in one location or distributed across multiple locations and interconnected by a communication network.

[0131] Processors suitable for executing computer programs include, for example, both general-purpose and dedicated microprocessors, as well as one or more processors in either type of digital computer. Generally, processors receive instructions and data from read-only memory, random-access memory, or both.

[0132] The elements of a computer may include a processor for executing instructions, and one or more memory devices for storing instructions and data. Generally, a computer also includes one or more mass storage devices for storing data, such as magnetic disks, magneto-optical disks, or optical disks, or is operablely coupled to them to receive data from or transfer data to them, or both. However, a computer may not have such devices. Computer-readable media suitable for storing computer program instructions and data include all forms of non-volatile memory, media, and memory devices, such as semiconductor memory devices like EPROM, EEPROM, and flash memory devices, magnetic disks like internal hard disks or removable disks, magneto-optical disks, and CD-ROM and DVD-ROM disks. The processor and memory may be complemented or incorporated by dedicated logic circuits.

[0133] While this specification provides details of many specific embodiments, these should not be interpreted as limitations on the scope of what can be claimed, but rather as descriptions of features that may be specific to particular embodiments. Certain features described herein as separate embodiments may also be implemented in combination in a single embodiment. Conversely, various features described as a single embodiment may also be implemented in multiple embodiments, individually or in any preferred secondary combination. Furthermore, even if features are described above as functioning in a particular combination and were initially claimed as such, one or more features from the claimed combination may be removed from the combination, and the claimed combination may cover secondary combinations or variations of secondary combinations.

[0134] Similarly, while operations are shown in a specific order in the drawings, this should not be understood as requiring that such operations be performed in a specific illustrated or sequential order, or that all illustrated operations be performed, in order to achieve the desired result. In certain situations, multitasking and parallel processing may be advantageous. Furthermore, the separation of various system modules and components in the above embodiments should not be understood as requiring such separation in all embodiments, and the described program components and systems can generally be integrated into a single software product or packaged into multiple software products.

[0135] Specific embodiments of the subject matter have been described. Other embodiments are within the scope of the following claims. For example, the actions described in the claims may be performed in a different order, and this may still yield desirable results. As an example, the process shown in the accompanying figures does not necessarily require that the actions be performed in the specific order or sequence shown to obtain the desired results. In some cases, multitasking and parallel processing may be advantageous.

Claims

1. A method for operating a display device including a pixel array addressed by a set of data lines and a set of scan lines, the method being: The display device includes presenting a first frame of image content, and the presenting is Addressing the set of data lines in the first image data of the first part of the first frame of the image content, To move the first image data from the set of data lines to the first pixel line of the pixel array, a first scan signal is transmitted to the first pixel line using the first scan line of the set of scan lines. After the first scan signal is transmitted to the first pixel line, the first pixel line is activated in order to emit light. After addressing the set of data lines with the first image data, a second scan signal is transmitted to the second pixel line of the pixel array using the second scan line of the set of scan lines, without addressing the set of data lines with the image data. After the second scan signal is transmitted to the second pixel line, the second pixel line is activated in order to emit light. Methods that include...

2. After the first scan signal is transmitted to the first pixel line, the first image data addressed to the set of data lines is attenuated in intensity to an attenuated version of the first image data. The method according to claim 1, wherein the attenuated version of the first image data is moved to the second pixel line by transmitting the second scan signal to the second pixel line.

3. The method according to any one of claims 1 or 2, wherein the first image data includes a set of voltages that define the intensity of light emitted by corresponding pixels in the first pixel line.

4. The method according to any one of claims 1, 2, or 3, wherein the second pixel line is the pixel line immediately adjacent in the pixel array after the first pixel line.

5. The first portion of the first frame of the image content is the first line of the image content from the first frame of the image content, The method according to any one of claims 1 to 4, wherein the second portion of the first frame of the image content is a second line of the image content from the first frame of the image content.

6. The method according to any one of claims 1 to 5, wherein addressing the set of data lines with the first image data comprises using a plurality of multiplexers to route the first image data to the set of data lines, each of the plurality of multiplexers being configured to route the image data to a subset of corresponding data lines in the set of data lines such that the set of data lines includes a plurality of subsets of data lines corresponding to the plurality of multiplexers.

7. The method according to claim 6, wherein the plurality of multiplexers receive the first image data from a display device integrated circuit which is a component of the display device.

8. The method according to any one of claims 6 or 7, wherein the transmission of the second scan signal to the second pixel line is performed by the display device after the set of data lines has been addressed with the first image data, and the multiple multiplexers do not route the image data to the set of data lines.

9. The display device includes a display driver integrated circuit, Addressing the set of data lines with the first image data includes the display driver integrated circuit transmitting control signals to the plurality of multiplexers in order to route the first image data onto the set of data lines. The method according to claim 6, wherein the display driver integrated circuit does not transmit control signals to the plurality of multiplexers between transmitting the first scan signal and transmitting the second scan signal in order to route image data onto the set of data lines.

10. The display driver integrated circuit receives a second image data, the second image data being for a second portion of the first frame of the image content, and the second pixel line being specified. The method according to claim 9, wherein the second image data is not routed to the set of data lines by the plurality of multiplexers, at least in part due to the display driver integrated circuit not sending a control signal to the multiplexer between sending the first scan signal and sending the second image data in order to route the image data onto the set of data lines.

11. Presenting the first frame of the aforementioned image content means Addressing the set of data lines in the third image data of the third portion of the first frame of the image content, To move the third image data from the set of data lines to the third pixel line of the pixel array, a third scan signal is transmitted to the third pixel line using the third scan line of the set of scan lines. After the third scan signal is transmitted to the third pixel line, the third pixel line is activated in order to emit light. After addressing the set of data lines with the third image data, a fourth scan signal is transmitted to the fourth pixel line of the pixel array using the fourth scan line of the set of scan lines, without addressing the set of data lines with the image data. After the fourth scan signal is transmitted to the fourth pixel line, the fourth pixel line is activated in order to emit light. The method according to any one of claims 1 to 10, including the method described in any one of claims 1 to 10.

12. The method according to any one of claims 1 to 11, wherein the display device transmits the second scan signal to the second pixel line without addressing the set of data lines with image data as a result of the display device operating in a low-resolution operating mode.

13. The method according to claim 12, wherein the display device receives a signal indicating that the display device switches from a higher resolution operating mode to the lower resolution operating mode as a result of the battery of the device housing the display device being determined to have a power level below a threshold power level.

14. The display device presents a first frame of the image content while the display device is in low-resolution operating mode. The method includes receiving a signal indicating that the display device is switching from the low-resolution operating mode to a higher-resolution operating mode adapted to present image content at a higher resolution than when the display device is in the low-resolution mode. The method includes the display device presenting a second frame of image content while the display device is in the higher resolution operating mode, and presenting the second frame of image content is Addressing the set of data lines in the third image data of the first portion of the second frame of the aforementioned image content, To move the third image data from the set of data lines to the first pixel line, the first scan line of the set of scan lines is used to transmit a third scan signal to the first pixel line. After the third scan signal is transmitted to the first pixel line, the first pixel line is activated in order to emit light. Addressing the set of data lines in the fourth image data of the second portion of the second frame of the aforementioned image content, To move the fourth image data from the set of data lines to the second pixel line, the second scan line of the set of scan lines is used to transmit a fourth scan signal to the second pixel line, After the fourth scan signal is transmitted to the second pixel line, the second pixel line is activated in order to emit light. The method according to any one of claims 1 to 10, including the method described in any one of claims 1 to 10.

15. The low-resolution operating mode of the display device provides the same horizontal resolution as the higher-resolution operating mode. The method according to any one of claims 13 or 14, wherein the low-resolution operating mode of the display device results in a reduction in vertical resolution compared to the higher-resolution operating mode.

16. The method according to claim 15, wherein, with respect to the higher resolution operating mode, the reduction in vertical resolution provided by the lower resolution operating mode is due to the display device not addressing the set of data lines with image data after the first scan signal has been transmitted to the first pixel line and before the second scan signal has been transmitted to the second pixel line.

17. Addressing the set of data lines with image data includes using a multiplexer to route the image data to the set of data lines. The method according to any one of claims 14, 15, or 16, wherein the low-resolution operating mode is adapted to consume fewer power resources than the higher-resolution operating mode, as a result of the multiplexer not routing image data to the set of data lines of some of the pixel lines in the pixel array.

18. A display device, A pixel array containing multiple pixel rows, A set of data lines, The display device includes a set of scan lines, each scan line corresponding to one of the plurality of pixel rows, and the display device further includes Includes a controller configured to perform an operation, the operation being: Operating the display device in a first resolution mode, which includes using the set of data lines and the set of scan lines to address all pixel rows of the plurality of pixel rows with first image data of a first frame of image content; Operating the display device in a second resolution mode, which includes using the set of data lines and the set of scan lines to address fewer pixel rows than all of the multiple pixel rows with the second image data of the second frame of the image content; Display devices, including those mentioned above.

19. Addressing all of the aforementioned plurality of pixel rows with the first image data of the first frame of the image content is: Using the set of scan lines, a scan signal is sequentially transmitted to each of the multiple pixel rows. Before each scan signal is transmitted, and after the immediately preceding scan signal is transmitted, a portion of the first image data is written to the set of data lines. The display device according to claim 18, including the following:

20. Addressing all of the aforementioned plurality of pixel rows with the first image data of the first frame of the image content is: Using the set of scan lines, the process includes sequentially transmitting scan signals to each of the plurality of pixel rows, and the transmission is: Transmitting a first scan signal to the first pixel row of the plurality of pixel rows, The display device according to claim 18, wherein between transmitting the first scan signal and transmitting the second scan signal, the second scan signal is transmitted to a second pixel row of the plurality of pixel rows without writing image data to the set of data lines, the second pixel row being the pixel row immediately following the first pixel row.

Images