System and method for selective removal of metal-containing hard masks

Abstract

An exemplary semiconductor processing method may include introducing an etchant precursor into a processing area of ​​a semiconductor processing chamber. A substrate may be housed within the processing area. The substrate may define an exposed area of ​​a metal-containing hard mask material and an exposed area of ​​a material characterized by a dielectric constant of about 4.0 or less. The method may include bringing the substrate into contact with the etchant precursor. The method may include removing at least a portion of the metal-containing hard mask material.

Description

Technical Field

[0001] Cross - Reference to Related Applications

[0001] This application claims the benefit and priority of U.S. Patent Application No. 18 / 244,583, filed on September 11, 2023, entitled "SYSTEMS AND METHODS FOR SELECTIVE METAL - CONTAINING HARDMASK REMOVAL", which is hereby incorporated by reference in its entirety.

Background Art

[0002]

[0002] The technology described in this document relates to semiconductor processing and devices. More specifically, the technology relates to selectively etching a metal - containing hardmask.

[0003]

[0003] Integrated circuits can be realized by a process of fabricating a complexly patterned material layer on a substrate surface. To create a patterned material on the substrate, a controlled method for removing the exposed material is required. Chemical etching is used for various purposes, including transferring the pattern of a photoresist to a lower layer, thinning a layer, or narrowing the lateral dimensions of features already present on the surface. In many cases, it is desirable to perform an etching process that etches one substance faster than other materials, for example, to facilitate a pattern transfer process. Such an etching process is said to be selective with respect to the first material. Due to the diversity in materials, circuits, and processes, etching processes having selectivity with respect to various materials have been developed.

[0004]

[0004] Etching processes are sometimes called wet or dry processes, depending on the materials used in the process. For example, wet etching can preferentially remove some oxide dielectrics over other dielectrics and materials. However, wet processes may not be able to penetrate some constrained trenches, causing deformation of the remaining material. Dry etching is performed in a localized plasma formed within the processing area of ​​the substrate, but it can penetrate more constrained trenches and causes less deformation of the remaining fragile structures. However, the electric arc generated when the localized plasma discharges can damage the substrate.

[0005]

[0005] Therefore, there is a need for improved systems and methods that can be used to manufacture high-quality devices and structures. This technology addresses these and other needs. [Overview of the project]

[0006]

[0006] An exemplary semiconductor processing method may include introducing an etchant precursor into a processing area of ​​a semiconductor processing chamber. A substrate may be housed within the processing area. The substrate may define an exposed area of ​​a metal-containing hard mask material and an exposed area of ​​a material characterized by a dielectric constant of about 4.0 or less. The method may include bringing the substrate into contact with the etchant precursor. The method may include removing at least a portion of the metal-containing hard mask material.

[0007]

[0007] In some embodiments, the etchant precursor may be or may contain a halogen-containing precursor. The etchant precursor may be or may contain nitrogen trifluoride (NF3), diatomic fluorine (F2), diatomic chlorine (Cl2), thionyl chloride (SOCl2), carbon tetrafluoride (CF4), hexafluoroethane (C2F6), sulfur hexafluoride (SF6), carbon tetrachloride (CCl4), dichloromethane (CH2Cl2), chloroform (CHCl3), or a combination thereof. The method may include using the etchant precursor to flow a hydrogen-containing precursor or an oxygen-containing precursor through the processing area of ​​a semiconductor processing chamber. Partial removal of the metal-containing hard mask material may be carried out plasma-free. Partial removal of the metal-containing hard mask material may be carried out at a temperature of about 350°C or higher. Partial removal of the metal-containing hard mask material may be carried out at a pressure of about 2 Torr or higher. This method may include removing the oxidized portion of the metal-containing hard mask material before introducing the etchant precursor into the processing area of ​​the semiconductor processing chamber. After removing a portion of the metal-containing hard mask material, this method may include bringing the substrate into contact with a second etchant precursor to remove fluorine-containing residue from the substrate or the oxidized portion of the metal-containing hard mask material.

[0008]

[0008] Several embodiments of the present technology may encompass semiconductor processing methods. The method may include introducing a pre-etching precursor into a processing area of ​​a semiconductor processing chamber. A substrate may be housed within the processing area. The substrate may define an exposed area of ​​metal-containing hard mask material and an exposed area of ​​material characterized by a dielectric constant of about 4.0 or less. The method may include bringing the substrate into contact with the pre-etching precursor. The method may include stopping the supply of the pre-etching precursor. The method may include introducing an etchant precursor into a processing area of ​​a semiconductor processing chamber. The method may include bringing the substrate into contact with the etchant precursor. The method may include selectively removing at least a portion of the metal-containing hard mask material with respect to the material characterized by a dielectric constant of about 4.0 or less.

[0009]

[0009] In some embodiments, the pre-etching precursor is or may include nitrogen trifluoride (NF3), tungsten hexafluoride (WF6), or boron trichloride (BCl3). The method may include forming a plasma emission of the pre-etching precursor. The etchant precursor may be or may include nitrogen trifluoride (NF3), diatomic fluorine (F2), diatomic chlorine (Cl2), thionyl chloride (SOCl2), carbon tetrafluoride (CF4), hexafluoroethane (C2F6), sulfur hexafluoride (SF6), carbon tetrachloride (CCl4), dichloromethane (CH2Cl2), chloroform (CHCl3), or a combination thereof. Partial removal of the metal-containing hard mask material may be carried out plasma-free. The substrate may include exposed areas of the metallic material. The method may include oxidizing the metallic material before introducing the pre-etching precursor into the processing area of ​​the semiconductor processing chamber.

[0010]

[0010] Several embodiments of the present technology may encompass semiconductor processing methods. The method may include introducing an etchant precursor into a processing area of ​​a semiconductor processing chamber. A substrate may be housed within the processing area. The substrate may define exposed areas of a metal-containing hard mask material. The method may include bringing the substrate into contact with the etchant precursor. The method may include removing at least a portion of the metal-containing hard mask material from one or more other materials on the substrate. The method may include stopping the supply of the etchant precursor. The method may include introducing a post-etching precursor into a processing area of ​​a semiconductor processing chamber. The method may include bringing the substrate into contact with the post-etching precursor. The method may include removing fluorine-containing residue from the oxidized portion of the substrate or the metal-containing hard mask material.

[0011]

[0011] In some embodiments, the etchant precursor may be or may include a halogen-containing precursor. One or more other materials on the substrate may be or include a dielectric constant of about 4.0 or less, a metallic material, a silicon-containing material, or a metal-oxygen-containing material. Partial removal of the metal-containing hard mask material can be carried out at a temperature of about 350°C or higher and a pressure of about 2 Torr or higher.

[0012]

[0012] Such technologies can offer numerous advantages over conventional systems and techniques. For example, the above process can enable dry etching that can protect features of the substrate. In addition, the process can selectively remove the metal-containing hard mask material from other exposed materials on the substrate. These and other embodiments, along with many of their advantages and features, will be described in more detail below in conjunction with the accompanying figures.

[0013]

[0013] The nature and advantages of the disclosed technology can be further understood by referring to the remainder of this specification and the drawings. [Brief explanation of the drawing]

[0014] [Figure 1] A top view of one embodiment of an exemplary processing system according to several embodiments of this technology is shown. [Figure 2A] A schematic cross-sectional view of an exemplary processing chamber according to several embodiments of this technology is shown. [Figure 2B] Figure 2A shows a detailed view of a part of the processing chamber according to several embodiments of this technology. [Figure 3] This is a bottom view showing an exemplary shower head according to several embodiments of this technology. [Figure 4] The following are exemplary steps in a method according to several embodiments of this technology. [Figure 5A-5B] A schematic cross-sectional view of an etched material according to several embodiments of this technology is shown. [Modes for carrying out the invention]

[0015]

[0020] Some drawings are included as schematic diagrams. It should be understood that drawings are for illustrative purposes only and should not be considered to scale unless explicitly stated otherwise. Furthermore, as schematic diagrams, they are provided to aid understanding and may not include all aspects or information compared to realistic depictions, and may include additional or exaggerated material for illustrative purposes.

[0016]

[0021] In the attached drawings, similar components and / or features may have the same reference numeral. Furthermore, various components of the same type may be distinguished according to their reference numerals by letters that distinguish between similar components. Where only a first reference numeral is used in this specification, its description is applicable to any of the similar components having the same first reference numeral, regardless of the letters used.

[0017]

[0022] Diluted acids can be used in many different semiconductor processes to clean substrates and remove materials from them. For example, dilute hydrofluoric acid ("dHF") can be an effective etchant for silicon dioxide, aluminum oxide, titanium dioxide, and other materials and can be used to remove these materials from the substrate surface. After the etching or cleaning process is complete, the acid can be dried from the wafer or substrate surface. Using dHF may be called "wet" etching, where the diluent is often water. Additional etching processes that can utilize precursors supplied to the substrate may be used. For example, plasma-enhanced processes can also selectively etch materials by performing dry etching by enhancing the precursor through plasma.

[0018]

[0023] Wet etchants using aqueous solutions or water-based processes can work effectively for certain substrate structures, but water can present challenges under various conditions. For example, the use of water during the etching process can cause problems when placed on substrates containing metallic materials. For instance, certain subsequent manufacturing processes (e.g., creating gaps, removing oxide dielectrics, or other processes to remove oxygen-containing materials) may be performed after a certain degree of metallization has formed on the substrate. If water is used in any way during etching, electrolytes can be generated. When electrolytes come into contact with metallic materials, electrolytic corrosion can occur between dissimilar metals, and furthermore, the metals may be corroded or replaced during various processes. In addition, due to the surface tension of the water diluent, pattern deformation and collapse can occur in the microstructure. Water-based materials may also fail to penetrate some high aspect ratio features due to surface tension effects. Plasma etching can overcome the problems associated with water-based etching, but additional problems may arise. For example, reactive ion etching processes can expose the substrate to ionic activity, which can damage the structure through collisions and affect its electrical properties.

[0019]

[0024] This technology overcomes these problems by performing a dry etching process that can passivate several materials to the material being etched, and in some embodiments, the process can be plasma-free during etching. By utilizing specific precursors that can promote halogen dissociation to provide the etchant material, an etching process that can protect the surrounding structure can be implemented. In addition, the materials and conditions used can enable etching that is improved compared to the conventional technique.

[0020]

[0025] In the remaining disclosure, a particular etching process that utilizes the disclosed technology is identified as usual, but it will be readily understood that the systems and methods are equally applicable to deposition and cleaning processes that can occur in the described chambers, as well as other etching techniques and other etchings that can be performed with various exposed materials that can be maintained or substantially maintained. Thus, the technology should not be considered limited to an exemplary etching process or use with a chamber alone. Further, although an exemplary chamber is described to provide a basis for the technology, it should be understood that the technology can be applied to substantially any semiconductor processing chamber that can enable the described steps.

[0021]

[0026] FIG. 1 shows a top view of one embodiment of a processing system 100 of a deposition chamber, an etching chamber, a baking chamber, and a curing chamber according to an embodiment. In this figure, a pair of front-opening unified pods (FOUPs) 102 supply substrates of various sizes. These substrates are received by a robotic arm 104, placed in a low-pressure holding region 106, and then disposed in one of the substrate processing chambers 108a-f within tandem sections 109a-c. A second robotic arm 110 can be used to transport the substrate wafer from the holding region 106 to the substrate processing chambers 108a-f and vice versa. Each of the substrate processing chambers 108a-f can be equipped to perform several substrate processing steps, including the dry etching process described herein, in addition to cyclic layer deposition (CLD), atomic layer deposition (ALD), chemical vapor deposition (CVD), physical vapor deposition (PVD), etching, pre-cleaning, degassing, orientation, and other substrate processing.

[0022]

[0027] The substrate processing chambers 108a - f can include one or more system components for depositing, annealing, curing, and / or etching a dielectric film on a substrate wafer. In one configuration, two pairs of processing chambers (e.g., 108c - d and 108e - f) may be used to deposit a dielectric material on the substrate, and a third pair of processing chambers (e.g., 108a - b) may be used to etch the deposited dielectric. In other configurations, all three pairs of chambers (e.g., 108a - 108f) can be configured to etch the dielectric film on the substrate. Any one or more of the described processes can be performed in one or more chambers separated from the manufacturing systems shown in various embodiments. It will be appreciated that in system 100, further configurations of deposition chambers, etching chambers, annealing chambers, and curing chambers for dielectric films are under consideration.

[0023]

[0028] FIG. 2A shows a cross - sectional view of an exemplary processing chamber system 200 having a plasma generation region segmented within the processing chamber. During film etching (e.g., titanium nitride (TiN), tungsten - doped carbide (WDC), tantalum nitride (TaN), tungsten (W), silicon, polysilicon, silicon oxide, silicon nitride, silicon oxynitride, silicon oxycarbide, etc.), process gas can flow through gas inlet assembly 205 into the first plasma region 215. A remote plasma system (RPS) 201 may optionally be included within the system to process the first gas. Thereafter, the gas moves through gas inlet assembly 205. Inlet assembly 205 can include two or more different gas supply channels, and a second channel (not shown) can bypass RPS 201 if included.

[0024]

[0029] A pedestal 265 or substrate support is shown on which a cooling plate 203, a faceplate 217, an ion suppressor 223, a showerhead 225, and a substrate 255 are arranged, each of which may be included according to the embodiment. The pedestal 265 may have heat exchange channels through which a heat exchange fluid flows to control the temperature of the substrate. The heat exchange channels may be operated to heat and / or cool the substrate or wafer during the processing steps. The wafer support platter of the pedestal 265, which may include aluminum, ceramic, or a combination thereof, may also be resistance heated and can reach relatively high temperatures (e.g., below about 100°C to above about 1100°C) using embedded resistance heating elements.

[0025]

[0030] The faceplate 217 may be pyramidal, conical, or another similar structure, narrower at the top and widening towards the bottom. Furthermore, the faceplate 217 may be flat as shown and include multiple through-channels used to distribute the processing gas. Depending on the use of the RPS 201, the plasma generating gas and / or plasma excited species can be supplied more uniformly into the first plasma region 215 by passing through the multiple holes in the faceplate 217 shown in Figure 2B.

[0026]

[0031] An exemplary configuration may include having a gas inlet assembly 205 that opens into a gas supply region 258 separated from the first plasma region 215 by the faceplate 217, so that a gas / seed flows into the first plasma region 215 through a hole in the faceplate 217. Structural and operational features may be selected to prevent large-volume backflow of plasma from the first plasma region 215 to the supply region 258, the gas inlet assembly 205, and the fluid supply system 210. The faceplate 217 (or conductive upper part of the chamber) and the showerhead 225 are shown with an insulating ring 220 positioned between their features, thereby allowing an AC potential to be applied to the faceplate 217 relative to the showerhead 225 and / or ion suppressor 223. The insulating ring 220 can be positioned between the faceplate 217 and the showerhead 225 and / or ion suppressor 223, thereby enabling the formation of a capacitively coupled plasma (CCP) within the first plasma region. Furthermore, a baffle (not shown) can be placed within the first plasma region 215 or otherwise coupled with the gas inlet assembly 205, thereby influencing the flow of fluid into the region through the gas inlet assembly 205.

[0027]

[0032] The ion suppressor 223 may include a plate or other geometric dimensions that define a plurality of openings in the overall structure configured to allow uncharged neutral or radical species to pass through the ion suppressor 223 and enter the active gas supply region between the suppressor and the showerhead, while suppressing the diffusion of ion-charged species from the first plasma region 215. In embodiments, the ion suppressor 223 may comprise a perforated plate having various opening configurations. These uncharged species may include highly reactive species that are transported through the openings along with a less reactive carrier gas. As described above, the movement of ion species through the openings can be reduced, and in some cases, completely suppressed. By controlling the amount of ion species passing through the ion suppressor 223, it is advantageous to improve control over the gas mixture that comes into contact with the underlying wafer substrate, thereby improving control over the deposition and / or etching properties of the gas mixture. For example, by adjusting the ion concentration of the gas mixture, the etching selectivity of the gas mixture can be significantly altered. In alternative embodiments in which deposition is performed, the balance between conformal and flowable deposition on the dielectric material can also be shifted.

[0028]

[0033] Multiple openings in the ion suppressor 223 may be configured to control the passage of active gas, i.e., ionic species, radical species, and / or neutral species, through the ion suppressor 223. For example, the aspect ratio (i.e., diameter relative to length of hole) and / or shape dimensions of the holes can be controlled to reduce the flow rate of ionic charged species in the active gas passing through the ion suppressor 223. The holes in the ion suppressor 223 may include a tapered portion facing the first plasma region 215 and a cylindrical portion facing the showerhead 225. The cylindrical portion may be shaped and sized to control the flow rate of ionic species passing to the showerhead 225. As an additional means of controlling the flow rate of ionic species through the ion suppressor 223, an adjustable electrical bias may be applied to the ion suppressor 223.

[0029]

[0034] The ion suppressor 223 can function to reduce or eliminate the amount of ionically charged species that move from the plasma generation region to the substrate. Uncharged neutral species and radical species can further pass through the ion suppressor opening to react with the substrate. Note that complete elimination of ionically charged species within the reaction region around the substrate may not be achievable in all embodiments. In some cases, ionic species are intended to reach the substrate in order to carry out etching and / or deposition processes. In such cases, the ion suppressor can help control the concentration of ionic species within the reaction region to a level that is useful for the process.

[0030]

[0035] The showerhead 225, in combination with the ion suppressor 223, can prevent the plasma present in the first plasma region 215 from directly exciting the gas in the substrate processing region 233, while allowing excited species to move from the first plasma region 215 into the substrate processing region 233. In this way, the chamber can be configured to prevent the plasma from coming into contact with the substrate 255 being etched. This advantageously protects various complex structures and films patterned on the substrate. These complex structures and films can be damaged, displaced, or distorted if they come into direct contact with the generated plasma. Furthermore, if the plasma is allowed to come into contact with the substrate or approach the substrate level, the rate at which oxide species etch may increase. Therefore, if the exposed area of ​​the material is an oxide, this material can be further protected by keeping the plasma at a distance from the substrate.

[0031]

[0036] The processing system may further include a power supply 240 electrically connected to the processing chamber to generate plasma within the first plasma region 215 or processing region 233 by supplying power to the faceplate 217, ion suppressor 223, showerhead 225, and / or pedestal 265. The power supply may be configured to supply a tunable amount of power to the chamber depending on the processing being performed. Such a configuration may allow for the use of a tunable plasma in the processing being performed. Unlike remote plasma units, which are often presented with an on or off function, the tunable plasma may be configured to supply a specific amount of power to the first plasma region 215. As a result, it may be possible to develop specific plasma properties, thereby separating precursors in a specific way and enhancing the etching profiles generated by these precursors.

[0032]

[0037] Plasma can be ignited in either the first plasma region 215 above the showerhead 225 or the substrate processing region 233 below the showerhead 225. For example, plasma may be present in the chamber plasma region 215 to generate radical precursors from the influx of fluorine-containing precursors or other precursors. Typically, an AC voltage in the radio frequency (RF) range is applied between the conductive upper part of the processing chamber, such as the faceplate 217, and the showerhead 225 and / or ion suppressor 223 to ignite the plasma in the chamber plasma region 215 during deposition. The RF power supply can generate a high RF frequency of 13.56 MHz, but other frequencies can be generated either alone or in combination with the 13.56 MHz frequency.

[0033]

[0038] Figure 2B shows a detailed diagram 253 of features that affect the distribution of the process gas through the faceplate 217. As shown in Figures 2A and 2B, the faceplate 217, cooling plate 203, and gas inlet assembly 205 intersect to define a gas supply region 258. The process gas can be supplied to the gas supply region 258 from the gas inlet assembly 205. The gas fills the gas supply region 258 and can flow through openings 259 in the faceplate 217 to the first plasma region 215. The openings 259 may be configured to guide the flow substantially in one direction. This allows the process gas to flow into the process region 233, but partially or completely prevents backflow into the gas supply region 258 after crossing the faceplate 217.

[0034]

[0039] A gas distribution assembly, such as a showerhead 225 for use in the processing chamber system 200, is called a dual-channel showerhead (DCSH) and is described in more detail in the embodiment shown in Figure 3. The dual showerhead allows for the separation of the etching solution outside the processing area 233 and provides an etching process that results in limited interaction with the chamber components and each other before being sent into the processing area.

[0035]

[0040] The showerhead 225 may include an upper plate 214 and a lower plate 216. The plates can be connected to define a space 218 between them. By connecting the plates, a first fluid channel 219 can be provided through the upper and lower plates, and a second fluid channel 221 can be provided through the lower plate 216. The formed channels may be configured to provide fluid access from the space 218 through the lower plate 216 only, through the second fluid channel 221, and the first fluid channel 219 may be fluidically isolated from the space 218 between the plates and the second fluid channel 221. The space 218 may be fluidically accessible through the sides of the showerhead 225.

[0036]

[0041] Figure 3 is a bottom view of a showerhead 325 for use in a processing chamber according to an embodiment. The showerhead 325 may correspond to the showerhead shown in Figure 2A. The through-holes 365, shown in the figure of the first fluid channel 219, may have multiple shapes and configurations to control and influence the flow of precursor through the showerhead 225. The small holes 375, shown in the figure of the second fluid channel 221, are distributed almost evenly on the surface of the showerhead, even between the through-holes 365. Compared to other configurations, these small holes 375 may help to result in a more uniform mixing as the precursor flows out of the showerhead.

[0037]

[0042] The chamber described above may be used when performing exemplary methods, including etching methods. Figure 4 shows exemplary steps of Method 400 according to an embodiment of the Art. Method 400 may include one or more steps, including front-end processing, deposition, gate formation, etching, polishing, cleaning, or any other steps that may be performed before the described steps, prior to the commencement of the Method. The Method may include a number of arbitrary steps, some of which may or may not be particularly relevant to certain embodiments of the Method relating to the Art. For example, many of the steps are described to provide a broader range of processes to be performed, but are not essential to the Art, or can be performed by alternative methods, as will be further described below. Method 400 may describe steps schematically shown in Figures 5A-5B. Its examples will be described in conjunction with the steps of Method 400. The figures show only partial schematics, and it should be understood that the substrate may include any number of additional materials and features having various properties and characteristics as shown in the figures.

[0038]

[0043] Method 400 may or may not include optional operations for developing the semiconductor structure into a specific manufacturing operation. It should be understood that Method 400 can be performed on any number of semiconductor structures or substrates 505, including exemplary structures on which the metal-containing hard mask removal step can be performed, as shown in Figure 5A. The exemplary semiconductor structure may include trenches, vias, or other concave features that may contain one or more exposed materials. For example, the exemplary substrate may include silicon or some other semiconductor substrate material and an interlayer dielectric material that can form recesses, trenches, vias, or insulating structures. The exposed material at any time during the etching process may be or include metallic materials for gates, dielectric materials, contact materials, transistor materials, or any other materials that can be used in the semiconductor process. As shown in Figure 5A, in some embodiments, the exemplary structure 500 may include a metal-containing region 510, such as a tungsten-containing material, extending into the substrate 505. The aluminum-containing material 515 may cover a portion of the substrate 505. Low dielectric constant materials 520, characterized by a dielectric constant of about 4.0 or less, such as silicon oxide, may extend from aluminum-containing materials 515. In embodiments, low dielectric constant materials 520 are characterized by a dielectric constant of about 3.9 or less, and may be about 3.8 or less, about 3.7 or less, about 3.6 or less, about 3.5 or less, about 3.0 or less, about 2.5 or less, or less. Metal-containing hard mask materials 525, such as titanium nitride (TiN) or tungsten-doped carbides (WDC), may cover the low dielectric constant materials 520. Other metal-containing hard mask materials 525 may be tungsten, molybdenum, or tantalum, including nitrides, oxides, carbides, and their silicon compounds, or may include these. The metal-containing hard mask material 525 may be exposed to one or more other materials containing the metal-containing material, dielectric materials containing silicon oxide or silicon nitride, or any number of other semiconductor materials (e.g., aluminum oxide and any other materials) from which the metal-containing hard mask material 525 should be removed.

[0039]

[0044] The structures described are not intended to be limiting and should be understood to encompass any other semiconductor structures, including metal-containing hard mask materials such as titanium-containing hard mask materials. This technique allows for the selective removal of metal-containing hard mask materials from other exposed materials, such as silicon-containing materials (e.g., amorphous, polycrystalline, or epitaxial), silicon and germanium-containing materials, other metal-containing materials (e.g., non-hard mask metal-containing materials or metal and oxygen-containing materials), oxides and nitrides including high dielectric constant oxides, and any other materials described elsewhere. Other exemplary structures may include two-dimensional and three-dimensional structures common in semiconductor manufacturing, within which metal-containing hard mask materials, such as titanium-containing hard mask materials (e.g., titanium nitride (TiN) or tungsten-doped carbides (WDC)), are removed from one or more other materials. In addition, while high aspect ratio structures can benefit from this technique, it may be equally applicable to lower aspect ratios and any other structures.

[0040]

[0045] For example, the material layers of this technology may be characterized by any aspect ratio or height-to-width ratio of the structure, but in some embodiments, the material may be characterized by a larger aspect ratio, which may not allow sufficient etching using the prior art or methods. For example, in some embodiments, the aspect ratio of any layer of the exemplary structure may be about 10:1 or greater, about 20:1 or greater, about 30:1 or greater, about 40:1 or greater, about 50:1 or greater, or greater. In addition, each layer may be characterized by a reduced width or thickness of less than about 100 nm, less than about 80 nm, less than about 60 nm, less than about 50 nm, less than about 40 nm, less than about 30 nm, less than about 20 nm, less than about 10 nm, less than about 5 nm, less than about 1 nm, or less, where the reduced width or thickness includes any fraction of any of the above values, for example, 20.5 nm, 1.5 nm, etc. The above combination of a high aspect ratio and minimal thickness can interfere with many conventional etching processes, or may require substantially longer etching times to remove layers in a limited width along vertical or horizontal distances. Furthermore, damage to or removal of other exposed layers can occur even with conventional techniques.

[0041]

[0046] In embodiments of the present technology, Method 400 may be performed to remove exposed metal-containing hard mask material, such as titanium-containing material, in any number of structures. The Method may include specific steps for removing the metal-containing hard mask material, and may include one or more optional steps for preparing or treating the metal-containing hard mask material or other exposed material prior to the removal of the metal-containing hard mask material. For example, an exemplary substrate structure containing titanium-containing material may have prior processing residues on the film to be removed, such as titanium nitride (TiN) or tungsten-doped carbide (WDC). For example, residual photoresist or by-products from a prior processing may be present on the titanium nitride (TiN) or tungsten-doped carbide (WDC) layer. These materials may interfere with access to the titanium nitride (TiN) or tungsten-doped carbide (WDC), or may interact with the etchant differently than a clean titanium nitride (TiN) or tungsten-doped carbide (WDC) surface, potentially interfering with one or more aspects of etching. Therefore, in some embodiments, optional pretreatment of the titanium-containing film or titanium-containing material may be performed in optional step 405. Exemplary pretreatment steps may include, for example, heat treatment, wet treatment, or plasma treatment, which can be performed in the chamber system 200 and any number of chambers that may be included in the system 100 described above. Method 400 may include one or more pretreatment steps in optional step 405.

[0042]

[0047] In some pretreatment steps in optional step 405, a passivation material may be formed on the substrate 505. For example, thermal oxidation may be performed. Thermal oxidation may include providing one or more pre-etching precursors, such as an oxygen-containing precursor (e.g., diatomic oxygen (O2)), to the processing area. The substrate 505 may come into contact with the oxygen-containing precursor. This contact may cause a portion of the exposed metallic material (e.g., a metal-containing region 510) to be oxidized. The oxidized portion of the exposed metallic material, e.g., the metal-containing region 510, may play a role in passivating the metal-containing region 510 during the subsequent etching of the metal-containing hard mask material 525. Additionally or alternatively, optional step 405 may include a selective deposition step for depositing a passivation material on one or more exposed surfaces of the substrate 505. The pre-etching precursor may include one or more deposition precursors, which may be provided to the processing area and come into contact with the substrate 505. In embodiments, depending on the passivation material to be deposited, a silicon-containing precursor may be supplied to the processing area. For example, silicon-containing materials such as silicon can be deposited on the substrate 505.

[0043]

[0048] In an optional additional pretreatment step 405, oxygen-containing materials, such as oxidized portions of the metal-containing hard mask material 525, may be removed from the substrate 505. The oxidized portions of the metal-containing hard mask material 525 may be surface oxides that may be present due to exposure to ambient conditions. Removing the oxidized portions of the metal-containing hard mask material 525 may involve providing one or more pre-etching precursors, such as a fluorine-containing precursor, a chlorine-containing precursor, and / or a hydrogen-containing precursor, to the treatment area. The precursors may be, for example, nitrogen trifluoride (NF3) and diatomic hydrogen (H2), tungsten hexafluoride (WF6), and / or boron trichloride (BCl3). The pretreatment step may then involve contacting the substrate with the pre-etching precursor to remove oxygen-containing materials, such as oxidized portions of the metal-containing hard mask material 525. This removal may then allow the metal-containing hard mask material 525 to be removed during subsequent etching.

[0044]

[0049] In some embodiments, plasma emissions may be formed from a pre-etching precursor. Remote or local plasmas may be developed from a pre-etching precursor intended to interact with the residue in one or more ways. For example, either remote or local plasmas can be generated from one or more pre-etching precursors using a chamber such as the chamber system 200 described above. The plasma emissions may flow onto the substrate and come into contact with the residue material. The plasma emissions may be formed at relatively low plasma power levels to minimize damage to low dielectric constant materials on the substrate 505. For example, the plasma emissions may be formed at about 500 W or less, about 450 W or less, about 400 W or less, about 350 W or less, about 300 W or less, about 250 W or less, about 200 W or less, about 150 W or less, about 100 W or less, about 50 W or less, or less. In plasma-enhanced embodiments, the duration may be controlled to minimize damage to other materials on the substrate 505. For example, incorporation may proceed in about 45 seconds or less, about 40 seconds or less, about 35 seconds or less, about 30 seconds or less, about 25 seconds or less, about 20 seconds or less, about 15 seconds or less, about 10 seconds or less, about 5 seconds or less, or less. After the duration of contact, the plasma dissipates and the precursor / by-product is purged from the processing area. In some embodiments, plasma emissions may be formed, but the pretreatment step in the optional step 405 may also be performed plasma-free to minimize damage to the substrate 505.

[0045]

[0050] Method 400 may include, in step 410, introducing an etchant precursor into a substrate processing region of a semiconductor processing chamber housing the described substrate or any other substrate. The etchant precursor may be introduced after the supply of a pre-etching precursor provided in an optional step 405 has been stopped. The etchant precursor may be introduced through a remote plasma region of the processing chamber, such as the region 215 described above, but in some embodiments, Method 400 may not utilize plasma emissions during the etching operation. For example, Method 400 may introduce the etchant precursor into the processing region and the substrate 505 without exposing the precursor to plasma, thereby performing the removal of the metal-containing hard mask material without generating plasma emissions. The etchant precursor may come into contact with the substrate 505, including the exposed region of the metal-containing hard mask material 525, generating a halogenated material that may remain on the substrate 505 or may volatilize. In some embodiments, the halogen-containing precursor may donate one or more halogen atoms while accepting one or more nitrogen atoms. Some halogen-containing precursors can provide halogen radicals, while other plasma radicals can accept nitrogen from the film. Therefore, the etchant precursor can etch or remove the metal-containing hard mask material in step 415, as shown in Figure 5B.

[0046]

[0051] As described above, the technology can be performed without plasma development during etching steps 410-415. Plasma-free removal can be achieved by using specific precursors and performing etching under specific process conditions, and such removal may be dry etching. Therefore, the technology according to embodiments of the technology can be performed to remove metal-containing hard mask materials 525, such as titanium nitride (TiN) or tungsten-doped carbides (WDC), from narrow features, high aspect ratio features, and thin dimensions that may not be suitable for wet etching. Optional steps may be performed to remove residue from the substrate or chamber, and may further include post-treatment in any step 420. Post-treatment may include steps similar to those of the pre-treatment, and may include any of the precursors or steps described above for the pre-treatment. In some embodiments, post-treatment can remove residual etchant materials such as fluorine or chlorine from the substrate 505 or semiconductor processing chamber. The pre-treatment and / or post-treatment steps may include plasma generation and the supply of plasma exhaust to the substrate, but it should be understood that plasma does not need to be formed during the etching steps 410-415. For example, in some embodiments, plasma may not be generated while the etchant precursor or precursor is being delivered into the processing chamber.

[0047]

[0052] The etchant precursor in etching steps 410-415 may include halogen-containing precursors, and in some embodiments, may include one or more of fluorine or chlorine. Specific precursors may be based on the bonding or stability of the precursor. Exemplary etchant precursors may include nitrogen trifluoride (NF3), and halogen-containing precursors such as other fluorine-containing or chlorine-containing precursors. Other etchant precursors may include diatomic fluorine (F2), diatomic chlorine (Cl2), thionyl chloride (SOCl2), carbon tetrafluoride (CF4), hexafluoroethane (C2F6), sulfur hexafluoride (SF6), carbon tetrachloride (CCl4), dichloromethane (CH2Cl2), chloroform (CHCl3), or combinations thereof. The etchant may be flowed together with various other precursors. In some embodiments, in addition to the etchant precursor, a secondary precursor may be supplied to increase selectivity and / or etching rate. The secondary precursor may be or include a hydrogen-containing precursor such as a hydrocarbon, or an oxygen-containing precursor. Exemplary secondary precursors may be, for example, amines such as diatomic hydrogen (H2), methane (CH4), ammonia (NH3), and / or diatomic oxygen (O2). The etchant precursor and / or secondary precursor may also be provided with any number of carrier gases, which may include nitrogen, helium, argon, or other rare, inert, or useful precursors. The carrier gas plays a role in diluting the etchant precursor and can not only partition the etchant precursor but also control the etching rate.

[0048]

[0053] Secondary precursors may help to limit or reduce the etching or etching rate of other exposed regions on the substrate, such as the metal-containing region 510. For example, the etchant precursor and secondary precursor may interact with both the metal-containing hard mask material 525 and the metal-containing region 510. In the absence of a secondary precursor, which can be a protective gas, etching may initiate etching of the metal-containing material in addition to the metal-containing hard mask material 525. However, by incorporating a secondary precursor, the secondary precursor molecules may occupy one or more surface areas along the metal-containing region 510 to form NH bonds and / or WH bonds in the tungsten metal-containing region scenario, thereby reducing the etching rate. For example, fluorine or other halogens may continue to bond with the metal-containing region 510 at discrete locations, but these locations may be at least partially blocked by the secondary precursor. Exemplary metals such as molybdenum or tungsten may not have a one-to-one removal property with fluorine or other halogens, and instead, three, four, or six fluorine or other halogen atoms may be incorporated before the removal of the metal atoms. Therefore, by utilizing protective secondary precursors, these interactions between fluorine and metal can be controlled, reduced, or limited, thereby facilitating control of the etching rate.

[0049]

[0054] However, as the flow rate ratio of the secondary precursor increases relative to the etchant precursor, the etching rate may continue to decrease, eventually causing the secondary precursor molecules to interrupt the etching process at each location on the substrate 505, preventing further etching of the metal-containing hard mask material 525. Therefore, in some embodiments, the flow rate ratio of the etchant precursor to the secondary precursor can be maintained at about 2:1 or less, thereby ensuring that the etching of the metal-containing hard mask material 525 progresses without etching other materials on the substrate 505. For example, the flow rate ratio of the etchant precursor to the secondary precursor can be maintained at about 1.9:1 or less, about 1.8:1 or less, about 1.7:1 or less, about 1.6:1 or less, about 1.5:1 or less, about 1.4:1 or less, about 1.3:1 or less, about 1.2:1 or less, about 1.1:1 or less, about 1.0:1 or less, about 0.9:1 or less, about 1.8 or less, or about 0.7:1 or less. In addition, a first flow rate ratio may be used and may be adjusted as the etching process progresses, as the etching process moves to a second flow rate ratio different from the first. Any of the ratios described, or any ratio within the enumerated range, may be used as either the first or second flow rate ratio in some embodiments of the flow process.

[0050]

[0055] As a non-limiting example, while the substrate 505 is in contact with the etchant precursor in step 415, nitrogen trifluoride (NF3) can readily donate fluorine atoms or two and / or nitrogen atoms at high temperatures, and can accept nitrogen atoms such as titanium nitride (TiN) or tungsten-doped carbides (WDC), which can be maintained in the gas phase. Thus, metal-containing materials such as titanium-containing materials can be developed as reaction byproducts, which may be gaseous molecules and may be pumped or removed from the processing chamber. For example, if the metal-containing hard mask material 525 is titanium nitride, fluorine from the etchant precursor can combine with the titanium nitride to form titanium tetrafluoride (TiF4), titanium(III) fluoride (TiF3), titanium oxyfluoride (TiOF2), or any other titanium-containing material. In addition, nitrogen-containing materials may be developed as reaction byproducts, which may be gaseous molecules and may be pumped or removed from the processing chamber. For example, nitrogen from titanium nitride can form stable by-products such as diatomic nitrogen (N2), nitrous oxide (N2O), or nitrogen dioxide (NO2). Therefore, this process can remove titanium nitride or other metal-containing hard mask materials 525 under treatment conditions configured to exchange fluorine and nitrogen between the etchant precursor and the metal-containing hard mask material 525, thereby generating volatile by-products. Because the supply and treatment are controlled, the fluorine-containing materials, other etchant precursors and / or secondary precursors may not etch other exposed surfaces or may interact with other exposed surfaces minimally, allowing for the easy removal of metal-containing hard mask materials 525 such as titanium nitride (TiN) or tungsten-doped carbides (WDC), potentially resulting in improved selectivity compared to conventional techniques.

[0051]

[0056] Processing conditions can affect and facilitate etching by this technique. Since the etching reaction can proceed based on the thermal dissociation of halogens from the etchant precursor, the temperature can at least partially depend on the specific halogen and / or other atoms of the etchant precursor to initiate the dissociation. When the temperature rises above about 250°C, etching may occur or begin to increase, which may indicate the dissociation of the precursor and / or activation of the reaction with titanium nitride (TiN) or tungsten-doped carbides (WDC). If the temperature continues to rise, the dissociation may be further accelerated, as may the reaction with the metal-containing hard mask material 525. Accordingly, in some embodiments of the present technology, the etching method can be performed at substrate, pedestal, and / or chamber temperatures of about 350°C or higher, about 375°C or higher, about 400°C or higher, about 425°C or higher, about 410°C or higher, about 400°C or higher, about 390°C or higher, about 450°C or higher, about 475°C or higher, about 500°C or higher, about 525°C or higher, or above. The temperature can be further maintained within these ranges, a narrower range included within these ranges, or any temperature between any of these ranges. In some embodiments, the method can be performed on a substrate which may have several generated features, thereby generating a thermal budget. In embodiments, higher temperatures may increase the etching of the metal-containing hard mask material 525. Accordingly, in some embodiments, the method can be performed at temperatures of about 650°C or lower, about 600°C or lower, about 575°C or lower, about 550°C or lower, about 525°C or lower, about 500°C or lower, about 475°C or lower, or below.

[0052]

[0057] The pressure inside the chamber can also affect not only the process being performed, but also the temperature at which the etchant precursor can dissociate, for example, at what temperature sulfur, oxygen, and chlorine can dissociate when thionyl chloride (SOCl2) is used as the etchant precursor. Therefore, in some embodiments, the pressure can be maintained at a pressure of about 0.5 Torr or higher, about 1 Torr or higher, about 2 Torr or higher, about 3 Torr or higher, about 4 Torr or higher, about 5 Torr or higher, about 6 Torr or higher, about 7 Torr or higher, about 8 Torr or higher, about 9 Torr or higher, about 10 Torr or higher, about 15 Torr or higher, about 20 Torr or higher, about 30 Torr or higher, about 40 Torr or higher, about 50 Torr or higher, about 60 Torr or higher, or higher. In addition, the pressure can be maintained at or below approximately 60 Torr, 50 Torr, 40 Torr, 30 Torr, 25 Torr, 20 Torr, 15 Torr, 10 Torr, 9 Torr, 8 Torr, 7 Torr, 6 Torr, 5 Torr, or lower. The pressure can be further maintained within these ranges, a narrower range included within these ranges, or any pressure between any of these ranges. In some embodiments, as the pressure increases above approximately 0.5 Torr, the amount of etching can be accelerated and initiated. In addition, as the pressure continues to increase, etching can be improved to a point before it begins to decrease, and can eventually stop as the pressure continues to increase. Although not bound by any particular theory, the pressure in the chamber can affect the processing by the precursor described above. At low pressures, flow across the substrate can be reduced, and dissociation can be reduced as well. As the pressure increases, the interaction between the etchant precursor and the substrate can be increased, which can raise the reaction and etching rates. However, if the pressure continues to rise, the relative stability of the molecules may increase the recombination of dissociated etchant precursor atoms. Therefore, the precursor can be efficiently pumped back out of the chamber without reacting with the substrate.Furthermore, as the pressure continues to rise, interaction with the metal-containing hard mask material 525 can be suppressed, or by-product materials can be reintroduced into the etched film, further limiting their removal. Accordingly, in some embodiments, the pressure in the processing chamber can be maintained at about 30 Torr or less.

[0053]

[0058] By performing the process according to the embodiment of this technology, a metal-containing hard mask material 525, such as titanium nitride (TiN), other titanium-containing materials, or tungsten-doped carbide (WDC), can be selectively etched against other materials containing other oxides or nitrides. For example, this technology can selectively etch the metal-containing hard mask material 525 against exposed regions of metals, dielectrics containing silicon-containing materials including silicon oxide, or other materials. Embodiments of this technology can etch the metal-containing hard mask material 525 with respect to silicon oxide or any other material in a ratio of at least about 2:1, and can etch the metal-containing hard mask material 525 with respect to silicon oxide or other material with selectivity of about 3:1 or more, about 4:1 or more, about 5:1 or more, about 6:1 or more, about 7:1 or more, about 8:1 or more, about 9:1 or more, about 10:1 or more, about 15:1 or more, about 20:1 or more, about 25:1 or more, about 30:1 or more, about 35:1 or more, about 40:1 or more, about 45:1 or more, about 50:1 or more, or higher. For example, etching performed according to some embodiments of this technology can etch the metal-containing hard mask material 525 while substantially or essentially maintaining respect to silicon oxide or other material (e.g., nitrides or oxides of silicon, aluminum, or hafnium), metals such as tungsten or molybdenum, or materials such as polysilicon).

[0054]

[0059] In embodiments, an optional step 425 of method 400 may include contacting the substrate with a second etchant precursor, such as a post-etching precursor, to remove fluorine-containing residue from the oxidized portions of the substrate and / or metal-containing hard mask material 525. The supply of the etchant precursor provided in step 410 may be stopped before flowing the second etchant precursor. Fluorine-containing residue may be present on any exposed surface of the material on the substrate 505. The oxidized portions of the metal-containing hard mask material 525 may be due to a secondary precursor that oxidizes the metal-containing hard mask material 525 during etching. The second etchant precursor may be a halogen-containing precursor or any of the precursors described above in relation to step 410. One exemplary second etchant precursor may be boron trichloride (BCl3). The second etchant precursor is supplied to the processing area, contacts the substrate 505, and can remove fluorine-containing residue from the oxidized portions of the substrate and / or metal-containing hard mask material 525.

[0055]

[0060] In embodiments, method 400 may include repeating steps 410-420, which relate to etching the metal-containing hard mask material 525, in step 425 in order to remove fluorine-containing residues from the substrate and / or oxidized portions of the metal-containing hard mask material 525. By repeating steps 410-420 and 425, the metal-containing hard mask material 525 can be removed while minimizing / eliminating any fluorine-containing residues and / or oxidized portions of the metal-containing hard mask material 525, allowing the etching to proceed.

[0056]

[0061] Each step of Method 400 may be performed in a single processing area of ​​a single semiconductor processing chamber. However, to increase throughput, it is also conceivable that the substrate 505 may be transferred between various processing areas. For example, step 405 may be performed in a first processing area of ​​a first semiconductor processing chamber, and steps 410-425 may be performed in a second processing area of ​​a second semiconductor processing chamber. In a further embodiment, steps 410-420 may be performed in a second processing area of ​​a second semiconductor processing chamber, and step 425 may be performed in a third processing area of ​​a third semiconductor processing chamber.

[0057]

[0062] Selectivity may depend in part on the precursor used and its ability to dissociate over a more controlled temperature range. Conventional techniques may not be able to produce the etching selectivity of the embodiments of this technique. Similarly, because wet etchants readily remove silicon oxide, wet etchants may also not be able to selectively etch at a rate comparable to that of the embodiments of this technique. The aforementioned method may enable the removal of metal-containing hard mask materials, such as titanium-containing materials, from many other exposed materials. By utilizing the etchant under the aforementioned operating conditions, improved etching of metal-containing hard mask materials, such as titanium nitride (TiN) or tungsten-doped carbides (WDC), can be achieved, which not only increases selectivity compared to conventional techniques but also improves etching access at small-pitch features.

[0058]

[0063] The above description provides numerous details for illustrative purposes to facilitate understanding of various embodiments of this technology. However, it will be apparent to those skilled in the art that certain embodiments can be implemented without some of these details, or with additional details.

[0059]

[0064] While several embodiments have been disclosed, those skilled in the art will recognize that various modifications, alternative structures, and equivalents can be used without departing from the spirit of the embodiments. Furthermore, some well-known processes and elements have not been described in order to avoid unnecessarily obscuring the Art. Therefore, the above description should not be considered to limit the scope of the Art. Moreover, while methods or processes may be described sequentially or stepwise, it should be understood that steps may be performed simultaneously or in a different order than described.

[0060]

[0065] Where a range of values ​​is provided, unless explicitly stated otherwise in the context, each intervening value between the upper and lower limits of that range is understood to be specifically disclosed down to the smallest unit of the lower limit. Any narrow range between any listed or unlisted intervening values ​​within the stated range, and any other listed or intervening values ​​within that stated range, are also included. The upper and lower limits of such narrower ranges may be individually included in or excluded from that range. Each range in which either or both limit values ​​are included in a narrower range, or neither is included in a narrower range, is further included in this art, provided that any limit values ​​are specifically excluded from the stated range. Where a stated range includes one or both limit values, ranges excluding either or both of these included limit values ​​are also included.

[0061]

[0066] As used herein and in the claims, the singular forms “a,” “an,” and “the” include multiple references unless the context clearly indicates otherwise. Thus, for example, a reference to “precursor” includes a reference to multiple such precursors, and a reference to “material” includes one or more materials, as well as their equivalents known to those skilled in the art, and so on.

[0062]

[0067] Furthermore, the terms “comprise(s),” “comprising,” “contain(s),” “containing,” “include(s),” and “including,” as used herein and in the claims, are intended to identify the presence of the described features, integers, components, or actions, but not to exclude the presence or addition of one or more other features, integers, components, actions, or groups.

Claims

1. A semiconductor processing method, The method involves introducing an etchant precursor into a processing area of ​​a semiconductor processing chamber, wherein a substrate is housed within the processing area, and the substrate defines an exposed area of ​​a metal-containing hard mask material and an exposed area of ​​a material characterized by a dielectric constant of approximately 4.0 or less, by introducing the etchant precursor. Bringing the substrate and the etchant precursor into contact, To remove at least a portion of the metal-containing hard mask material. A semiconductor processing method including [specific components].

2. The semiconductor processing method according to claim 1, wherein the etchant precursor includes a halogen-containing precursor.

3. The etchant precursor is nitrogen trifluoride (NF ３ ), difluorine (F ２ ), dichlorine (Cl ２ ), thionyl chloride (SOCl ２ ), carbon tetrafluoride (CF ４ ), hexafluoroethane (C ２ F ６ ), sulfur hexafluoride (SF ６ ), carbon tetrachloride (CCl ４ ), dichloromethane (CH ２ Cl ２ ), chloroform (CHCl ３ ), or a combination thereof, the semiconductor processing method according to claim 1.

4. The etchant precursor is nitrogen trifluoride (NF ３ The semiconductor processing method according to claim 1, including ).

5. A hydrogen-containing precursor or an oxygen-containing precursor is flowed together with the etchant precursor into the processing area of ​​the semiconductor processing chamber. The semiconductor processing method according to claim 1, further comprising:

6. The semiconductor processing method according to claim 1, wherein the removal of the portion of the metal-containing hard mask material is performed in a plasma-free manner.

7. The semiconductor processing method according to claim 1, wherein the removal of the portion of the metal-containing hard mask material is performed at a temperature of approximately 350°C or higher.

8. The semiconductor processing method according to claim 1, wherein the removal of the portion of the metal-containing hard mask material is performed at a pressure of about 2 Torr or more.

9. Before introducing the etchant precursor into the processing area of ​​the semiconductor processing chamber, the oxidized portion of the metal-containing hard mask material is removed. The semiconductor processing method according to claim 1, further comprising:

10. After removing the portion of the metal-containing hard mask material, the substrate and the second etchant precursor are brought into contact to remove fluorine-containing residue from the oxidized portion of the substrate or the metal-containing hard mask material. The semiconductor processing method according to claim 1, further comprising:

11. A semiconductor processing method, The method involves introducing a pre-etching precursor into a processing area of ​​a semiconductor processing chamber, wherein a substrate is housed within the processing area, and the substrate is divided into an exposed area of ​​a metal-containing hard mask material and an exposed area of ​​a material characterized by a dielectric constant of approximately 4.0 or less. Bringing the substrate and the pre-etching precursor into contact, The supply of the aforementioned pre-etching precursor is to be stopped, The process involves introducing the etchant precursor into the processing area of ​​the semiconductor processing chamber, Bringing the substrate and the etchant precursor into contact, To the material characterized by a dielectric constant of approximately 4.0 or less, at least a portion of the metal-containing hard mask material is selectively removed. A semiconductor processing method including [specific components].

12. The aforementioned pre-etching precursor is nitrogen trifluoride (NF ３ ), tungsten hexafluoride (WF ６ ), or boron trichloride (BCl ３ The semiconductor processing method according to claim 11, including ).

13. Forming plasma emissions of the pre-etching precursor. The semiconductor processing method according to claim 11, further comprising:

14. The etchant precursor is nitrogen trifluoride (NF ３ ), diatomic fluorine (F ２ ), diatomic chlorine (Cl ２ ), thionyl chloride (SOCl ２ ), carbon tetrafluoride (CF ４ ), hexafluoroethane (C ２ F ６ ), sulfur hexafluoride (SF ６ ), carbon tetrachloride (CCl ４ ), dichloromethane (CH ２ Cl ２ ), chloroform (CHCl ３ The semiconductor processing method according to claim 11, which includes, or a combination thereof.

15. The semiconductor processing method according to claim 11, wherein the removal of the portion of the metal-containing hard mask material is performed in a plasma-free manner.

16. The substrate includes an exposed region of a metal material, and the method is The metal material is oxidized before the pre-etching precursor is introduced into the processing area of ​​the semiconductor processing chamber. The semiconductor processing method according to claim 11, further comprising:

17. A semiconductor processing method, The process involves introducing an etchant precursor into a processing area of ​​a semiconductor processing chamber, wherein a substrate is housed within the processing area, and the substrate defines the exposed area of ​​a metal-containing hard mask material, and the introduction of the etchant precursor is such that Bringing the substrate and the etchant precursor into contact, Removing at least a portion of the metal-containing hard mask material from one or more other materials on the substrate, The supply of the etchant precursor is stopped, The process involves introducing a post-etching precursor into the processing region of the semiconductor processing chamber, Bringing the substrate and the post-etching precursor into contact, To remove fluorine-containing residue from the oxidized portion of the substrate or the metal-containing hard mask material. A semiconductor processing method, including the following.

18. The semiconductor processing method according to claim 17, wherein the etchant precursor includes a halogen-containing precursor.

19. The semiconductor processing method according to claim 18, wherein the one or more other materials on the substrate include a dielectric constant of about 4.0 or less, a metallic material, a silicon-containing material, or a metal and oxygen-containing material.

20. The semiconductor processing method according to claim 17, wherein the removal of the portion of the metal-containing hard mask material is carried out at a temperature of about 350°C or higher and a pressure of about 2 Torr or higher.

21. The semiconductor processing method according to claim 1, wherein the metal-containing hard mask material is a titanium-containing hard mask material.

22. The semiconductor processing method according to claim 1, wherein the metal-containing hard mask material includes a doped carbide.

Images