Frequency multiplexer suitable for quantum computing
A compact frequency multiplexer using superconducting junctions and filtering sections addresses the size and integration issues of conventional multiplexers, enabling efficient signal filtering and power handling for quantum computing applications.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- QET SWEDEN AB
- Filing Date
- 2024-04-18
- Publication Date
- 2026-05-13
AI Technical Summary
Conventional multiplexers are large and lossy, making them unsuitable for integration with dilution refrigerators in quantum computing applications, and are difficult to attach due to size constraints.
A compact frequency multiplexer design using superconducting junctions and filtering sections, including high-pass, low-pass, band-pass, and band-stop filters, with adjustable inductance and filtering characteristics, allowing integration on a chip with other components and efficient power handling.
The compact multiplexer design enables integration with quantum computing devices, providing efficient signal filtering and power handling capabilities, suitable for quantum computing environments.
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Figure 2026514822000001_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to a frequency multiplexer, an amplifier configuration, and a computer-implemented method for determining a circuit of a frequency multiplexer.
[0002] Background Art In the field of microwave engineering, multiplexers are utilized as combinational circuits for splitting or combining radio frequency signals.
[0003] Conventional multiplexers used in the current technology are generally very large and may be very lossy. This can be a problem when multiplexers are used in quantum computing applications. Specifically, this is the case when they are placed inside a dilution refrigerator. Currently, it is difficult to attach multiple current technology multiplexers to a dilution refrigerator.
[0004] Therefore, it would be desirable for current technology multiplexers to be smaller / more compact while operating according to requirements.
[0005] Summary of the Invention Therefore, an object of the present disclosure is to mitigate at least some of the above-mentioned drawbacks by providing a more compact frequency multiplexer and amplifier configuration while operating according to requirements. Furthermore, a method for efficiently determining a circuit is provided.
[0006] This object and other objects that will become apparent hereinafter are achieved by the frequency multiplexer, amplifier configuration, and method recited in the appended claims.
[0007] This disclosure relates to a frequency multiplexer suitable for quantum computing, comprising a first port (also called a common port) and a plurality of second ports, each second port associated with a specific frequency band. Furthermore, the frequency multiplexer comprises a plurality of signal filtering sections connecting each second port to the first port, each signal filtering section being one of a high-pass signal filtering section, a low-pass signal filtering section, a band-pass signal filtering section, and a band-stop signal filtering section. Each signal filtering section comprises a chain of superconducting junctions (at least two chains), each chain configured to function as an inductance element for each filtering section.
[0008] In some aspects of this specification, each low-pass signal filtering section includes a plurality of adjacent chains of superconducting junctions, each of which is separated by a node, each node is connected to a shunt capacitor, and the shunt capacitor is connected to an earth terminal.
[0009] Furthermore, each high-pass signal filtering section may, in some embodiments, include multiple adjacent capacitors, each of which is isolated by a node, each node connected to a shunt chain of superconducting junctions, and the shunt chain connected to an earth terminal.
[0010] Furthermore, in some embodiments, each bandpass signal filtering section may include multiple pairs of series-connected capacitors and superconducting junction chains (i.e., each pair includes a capacitor connected to one superconducting junction chain / multiple chains of superconducting junctions), adjacent pairs being separated by nodes, each node including a shunt connection. Each shunt connection comprises a capacitor connected in parallel to the chain of superconducting junctions, and the shunt connection is connected to an earth terminal.
[0011] Furthermore, in some embodiments, each bandstop signal filtering section may include a plurality of series-connected parallel connections, each parallel connection including a capacitor connected in parallel to a chain of superconducting junctions, each adjacent parallel connection being separated by a node, each node including a shunt connection including a pair of series-connected capacitors and a chain of superconducting junctions.
[0012] An advantage of the frequency multiplexer of this disclosure is that it is more compact than conventional frequency multiplexers, i.e., it has a smaller design. The frequency multiplexer of this specification can be mounted on the same substrate / chip as other components. Furthermore, even if the power handling capacity of the multiplexer is limited by the critical current of the junction, it can operate with a power handling capacity that is sufficiently large for quantum computing.
[0013] It should be noted that the circuit of a frequency multiplexer can be modified based on its specific purpose. Therefore, the type and number of signal filtering sections can be changed. The number of ports can also be changed. The ports may be input / output ports. The superconducting junction may be a Josephson junction or any other suitable combination of junctions.
[0014] The term "superconducting junction chain" can refer to a series of superconducting junctions or a single superconducting junction.
[0015] The frequency multiplexers described herein may also be referred to as on-chip frequency multiplexers.
[0016] In some aspects of the present disclosure, at least one of the superconducting junctions of at least one chain of the signal filtering portion includes a superconducting loop.
[0017] The advantage of this is that it provides a junction with adjustable inductance.
[0018] Each signal filtering section may include a predetermined number of chains, each chain having a predetermined number of superconducting junctions. Each chain may be configured to a predetermined critical current to obtain a predetermined inductance, thereby enabling each signal filtering section to transmit signals of a specific frequency and reject other signals.
[0019] A predetermined number of junctions and each predetermined critical current may be arranged to match the inductance value of each signal filtering section, where each inductance value indicates the filtering characteristics of the signal filtering section. The filtering characteristics may refer to a specific frequency configured for each signal filtering section.
[0020] Each signal filtering section includes multiple superconducting junctions, and each chain includes at least one superconducting junction (i.e., in some embodiments of this specification, a chain may refer to a single junction). In some embodiments, each chain includes multiple superconducting junctions.
[0021] This disclosure further provides an amplifier configuration for housing in a quantum computing dilution refrigerator, comprising a traveling wave parametric amplifier (TWPA) device and a frequency multiplexer according to any embodiment of this specification. The frequency multiplexer is connected directly or indirectly to the TWPA device.
[0022] This disclosure further provides a computer implementation method for determining the circuit of a frequency multiplexer according to embodiments thereof, the method comprising the steps of acquiring data indicating the amount of signal filtering portions and the filtering characteristics of each portion, wherein the filtering characteristics include at least the inductance of each signal filtering portion. Furthermore, the method comprises the steps of determining, based on each filtering characteristic, the number of chains of each signal filtering portion, the amount of critical current in each chain, and the number of superconducting junctions in each chain.
[0023] Therefore, the method advantageously determines the circuit of the multiplexer mainly based on filtering characteristics (which may be a specific frequency band) and the number of signal filtering portions (which may be the number of transmission lines connected to a common port). The computer-implemented method can determine the number of chains, the critical current, and the number of junctions based on a predefined model stored in a control circuit that executes the computer-implemented method.
[0024] In general, all terms used in this specification shall be construed to follow their ordinary meanings in the technical field, unless specifically defined otherwise herein. All references to "one / the [element, device, component, means, step, etc.]" shall be broadly construed to refer to at least one example of an element, device, component, means, step, etc., unless otherwise specified.
[0025] These and other features and advantages of the present disclosure will become clearer and be described in more detail by referring to the accompanying drawings.
Brief Description of the Drawings
[0026] [Figure 1] It is a diagram schematically showing a frequency multiplexer according to an aspect of this specification. [Figure 2A] It is a diagram schematically showing different signal filtering portions according to an aspect of this specification. [Figure 2B] It is a diagram schematically showing different signal filtering portions according to an aspect of this specification. [Figure 2C] It is a diagram schematically showing different signal filtering portions according to an aspect of this specification. [Figure 2D] It is a diagram schematically showing different signal filtering portions according to an aspect of this specification. [Figure 3] It is a diagram schematically showing a low-pass signal filtering portion having a specific exemplary circuit with a predetermined number of junctions and capacitors. [Figure 4A]A diagram schematically showing an amplifier configuration according to an aspect of the present specification. And [Figure 4B] A schematic diagram in the form of a flowchart showing a method according to an aspect of the present specification.
[0027] Embodiments for Carrying Out the Invention In the following detailed description, some embodiments of the present disclosure will be described. However, it should be understood that, unless specifically indicated, the features of different embodiments are interchangeable between embodiments and may be combined in different ways. In the following description, many specific details are set forth in order to provide a more thorough understanding of the present disclosure, but it will be apparent to those skilled in the art that the present disclosure may be practiced without these specific details. In other instances, detailed descriptions of well-known structures or functions are not provided so as not to obscure the present disclosure. Components having general names (e.g., capacitor, chain, etc.) in this specification may sometimes be referred to as first, second, etc.
[0028] The term "multiplexer" can refer to a circuit having several input ports and a common output port, or vice versa. Thus, the term "multiplexer" in this specification may also include a demultiplexer. Accordingly, the multiplexer in this specification can perform both multiplexing operations and demultiplexing operations.
[0029] The term "signal filtering section" can refer to the line / component of a multiplexer that adjusts the characteristics of a signal before transmitting the signal to an output.
[0030] The term "node" can refer to the intersection of two or more branches within a circuit.
[0031] Figure 1 shows a schematic circuit of a frequency multiplexer 1 according to some aspects of the present disclosure, comprising a first port 2a and a plurality of second ports 2b, each second port 2b associated with a specific frequency band. Furthermore, it comprises a plurality of signal filtering sections 30, 40, 50 connecting each second port to the first port 2b, each of which is one of a high-pass signal filtering section 30, a low-pass signal filtering section 40, a band-pass signal filtering section 50, and a band-stop signal filtering section (not shown), and each signal filtering section 30, 40, 50 includes a chain of superconducting junctions 35, 45, 55. Each chain may be configured to function as an inductive element for each section. Each signal filtering section 30, 40, 50 may also include a capacitor. The capacitor may be a plate capacitor or other suitable type of capacitor. The superconducting junction may be a Josephson junction. The material of the junction may include, for example, aluminum. The signal filtering sections 30-50 may be placed on a substrate / chip.
[0032] Figure 1 shows an exemplary multiplexer 1 having high-pass, low-pass, and band-pass signal filtering sections 30, 40, and 50. However, the number / type of signal filtering sections may be modified based on the application of the multiplexer. For example, the multiplexer may be a diplexer having low-pass and high-pass signal filtering sections.
[0033] Figure 1 shows that each low-pass signal filtering section 40 may include multiple adjacent chains 45 of superconducting junctions 43, each of which is separated by a node 42, and each node is connected to a shunt capacitor 44 which is connected to an earth terminal.
[0034] Furthermore, each high-pass signal filtering section 30 may include multiple adjacent capacitors 31, each of which is isolated by a node 32, each node 32 being connected to a shunt chain 35 of a superconducting junction 33, and the shunt chain 35 being connected to an earth terminal. The chain may point to one junction 33 or two or more junctions 33.
[0035] Furthermore, Figure 1 shows that each bandpass signal filtering section 50 may comprise multiple pairs 51 of series-connected capacitors 51a and superconducting junction chains 51b, with adjacent pairs 51 separated by nodes 52, each node 52 comprising a shunt connection 54, each shunt connection 54 comprising a capacitor connected in parallel to a chain 55 of superconducting junctions 53, and the shunt connection 54 being connected to an earth terminal.
[0036] Figure 1 shows one first port 2a and three second ports 2b. The second ports 2b may be input ports or output ports, and the first port 2a may be an input port and the other port of an output port.
[0037] Figures 2A to 2D schematically illustrate signal filtering sections 30 to 60 according to some embodiments of this specification. Figure 2A shows the circuit of a bandstop signal filtering section 60 according to some embodiments of this specification, each bandstop signal filtering section 60 comprising a plurality of series-connected parallel connections 61, each parallel connection 61 comprising a capacitor connected in parallel to a chain of superconducting junctions 65, adjacent parallel connections 61 being separated by nodes 62, each node 62 comprising a shunt connection comprising a pair 63 of a series-connected capacitor 63a and a superconducting junction chain 63b.
[0038] Figure 2B shows the circuit for the bandpass signal 50 filtering section. Figure 2C shows the circuit for the high-pass signal filtering section 30, and Figure 2D shows the circuit for the low-pass signal filtering section 40.
[0039] It should be noted that the disclosure herein is not limited to specific filtering sections 30-60, and that filtering sections may include additional motorized components, and is not limited to specific circuits as shown in Figures 2A-2D.
[0040] Referring to Figures 1 to 2D, it should be noted that at least one of the superconducting junctions 33, 43, 53, 63 of at least one chain 35, 45, 55, 65 of the signal filtering sections 30, 40, 50 may contain / or be located within a superconducting loop. The superconducting loop may be a closed loop having superconducting junctions connected on both sides of the loop. The superconducting loop may be a DC superconducting quantum interference device (DC SQUID), a superconducting nonlinear asymmetric inductive element (SNAIL), or any other type of superconducting loop.
[0041] Furthermore, each signal filtering section 30, 40, 50, and 60 is configured to transmit signals in a specific frequency band. For example, a low-pass filtering section may be configured to transmit frequencies below 10 GHz and strongly attenuate signals with frequencies above 10.5 GHz.
[0042] As described herein, each signal filtering section 30, 40, 50, 60 may include a predetermined number of chains 35, 45, 55, 65 having a predetermined number of superconducting junctions 33, 43, 53, 63, each chain 35, 45, 55 being configured to a predetermined critical current to obtain a predetermined inductance, thereby enabling each signal filtering section 30, 40, 50, 60 to transfer signals of a specific frequency and remove other signals.
[0043] Furthermore, a predetermined number of junctions and each predetermined critical current are arranged to match the inductance value of each signal filtering section, and each inductance value indicates the filtering characteristics of the signal filtering section.
[0044] Figure 3 shows an exemplary simulation of the signal filtering section 40, indicating that the signal filtering section 40 includes a chain of superconducting junctions. In Figure 3, the signal filtering section 40 comprises chains N1 to N6, each having a predetermined number of superconducting junctions. For example, as shown in Figure 1, each chain contains 5 to 17 junctions. Furthermore, as shown in Figure 3, there are capacitors C1 to C6, each having a specific capacitance. In addition, each chain N1 to N6 is designed for a specific critical current. Based on the critical current and capacitance, the filtering characteristics are defined.
[0045] Figure 4A schematically shows an amplifier configuration 100 housed in a quantum computing dilution refrigerator, comprising a traveling wave parametric amplifier (TWPA) device 101 and a frequency multiplexer 1, according to any embodiment of this specification, the frequency multiplexer 1 being connected to the TWPA device 101. In some embodiments, the frequency multiplexer 1 may be on a chip common to the TWPA device 101. The frequency multiplexer 1 may be arranged (as a diplexer) to couple the pump signal 103 and the sample signal 102.
[0046] Figure 4B schematically illustrates, in flowchart form, a computer implementation method 200 for determining the circuit of a frequency multiplexer 1 according to any embodiment of this specification. The method includes a step 201 of acquiring data indicating the number of signal filtering sections and the filtering characteristics of each section, the filtering characteristics including at least the inductance of each signal filtering section. The method may further include a step 202 of determining, based on each filtering characteristic, the number of chains of each signal filtering section, the amount of critical current in each chain, and the number of superconducting junctions in each chain.
[0047] Those skilled in the art will understand that electronic devices performing multiplexers, amplifier configurations, and computer implementation methods may include / be connected to memory devices, where the memory devices may include any form of volatile or non-volatile computer-readable memory, including, but not limited to, persistent memory, solid-state memory, remote-mount memory, magnetic media, optical media, random-access memory (RAM), read-only memory (ROM), mass storage media (e.g., hard disks), removable storage media (e.g., flash drives, compact discs (CDs) or digital video discs (DVDs)), and / or any other volatile or non-volatile non-temporary device-readable and / or computer-executable memory devices that store information, data, and / or instructions that may be used. Furthermore, electronic devices performing multiplexers, amplifier configurations, and computer implementation methods may include / be connected to control circuits arranged to execute instruction sets in the memory devices in order to operate the method or the multiplexer. The control circuits may be of any suitable type.
Claims
1. A frequency multiplexer (1), The first port (2a) and A plurality of second ports (2b), each second port (2b) associated with a specific frequency band, Frequency multiplexer (1) comprising a plurality of signal filtering sections (30, 40, 50, 60) connecting each second port (2b) to the first port (2a), wherein each signal filtering section (30, 40, 50, 60) is one of a high-pass signal filtering section (30), a low-pass signal filtering section (40), a band-pass signal filtering section (50), and a band-stop signal filtering section (60), and each signal filtering section (30, 40, 50, 60) includes a chain of superconducting junctions (35, 45, 55, 65).
2. Each low-pass signal filtering section (40) includes a plurality of adjacent chains (45) of superconducting junctions (43), each of the adjacent chains (45) is separated by a node (42), each node is connected to a shunt capacitor (44), and the shunt capacitor (44) is grounded. Each high-pass signal filtering section (30) includes a plurality of adjacent capacitors (31), each of the adjacent capacitors (31) is isolated by a node (32), each node (32) is connected to a shunt chain (35) of a superconducting junction (33), and the shunt chain (35) is grounded. Each bandpass signal filtering section (50) includes multiple pairs (51) of series-connected capacitors (51a) and superconducting junction chains (51b), adjacent pairs (51) are separated by nodes (52), each node (52) includes a shunt connection (54), each shunt connection (54) includes a capacitor connected in parallel to a chain (55) of superconducting junctions (53), and the shunt connection (54) is grounded. Each bandstop signal filtering section (60) comprises a plurality of series-connected parallel connections (61), each parallel connection (61) comprises a capacitor connected in parallel to a chain of superconducting junctions (65), adjacent parallel connections (61) are separated by nodes (62), each node (62) comprises a shunt connection comprising a pair (63) of a series-connected capacitor (63a) and a superconducting junction chain (63b). The frequency multiplexer (1) according to claim 1.
3. The frequency multiplexer (1) according to claim 1 or 2, wherein the superconducting junction is a Josephson junction.
4. A frequency multiplexer (1) according to any one of claims 1 to 3, wherein at least one of the superconducting junctions (33, 43, 53, 63) of at least one of the chains (35, 45, 55, 65) of at least one of the signal filtering portions (30, 40, 50, 60) comprises a superconducting loop.
5. The frequency multiplexer (1) according to any one of claims 1 to 4, wherein each signal filtering section (30, 40, 50, 60) is configured to transmit signals in a specific frequency band.
6. A frequency multiplexer (1) according to any one of claims 1 to 5, wherein each signal filtering section (30, 40, 50, 60) comprises a predetermined number of chains (35, 45, 55, 65), each chain having a predetermined number of superconducting junctions (33, 43, 53, 63), and each chain (35, 45, 55, 65) is configured to a predetermined critical current to obtain a predetermined inductance, thereby enabling each signal filtering section (30, 40, 50, 60) to transfer signals of the specific frequency and remove other signals.
7. The frequency multiplexer (1) according to claim 6, wherein the predetermined number of junctions and each predetermined critical current are arranged to match the inductance value of each signal filtering portion, and each inductance value indicates the filtering characteristics of the signal filtering portion.
8. A frequency multiplexer (1) according to any one of claims 1 to 7, wherein each signal filtering section comprises a plurality of superconducting junctions, and each chain comprises at least one superconducting junction.
9. An amplifier configuration (100) housed in a quantum computing dilution refrigerator, Traveling wave parametric amplifier, TWPA, device (101), An amplifier configuration (100) comprising a frequency multiplexer (1) according to any one of claims 1 to 8, wherein the frequency multiplexer (1) is connected to the TWPA device (101).
10. A computer implementation method (200) for determining the circuit of a frequency multiplexer (1) according to any one of claims 1 to 9, A step (201) of acquiring data showing the number of signal filtering sections and the filtering characteristics of each section, wherein the filtering characteristics include at least the inductance of each signal filtering section. A method (200) comprising the step (202) of determining the number of chains in each signal filtering portion, the number of critical currents in each chain, and the number of superconducting junctions in each chain, based on each of the filtering characteristics.