Method for forming a non-conductive polymer layer with a controlled coefficient of thermal expansion

Abstract

Disclosed herein is a method for forming a semiconductor device comprising a nonconductive polymer layer having a desired coefficient of thermal expansion (CTE). The method comprises the steps of selecting / acquiring a desired CTE value and preparing a suspension comprising a mixture of dielectric nanoparticles and a curable polymer. The curable polymer consists of a resin and a curing agent, or comprises a resin and a curing agent, wherein the resin of the curable polymer has a positive CTE and the dielectric nanoparticles have a different CTE from the resin. The preparation comprises the steps of determining the weight ratio of the curable polymer to the dielectric nanoparticles, coating the suspension onto the surface of a substrate, and curing the suspension to form a nonconductive polymer layer having a desired CTE value.

Description

Technical Field

[0001] According to some embodiments, the present disclosure generally relates to semiconductor devices, and more specifically to a method of forming a semiconductor device having a non-conductive polymer layer with a controlled coefficient of thermal expansion.

Background Art

[0002] Non-conductive (dielectric) layers are important components in the functionality, performance, and reliability of integrated circuits and semiconductor devices. These layers are used to separate various components of a semiconductor device, thereby preventing unwanted electrical interactions between them. Thus, ensuring proper operation of the device and minimizing performance degradation and failures. Typically, the non-conductive layer is composed of silicon dioxide and is deposited / applied over conductive regions / layers such as copper, aluminum, and other metals. For example, non-conductive layers are implemented in system-on-chip modules to separate different layers of the module. In addition to functioning as a barrier to prevent electrical signals from passing through different layers of the module and preventing short circuits, the non-conductive layer can also improve the reliability of the module (or semiconductor device) by protecting components from moisture, dust, and other contaminants.

Summary of the Invention

[0003] One aspect of the disclosure relates to semiconductor devices, according to some embodiments. More specifically, but not limited thereto, the aspect of the disclosure relates to a method of forming a semiconductor device comprising a non-conductive polymer layer having a controlled coefficient of thermal expansion (CTE), according to some embodiments.

[0004] Advantageously, the disclosed method enables selection of a desired CTE value for the non-conductive layer and control and adjustment of the desired CTE according to the design and requirements of the semiconductor device or its components / elements.

[0005] Advantageously, the disclosed method makes it possible to obtain CTE values ​​that match a variety of materials of semiconductor devices and their components / elements (e.g., integrated circuits, printed circuit boards, etc.), such as semiconductors containing or comprising Si, semiconductors containing or comprising Group III-V compounds of the periodic table, semiconductors containing or comprising Group II-VI compounds, etc., or any combination thereof. As a result, in some embodiments, thermal stress between components of semiconductor devices is reduced, promoting signal integrity, performance, and thermal management (e.g., heat dissipation).

[0006] Advantageously, the disclosed method enables the formation of semiconductor devices (e.g., printed circuit boards) having diverse non-conductive (dielectric) layers with tuned / controlled CTE values, thereby improving the performance, reliability, and lifespan of the semiconductor devices.

[0007] According to several embodiments, a method is provided for forming a semiconductor device comprising a nonconductive polymer layer having a desired coefficient of thermal expansion (CTE). The method comprises selecting or obtaining a desired CTE value and preparing a suspension comprising a mixture of dielectric nanoparticles and a curable polymer. The curable polymer consists of or comprises a resin and a curing agent, the resin of the curable polymer having a positive CTE, and the dielectric nanoparticles having a different CTE from the resin. The preparation comprises determining the weight ratio of the curable polymer to the dielectric nanoparticles, coating the suspension onto the surface of a substrate, and curing the suspension to form a nonconductive polymer layer having the desired CTE value.

[0008] According to some examples, dielectric nanoparticles have a negative CTE.

[0009] According to some embodiments, the thermal expansion coefficient of dielectric nanoparticles may be at least an order of magnitude lower than that of the resin.

[0010] According to some embodiments, curing may involve electron beam emission.

[0011] According to some embodiments, curing may involve the application of photon emission.

[0012] According to some embodiments, photon emission may include ultraviolet emission.

[0013] According to some embodiments, photon emission may include heating.

[0014] According to some embodiments, the curable polymer resin may be made from or contain one or more epoxy resins, polyimide resins, and benzocyclobutene (BCB).

[0015] According to some embodiments, dielectric nanoparticles may include Kevlar nanoparticles.

[0016] According to some embodiments, the dielectric nanoparticles may include SiO2 nanoparticles.

[0017] According to some embodiments, the dielectric nanoparticles may include α-ZrW2O8 nanoparticles.

[0018] According to some embodiments, the dielectric nanoparticles may include βZrW2O8 nanoparticles.

[0019] According to some embodiments, the selection / acquisition can include a desired CTE of approximately 17 ppm / °C, which matches the CTE of copper (Cu).

[0020] According to some embodiments, the selection / acquisition may include the desired CTE at approximately 20 ppm / °C, thereby matching the CTE of silver (Ag).

[0021] According to several examples, the selection / acquisition can contain the desired CTE at approximately 23 ppm / °C, which matches the CTE of aluminum (Al).

[0022] According to some embodiments, the selection / acquisition can include a desired CTE of about 3.5 ppm / °C, which thus matches the CTE of silicon (Si).

[0023] According to some embodiments, the selection / acquisition can include a desired CTE of about 7.2 ppm / °C, which thus matches the CTE of gallium arsenide (GaAs).

[0024] According to some embodiments, the selection / acquisition can include a desired CTE of about 8 ppm / °C, which thus matches the CTE of indium phosphide (InP).

[0025] According to some embodiments, the selection / acquisition can include a desired CTE of about 5 ppm / °C, which thus matches the CTE of any of the following: aluminum nitride (AlN), gallium nitride (GaN), 3C, 4H and / or 6H silicon carbide (SiC).

[0026] According to some embodiments, the method can further include removing an extra portion of the non-conductive polymer layer.

[0027] According to some embodiments, the method may further include planarizing the non-conductive polymer layer.

[0028] According to some embodiments, the semiconductor or its component provided herein includes a dielectric layer with a controlled coefficient of thermal expansion (CTE). The dielectric layer includes a mixture of dielectric nanoparticles and a curable polymer, and the curable polymer includes a resin and a curing agent. The resin of the curable polymer has a positive CTE, and the dielectric nanoparticles have a CTE different from that of the resin.

[0029] According to some embodiments, the dielectric nanoparticles of the semiconductor device or its component can include Kevlar nanoparticles.

[0030] According to some embodiments, the dielectric nanoparticles of a semiconductor device or its components can include SiO2 nanoparticles.

[0031] According to some embodiments, the dielectric nanoparticles of a semiconductor device or its components can include α-ZrW2O8 nanoparticles.

[0032] According to some embodiments, the dielectric nanoparticles of a semiconductor device or its components can include β-ZrW2O8 nanoparticles.

[0033] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art. In case of conflict, the patent specification, including definitions, will prevail. As used herein, the indefinite articles "a" and "an" mean "at least one" or "one or more" unless the context clearly dictates otherwise. <​​​​​​​​​​​​​​​​​​The principles, uses, and methods of implementation described herein will be better understood by referring to the accompanying explanations and diagrams. By carefully reading the explanations and diagrams provided herein, those skilled in the art will be able to implement the teachings herein without excessive effort or experimentation.

[0036] In the description and claims of the application, the words “including” and “having,” and their forms, are not limited to members of the list to which those words are associated.

[0037] The term "approximately" as used herein may be used to specify a value of a quantity or parameter (e.g., the length of an element) within a contiguous range in its neighborhood that includes a given value (the stated value). In some embodiments, "approximately" may specify that the value of the parameter is between 80% and 120% of a given value. For example, the statement "the length of the element is approximately 1 m" is equivalent to the statement "the length of the element is between 0.8 m and 1.2 m." In some embodiments, "approximately" may specify that the value of the parameter is between 90% and 110% of a given value. In some embodiments, "approximately" may specify that the value of the parameter is between 95% and 105% of a given value.

[0038] As used herein, the terms “substantially” and “approximately” are interchangeable, according to some embodiments.

[0039] As used herein, according to some embodiments, the term “electronic device” can refer to any device containing electronic components, including wearable devices (e.g., smartwatches, fitness trackers, etc.), mobile phones (e.g., smartphones), tablets, computers (e.g., laptops), cameras, screens (e.g., touchscreens), televisions, robots (e.g., robotic arms, etc.), memory devices, power storage devices, light-emitting devices, and the like. Each possibility is a distinct embodiment. According to some embodiments, an electronic device is portable. According to some embodiments, an electronic device may refer to a non-mobile device. According to some embodiments, an electronic device may refer to household appliances, industrial equipment / systems, automobiles, and the like. Each possibility is a distinct embodiment.

[0040] In their use here, according to some embodiments, the terms “electronic device” and “semiconductor device” may be used interchangeably.

[0041] According to some embodiments, a semiconductor device may include semiconductor dies, chips, integrated circuits, modules (e.g., system-on-chip, system-in-package, package-on-package, system / computer-on-module, etc.), core components (e.g., processor cores), communication interfaces, memory blocks, or any combination thereof. Each possibility is a distinct embodiment.

[0042] Where used herein, according to some embodiments, the term “component of a semiconductor device” may refer to any area, part, or element of a semiconductor device that has insulating / dielectric material or is connected / attached to insulating / dielectric material. According to some embodiments, the term “component of a semiconductor device” may refer to a die (e.g., a transistor or part thereof), a chip, a chip carrier, a passive component, an active component, a connection area / component (e.g., an interposer, contact pad, line, trace, via, etc.), an interface, a module (e.g., a chip module), a semiconductor package or its components, a substrate, etc., or any combination thereof. Each possibility is a distinct embodiment. According to some embodiments, the term “component of a semiconductor device” may refer to an interposer. According to some embodiments, the term “component of a semiconductor device” may refer to any part / component of a printed circuit board. According to some embodiments, the term “component of a semiconductor device” may refer to any part / component of an integrated circuit. Each possibility is a distinct embodiment. According to some embodiments, the term “component of a semiconductor device” may refer to any part / component of an RF circuit.

[0043] According to several embodiments, a method for forming a nonconductive polymer layer having a controlled coefficient of thermal expansion (CTE) is provided herein. The method comprises selecting / obtaining a desired CTE value, and preparing a suspension comprising a mixture of dielectric nanoparticles and a curable polymer. The curable polymer consists of, or comprises, a resin and a curing agent. The resin of the curable polymer has a positive CTE, and the dielectric nanoparticles have a different CTE from the resin. The preparation comprises the steps of determining the weight ratio between the curable polymer and the dielectric nanoparticles, coating the suspension onto the surface of a substrate, and curing the suspension to form a nonconductive polymer layer having a desired CTE value.

[0044] According to some embodiments, the size of the dielectric nanoparticles (e.g., diameter, longest cross-sectional dimension, or other dimensions) is about 250 nm or less. According to some embodiments, the size of the dielectric nanoparticles is in the range of about 100 nm to about 250 nm, about 150 nm to about 250 nm, about 5 nm to about 200 nm, about 5 nm to about 250 nm, about 20 nm to about 200 nm, about 5 nm to about 100 nm, and about 5 nm to about 150 nm. Each possibility is a separate embodiment.

[0045] According to several embodiments, the size of the dielectric nanoparticles is approximately 250 nm or less, approximately 200 nm or less, approximately 150 nm or less, approximately 100 nm or less, and approximately 50 nm or less. Each possibility is a separate embodiment.

[0046] According to several embodiments, the disclosed method advantageously enables obtaining CTE values ​​that match various materials for integrated circuits, such as semiconductors consisting of or containing Si, III-V compounds of the periodic table (e.g., GaAs, GaSb, GaN, AlN, InP, etc.), SiC (e.g., 3C SiC, 4H SiC, 6H SiC), etc., or any combination thereof. Each possibility is a distinct embodiment. According to several embodiments, the III-V compounds may include binary, ternary, and / or quaternary compounds, with at least one element from main group III of the periodic table and at least one element from main group V. Each possibility is a distinct embodiment. According to several embodiments, the disclosed method advantageously enables obtaining CTE values ​​that match semiconductors consisting of or containing II-VI compounds of the periodic table. Each possibility is a distinct embodiment.

[0047] According to some embodiments, the disclosed method makes it possible to obtain CTEs that match various materials of integrated circuits, such as copper (Cu), silver (Ag), aluminum (Al), or any combination thereof. Each possibility is a distinct embodiment. According to some embodiments, the disclosed method makes it possible to adjust the CTE of a nonconductive polymer layer, thereby facilitating the thermal properties / thermal management (e.g., heat dissipation) of semiconductor devices.

[0048] Advantageously, in some embodiments, matching CTEs within an integrated circuit minimizes / prevents thermal stress between one or more electronic components or elements within an electronic device, thereby minimizing / preventing cracks, warping, and / or undesirable deformations and / or defects (e.g., bending, twisting, etc.) of the electronic components / elements of the electronic device, thereby improving the performance, yield, and reliability of the electronic device. Each possibility is a distinct embodiment.

[0049] Advantageously, in some embodiments, by adjusting the CTE, various materials can be incorporated into an electronic device, thereby obtaining a CTE that matches the various components, thereby improving the performance and yield of the electronic device. In some, non-limited, examples of incorporating various materials include incorporating different types of chips, such as different generations and materials, into an integrated circuit and / or semiconductor / electronic device.

[0050] Advantageously, in some embodiments, adjusting / tuning the CTE of the nonconductive polymer layer facilitates thermal management of electronic devices (i.e., promotes heat dissipation).

[0051] Advantageously, in some embodiments, adjusting / tuning the CTE of a non-conductive polymer layer minimizes thermal stress between one or more components of an electronic device (e.g., dies, chips, integrated circuits, passive / active components, traces, contact pads, etc. or their elements). According to some embodiments, this can improve the performance, signal integrity, and durability of the electronic device. In some embodiments, adjusting / tuning the CTE of a non-conductive layer may be particularly important in RF circuits, such as printed RF circuits (e.g., operating / supporting frequency ranges from about 100 MHz to about 300 GHz), to facilitate the propagation of RF signals and the integrity of those signals.

[0052] According to several embodiments, a method is provided herein for forming a non-conductive polymer layer having a controllable / adjustable coefficient of thermal expansion (CTE). The method comprises selecting / obtaining a desired CTE value, and preparing a suspension comprising a mixture of dielectric nanoparticles and a curable polymer. The dielectric nanoparticles include Kevlar nanoparticles, and the curable polymer consists of or comprises a resin and a curing agent, wherein the resin of the curable polymer has a positive CTE, and the dielectric nanoparticles have a different CTE from the resin. The preparation comprises determining the weight ratio between the curable polymer and the dielectric nanoparticles, coating the suspension onto the surface of a substrate, and curing the suspension to form a non-conductive polymer layer having a desired CTE value.

[0053] According to several embodiments, a method for forming a nonconductive polymer layer having a controllable / adjustable coefficient of thermal expansion (CTE) is provided herein. The method comprises selecting / acquiring a desired CTE value, and preparing a suspension comprising a mixture of dielectric nanoparticles and a curable polymer. The dielectric nanoparticles include α-ZrW2O8 nanoparticles, and the curable polymer consists of or comprises a resin and a curing agent, wherein the resin of the curable polymer has a positive CTE, and the dielectric nanoparticles have a different CTE from the resin. The preparation comprises determining the weight ratio between the curable polymer and the dielectric nanoparticles, coating the suspension onto the surface of a substrate, and curing the suspension to form a nonconductive polymer layer having a desired CTE value.

[0054] According to several embodiments, a method for forming a nonconductive polymer layer having a controllable / adjustable coefficient of thermal expansion (CTE) is provided herein. The method comprises selecting / acquiring a desired CTE value, and preparing a suspension comprising a mixture of dielectric nanoparticles and a curable polymer. The dielectric nanoparticles comprise β-ZrW2O8 nanoparticles, and the curable polymer comprises or comprises a resin and a curing agent, wherein the resin of the curable polymer has a positive CTE, and the dielectric nanoparticles have a different CTE from the resin. The preparation comprises determining the weight ratio between the curable polymer and the dielectric nanoparticles, coating the suspension onto the surface of a substrate, and curing the suspension to form a nonconductive polymer layer having a desired CTE value.

[0055] According to several embodiments, a method for forming a nonconductive polymer layer having a controllable / adjustable coefficient of thermal expansion (CTE) is provided herein. The method comprises selecting / obtaining a desired CTE value, and preparing a suspension comprising a mixture of dielectric nanoparticles and a curable polymer. The dielectric nanoparticles include SiO2 nanoparticles, and the curable polymer consists of or comprises a resin and a curing agent, wherein the resin of the curable polymer has a positive CTE, and the dielectric nanoparticles have a different CTE from the resin. Preparation comprises determining the weight ratio between the curable polymer and the dielectric nanoparticles, coating the suspension onto the surface of a substrate, and curing the suspension to form a nonconductive polymer layer having a desired CTE value.

[0056] Referring to Figure 1, a flowchart 100 schematically shows a method for manufacturing a semiconductor device comprising a non-conductive polymer layer having a desired coefficient of thermal expansion (CTE), according to several embodiments.

[0057] According to some embodiments, step 102 may include the selection / acquisition of a desired CTE value for the nonconductive polymer layer.

[0058] According to some embodiments, the selection / acquisition of a desirable CTE value can be based at least in part on the materials incorporated / included in the electronic device or its components (e.g., materials forming an integrated circuit, electronic elements, dies / chips, chip modules, etc., or any combination thereof). According to some embodiments, the selection / acquisition of a CTE value can be based, among others, on a desired characteristic of the electronic device. According to some embodiments, the desired characteristic of the electronic device can include, among others, power consumption, yield, speed, heat dissipation requirements, etc., or any combination thereof. Each possibility is a distinct embodiment.

[0059] According to some embodiments, the desired CTE value can be configured to match various materials of the integrated circuit, such as Si, III-V compounds of the periodic table (e.g., GaAs, GaSb, GaN, AlN, InP, etc.), SiC (e.g., 3C SiC, 4H SiC, 6H SiC), or any combination thereof. Each possibility is a separate embodiment. According to some embodiments, the desired CTE value can be matched to the CTE of various materials of the integrated circuit, such as copper (Cu), silver (Ag), aluminum (Al), or any combination thereof. Each possibility is a separate embodiment.

[0060] According to some embodiments, the desired CTE value of the polymer layer is in the range of about 1–30 ppm / °C, about 3–30 ppm / °C, about 10–30 ppm / °C, about 15–30 ppm / °C, about 1–25 ppm / °C, about 15–25 ppm / °C, about 1–15 ppm / °C, about 1–20 ppm / °C, about 1–10 ppm / °C, about 2–10 ppm / °C, about 2–25 ppm / °C, about 2–8 ppm / °C, or other desired / required values. Each possibility is a separate embodiment.

[0061] According to several embodiments, the desired CTE values ​​for the polymer layer are approximately 3 ppm / °C, 4 ppm / °C, 5 ppm / °C, 3–6 ppm / °C, 7–8 ppm / °C, 17 ppm / °C, 20 ppm / °C, 23 ppm / °C, etc. Each possibility is a separate embodiment.

[0062] According to some embodiments, the desired CTE value of the polymer layer is approximately 17 ppm / °C, which matches the CTE of copper (Cu). According to some embodiments, the desired CTE value of the polymer layer is approximately 20 ppm / °C, which matches the CTE of silver (Ag). According to some embodiments, the desired CTE value of the polymer layer is approximately 23 ppm / °C, which matches the CTE of aluminum (Al). According to some embodiments, the desired CTE value of the polymer layer is approximately 3.5 ppm / °C, which matches the CTE of silicon (Si). According to some embodiments, the desired CTE value of the polymer layer is approximately 7.2 ppm / °C, which matches the CTE of gallium arsenide (GaAs). According to some embodiments, the desired CTE value of the polymer layer is approximately 8 ppm / °C, which matches the CTE of indium phosphide (InP). According to some embodiments, the desired CTE value of the polymer layer is approximately 5 ppm / °C, which corresponds to one of the following CTEs: aluminum nitride (AlN), gallium nitride (GaN), 3C, 4H, and / or 6H silicon carbide (SiC). Each possibility is a separate embodiment.

[0063] According to some embodiments, step 104 may include the preparation of a suspension (for example, suspension 140 shown in Figure 1). According to some embodiments, the suspension comprises a mixture of dielectric nanoparticles 138 and a curable polymer. According to some embodiments, the curable polymer may consist of or include a resin and a curing agent.

[0064] According to some embodiments, the preparation involves determining the ratio of the curable polymer to the dielectric nanoparticles 138. According to some embodiments, the ratio may be a molar ratio, etc. According to some embodiments, the ratio may be a weight ratio. According to some embodiments, the ratio may be an atomic ratio. Each possibility is a separate embodiment.

[0065] According to some embodiments, the ratio of the curable polymer to the dielectric nanoparticles 138 can be any value in the range of about 5% to about 95% of the curable polymer. According to some embodiments, the range can be about 5% to about 20%, about 5% to about 50%, about 20% to about 80%, about 5% to about 90%, and about 30% to about 50% of the curable polymer. Each possibility is a distinct embodiment.

[0066] According to some embodiments, the ratio of curable polymer to dielectric nanoparticles 138 may be about 60% to about 80% of the curable polymer and about 40% to about 20% of the dielectric nanoparticles 138. According to some embodiments, the ratio of curable polymer to dielectric nanoparticles 138 may be about 5% to about 10% of the curable polymer and about 95% to about 90% of the dielectric nanoparticles 138. Each possibility is a distinct embodiment.

[0067] According to several embodiments, the ratio of the curable polymer to the dielectric nanoparticles 138 may be about 1:30, about 1:25, about 1:20, about 1:10, about 1:9, about 1:8, about 1:7, about 1:6, about 1:5, about 1:4, about 1:3, about 1:2, about 3:7, about 2:3, about 1:1, and their inverse ratios. Each possibility is a distinct embodiment.

[0068] According to some embodiments, the dielectric nanoparticles 138 may have a positive CTE. According to some embodiments, the dielectric nanoparticles 138 may have a negative CTE. Each possibility is a separate embodiment.

[0069] According to some embodiments, the resin of the curable polymer may have a positive CTE, and the dielectric nanoparticles may have a different CTE from the resin.

[0070] According to some embodiments, the CTE of dielectric nanoparticles 138 may be lower than that of the resin. According to some embodiments, the CTE of dielectric nanoparticles 138 may be about one order of magnitude, at least two orders of magnitude, at least three orders of magnitude, at least four orders of magnitude, at least five orders of magnitude, or more lower than that of the resin. Each possibility is a distinct embodiment. According to some embodiments, the CTE of dielectric nanoparticles 138 may be about one to about four orders of magnitude lower than that of the resin. According to some embodiments, the CTE of dielectric nanoparticles 138 may be about one to about three orders of magnitude lower than that of the resin. According to some embodiments, the CTE of dielectric nanoparticles 138 may be about one to about two orders of magnitude lower than that of the resin. Each possibility is a distinct embodiment.

[0071] According to some embodiments, the dielectric nanoparticles 138 may be made from or contain Kevlar nanoparticles. According to some embodiments, the dielectric nanoparticles may be made from or contain SiO2 nanoparticles. According to some embodiments, the dielectric nanoparticles may be made from or contain α-ZrW2O8 nanoparticles.

[0072] According to some embodiments, the dielectric nanoparticles 138 may be made from or contain nanoparticles of β-ZrW2O8. According to some embodiments, the dielectric nanoparticles 138 may be made from or contain one or more nanoparticles of Kevlar, SiO2, α-ZrW2O8, and β-ZrW2O8. Each possibility is a distinct embodiment.

[0073] According to some embodiments, the resin of the curable polymer may be made from or contain an epoxy resin. According to some embodiments, the resin of the curable polymer may be made from or contain a polyimide resin. According to some embodiments, the resin of the curable polymer may be made from or contain benzocyclobutene (BCB). Each possibility is a distinct embodiment.

[0074] According to some embodiments, the curable polymer resin may be made from or contain one or more epoxy resins, polyimide resins, or (BCB) resins. Each possibility is a distinct embodiment.

[0075] According to some embodiments, step 106 may include applying the suspension 140 to a semiconductor device or a part / component thereof. In non-limiting examples, the suspension 140 may be applied to conductive parts / elements such as substrates, traces, pads, or other passive / active components, dies, or any combination thereof.

[0076] According to some embodiments, the method may include coating a substrate 130 with a suspension 140, as shown in Figure 1. According to some embodiments, the substrate 130 may be an inert substrate. According to some embodiments, the substrate 130 may be made from or include glass (e.g., coated glass, uncoated glass, etc.), Si, ceramic material, polymer, stainless steel, or any combination thereof. Each possibility is a separate embodiment.

[0077] According to some embodiments, the substrate 130 may be rigid. In a non-limiting example, if the substrate 130 is rigid, its Shore hardness may be in the range of approximately 85D–96D. According to some embodiments, the substrate 130 may be flexible / bendable. In a non-limiting example, if the substrate 130 is flexible / bendable, its Shore hardness may be in the range of approximately 45D–70D. According to some embodiments, the substrate 130 may be semi-rigid (e.g., a combination of the hardness of a rigid substrate and a flexible substrate). Each possibility is a separate embodiment.

[0078] According to some embodiments, the substrate 130 may be a temporary substrate (i.e., a removable / detachable substrate). Alternatively, in some embodiments, the substrate 130 may be a non-temporary substrate.

[0079] According to some embodiments, the substrate 130 may be optionally coated. According to some embodiments, the coating of the substrate 130 may facilitate the adhesion of conductive wires. According to some embodiments, the coating 132 of the substrate 130 may be made from or include seed layers of TiW and Cu. According to some embodiments, the coating 132 may include an adhesive. In non-limiting examples, the adhesive may include a permanent adhesive film / layer. According to some embodiments, the coating 132 may include a die attach film. According to some embodiments, the coating 132 may include a thermal interface material.

[0080] According to some embodiments, the substrate 130 may not be coated. In other words, in some embodiments, the substrate 130 may lack the coating 132.

[0081] According to some embodiments, the substrate 130 may optionally include one or more conductive wires / pads 134. According to some embodiments, one or more conductive wires / pads 134 are configured to electrically connect an integrated circuit (e.g., an analog integrated circuit, an RF integrated circuit, etc.) to an external component, an input / output device, thereby enabling signal transmission between electronic components. According to some embodiments, the conductive wires / pads 134 may be configured to enable signal transmission between passive or active components such as dies, chips, inductors and / or capacitors, processors, etc.

[0082] According to some embodiments, the substrate 130 is made from or includes a system-in-package module (or region / component thereof), and the suspension 140 may be applied in one or more steps of its manufacturing process. In a non-limiting example, the suspension 140 may be applied to at least a portion of the substrate 130, and the substrate 130 may include a connecting structure such as an interposer. It will be understood by those skilled in the art that the suspension may be applied in any step of the manufacturing of an electronic device (e.g., any step in the electronic device manufacturing process where a dielectric region / layer needs to be formed).

[0083] According to some embodiments, the application of the suspension 140 may include pouring the suspension 140 during the manufacturing process (e.g., onto an electronic device or a part thereof, a temporary carrier, a substrate, etc.). According to some embodiments, the application of the suspension 140 may include using a spin coater or other tool / device to facilitate the formation of a substantially uniform layer of the suspension 140 on the substrate 130.

[0084] According to some embodiments, step 108 may include curing the suspension 142 to obtain a first non-conductive (dielectric) polymer layer 142. According to some embodiments, step 108 may include heat-treating the suspension 142 to obtain a first non-conductive (dielectric) polymer layer 142. According to some embodiments, step 108 may include polymerizing the suspension 142 to obtain a first non-conductive (dielectric) polymer layer 142.

[0085] According to some embodiments, curing of the suspension 142 may involve applying electron beam radiation, photon radiation (including, but not limited to, ultraviolet (UV) radiation, heating / thermal radiation, etc.). Each possibility is a separate embodiment.

[0086] According to some embodiments, the heating of the suspension 142 may be carried out at any temperature in the range of about 100°C to about 300°C, about 100°C to about 200°C, about 150°C to about 300°C, about 200°C to about 300°C, or about 150°C to about 250°C. Each possibility is a separate embodiment.

[0087] According to some embodiments, the heating of the suspension 142 may be carried out in the range of about 3 minutes to about 3 hours, about 3 minutes to about 1 hour, about 5 minutes to about 2 hours, about 3 minutes to about 30 minutes, about 3 minutes to about 10 minutes, about 1 hour to about 3 hours, about 30 minutes to about 1.5 hours, about 20 minutes to about 1 hour, or about 2 hours to about 3 hours. Each possibility is a separate embodiment.

[0088] As a non-limiting example, curing the suspension 142 may include heating the suspension 142 at approximately 120°C for approximately 4 minutes. As another non-limiting example, curing the suspension 142 may include heating the suspension 142 at approximately 250°C for approximately 3 minutes.

[0089] According to some embodiments, step 110 may optionally include removing / scraping off any excess polymer layer 142.

[0090] According to some embodiments, removing / scraping off excess portions of the polymer layer 142 may involve planarizing using a surface planer device / machine, thereby forming a substantially flat surface of the first layer (and / or each of the additional one or more layers) of the polymer layer 142. According to some embodiments, as shown in Figure 1, excess portions of the polymer layer 142 may be removed until portions of one or more conductive wires / pads 134 (e.g., their surface or upper layers) are exposed, thereby preventing short circuits between them while allowing electrical conductivity.

[0091] According to some embodiments, the method may include repeating at least some of the steps described above to produce one or more additional layers of nonconductive (dielectric) polymer. In non-limiting examples, the steps may be repeated to produce a multilayer structure of an electronic component. In other words, at least some of the steps described above may be repeated until the required number of nonconductive (i.e., insulating) layers are obtained (e.g., until the required height / depth of the polymer layers is achieved).

[0092] According to some embodiments, each layer of one or more nonconductive (dielectric) polymer layers may have approximately the same CTE value. According to some embodiments, at least some of the layers of one or more nonconductive (dielectric) polymer layers may have different CTE values. As a non-limiting example, each layer of one or more nonconductive (dielectric) polymer layers may have rising, falling, or alternating CTE values. Each possibility is a separate embodiment.

[0093] According to some embodiments, the iteration may optionally include aligning the non-conductive regions of the layers prior to / below the multiple non-conductive layers with additional layers of the multiple non-conductive layers.

[0094] According to some embodiments, the method may provide "on-the-fly" formation of multiple non-conductive regions (formed by polymer 142) between electrically conductive materials (e.g., as shown in Figure 1).

[0095] According to some embodiments, the method may enable the formation of multiple non-conductive regions according to a predefined pattern (e.g., one present on the substrate 130). According to some embodiments, a wide range of complex and / or high-density patterns of non-conductive regions can be obtained, which may enable, for example, the achievement of wide-range signal routing.

[0096] While the steps of a method may be described in a specific order according to some embodiments, the methods of this disclosure may include some or all of the steps performed in a different order. In particular, it should be understood that the order of the steps and substeps of the described methods may be rearranged unless the context clearly indicates otherwise, for example, when a later step requires the output of a previous step as input, or when a later step requires the product of a previous step. The methods of this disclosure may include some or all of the described steps. Unless expressly designated so, any particular step of the disclosed method should not be considered an essential step of that method.

[0097] According to some embodiments, the semiconductor device or component provided herein includes a dielectric layer having a controlled coefficient of thermal expansion (CTE), the dielectric layer comprising a mixture of dielectric nanoparticles and a curable polymer. The curable polymer comprises a resin and a curing agent, the resin of the curable polymer having a positive CTE, and the dielectric nanoparticles having a different CTE from the resin.

[0098] According to some embodiments, the semiconductor device or its components may include integrated circuits, interposers, dies / chips, interfaces, printed circuit boards, or any combination thereof. Each possibility is a distinct embodiment.

[0099] According to some embodiments, the semiconductor device or its components may include a multilayer structure, a patterned structure, or a combination thereof.

[0100] According to some embodiments, the dielectric nanoparticles of a semiconductor device or its components may include one or more of Kevlar nanoparticles, SiO2 nanoparticles, α-ZrW2O8 nanoparticles, and β-ZrW2O8 nanoparticles. Each possibility is a distinct embodiment.

[0101] According to some embodiments, the dielectric layer of a semiconductor device may be manufactured by "in-the-fly" formation, as described in detail, for example, in Figure 1.

[0102] While this disclosure is described with reference to specific embodiments, it is evident that there are numerous alternatives, modifications, and variations that will be apparent to those skilled in the art. Therefore, this disclosure encompasses all alternatives, modifications, and variations that fall within the scope of the appended claims. It should be understood that this disclosure is not necessarily limited to the configuration details and arrangement of components and / or methods described herein. Other embodiments may be implemented, and embodiments may be implemented in a variety of ways.

[0103] The expressions and terminology used herein are for illustrative purposes only and should not be considered restrictive. Any reference or citation in this application should not be construed as an acknowledgment that such reference is available as prior art to this disclosure. Section headings are used to facilitate understanding of the specifications and should not necessarily be construed as restrictive.

Claims

1. A method for forming a semiconductor device comprising a nonconductive polymer layer having a desired coefficient of thermal expansion (CTE), The aforementioned method, Steps include selecting / acquiring the desired CTE value, The process includes the step of preparing a suspension containing a mixture of dielectric nanoparticles and a curable polymer, The curable polymer consists of a resin and a curing agent, or comprises a resin and a curing agent, wherein the resin of the curable polymer has a positive CTE, and the dielectric nanoparticles have a different CTE from the resin. The above preparation is The steps include determining the weight ratio of the curable polymer to the dielectric nanoparticles, The steps include applying the suspension to the surface of the substrate, A method comprising the step of curing the suspension to form a nonconductive polymer layer having a desired CTE value.

2. The method according to claim 1, wherein the dielectric nanoparticles have a negative CTE.

3. The method according to claim 1, wherein the CTE of the dielectric nanoparticles is at least one order of magnitude lower than that of the resin.

4. The method according to any one of claims 1 to 3, wherein curing includes electron beam irradiation.

5. The method according to any one of claims 1 to 3, wherein the curing includes the application of photon emission.

6. The method according to claim 5, wherein the photon emission includes UV emission.

7. The method according to claim 5, wherein the photon emission includes heating.

8. The method according to any one of claims 1 to 7, wherein the curable polymer resin consists of or comprises one or more of epoxy resin, polyimide resin, and benzocyclobutene (BCB).

9. The method according to any one of claims 1 to 8, wherein the dielectric nanoparticles include Kevlar nanoparticles.

10. Dielectric nanoparticles are SiO ２ The method according to any one of claims 1 to 9, comprising nanoparticles.

11. Dielectric nanoparticles are α-ZrW ２ O ８ The method according to any one of claims 1 to 9, comprising nanoparticles.

12. Dielectric nanoparticles are β-ZrW ２ O ８ The method according to any one of claims 1 to 9, comprising nanoparticles.

13. The method according to any one of claims 1 to 12, wherein the selection / acquisition comprises a desired CTE of about 17 ppm / °C, thereby matching the CTE of copper (Cu).

14. The method according to any one of claims 1 to 12, wherein the selection / acquisition comprises a desired CTE at approximately 20 ppm / °C, thereby matching the CTE of silver (Ag).

15. The method according to any one of claims 1 to 12, wherein the selection / acquisition comprises a desired CTE of about 23 ppm / °C, thereby matching the CTE of aluminum (Al).

16. The method according to any one of claims 1 to 12, wherein the selection / acquisition includes a desired CTE of about 3.5 ppm / °C, thereby matching the CTE of silicon (Si).

17. The method according to any one of claims 1 to 12, wherein the selection / acquisition comprises a desired CTE of about 7.2 ppm / °C, thereby matching the CTE of gallium arsenide (GaAs).

18. The method according to any one of claims 1 to 12, wherein the selection / acquisition comprises a desired CTE of about 8 ppm / °C, thereby matching the CTE of indium phosphate (InP).

19. The method according to any one of claims 1 to 12, wherein the selection / acquisition comprises a desired CTE of about 5 ppm / °C, thereby matching any CTE of aluminum nitride (AlN), gallium nitride (GaN), 3C, 4H and / or 6H silicon carbide (SiC).

20. The method according to any one of claims 1 to 19, further comprising the step of removing an excess portion of the nonconductive polymer layer.

21. A semiconductor device or a component thereof, It comprises a dielectric layer having a controlled coefficient of thermal expansion (CTE), The dielectric layer comprises a mixture of dielectric nanoparticles and a curable polymer, and the curable polymer comprises a resin and a curing agent. A semiconductor device or component thereof, wherein the resin of the curable polymer has a positive CTE, and the dielectric nanoparticles have a CTE different from that of the resin.

22. The semiconductor device or component according to claim 21, wherein the dielectric nanoparticles include Kevlar nanoparticles.

23. The dielectric nanoparticles are SiO ２ A semiconductor device or component thereof according to claim 21, comprising nanoparticles.

24. The dielectric nanoparticles are α-ZrW ２ O ８ A semiconductor device or component thereof according to claim 21, comprising nanoparticles.

25. The dielectric nanoparticles include β-ZrW ２ O ８ nanoparticles. The semiconductor device or component thereof according to claim 21.

Images