35kV Transmission Line Ground Fault Detection and Analysis Device

Abstract

The basic principle, main features, and advantages of this test case have been shown and explained above. Those skilled in the art should understand that this test case is not restricted by the limitations of the above-mentioned embodiments, and what is described in the above-mentioned embodiments and the specification is only a preferred example of this test case and is not used to limit this test case. Without departing from the spirit and scope of this test case there are also various changes and improvements to this test case, and it should be understood that all of these changes and improvements fall within the scope of this test case that claims protection. The protection scope of this test case is defined by the scope of the appended patent claims and their equivalents. This test case relates to the technical field of line fault elimination equipment, specifically to a generator for converting low-voltage DC to 20kV high-voltage DC This generator is a full-load high-efficiency boost-type DC-DC converter designed based on the PWM / PFM modulation mode, and its system frame mainly includes: a PWM / PFM control circuit, a current sampling circuit, an oscillator, a VDD selection circuit, a logic control circuit a triangular wave signal and an enable signal. The main functional modules of this generator are a soft start circuit a reference voltage source, an error amplifier PWM / PFM switching control circuit. The design of this test case passes through high-precision power supply chip control technology and electronic filter voltage regulation technology, and can use a single-block 12V DC storage battery to boost a 12V power supply to 20kV DC voltage, and moreover can realize arbitrary adjustment of the 0-20kV voltage. Its overall weight is within 8KG, which facilitates the carrying and going out of personnel reduces the load around the body, and improves the detection of line faults and the efficiency of fault search. ​

Description

Technical Field

[0001] A generating device for converting low-voltage DC into 20 kV high-voltage DC This test case relates to the technical field of line fault elimination equipment. Specifically, it relates to a generating device for converting low-voltage DC into 20 kV high-voltage DC.

Background Art

[0002] During power transmission, the power transmission line is one of the core components. If a problem occurs in this component, situations such as the entire power transmission circuit being short-circuited will occur, leading to serious consequences. During the long-distance transmission process , many power transmission lines have to cross mountains, and the geological structure and geological conditions are very complex. It is generally difficult for personnel to directly arrive. It is necessary to quickly locate the current faulty location and dispatch personnel so that timely emergency repairs can be easily carried out. For example, the jurisdiction of the Honghe Power Bureau has many mountains. The 35 kV line is located in the mountainous terrain, with complex dense trees. There is no fault location device installed to cover it, and line faults often occur . After a fault occurs, the investigation is difficult, and a lot of human and material resources are consumed. After a fault occurs, only manual line patrol can be used for fault investigation, and there is no specialized fault investigation device. Currently, there are three types of power management chips most widely applied in the industry: linear regulator , switching power converter, and charge pump. The linear regulator has a simple structure, low noise , small ripple, and fast response speed. Currently, the low-dropout LDO is a popular research direction , and its working efficiency can be greatly improved. The switching power converter can achieve both step-up and step-down, and can be divided into step-up type, step-down type, and buck-boost type according to the topology structure . The switching power converter utilizes the capacitance and inductance storage characteristics, and further ​ By logically controlling the power tube switching, a stable output voltage is obtained. The conversion efficiency is high, with advantages such as high stability and small volume, and is widely applied in many fields as a substitute for linear regulators. The charge pump uses capacitance for energy storage, has a smaller volume, and lower cost. However, these three types of power management chips still have the following limitations: The output voltage of the linear regulator is necessarily lower than the input voltage and can only meet the step-down requirement. Due to the limitation of the topology structure, the charge pump has low conversion efficiency. At high frequencies, the working efficiency of the switching power converter decreases, mainly affected by switching losses, and it is necessary to comprehensively consider the losses generated in the system during design. The design of the digital switching power converter has high difficulty and complexity, is related to more academic fields, and the development cost is high. Moreover, most of the fault elimination devices used in transmission lines are large in size and heavy, which is inconvenient for on-site inspectors to carry and use. Therefore, a generating device for converting low-voltage DC to 20kV high-voltage DC is proposed.

Summary of the Invention

[0003] The purpose of this test case is to provide a generating device for converting low-voltage DC to 20kV high-voltage DC to solve the problems proposed in the above background technology. To achieve the solution of the above technical problems, one of the objectives of the present invention is to provide a generating device for converting low-voltage DC to 20kV high-voltage DC, and this generating device is a full-load high-efficiency step-up DC-DC converter designed based on the PWM / PFM modulation mode. Its system framework mainly includes: PWM / PFM control circuit, current sampling circuit, oscillator, VDD selection circuit ​​​​​​​​​ , a logic control circuit, a triangular wave signal and an enable signal, The main functional modules of this generator are Soft start circuit: The output voltage is gradually increased to the preset voltage through the soft start circuit to protect the operation safety of components and reduce the generation of surge current and overshoot voltage during the circuit startup stage. Reference voltage source: Adopt a structure that is not affected by voltage source and temperature to provide a high-precision reference voltage despite consumption. Error amplifier: The low-power single-stage amplifier design using a folded cascode structure meets the performance requirements of the chip. PWM / PFM switching control circuit: By detecting the duty cycle of the PWM comparator output signal, a smoother switching between PWM and PFM modes is realized. In a further improvement of the present invention, the system framework of the generator further includes a PWM comparator and a triangular wave signal and the output signal of the error amplifier are respectively input to both ends of the PWM comparator. When the surge protection state ends, the output signal of the surge protection circuit becomes low level. The output signal of the PWM comparator is the switching control signal of the oscillator. When in the hop cycle state, the output signal of the PWM comparator is in a low level state throughout one cycle. At this time, the oscillator stops operating to reduce energy loss, and the oscillator resumes operation until the output signal of the PWM comparator becomes high level again. In a further improvement of the present invention, the PWM / PFM control circuit includes a PWM / PFM mode switching logic circuit, a zero-crossing comparison circuit, a peak current limiting circuit, and an anti-ringing circuit. In a further improvement of the present invention, the operating principle of the soft start circuit is that when the surge protection state ends, the output signal of the surge protection circuit becomes low level. The output signal of the PWM comparator is the switching control signal of the oscillator. When in the hop cycle state, the output signal of the PWM comparator is in a low level state throughout one cycle. At this time, the oscillator stops operating to reduce energy loss, and the oscillator resumes operation until the output signal of the PWM comparator becomes high level again. In a further improvement of the present invention, the PWM / PFM control circuit includes a PWM / PFM mode switching logic circuit, a zero-crossing comparison circuit, a peak current limiting circuit, and an anti-ringing circuit. In a further improvement of the present invention, the operating principle of the soft start circuit is that when the surge protection state ends, the output signal of the surge protection circuit becomes low level. When the power-on operation of the step-up DC-DC converter in the device occurs, the output voltage gradually goes to zero and then rises to the preset value. Therefore, at the startup stage, the feedback voltage is relatively small. When inputting the error amplifier together with the fixed reference voltage, the output of the error amplifier is too high. Finally, the PWM comparator outputs a modulation signal with a large duty ratio, and the conduction time of the NMOS power tube is too long and the inductance current continues to increase, resulting in the generated surge current and overshoot voltage damaging the chip. The soft start circuit generates a gradually rising reference voltage to limit the output of the error amplifier and avoid the duty ratio signal being too large. As a further improvement of the present invention, the operating principle of the reference voltage source is In order to achieve high efficiency at full load for the step-up DC-DC converter in the generating device, it is necessary to select a circuit structure with as low power consumption as possible The conventional bandgap reference circuit has a complex structure and requires an operational amplifier circuit and a startup circuit The performance of the operation directly affects the accuracy of the output reference voltage, and the quiescent current is generally a dozen μA which is disadvantageous for high-efficiency design. The reference voltage source adopts a depletion reference to simplify the circuit structure, eliminating the need for an op-amp circuit and a startup circuit reducing the layout area, saving costs, and significantly reducing the static power consumption The depletion structure reference voltage source does not require a startup circuit, has a simpler circuit structure and its extremely low static power consumption meets the design goals of a high-efficiency system. As a further improvement of the present invention, the operating principle of the error amplifier is The NMOS load in the generating device adopts a low-voltage connection method to make the output voltage amplitude of the error amplifier larger First, an appropriate bias voltage is provided. The input terminals of the error amplifier are respectively supplied from the reference voltage circuit A given gradually rising reference voltage and a feedback voltage, and the output voltage value is sampled in real time at a fixed preset ratio of the difference amplification signal between the gradually rising reference voltage and the feedback voltage as the output signal of the error amplifier. When the output voltage drops, the feedback voltage signal follows the drop. At this time, the gradually rising reference voltage > feedback voltage, the output signal rises, the duty ratio increases, and the recovery of the output voltage is adjusted. When the output voltage rises and falls, the feedback voltage signal follows the rise. At this time, the gradually rising reference voltage < feedback voltage, the output signal drops, the duty ratio decreases slightly, and the drop of the output voltage is adjusted. As a further improvement of the present invention, the operating principle of the PWM / PFM switching control circuit is by detecting the duty ratio of the output signal of the PWM comparator, when the load current increases from light load, the duty ratio of the output signal of the PWM comparator increases. When it becomes large to a certain extent, it automatically switches to the PWM operation mode. Compare the high-level time of the output signal of the PWM comparator with the time required for the inductor current to reach the current limit value, and the signal with the longer time determines the on-time of the NMOS power tube, making the switching of the system between the two operation modes of PWM and PFM smoother. The two purposes of this test plan are to provide a working method for a generating device that converts low-voltage DC into 20 kV high-voltage DC, including the following steps: S1. When the enable signal terminal is at a high level, the boost circuit starts to operate. S2. The VDD selection circuit compares the output voltage with the input voltage, and the larger one of the two is used as the power supply voltage for each module in the circuit. S3. Before the voltage value of the output voltage rises to the input voltage, the surge protection circuit functions. At this time, the high-level time of the output signal of the PWM comparator and the time required for the inductor current to reach the current limit value are compared, and the signal with the longer time determines the on-time of the NMOS power tube, making the switching of the system between the two operation modes of PWM and PFM smoother. the high-level time of the output signal of the PWM comparator and the time required for the inductor current to reach the current limit value are compared, and the signal with the longer time determines the on-time of the NMOS power tube, making the switching of the system between the two operation modes of PWM and PFM smoother. the high-level time of the output signal of the PWM comparator and the time required for the inductor current to reach the current limit value are compared, and the signal with the longer time determines the on-time of the NMOS power tube, making the switching of the system between the two operation modes of PWM and PFM smoother. The two purposes of this test plan are to provide a working method for a generating device that converts low-voltage DC into 20 kV high-voltage DC, including the following steps: S1. When the enable signal terminal is at a high level, the boost circuit starts to operate. S2. The VDD selection circuit compares the output voltage with the input voltage, and the larger one of the two is used as the power supply voltage for each module in the circuit. S3. Before the voltage value of the output voltage rises to the input voltage, the surge protection circuit functions. At this time, the high-level time of the output signal of the PWM comparator and the time required for the inductor current to reach the current limit value are compared, and the signal with the longer time determines the on-time of the NMOS power tube, making the switching of the system between the two operation modes of PWM and PFM smoother. S3. Before the voltage value of the output voltage rises to the input voltage, the surge protection circuit functions. At this time, The feedback loop does not operate, the power switch tube is closed, and the reflux tube is controlled by the DC circuit to be conducted and charge the output capacitor until the output voltage equals the input voltage. S4. When the state in step S3 ends, the surge protection signal jumps, and each module starts to operate normally and enters the closed-loop control stage. S5. In the process of the output voltage gradually rising to a preset value, utilize the soft start circuit to obtain a gradually rising reference voltage, and the differential mode value with the feedback voltage is small. Avoid the duty ratio at this stage being too large and the output voltage overshooting. S6. When the load current is small, operate in the PFM mode and skip some cycles. If it does not operate in some cycles, close the continuous tube by the zero-crossing detection circuit. When the load current is large, P operate in the WM mode, and through the automatic switching of the PWM / PFM mode, the system efficiency is always maintained at a high level. The three purposes of this test are to provide a system control device of a generating device including a processor, a memory, and a computer program stored in the memory and operating on the processor. The processor is used to realize the steps of the generating device and its working method that convert the above-mentioned low-voltage DC into 20 kV high-voltage DC when executing the computer program. The four purposes of this test are to provide a computer-readable storage medium storing a computer program. When the computer program is executed by a processor, realize the steps of the generating device and its working method that convert the above-mentioned low-voltage DC into 20 kV high-voltage DC. That is. Compared with the prior art, the beneficial effects of this test case: 1. This generating device that converts low-voltage DC into 20 kV high-voltage DC adopts high-precision power chip control technology and and and and 1. This generating device for converting low-voltage DC to 20 kV high-voltage DC incorporates high-precision power chip control technology and Through the electronic filter voltage regulation technology, using a single-block 12V DC battery, the 12V power source can be boosted to 20kV DC voltage, and moreover, any regulation of the 0 - 20kV voltage can be achieved. 2. The total weight of the generator that converts this low-voltage DC to 20kV high-voltage DC is within 8KG, which facilitates the personnel to carry it out, reduces the hand luggage load, and improves the detection of line faults and the efficiency of fault search.

Brief Description of the Drawings

[0004]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Modes for Carrying Out the Invention

[0005] Hereinafter, in combination with the drawings in the embodiments of this test, a clear and complete description will be given for the technical solutions in the embodiments of this test. Obviously, the described embodiments are only part of the embodiments of this test and not all of them. Based on the embodiments of this test case, all other embodiments obtained by those of ordinary skill in the art without creative labor belong to the protection scope of this test case. Example 1 As shown in FIG. 1, this embodiment is a full-load high-efficiency boost DC-DC converter designed based on the PWM / PFM modulation mode, which converts low-voltage DC into 20 kV high-voltage DC. The generation device is provided, and its system framework mainly includes a PWM / PFM control circuit, a current sampling circuit, an oscillator, a VDD selection circuit, a logic control circuit, a triangular wave signal, an enable signal, an error amplifier, and a PWM comparator. The output signals of the triangular wave signal and the error amplifier are respectively input to both ends of the PWM comparator. When the surge protection state ends, the output signal of the surge protection circuit becomes a low level. The output signal of the PWM comparator is the switching control signal of the oscillator. When in the hop cycle state, the output signal of the PWM comparator is in a low-level state throughout one cycle. At this time, the oscillator stops operating to reduce energy loss. The oscillator resumes operation until the output signal of the PWM comparator becomes high level again. Please refer to FIG. 5. Here, the PWM / PFM control circuit includes a PWM / PFM mode switching logic circuit, a zero-crossing comparison circuit, a peak current limiting circuit, and an anti-ringing circuit. In FIG. 1, is the input voltage, is the output voltage, and the sum is the feedback voltage-dividing resistor. MN1 is a power switch tube, and MP1 is a reflux tube. Specifically, when the enablement signal terminal is at a high level, the boost circuit starts to operate. The output voltage and the input voltage are compared by the VDD selection circuit, and the larger of the two is used as the power supply voltage VDD of each module in the circuit. Before the voltage value of the output voltage rises to the input voltage, the surge protection circuit functions. At this time, the feedback loop does not operate, the power switching tube MN1 is closed, and the reflux tube MP1 is conducted under the control of the DC circuit until the output voltage is equal to the input voltage. When the output voltage is equal to the input voltage, the feedback loop starts to operate. The error amplifier samples the output voltage, and the output signal of the error amplifier and the triangular wave signal are input to both ends of the PWM comparator respectively. The output signal of the PWM comparator controls the on and off of the power switching tube MN1 to adjust the duty cycle of the power switching tube MN1, so as to control the output voltage of the boost circuit. When the output voltage is higher than the input voltage, the PWM / PFM control circuit switches to the PWM mode. When the output voltage is lower than the input voltage, the PWM / PFM control circuit switches to the PFM mode. In the PWM mode, the PWM comparator compares the output signal of the error amplifier and the triangular wave signal to generate a PWM signal to control the on and off of the power switching tube MN1. In the PFM mode, the oscillator generates a pulse signal, and the duty cycle of the pulse signal is adjusted by the peak current limiting circuit and the anti-ringing circuit to control the on and off of the power switching tube MN1. The current sampling circuit samples the current flowing through the power switching tube MN1, and the sampled current signal is input to the peak current limiting circuit. The peak current limiting circuit limits the peak current of the power switching tube MN1 to protect the power switching tube MN1 from being damaged. The anti-ringing circuit suppresses the ringing phenomenon generated when the power switching tube MN1 is turned off to improve the stability of the circuit. The VDD selection circuit selects the appropriate power supply voltage VDD for each module in the circuit according to the comparison result of the output voltage and the input voltage. The logic control circuit controls the operation of each module in the circuit according to the input signal and the output signal of each module. The system also includes a surge protection circuit. When a surge occurs, the surge protection circuit clamps the voltage at both ends of the power switching tube MN1 to protect the power switching tube MN1 from being damaged. When the surge protection state ends, the output signal of the surge protection circuit becomes a low level. The output signal of the PWM comparator is the switching control signal of the oscillator. When in the hop cycle state, the output signal of the PWM comparator is in a low-level state throughout one cycle. At this time, the oscillator stops operating to reduce energy loss. The oscillator resumes operation until the output signal of the PWM comparator becomes high level again. Here, the PWM / PFM control circuit includes a PWM / PFM mode switching logic circuit, a zero-crossing comparison circuit, a peak current limiting circuit, and an anti-ringing circuit. In FIG. 1, is the input voltage, is the output voltage, and the sum is the feedback voltage-dividing resistor. MN1 is a power switch tube, and MP1 is a reflux tube. Specifically, when the enablement signal terminal is at a high level, the boost circuit starts to operate. The output voltage and the input voltage are compared by the VDD selection circuit, and the larger of the two is used as the power supply voltage VDD of each module in the circuit. Before the voltage value of the output voltage rises to the input voltage, the surge protection circuit functions. At this time, the feedback loop does not operate, the power switching tube MN1 is closed, and the reflux tube MP1 is conducted under the control of the DC circuit until the output voltage is equal to the input voltage. When charging the output capacity, when this state ends, the surge protection signal jumps, and each module starts to operate normally and enters the closed-loop control stage. As the output voltage gradually rises to the preset value, a reference voltage that rises gently is obtained by using the soft start circuit during the process. The differential mode value with the feedback voltage is small, and the duty ratio at this stage is too large to avoid the output voltage from overshooting. When the load current is small, it operates in the PFM mode. If several cycles are skipped and it does not operate, the zero-crossing detection circuit closes the continuous flow tube MP1. When the load current is large, it operates in the PWM mode. Through the automatic switching of the PWM / PFM mode, the system efficiency is always maintained at a high level. In this embodiment, the main functional modules of this generating device are First, the soft start circuit: Through the soft start circuit, the output voltage is gradually increased to the preset voltage to protect the safe operation of components and reduce the generation of surge current and overshoot voltage in the circuit start stage. When the power-on operation of the boost-type DC-DC converter in the device occurs, the output voltage gradually rises from zero to the preset value. Therefore, in the startup stage, the feedback voltage is relatively small. When inputting the error amplifier with a fixed reference voltage, the output of the error amplifier is too high, and finally the PWM comparator outputs a modulation signal with a large duty ratio, the conduction time of the NMOS power tube is too long and the inductance current continues to increase, and the generated surge current and overshoot voltage damage the chip. To avoid the above situation, this test plan designs a soft start circuit to limit the output of the error amplifier by generating a gradually rising reference voltage and avoid the duty ratio signal from being too large. As shown in FIG. 2, the configuration diagram of the soft start control circuit. In FIG. 2, M1 and M2 are all power switching tubes, and although M3, M4, and M5 are all dissipative, G ND is the ground potential, C1 is the filter capacitance, R1 is the load resistance, the bias voltage, VDD is the supply voltage , and the surge protection signal. II. Reference voltage source: Adopt a structure that, despite being dissipative, provides a high-precision reference voltage that is not affected by the voltage source and temperature. The reference voltage source with a dissipative structure does not require a startup circuit, but the circuit structure is simpler, and its extremely low static power consumption meets the design goal of a high-efficiency system. To achieve high efficiency at full load in the boost-type DC-DC converter in the generator, it is necessary to select a circuit structure with as low power consumption as possible. The conventional bandgap reference circuit has a complex structure and requires an operational amplifier circuit and a startup circuit. The performance of the operation directly affects the accuracy of the output reference voltage, and the consumption current is generally in the tens of μA , which is disadvantageous for high-efficiency design. The reference voltage source of this test case adopts a depletion reference, simplifies the circuit structure, does not require an op-amp circuit and a startup circuit, reduces the layout area, saves costs, and can significantly reduce the static power consumption. As shown in FIG. 3, the circuit configuration diagram of the depletion reference. In FIG. 3, M7 and M8 are both switching tubes, M9 is an enhancement tube, the signal EN is an enable control signal, and EN_N is its inverted control signal. When EN is at a high level, the circuit operates normally. At this time, the M1 tube is in the off state, the switch tubes M6 and M10 are in the on state, and M4, M5, and M11 are dissipative but their threshold voltages are negative values. The gate of the M5 tube is directly connected, and when the M6 tube is on , M4, M5, and M11 are dissipative, but their threshold voltages are negative values. The gate of the M5 tube is directly connected, and when the M6 tube is on , the gate of the M5 tube is directly connected, and when the M6 tube is on Then the gate-source voltage becomes equal to zero, and a constant branch current is generated. The presence of the consumption M4 can suppress the channel length modulation effect and reduce the influence of the VDD change on the current of the M5 transistor. However, the current of a certain branch of the M5 transistor is copied to a certain branch of the M9 through a current mirror and is converted into the gate voltage of the M9, that is, the reference voltage, through an I-V . M12 is a switching transistor and is controlled by a soft start signal to generate a gradually rising reference voltage. III. Error amplifier: The design of a low-power single-stage amplifier adopting a folded cascode structure is to meet the performance requirements of the chip. The error amplifier is one of the core modules of the DC-DC converter designed in this test. The superiority or inferiority of its performance directly affects the accuracy of the output voltage and the response speed of the system. The multi-stage amplifier has a high gain, but a large quiescent current and is also disadvantageous for compensation. For the DC-DC converter designed in this test plan, the single-stage amplifier meets the requirements of a lower power consumption design, and the folded cascode structure has a large gain and can meet the performance requirements of the chip. Different from the conventional folded cascode structure, the NMOS load in the generator designed in this test plan adopts a low-voltage connection method to make the output voltage amplitude of the error amplifier larger. The circuit diagram of the error amplifier is as shown in Figure 4. In Figure 4,,,,,,,,,,,, ,,,,,,,,,,,, first provides an appropriate bias voltage. The input terminals of the error amplifier are respectively the gradually rising reference voltage and the feedback voltage supplied from the reference voltage circuit, and samples the output voltage value in real time at a specific ratio. The differential amplification signal of the gradually rising reference voltage and the feedback voltage is used as the output signal of the error amplifier. ​​​When the output voltage drops, the feedback voltage signal follows the drop and gradually rises at this time. Reference voltage > feedback voltage, the output signal rises, the duty ratio increases, and the recovery of the output voltage is adjusted. When the output voltage rises and falls, the feedback voltage signal follows the rise and gradually rises at this time. Reference voltage < feedback voltage, the output signal drops, the duty ratio decreases slightly, and the drop of the output voltage is adjusted. IV. PWM / PFM switching control circuit: By detecting the duty cycle of the output signal of the PWM comparator, a smoother switching between PWM and PFM modes is realized. By detecting the duty ratio of the output signal of the PWM comparator, when the load current increases from a light load, the signal duty ratio increases. When it becomes a certain degree larger, it automatically switches to the PWM operation mode. Comparing the "hard" switching of the detection current, the detected duty ratio can make the switching between PWM and PFM modes smoother. Compare the high-level time of the output signal of the PWM comparator with the time required for the inductance current to reach the current limit value. The signal with a longer duration determines the conduction time of the NMOS power tube, making the switching of the system between the two operation modes of PWM and PFM smoother. The PWM / PFM switching control circuit diagram is shown in Figure 5. Also, in one cycle, let the high-level time of the output of the PWM comparator be t1 and the time for the inductance current to reach the current limiting point be t2. When the load is light, the converter operates in the PFM mode, t1 < t2, the signal turns on the NMOS power tube. After reaching the peak current limiting point, the signal turns off the NMOS power tube and turns on the PMOS power tube to enter the continuous stage. The PWM / PFM switching control circuit designed in this test case uses an RS flip-flop as the key logic circuit. As a circuit, its specific operating principle is as follows: During light load, the output of the error amplifier is low , the signal output high-level time is short, the S terminal of the input RS flip-flop, the signal initial state is low level, the Q terminal maintains high level, and NOR1 outputs a low-level signal. OSC _N is the inversion of the oscillator signal OSC, which is low level at this time, and the output signal of NOR2 control_N is high level, and at this time the NMOS power tube is turned on. The inductor Until the current reaches the current limit point, the signal becomes high level, and the RS flip-flop is reset, the Q terminal becomes low level, and at this time it has already become low level, co ntrol_N is low level, and at this time the NMOS power tube is turned off. When the load is increased, the output signal VE of the error amplifier increases, and the high-level time t1 increases . When t1>t2, the on and off of the NMOS power tube are controlled by the signal and the OSC signal and is not affected by the signal, that is, the converter enters the PWM operation mode. In this state , the specific operating principle of the PWM / PFM switching control circuit is as follows: The signal input RS The S terminal of the flip-flop, the Q terminal outputs high level, and NOR1 outputs low level. When the signal becomes high level and Q becomes low level, the signal remains high level, and NOR1 outputs low level, and the NMOS power tube remains on until the signal becomes low level. Also, the signal is input into the RS flip-flop, and the discrimination signal between the PWM and PFM modes is output . If the signal is high level, it operates in the PWM mode, and if it is low level, it operates in the PFM mo de. This improves the accuracy of the fault detection range in different situations. Based on the characteristics of the 35kV cable insulation in the Honghe area, the device developed in this case is a DC boost Adopt the technology, based on the voltage doubling principle, through a single-block 12V DC battery, with high precision Through the power supply chip control technology and the electronic filter voltage regulation technology, the 12V power supply can be boosted to 20kV DC voltage and moreover, any adjustment of the 0 - 20kV voltage can be realized. Also, the weight of the device can be reduced to 8KG, which is convenient for people on-site to carry and use . This embodiment also provides a working method for a generating device that converts low-voltage DC to 20kV high-voltage DC, including the following steps: S1. When the enable signal terminal is at a high level, the boost circuit starts to operate. S2. The VDD selection circuit compares the output voltage with the input voltage, and the power supply voltage VDD for each module in the large circuit between the two is obtained. S3. Before the voltage value of the output voltage rises to the input voltage, the surge protection circuit functions. At this time, the f eedback loop does not operate, the power switch tube MN1 is closed, and the reflux tube MP1 is conducted under the control of the direct charging circuit to charge the output capacitor until the output voltage is equal to the input voltage. S4. When the state in step S3 ends, the surge protection signal jumps, and each module starts to operate normally and enters the closed-loop control stage. S5. In the process of the output voltage gradually rising to a preset value, use the soft start circuit to obtain a gradually rising reference voltage, and the differential mode value with the feedback voltage is small. Avoid the output voltage overshooting because the duty ratio at this stage is too large. S6. When the load current is small, operate in the PFM mode and skip several cycles without operating. When the zero-crossing detection circuit closes the continuous flow tube MP1. When the load current is large , operate in the PWM mode, and through the automatic switching between the PWM / PFM modes, the system efficiency is achieved. The rate always maintains a high level. As shown in FIG. 6, this embodiment provides a system control device of a generator including a processor, a memory, and a computer program stored in the memory and operating on the processor. . The processor includes one or more processing cores, and the processor is connected to the memory via a bus. The memory is used to store program instructions, and the processor converts the above-mentioned low-voltage DC into 20 kV high-voltage DC when executing the program instructions in the memory, and realizes the steps of the generator and its working method. Optionally, the memory can be implemented by any type of volatile or non-volatile storage device such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk, optical disk, or a combination thereof. In addition, in this test, a computer-readable storage medium storing a computer program is provided. When the computer program is executed by a processor, the steps of the generator for converting the above-mentioned low-voltage DC into 20 kV high-voltage DC and its working method are realized. Optionally, this test case also provides a computer program product including instructions for causing a computer to execute the steps of the generator for converting the low-voltage DC in each of the above aspects into 20 kV high-voltage DC and its working method when operating on the computer. Those skilled in the art know that the process of realizing all or part of the steps of the above embodiment is hardware. It can be executed by software or instruct the execution of related hardware by a program. The program can be stored in a computer-readable storage medium. It can be executed by software or instruct the execution of related hardware by a program. The program can be stored in a computer-readable storage medium. The above storage medium can be a read-only memory, a magnetic disk, an optical disk, etc. It can be understood that it can be done.

Claims

1. A generating device for converting low-voltage direct current into 20 kV high-voltage direct current, a full-load high-efficiency boost-type DC-DC converter designed based on the PWM / PFM modulation mode and including a PWM / PFM control circuit, a current sampling circuit, an oscillator, a VDD selection circuit, and a logic control circuit, a triangular wave signal, and an enable signal, as a functional module, a soft start circuit, gradually raising the output voltage to a preset voltage through the soft start circuit to protect the operation safety of components and reduce the generation of surge current and overshoot voltage during the circuit startup phase, a reference voltage source, adopting a structure despite power consumption to provide a high-precision reference voltage that is not affected by the voltage source and temperature, an error amplifier, adopting a folded cascode structure for low-power single-stage amplifier design to meet the performance requirements of the chip, a PWM / PFM switching control circuit, detecting the duty ratio of the output signal of the PWM comparator to achieve smoother switching between the PWM and PFM modes, S1. When the enable signal terminal is at a high level, the step of starting the operation of the boost circuit 、 and S2. Comparing the output voltage and the input voltage by the VDD selection circuit and setting the higher of the two as the power supply voltage of each module in the circuit, S3. Before the voltage value of the output voltage rises to the input voltage, the surge protection circuit functions. At this time, the feedback loop does not operate, the power switch tube is closed, and the reflux tube is more conducted under the control of the DC circuit to charge the output capacitor until the output voltage equals the input voltage, S4. When the state in step S3 ends, the surge protection signal jumps, and each module starts to operate normally and enters the closed-loop control stage, S5. In the process of the output voltage gradually rising to a preset value, using the soft start circuit to obtain a gently rising reference voltage, so that the differential mode value from the feedback voltage is small, and the duty ratio at this stage is not too large to avoid overshoot of the output voltage, S6. When the load current is small, operating in the PFM mode, and when skipping several cycles and not operating, closing the continuous tube by the zero-crossing detection circuit. When the load current is large, operating in the PWM mode, and maintaining a high level of system efficiency at all times through the automatic switching between the PWM / PFM modes, A generating device for converting low-voltage direct current into 20 kV high-voltage direct current, including

2. A generator for converting low-voltage direct current to 20 kV high-voltage direct current according to Claim 1, including a PWM comparator, wherein a triangular wave signal and an output signal of an error amplifier are respectively input to both ends of the PWM comparator, when the surge protection state ends, the output signal of the surge protection circuit becomes a low level, the output signal of the PWM comparator is a switching control signal of an oscillator, and in the hop cycle state when in this state, the output signal of the PWM comparator becomes a low level state throughout one cycle, at this time the oscillator stops operating, reducing energy loss, and when the output signal of the PWM comparator becomes high level again, the oscillator resumes operation, a generator for converting low-voltage direct current to 20 kV high-voltage direct current.

3. A generator for converting low-voltage direct current to 20 kV high-voltage direct current according to Claim 1, the PWM / PFM control circuit includes a PWM / PFM mode switching logic circuit, a zero-crossing comparison circuit , a peak current limiting circuit, and an anti-ringing circuit, a generator for converting low-voltage direct current to 20 kV high-voltage direct current.

4. A generator for converting low-voltage direct current to 20 kV high-voltage direct current according to Claim 1, the operating principle of the soft start circuit is, when the power-on operation of the boost-type DC-DC converter occurs, the output voltage gradually rises from zero to the preset value, and in the startup stage, the feedback voltage is relatively small. When input to the error amplifier together with a fixed reference voltage, the output of the error amplifier becomes high, and the PWM comparator outputs a modulation signal with a large duty ratio, making the conduction time of the NMOS power tube longer, the inductance current increases, and the chip is damaged by the generated surge current and overshoot voltage. The soft start circuit generates a gradually rising reference voltage to limit the output of the error amplifier, avoiding the duty cycle signal being too large, a generator for converting low-voltage direct current to 20 kV high-voltage direct current.

5. A generator for converting low-voltage direct current to 20 kV high-voltage direct current according to Claim 1, the operating principle of the reference voltage source is, in order for the boost-type DC-DC converter to achieve high efficiency at full load, it is necessary to select a circuit structure with as low power consumption as possible, the conventional bandgap reference circuit has a complex structure and requires the use of an operational amplifier circuit and a startup circuit. The performance of the operation directly affects the accuracy of the output reference voltage, and the quiescent current is generally a dozen μA, which is disadvantageous for high-efficiency design, ​ ​ ​ ​ ​ The reference voltage source adopts a depletion reference, simplifies the circuit structure, eliminates the need for an operational amplifier circuit and a startup circuit, reduces the layout area, saves costs, and can significantly reduce the static power consumption. A generator that converts low-voltage DC into 20 kV high-voltage DC.

6. The generator for converting low-voltage DC into 20 kV high-voltage DC according to Claim 1, The operating principle of the error amplifier is as follows: The NMOS load in the generator adopts a low-voltage connection method, increasing the output voltage amplitude of the error amplifier. First, an appropriate bias voltage is provided. The input terminals of the error amplifier are respectively the gradually rising reference voltage and the feedback voltage supplied from the reference voltage circuit. The output voltage value is sampled in real time at a certain preset ratio, and the differential amplification signal of the gradually rising reference voltage and the feedback voltage is used as the output signal of the error amplifier. When the output voltage decreases, the feedback voltage signal follows the decrease. At this time, the gradually rising reference voltage > the feedback voltage, the output signal rises, the duty ratio increases, and the recovery of the output voltage is adjusted. When the output voltage rises and falls, the feedback voltage signal follows the rise. At this time, the gradually rising reference voltage < the feedback voltage, the output signal decreases, the duty ratio decreases, and the decrease of the output voltage is adjusted. A generator that converts low-voltage DC into 20 kV high-voltage DC.

7. The generator for converting low-voltage DC into 20 kV high-voltage DC according to Claim 1, The operating principle of the PWM / PFM switching control circuit is as follows: By detecting the duty ratio of the output signal of the PWM comparator, When the load current increases from a light load, the duty ratio of the output signal of the PWM comparator increases. When it becomes large to a certain extent, it automatically switches to the PWM operation mode. The high-level time of the output signal of the PWM comparator and the time required for the inductance current to reach the current limit value are compared. The signal with a longer time determines the on-time of the NMOS power tube, making the switching of the system between the two operation modes of PWM and PFM smoother. A generator that converts low-voltage DC into 20 kV high-voltage DC. ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​

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