Printed wiring board and its manufacturing method

Abstract

To provide a print circuit board having a miniaturized conductive pattern, in which the roughness of the surface of the wiring portion during manufacture is small, and a manufacturing method thereof.SOLUTION: A print circuit board according to an embodiment of the present invention includes a base film 1 having insulating properties, and a conductive pattern 2 laminated on at least one side of the base film 1, and a plurality of wiring portions 11 included in the conductive pattern have an average width W of 5 μm or more and 20 μm or less, each of the wiring portions includes a seed layer 11a and a plating layer 11b, and the plating layer has a copper crystal plane (111), (200), (220), and (311), and the intensity ratio IR220 of the copper crystal plane (220) determined by the following formula (1) is 0.05 or more and 0.14 or less. IR220=I220 / (I111+I200+I220+I311) (1). I111 is the X-ray diffraction intensity of (111), I200 is the X-ray diffraction intensity of (200), I220 is the X-ray diffraction intensity of (220), and I311 is the X-ray diffraction intensity of (311).SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present disclosure relates to a printed wiring board and a method for manufacturing the same. [Background technology]

[0002] In recent years, there has been a demand for electronic devices to have higher performance, smaller size, and lighter weight. Accordingly, there has been a demand for printed wiring boards having fine conductive patterns. Here, a flexible printed circuit board having a fine conductive pattern and a manufacturing method thereof have been proposed. This proposal relates to a flexible printed circuit board in which a copper thin film made of copper or an alloy mainly composed of copper is directly bonded to at least one side of a plastic film, and the state of the surface of the plastic film substrate to be formed is controlled, and the conditions for forming the copper thin film are optimized, thereby controlling the interface structure between the plastic film and the copper thin film and the crystal structure of the copper thin film to be subsequently grown, and the flexible printed circuit board has very strong adhesion and can be patterned into a high-definition circuit by etching, and a manufacturing method thereof (JP Patent Publication No. 2004-31370). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2004-31370 A Summary of the Invention

[0004] The printed wiring board of the present disclosure includes an insulating base film and a conductive pattern laminated on at least one surface side of the base film, the conductive pattern including a plurality of wiring portions, the plurality of wiring portions having an average width of 5 μm or more and 20 μm or less, the plurality of wiring portions including a seed layer mainly made of copper and a plating layer mainly made of copper laminated on the seed layer, the crystal faces of copper crystal grains included in the plating layer include a (111) plane, a (200) plane, a (220) plane, and a (311) plane, and an intensity ratio IR of X-ray diffraction intensity of the (220) plane calculated by the following formula (1):220 is greater than or equal to 0.05 and less than or equal to 0.14. IR 220 =I 220 / (I 111 +I 200 +I 220 +I 311 ) · · · (1) (In formula (1), I 111 is the X-ray diffraction intensity of the (111) plane, and I 200 is the X-ray diffraction intensity of the (200) plane, and I 220 is the X-ray diffraction intensity of the (220) plane, and I 311 is the X-ray diffraction intensity of the (311) plane.)

[0005] The method for manufacturing a printed wiring board according to the present disclosure includes a step of forming a conductive pattern including a plurality of wiring portions on at least one surface side of an insulating base film by a semi-additive method, and the step of forming the conductive pattern includes a step of laminating a copper-based seed layer on the one surface side of the base film, a step of forming a resist pattern having an inverted shape of the plurality of wiring portions on a surface of the seed layer, a step of laminating a copper-based plating layer on the surface of the seed layer after the step of forming the resist pattern, a step of removing the resist pattern after the step of laminating the plating layer, and a step of removing by etching the seed layer exposed by the step of removing the resist pattern 24 hours or more after completion of the step of laminating the plating layer. [Brief description of the drawings]

[0006] [Figure 1] FIG. 1 is a schematic cross-sectional view showing a printed wiring board according to one embodiment of the present invention. [Diagram 2] FIG. 2 is a schematic cross-sectional view showing a step of laminating a seed layer in the method of manufacturing the printed wiring board of FIG. [Diagram 3] FIG. 3 is a schematic cross-sectional view showing a step of forming a resist pattern in the method for producing the printed wiring board of FIG. [Figure 4]FIG. 4 is a schematic cross-sectional view showing a step of laminating plating layers in the method of manufacturing the printed wiring board of FIG. [Diagram 5] FIG. 5 is a schematic cross-sectional view showing a step of removing the resist pattern in the method for producing the printed wiring board of FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0007] [Problem that this disclosure aims to solve] When producing a printed wiring board having a fine conductive pattern as proposed in Patent Document 1, there is a risk of product defects due to roughness of the wiring surface during manufacturing, compared to producing a conventional printed wiring board.

[0008] The present disclosure has been made in light of the above circumstances, and aims to provide a printed wiring board having a fine conductive pattern in which the surface roughness of the wiring portion during manufacturing is reduced, and a method for manufacturing the same.

[0009] [Effects of this disclosure] According to the present disclosure, it is possible to provide a printed wiring board that can reduce roughness of the wiring surface during manufacturing, even for a printed wiring board having a fine conductive pattern, and it is also possible to provide a method for manufacturing a printed wiring board that can produce a printed wiring board having a fine conductive pattern and with little roughness of the wiring surface.

[0010] [Description of the embodiment of the present invention] The embodiments of the present invention will be described below.

[0011] A printed wiring board according to one aspect of the present invention includes an insulating base film and a conductive pattern laminated on at least one surface side of the base film, the conductive pattern including a plurality of wiring portions, the plurality of wiring portions having an average width of 5 μm or more and 20 μm or less, the plurality of wiring portions including a seed layer mainly made of copper and a plating layer mainly made of copper laminated on the seed layer, the crystal faces of copper crystal grains included in the plating layer include a (111) plane, a (200) plane, a (220) plane, and a (311) plane, and an intensity ratio IR of X-ray diffraction intensity of the (220) plane calculated by the following formula (1): 220 is 0.05 or more and 0.14 or less. IR 220 =I 220 / (I 111 +I 200 +I 220 +I 311 ) · · · (1) Here, in formula (1), I 111 is the X-ray diffraction intensity of the (111) plane, and I 200 is the X-ray diffraction intensity of the (200) plane, and I 220 is the X-ray diffraction intensity of the (220) plane, and I 311 is the X-ray diffraction intensity of the (311) plane.

[0012] The inventors have made extensive research and found that in a printed wiring board having a fine conductive pattern with an average width of 20 μm or less, if the surface of the wiring part is rough after etching, it causes product defects such as poor appearance and deterioration of high frequency characteristics, and that this is because etching is performed from the parts of the crystal faces of the copper crystal grains contained in the plating layer of the wiring part that have an orientation that is easily scraped, or etching is performed from the parts where the grain size of the copper crystal grains is small, which leads to the roughness of the wiring part surface. It has also been found that an additive contained in the plating solution required for the process of laminating the plating layer is one of the causes of the small grain size of the copper crystal grains. In this printed wiring board, the roughness of the wiring part surface during manufacturing is reduced because the composition ratio of the copper crystal grains contained in the plating layer that have an orientation that is easily scraped is reduced, or the average grain size of the copper crystal grains is increased.

[0013] The copper crystal grains preferably have an average grain size of 0.2 μm to 8 μm. By having the average grain size of the copper crystal grains fall within the above range, the grain size variation of the copper crystal grains can be suppressed, and roughness of the wiring surface during manufacturing can be reduced.

[0014] The intensity ratio IR of the X-ray diffraction intensity of the (111) plane is calculated by the following formula (2): 111 It is preferable that the ratio is 0.74 or more. IR 111 =I 111 / (I 111 +I 200 +I 220 +I 311 ) · · · (2) Here, I in formula (2) 111 , I 200 , I 220 , I 311 is as defined above for equation (1). Intensity ratio IR of the (111) plane 111 By making the value of the surface roughness of the wiring portion 100 greater than or equal to 0.74, the number of surfaces having an orientation that is easily scraped off is reduced, and roughness of the wiring portion 100 greater than or equal to 0.74 can be reduced.

[0015] When the average width of the plurality of wiring portions is 20 μm, the intensity ratio IR of the (220) plane of the copper crystal grain is 220 is 0.14 or less, and the average width of the plurality of wiring portions is 15 μm, the intensity ratio IR of the (220) plane is 220 It is preferable that the intensity ratio IR of the (220) plane is 0.11 or less under the condition of the average width of the plurality of wiring portions. 220 When each of these is equal to or less than the above-mentioned numerical value, the number of surfaces having an orientation that is easily scraped off is reduced, and roughness of the wiring surface during manufacturing can be reduced.

[0016] When the average width of the plurality of wiring portions is 10 μm, the intensity ratio IR of the (220) plane of the copper crystal grain is 220 In this way, even if the average width of the wiring portion is 10 μm, the intensity ratio IR 220When the ratio is 0.08 or less, the number of surfaces having an orientation that is easily scraped off is reduced, and roughness of the wiring surface during manufacturing can be reduced.

[0017] In addition, a method for manufacturing a printed wiring board according to another embodiment of the present invention includes a step of forming a conductive pattern including a plurality of wiring portions on at least one surface side of an insulating base film by a semi-additive method, and the step of forming the conductive pattern includes a step of laminating a copper-based seed layer on the one surface side of the base film, a step of forming a resist pattern having an inverted shape of the plurality of wiring portions on a surface of the seed layer, a step of laminating a copper-based plating layer on the surface of the seed layer after the step of forming the resist pattern, a step of removing the resist pattern after the step of laminating the plating layer, and a step of removing the seed layer exposed by the step of removing the resist pattern by etching 24 hours or more after the completion of the step of laminating the plating layer.

[0018] The inventors have made extensive research and found that in a printed wiring board having a fine conductive pattern with an average width of a plurality of wiring parts of 20 μm or less, if the wiring part surface is rough after etching, it causes defects in the product such as poor appearance and deterioration of high frequency characteristics, and that this is because etching is performed from the parts of the crystal faces of the copper crystal grains contained in the plating layer of the wiring part that have an orientation that is easily scraped, or etching is performed from the parts where the grain size of the copper crystal grains is small, which leads to the roughness of the wiring part surface. It has also been found that an additive contained in the plating solution required for the process of laminating the plating layer is one of the causes of reducing the grain size of the copper crystal grains. In the printed wiring board, the etching process is performed 24 hours or more after the end of the process of laminating the plating layer after the process of removing the resist pattern, thereby reducing the composition ratio of the faces of the copper crystal grains contained in the plating layer that have an orientation that is easily scraped, or increasing the average grain size of the copper crystal grains, thereby making it possible to reduce the roughness of the wiring part surface during manufacturing.

[0019] It is preferable that the copper content of the plating solution used in the step of laminating the plating layer is 2% by mass or more, and that the plating solution contains an additive. The copper content of the plating solution is 2% by mass or more, so that the copper ions necessary for plating can be supplied. Furthermore, the plating solution contains an additive, which makes the plated surface glossy and smooth.

[0020] In this disclosure, the "average width" of a plurality of wiring portions refers to the average value of the maximum width in a cross section perpendicular to the longitudinal direction of each wiring portion. The "main component" refers to the component with the largest content in terms of mass, for example, a component with a content of 50 mass% or more. The "average grain size" refers to the average value of the secondary grain size of copper crystal grains, and is the median diameter (D 50 )

[0021] [Details of the embodiment of the present invention] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A printed wiring board and a method for manufacturing a printed wiring board according to an embodiment of the present invention will be described in detail below with reference to the drawings.

[0022] [Printed wiring board] 1 includes an insulating base film 1 and a conductive pattern 2 laminated on one surface of the base film 1, and the conductive pattern 2 includes a plurality of wiring portions 11. The plurality of wiring portions 11 includes a seed layer 11a mainly composed of copper and a plating layer 11b mainly composed of copper laminated on the seed layer 11a. The average width W of the plurality of wiring portions 11 is 5 μm or more and 20 μm or less.

[0023] The crystal planes of the copper crystal grains contained in the copper-based plating layer 11b include the (111) plane, the (200) plane, the (220) plane, and the (311) plane. The intensity ratio IR of the X-ray diffraction intensity of the (220) plane calculated by the following formula (1) is 220 is greater than or equal to 0.05 and less than or equal to 0.14. IR 220 =I 220 / (I 111 +I 200 +I 220 +I 311 ) · · · (1)

[0024] <Base film> The base film 1 is mainly composed of a synthetic resin and has electrical insulation properties. The base film 1 is a substrate layer for forming the conductive pattern 2. The base film 1 may have flexibility. When the base film 1 has flexibility, the printed wiring board is used as a flexible printed wiring board.

[0025] Examples of the synthetic resin include polyimide, polyethylene terephthalate, liquid crystal polymer, and fluororesin.

[0026] When the printed wiring board is a flexible printed wiring board, the lower limit of the average thickness of the base film 1 is preferably 5 μm, more preferably 10 μm. On the other hand, the upper limit of the average thickness of the base film 1 is preferably 50 μm, more preferably 40 μm. If the average thickness of the base film 1 is less than the lower limit, the insulating strength of the base film 1 may be insufficient. Conversely, if the average thickness of the base film 1 exceeds the upper limit, the printed wiring board may be unnecessarily thick or may have insufficient flexibility. Here, the average thickness of the base film is the average of 10 measurements of the base film using a thickness gauge.

[0027] <Conductive pattern> The conductive pattern 2 is a layer made of a conductive material and includes a plurality of wiring portions 11. The plurality of wiring portions 11 are, for example, wiring that forms a coil pattern. The conductive pattern 2 may also include a pattern other than the plurality of wiring portions 11, such as a land portion.

[0028] The conductive pattern 2 has a seed layer 11a laminated on one surface of the base film 1, and a plating layer 11b laminated on one surface of the seed layer 11a (the surface opposite to the surface laminated with the base film 1). The seed layer 11a and the plating layer 11b are directly laminated in this order without any other layer in between. The conductive pattern 2 is a two-layer structure of the seed layer 11a and the plating layer 11b.

[0029] Seed layer The seed layer 11a is a metal layer for plating to perform electroplating on one side of the base film 1. The method for laminating the seed layer 11a on one side of the base film 1 is not particularly limited, and known methods such as vapor deposition and sputtering can be adopted. The seed layer 11a may also be a sintered layer of metal particles obtained by applying ink containing metal particles to one side of the base film 1 and sintering the metal particles. The main component of the seed layer 11a is copper, which has high adhesion to the base film 1 and is suitable as a plating starting surface. Examples of metals other than copper include nickel, gold, silver, tungsten, molybdenum, tin, cobalt, chromium, iron, and zinc. The average thickness of the seed layer 11a can be, for example, about 0.01 μm or more and 2 μm or less from the viewpoint of preventing the occurrence of discontinuities in the in-plane direction and increasing the removal efficiency by etching.

[0030] <Plating layer> The plating layer 11b is formed by electroplating. The main component of the plating layer 11b is copper. Copper is highly conductive and relatively inexpensive, and since the main component of the seed layer 11a is copper, high adhesion with the seed layer 11a can be obtained. From the viewpoints of being relatively inexpensive and easy to adjust the thickness, it is preferable that the plating layer 11b be formed by electroplating using a copper sulfate plating bath containing an additive.

[0031] The crystal planes of the copper crystal grains contained in the plating layer 11b include the (111) plane, the (200) plane, the (220) plane, and the (311) plane. The intensity ratio IR of the X-ray diffraction intensity of the (220) plane is calculated by the following formula (1): 220 is greater than or equal to 0.05 and less than or equal to 0.14. IR 220 =I 220 / (I 111 +I 200 +I 220 +I 311 ) · · · (1) Intensity ratio of the (220) plane IR 220The lower limit of is 0.05, preferably 0.08. On the other hand, the intensity ratio IR of the (220) plane is 220 The upper limit of the intensity ratio IR of the (220) plane is 0.14, and preferably 0.11. 220 If the intensity ratio IR of the (220) plane is less than the lower limit, chipping may occur in the wiring portion. 220 If the above upper limit is exceeded, the surface of the wiring portion may become rough during manufacturing.

[0032] The average thickness of the plating layer 11b is set depending on what kind of conductive pattern is to be produced, and is not particularly limited, and can be, for example, 1 μm or more and 100 μm or less.

[0033] <Wiring section> The wiring parts 11 are formed linearly and in substantially the same shape. The lower limit of the average width W of the wiring parts 11 is 5 μm as described above, but is preferably 6 μm. On the other hand, the upper limit of the average width W of the wiring parts 11 is 20 μm as described above, but is preferably 18 μm. If the average width W is less than the lower limit, it may not be easy to manufacture the wiring parts 11. Conversely, if the average width W exceeds the upper limit, it may be difficult to obtain a desired wiring density.

[0034] The lower limit of the average grain size of the copper crystal grains is preferably 0.2 μm, more preferably 0.5 μm, and even more preferably 1.5 μm. On the other hand, the upper limit of the average grain size of the copper crystal grains is preferably 8 μm, more preferably 6 μm, and even more preferably 5 μm, as described above. Thus, if the average grain size of the copper crystal grains is less than the lower limit, the average grain size may vary and the surface of the wiring portion may become rough. Conversely, if the average grain size of the copper crystal grains exceeds the upper limit, chipping may occur in the wiring portion.

[0035] The intensity ratio IR of the X-ray diffraction intensity of the (111) plane of the copper crystal grains is calculated by the following formula (2): 111 is preferably 0.74 or more, more preferably 0.75 or more, and even more preferably 0.79 or more. IR 111 =I 111 / (I 111 +I 200 +I 220 +I 311 ) · · · (2) Thus, the intensity ratio of the (111) plane IR 111 By making the value of the copper crystal grains in the above range, the variation in grain size of the copper crystal grains can be suppressed, and the roughness of the surfaces of the wiring portions 11 can be reduced.

[0036] When the average width W of the multiple wiring portions 11 is 20 μm, the intensity ratio IR of the (220) plane of the copper crystal grains is 220 is 0.14 or less, and the average width W of the wiring portion 11 is 15 μm, the intensity ratio IR 220 The intensity ratio IR of the (220) plane under the condition that the average width W of the plurality of wiring portions 11 is a specific value is preferably 0.11 or less. 220 When the value is equal to or less than the above range, roughness of the surfaces of the wiring portions 11 can be reduced.

[0037] When the average width W of the wiring portions 11 is 10 μm, the intensity ratio IR of the (220) plane of the copper crystal grains is 220 In this way, even if the average width W of the wiring parts 11 is 10 μm, the intensity ratio I 220 If the ratio is 0.08 or less, roughness of the surfaces of the wiring portions 11 can be reduced.

[0038] [Manufacturing method for printed wiring boards] Next, an example of a method for manufacturing the printed wiring board of FIG. 1 will be described with reference to FIGS.

[0039] The method for manufacturing the printed wiring board includes a step of forming a conductive pattern 2 including a plurality of wiring portions 11 by a semi-additive method on one surface side of an insulating base film 1 (a step of forming a conductive pattern). The step of forming the conductive pattern includes a step of laminating a seed layer 11a mainly made of copper on one surface side of the base film 1 (a step of laminating a seed layer), a step of forming a resist pattern R having an inverted shape of the plurality of wiring portions 11 on the surface of the seed layer 11a laminated in the step of laminating the seed layer (a step of forming a resist pattern), a step of laminating a plating layer 11b mainly made of copper on the surface of the seed layer 11a after the step of forming the resist pattern (a step of laminating a plating layer), a step of removing the resist pattern R after the step of laminating the plating layer (a step of removing the resist pattern), and a step of removing the seed layer 11a exposed by the step of removing the resist pattern by etching 24 hours or more after the end of the step of laminating the plating layer (an etching step).

[0040] In the step of forming the conductive pattern, a seed layer 11a is first laminated on substantially the entire surface of one side of the base film 1 (FIG. 2), and then a resist pattern R having an inverted shape of the wiring portion 11 is formed on the surface of the seed layer 11a (FIG. 3). Next, a plating layer 11b is laminated on the non-laminated region of the resist pattern R on the surface of the seed layer 11a after the step of forming the resist pattern (FIG. 4), and then the resist pattern R is peeled off and removed (FIG. 5). At least 24 hours after the end of the step of laminating the plating layer, the exposed portions of the seed layer 11a exposed by removing the resist pattern R are removed by etching to form a plurality of wiring portions 11 (FIG. 1).

[0041] (Step of stacking seed layer) In the step of laminating the seed layer, as shown in FIG. 2, a seed layer 11a (metal layer) for plating is laminated on substantially the entire surface of one side of the base film 1 for electroplating. The method of laminating the seed layer 11a in the step of laminating the seed layer is not particularly limited, and examples thereof include a vapor deposition method and a sputtering method. In addition, in the step of laminating the seed layer, an ink containing metal particles may be applied to substantially the entire surface of one side of the base film 1, and the metal particles may be sintered to laminate a sintered layer of metal particles on one side of the base film 1. The main component of the seed layer 11a is preferably copper, which has high adhesion to the base film 1 and is suitable as a plating starting surface. Examples of metals other than copper include nickel, gold, silver, tungsten, molybdenum, tin, cobalt, chromium, iron, and zinc.

[0042] (Process for forming a resist pattern) In the step of forming the resist pattern, a photoresist film is first formed on substantially the entire surface of the seed layer 11a laminated in the step of laminating the seed layer. This photoresist film is formed from a negative resist composition in which the polymer bonds are strengthened by exposure to light, decreasing the solubility in a developer, or a positive resist composition in which the polymer bonds are weakened by exposure to light, increasing the solubility in a developer.

[0043] In the step of forming the resist pattern, first, the photoresist film is formed on the surface of the seed layer 11a, for example, by coating and drying a liquid resist composition, or by thermocompression bonding of a dry film resist that has no fluidity at room temperature.

[0044] Next, in the step of forming the resist pattern, the photoresist film is selectively exposed to light using a photomask or the like to form a portion of the photoresist film that is soluble in a developer and a portion that is not soluble in the developer. The highly soluble portion of the photoresist film is then washed away using a developer to form a resist pattern R having openings corresponding to the formation regions of the multiple wiring portions 11, as shown in FIG.

[0045] (Process for stacking plating layers) In the step of laminating the plating layer, as shown in Fig. 4, the plating layer 11b is laminated on the surface of the seed layer 11a. In the step of laminating the plating layer, the plating layer 11b is laminated on the non-laminated region of the resist pattern R (the region corresponding to the opening of the resist pattern R) of the surface of the seed layer 11a.

[0046] The metal used in the step of laminating the plating layer is copper. Copper has high conductivity and is relatively inexpensive, and since the main component of the seed layer 11a is copper, high adhesion with the seed layer 11a can be obtained. Examples of metals other than copper include nickel and silver. Since the metal used in the step of laminating the plating layer is copper, it is preferable to perform electroplating using a copper sulfate plating bath containing an additive, from the viewpoints of being relatively inexpensive and being easy to adjust the thickness of the plating layer 11b.

[0047] The plating solution used in the step of laminating the plating layer has a copper content of 2% by mass or more. The copper content of the plating solution of 2% by mass or more can supply copper ions necessary for plating. The additives in this embodiment include a suppressor, a brightener, and a leveler. The additives allow the plating solution to form a uniform copper film with high surface activity and little unevenness. The suppressor in this embodiment is, for example, a compound such as a polyalkylene glycol compound. The suppressor has a film forming effect. The brightener in this embodiment is, for example, a compound such as 3-mercaptopropanesulfonic acid or bis(3-sulfopropyl)disulfide disodium salt. The brightener has an interface complex forming effect. The leveler in this embodiment is, for example, a compound such as benzothiazole. The leveler has a function of smoothing the plating surface.

[0048] (Step of removing the resist pattern) In the step of removing the resist pattern, as shown in Fig. 5, the resist pattern R is removed by peeling it off from the seed layer 11a. Specifically, the laminate (Fig. 4) having the base film 1, the seed layer 11a, the plating layer 11b, and the resist pattern R after the step of laminating the plating layer is immersed in a stripping solution, so that the resist pattern R is expanded by the stripping solution. This generates a repulsive force between the resist pattern R and the seed layer 11a, and the resist pattern R is peeled off from the seed layer 11a. A known stripping solution can be used as this stripping solution.

[0049] (Etching process) In the etching step, the exposed portion of the seed layer 11a that is exposed by removing the resist pattern R is removed by etching. The etching is performed 24 hours or more after the step of laminating the plating layer. An etching solution that corrodes the metals that form the seed layer 11a and the plating layer 11b is used for this etching. By removing the seed layer 11a, a plurality of wiring parts 11 are formed on one side of the base film 1 as shown in FIG. 1.

[0050] [Other embodiments] The embodiments disclosed herein should be considered to be illustrative and not restrictive in all respects. The scope of the present invention is not limited to the configurations of the above-described embodiments, but is indicated by the scope of the claims, and is intended to include all modifications within the meaning and scope equivalent to the scope of the claims.

[0051] For example, in the above embodiment, a configuration in which a conductive pattern is laminated on one side of a base film has been described, but the printed wiring board may have a pair of conductive patterns laminated on both sides of the base film. Also, in the method for manufacturing the printed wiring board, a pair of conductive patterns may be formed on both sides of the base film. EXAMPLES

[0052] The present invention will be described in more detail below with reference to examples, but the present invention is not limited to these examples.

[0053] [No.1] A base film made of a polyimide film ("Apical NPI" manufactured by Kaneka Corporation) with an average thickness of 25 μm was prepared. A conductive pattern including a plurality (1000) of wiring parts was formed on one side of this base film by a semi-additive method (a step of forming a conductive pattern). Specifically, a copper nanoparticle dispersion liquid in which copper nanoparticles are dispersed in water was first applied to one side of the base film, and then baked to laminate a seed layer having an average thickness of 0.3 μm made of a sintered body of copper nanoparticles on one side of the base film (a step of laminating a seed layer). Next, a photoresist film was laminated on almost the entire surface of the seed layer laminated in the step of laminating the seed layer by thermocompression bonding of an acrylic dry film resist. Then, the photoresist film was selectively exposed to light using a photomask to form a portion in the photoresist film that was soluble in a developer and a portion that was not soluble in the developer. Next, a resist pattern having openings corresponding to the formation region of a plurality of wiring parts was formed by washing away the highly soluble parts of the photoresist film using a developer (a step of forming a resist pattern).

[0054] Next, electrolytic copper plating was performed on the surface of the seed layer after the resist pattern was formed, thereby laminating a plating layer having an average thickness of 10 μm (a step of laminating a plating layer). The electrolytic copper plating was performed under the following conditions. Composition of plating solution added to plating bath: 100g / L copper sulfate pentahydrate, 200g / L sulfuric acid, 45mg / L chlorine, additives (BSC10-A2 (Ishihara Chemical Co., Ltd.) 2mL / L, BSC10-B (Ishihara Chemical Co., Ltd.) 1.5mL / L, BSC10-C (Ishihara Chemical Co., Ltd.) 6mL / L) Plating bath temperature: 25℃ Anode: Insoluble anode

[0055] Next, the resist pattern was removed using a stripping solution (step of removing the resist pattern), and the X-ray diffraction intensities I111, I200, I220, and I311 of the (111), (200), (220), and (311) planes of the copper crystal grains contained in the plating layer were measured using an X-ray diffractometer (Malven-Panalytical). The average grain size of the copper crystal grains was also measured using a scanning electron microscope (Hitachi High-Technologies Corporation). (X-ray diffraction measurement) The measurement conditions are as follows. Equipment: EMPYREAN (Malven-Panalytical) X-rays used: Cu-Kα line focus Excitation conditions: 45kv 40mA Incident optical system: Mirror Slit: 1 / 2 Mask: 10mm Sample stand:XYZ Receiving optical system: Flat collimator 0.27 Scanning method: θ-2θ scan 2θ scan Measurement range: 2θ=15°-100° Incident angle: 1° Step width: 0.03° Accumulation time: 1 sec

[0056] Next, the exposed portions of the seed layer exposed by removing the resist pattern were removed by etching (etching process) to produce printed wiring board No. 1. The average width of the multiple wiring portions of printed wiring board No. 1 is shown in Table 1.

[0057] The top surface of the wiring part of the No. 1 printed wiring board was photographed with an electron microscope (manufactured by Hitachi High-Technologies Corporation). The number of defects detected on the surface of the wiring part was confirmed using the photographed image. The results are shown in Table 1.

[0058] [No.2] After the step of removing the resist pattern, X-ray diffraction measurement and average grain size measurement were performed 24 hours after the step of laminating the plating layer, and then the etching step was performed. Except for this, printed wiring board No. 2 was manufactured in the same manner as printed wiring board No. 1. The average width of the multiple wiring parts of printed wiring board No. 2 is shown in Table 1.

[0059] The top surface of the wiring part of the No. 2 printed wiring board was photographed with an electron microscope. The number of defects detected on the surface of the wiring part was confirmed using the photographed image. The results are shown in Table 1.

[0060] [No.3-No.5] Except for the time elapsed after the step of laminating the plating layer, printed wiring boards No. 3 to No. 5 were manufactured in the same manner as printed wiring board No. 2. The elapsed time and the average width of the multiple wiring portions of printed wiring boards No. 3 to No. 5 are shown in Table 1.

[0061] The top surfaces of the wiring parts of the printed wiring boards No. 3 to No. 5 were photographed with an electron microscope. The number of defects detected on the wiring surface was confirmed using the photographed images. The results are shown in Table 1.

[0062] [Table 1]

[0063] <Quality of printed wiring boards> (copper grains) "Average grain size" refers to the average value of the secondary grain size of copper crystal grains, and is the median diameter (D 50 )

[0064] (strength ratio) The X-ray diffraction intensities I of the (111), (200), (220), and (311) planes belonging to the above copper crystal grains 111 , I 200 , I 220 , I 311 From the above, each intensity ratio IR was calculated using the following formulas (1) to (4). IR220 =I 220 / (I 111 +I 200 +I 220 +I 311 ) · · · (1) IR 111 =I 111 / (I 111 +I 200 +I 220 +I 311 ) · · · (2) IR 311 =I 311 / (I 111 +I 200 +I 220 +I 311 ) · · · (3) IR 200 =I 200 / (I 111 +I 200 +I 220 +I 311 ) · · · (4)

[0065] (Image recognition evaluation) The number of defects detected in the printed wiring boards was confirmed from images taken of the top surface of the wiring part of the manufactured printed wiring boards with an electron microscope (image recognition evaluation). The image recognition evaluation was rated according to the following criteria. The results are shown in Table 1. The number of defects detected in the printed wiring boards was counted as the number of discoloration defects detected but no discoloration was found when examined with a stereo microscope. The defects were roughness of the wiring surface. S rating: 1 defect detected / m 2 below Evaluation A: 1 defect detected / m 2 Super 100 pieces / m 2 below Evaluation B: 100 defects / m 2 Super 1000 pieces / m 2 below Evaluation C: Number of defects detected is 1000 / m 2 super

[0066] <Evaluation Results> Table 1 shows that for printed wiring board No. 1, the number of detected defects increases as the average width of the wiring area narrows. In contrast, printed wiring boards No. 2 to No. 5 have a reduced number of detected defects for all average widths of the wiring area compared to printed wiring board No. 1. Of these, printed wiring boards No. 4 and No. 5 received an S rating in the image recognition evaluation for all average widths of the wiring area. This is because the intensity ratio IR of the (220) plane decreases as time passes between the process of laminating the plating layer and the start of etching. 220( This shows that the decrease in the copper content (composition ratio) and the increase in the average grain size of copper crystal grains reduce the number of defects detected, i.e., reduce the roughness of the wiring surface. [Explanation of symbols]

[0067] 1 Base film 2 Conductive Pattern 11 Wiring section 11a Seed layer 11b Plating layer R resist pattern

Claims

1. an insulating base film; a conductive pattern laminated on at least one surface of the base film; Equipped with the conductive pattern includes a plurality of wiring portions, The average width of the plurality of wiring portions is 5 μm or more and 20 μm or less, the plurality of wiring portions each having a seed layer mainly composed of copper and a plating layer mainly composed of copper laminated on the seed layer, The copper crystal grains contained in the plating layer have an average grain size of 0.2 μm or more and 5 μm or less, and the standard deviation of the copper crystal grains is 2.60 μm or more and 9.60 μm or less, The crystal planes of the copper crystal grains contained in the plating layer include the (111) plane, the (200) plane, the (220) plane, and the (311) plane; The intensity ratio IR of the X-ray diffraction intensity of the (220) plane is calculated by the following formula (1): ２２０ is equal to or greater than 0.05 and equal to or less than 0.14, A printed wiring board, wherein the seed layer has a thickness of 0.01 μm or more and 2 μm or less. IR ２２０ =I ２２０ / (I １１１ +I ２００ +I ２２０ +I ３１１ )・・・(1) (In formula (1), I １１１ is the X-ray diffraction intensity of the (111) plane, and I ２００ is the X-ray diffraction intensity of the (200) plane, and I ２２０ is the X-ray diffraction intensity of the (220) plane, and I ３１１ is the X-ray diffraction intensity of the (311) plane.) 2. The printed wiring board according to claim 1, wherein the intensity ratio IR 220 of the (220) plane is 0.11 or less.

3. A printed wiring board as described in claim 1 or claim 2, wherein the average particle size of the copper crystal grains contained in the plating layer is 1.0 μm or more.

4. The printed wiring board according to claim 1, wherein the intensity ratio IR 220 of the (220) plane is 0.08 or less.

5. When the average width of the plurality of wiring portions is 10 μm, the intensity ratio IR of the (220) plane ２２０ 2. The printed wiring board according to claim 1, wherein the ρ is 0.08 or less.

6. an insulating base film; a conductive pattern laminated on at least one surface of the base film; Equipped with the conductive pattern includes a plurality of wiring portions, The average width of the plurality of wiring portions is 5 μm or more and 20 μm or less, the plurality of wiring portions each having a seed layer mainly composed of copper and a plating layer mainly composed of copper laminated on the seed layer, The copper crystal grains contained in the plating layer have an average grain size of 0.2 μm or more and 5 μm or less, and the standard deviation of the copper crystal grains is 2.60 μm or more and 9.60 μm or less, The crystal faces of the copper crystal grains include the (111) face, the (200) face, the (220) face, and the (311) face; The intensity ratio IR of the X-ray diffraction intensity of the (220) plane is calculated by the following formula (1): ２２０ is equal to or greater than 0.05 and equal to or less than 0.14, A method for manufacturing a printed wiring board, wherein the seed layer has a thickness of 0.01 μm or more and 2 μm or less, forming a conductive pattern including a plurality of wiring portions on at least one surface of an insulating base film by a semi-additive method; The step of forming the conductive pattern includes: laminating a copper-based seed layer on the one surface of the base film; forming a resist pattern having a reversed shape of the plurality of wiring portions on a surface of the seed layer; a step of laminating a plating layer containing copper as a main component on the surface of the seed layer after the step of forming the resist pattern; removing the resist pattern after the step of laminating the plating layer; a step of removing the seed layer exposed by the step of removing the resist pattern by etching, 24 hours or more after the step of laminating the plating layer is completed; A method for manufacturing a printed wiring board having the above structure. IR ２２０ =I ２２０ / (I １１１ +I ２００ +I ２２０ +I ３１１ )・・・(1) (In formula (1), I １１１ is the X-ray diffraction intensity of the (111) plane, and I ２００ is the X-ray diffraction intensity of the (200) plane, and I ２２０ is the X-ray diffraction intensity of the (220) plane, and I ３１１ is the X-ray diffraction intensity of the (311) plane.)

7. 7. The method for producing a printed wiring board according to claim 6, wherein the plating solution used in the step of laminating the plating layer has a copper content of 2 mass % or more and contains an additive.

8. A method for manufacturing a printed wiring board as described in claim 6 or claim 7, wherein the step of removing the seed layer by etching is carried out 30 hours or more after the step of laminating the plating layer is completed.

9. A method for manufacturing a printed wiring board as described in claim 6 or claim 7, wherein the step of removing the seed layer by etching is carried out 40 hours or more after the step of laminating the plating layer is completed.

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