Semiconductor module array device

Abstract

To provide a semiconductor module array device that can accurately align a semiconductor module to an electrode pad on a substrate with a compact and simple configuration without using a socket.SOLUTION: A semiconductor module array device 1 includes a first alignment chip 61 fixed to a first metal pad 31, and a second alignment chip 62 fixed to a second metal pad 32. The first alignment chip 61 and the second alignment chip 62 are arranged facing different directions with each other on a surface of the substrate. A semiconductor module 50 includes a first side surface part 51 extending in a second direction Y and facing the first alignment chip 61, and a groove part 56 formed in a portion of the first side surface part 51, in which a portion of the second alignment chip 62 is positioned.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] SUMMARY OF THE DISCLOSURE The present invention relates to a semiconductor module array device. [Background technology]

[0002] As a package for a semiconductor integrated circuit, for example, an LGA (Land Grid array) package can be mounted on a mounting board by using a socket or the like without using fixed connections such as solder, and is used as a repairable package that can be removed and reattached to the mounting board. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent Publication No. 2021-27059 [Patent Document 2] JP 2020-145403 A Summary of the Invention [Problem to be solved by the invention]

[0004] An embodiment of the present invention aims to provide a semiconductor module array device that has a small and simple configuration without using sockets and is capable of accurately aligning semiconductor modules with electrodes on a mounting board, and in particular a semiconductor module array device that is capable of mounting multiple semiconductor modules in a high-density and repairable manner. [Means for solving the problem]

[0005] According to an embodiment of the present invention, a semiconductor module array device includes a substrate having a surface including a plurality of positioning regions aligned in a first direction and a mounting region located between two of the positioning regions adjacent to each other in the first direction, a plurality of electrode pads arranged in the mounting region, a first metal pad and a second metal pad arranged in the positioning region aligned in a second direction perpendicular to the first direction, a plurality of semiconductor modules mounted in the mounting region of the substrate and having a terminal arrangement surface facing the mounting region, a plurality of module terminals arranged on the terminal arrangement surface and electrically connected to the electrode pads, the semiconductor module comprises a plurality of identically shaped positioning chips, the distance between their outermost positions in the normal direction to the surface of the substrate being different in the first direction and the second direction on the terminal arrangement surface, the plurality of positioning chips having a first positioning chip fixed to the first metal pad and a second positioning chip fixed to the second metal pad, the first positioning chip and the second positioning chip being arranged facing different directions on the surface of the substrate, and the semiconductor module has a first side portion extending in the second direction and facing the first positioning chip, and a groove portion formed in part of the first side portion and in which a part of the second positioning chip is positioned. [Brief description of the drawings]

[0006] [Figure 1] FIG. 2 is a schematic plan view of a semiconductor module array device according to the embodiment. [Diagram 2] Cross section taken along line AA in FIG. [Diagram 3] FIG. 4 is a schematic enlarged cross-sectional view of an electrical connection portion between an electrode pad and a module terminal. [Figure 4] FIG. 2 is a schematic plan view of a substrate, an electrode pad, and a metal pad according to the embodiment. [Diagram 5] FIG. 2 is a schematic plan view of a terminal arrangement surface of the semiconductor module according to the embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0007] Each embodiment will be described below with reference to the drawings. The drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the size ratio between parts, etc. are not necessarily the same as those in reality. Even when the same part is shown, the dimensions and ratios of each part may be different depending on the drawing. Furthermore, the same reference numbers are used to refer to the same or similar elements.

[0008] In repairable packages such as LGA, the connection electrode pitch with the mounting board is limited to approximately 0.5 mm. Technology for narrowing this pitch even further (e.g., to 0.3 mm pitch) is known, for example, in Patent Document 2, and technology for aligning the narrow-pitch electrodes of the semiconductor package with the connection electrodes of the mounting board is known, for example, in Patent Document 1.

[0009] However, it is impossible to infinitely narrow the pitch of the connection electrodes of a semiconductor package, and when it is necessary to increase the number of connection terminals between semiconductor chips, such as in large-scale information processing equipment, it is necessary to increase the size of the semiconductor package to ensure the number of terminals. However, when the size of the semiconductor package is increased, the difference in distance from the mounted semiconductor chip to the connection electrodes becomes significant, causing the problem that the wiring bandwidth for each connection terminal changes, resulting in a difference in performance between the many wirings, and as a result, the performance of the information processing equipment, etc. is limited to the bandwidth of the longest wiring.

[0010] For this reason, when it is necessary to increase the number of connection terminals between semiconductor chips, dividing the semiconductor chips into functional blocks of a certain size and distributing and mounting them in multiple packages can improve the overall performance of information processing equipment, etc.

[0011] In the embodiments, the purpose is to provide a semiconductor module array device in which semiconductor chips with similar functions are distributed across multiple semiconductor packages and the multiple semiconductor packages are mounted in a high-density array to significantly improve equipment performance. Also, even if a part of the semiconductor module array breaks down, the semiconductor package at the broken location can be partially replaced (repairable), thereby making it possible to maintain the functionality of the semiconductor module array device.

[0012] In such a distributed mounting semiconductor module array device, the semiconductor chip size can be made relatively small, which not only makes it possible to improve the semiconductor chip and its mounting yield, but also has the advantage that the semiconductor chips (packages) are distributed and arranged, making it possible to efficiently dissipate heat from the entire semiconductor chip compared to dissipating localized high-power heat from a huge semiconductor chip.

[0013] 1, a semiconductor module array device 1 of the embodiment has a substrate 10, a plurality of semiconductor modules 50, a plurality of first positioning chips 61, and a plurality of second positioning chips 62. Two directions that are parallel to the surface of the substrate 10 and perpendicular to each other are defined as a first direction X and a second direction Y. A direction perpendicular to the first direction X and the second direction Y is defined as a third direction Z.

[0014] The substrate 10 is made of an insulating material. Examples of materials that can be used for the substrate 10 include resin, ceramic, glass, and composite materials thereof. As shown in Fig. 4, the surface 10a of the substrate 10 has a plurality of positioning regions 12 aligned in a first direction X, and a mounting region 11 located between two positioning regions 12 adjacent to each other in the first direction X among the plurality of positioning regions 12. The positioning regions 12 and the mounting regions 11 are aligned alternately in the first direction X.

[0015] The semiconductor module array device 1 of the embodiment further includes a plurality of electrode pads 20 arranged in the mounting area 11, a first metal pad 31 arranged in the positioning area 12, and a second metal pad 32 arranged in the positioning area 12. A plurality of electrode pads 20 are arranged in one mounting area 11. In one positioning area 12, the first metal pad 31 and the second metal pad 32 are arranged side by side in the second direction Y.

[0016] The electrode pad 20 is electrically connected to the wiring formed on the substrate 10. The first metal pad 31 and the second metal pad 32 are isolated patterns that are not electrically connected to the electrode pad 20 and the wiring formed on the substrate 10, and may be connected to a ground potential.

[0017] For example, the shape of the electrode pad 20 is a rectangle having a long side along the second direction Y and a short side along the first direction X. The shape of the first metal pad 31 is a rectangle having a long side along the second direction Y and a short side along the first direction X. The shape of the second metal pad 32 is a rectangle having a long side along the first direction X and a short side along the second direction Y. The width of the second metal pad 32 in the first direction X is larger than the width of the first metal pad 31 in the first direction X. The first metal pad 31 and the second metal pad 32 have the same shape and area, and are arranged in different orientations, for example, in an orthogonal positional relationship. Therefore, although the orientations of the first metal pad 31 and the second metal pad 32 are different, the same mounting conditions can be applied if the mounted members are the same.

[0018] The electrode pad 20, the first metal pad 31, and the second metal pad 32 are formed simultaneously on the surface 10a of the substrate 10 by, for example, metal patterning, and have the same material and the same thickness. For example, when the substrate 10 is a resin substrate, the electrode pad 20, the first metal pad 31, and the second metal pad 32 can be formed by performing photoresist patterning on the Cu foil formed on the resin substrate, performing additional Cu plating, removing the photoresist, and etching the entire surface to remove the Cu foil in the area where the additional Cu plating is not performed. In general, since Cu is easily oxidized, Au plating or two-layer plating of Au / Ni is performed on the surface. Also, instead of Au plating, Sn plating or a resin film that can be removed during solder melt fixing may be formed.

[0019] FIG. 5 is a schematic plan view showing an example of a terminal arrangement surface 55 of a semiconductor module 50. 1 is viewed from the back side of the semiconductor module 50. The semiconductor module array device 1 of the embodiment further has a plurality of module terminals 40 arranged on the terminal arrangement surface 55. The shape of the module terminals 40 corresponds to the shape of the electrode pads 20, for example, and is a rectangle having long sides along the second direction Y and short sides along the first direction X.

[0020] The semiconductor module 50 has a pair of first side surface portions 51 extending in the second direction Y, and a groove portion 56 formed in a part of each of the first side surface portions 51. The groove portion 56 is a cutout portion of the terminal arrangement surface 55, and the cutout shape extends in the thickness direction (third direction Z) of the semiconductor module 50. A second positioning chip 62 (shown by a two-dot chain line in FIG. 5) is located in the groove portion 56. Therefore, the groove portion 56 extends, for example, halfway in the thickness direction of the semiconductor module 50. For example, the groove portion 56 may extend from the terminal arrangement surface 55 to a position at least equal to the height of the second positioning chip 62 in the third direction Z plus a gap for preventing the semiconductor module 50 from riding on the second positioning chip 62. The groove portion 56 may also extend over the entire thickness direction of the semiconductor module 50. The pair of groove portions 56 are positioned to face each other in the first direction X, for example, to be parallel to each other. Moreover, the pair of grooves 56 may be positioned to face each other in the first direction X and may be offset in the second direction Y. The first side surface portion 51 refers to a part of the surface adjacent to the terminal arrangement surface 55 and extends, for example, in the Z direction. The semiconductor module 50 has, for example, a substantially rectangular shape in the plane formed by the first direction X and the second direction Y.

[0021] Each groove portion 56 has a pair of inner walls 56a that restrict movement of the semiconductor module 50 in the second direction Y on the mounting area 11 of the substrate 10. The pair of inner walls 56a are positioned apart from each other in the second direction Y and are, for example, parallel to the first direction X. Note that the pair of inner walls 56a is not limited to being parallel to the first direction X, and may be inclined with respect to the first direction X and the second direction Y.

[0022] The semiconductor module 50 is, for example, an optical transmission module. As shown in Fig. 1, in one side surface portion (second side surface portion) 52 of a pair of side surface portions extending in a first direction X of the semiconductor module 50, for example, a plurality of optical fibers 80 are connected to the semiconductor module 50. The optical fibers 80 extend in a second direction Y from a connection portion with the semiconductor module 50.

[0023] The semiconductor module 50 may have an optical element optically connected to the optical fiber 80, and a semiconductor element electrically connected to the optical element. The optical element is a light receiving element that converts an optical signal from the optical fiber 80 into an electrical signal and transmits it to the semiconductor element. Alternatively, the optical element is a light emitting element that converts an electrical signal from the semiconductor element into an optical signal and transmits it to the optical fiber 80. The semiconductor element is, for example, an optical receiving IC (Integrated Circuit) chip that converts the photocurrent of the light receiving element into a voltage and outputs a digital electrical signal that matches the logic level of another semiconductor logic element to be connected. Alternatively, it is an optical transmitting IC chip that changes the drive current of a light emitting element in response to a digital electrical signal sent from another semiconductor logic element to generate a digital optical signal.

[0024] If the semiconductor module 50 is, for example, an optical transmission module, an optical fiber holding member is arranged on the surface (second side surface portion 52) to which the optical fiber 80 is connected, and it is not necessarily possible to reliably ensure the external precision of the semiconductor module 50. Even when the optical fiber holding member is arranged on the second side surface portion 52, the semiconductor module 50 can be effectively positioned as long as the second positioning chip 62 is positioned in the groove portion 56.

[0025] 1 and 2, a first positioning chip 61 is fixed to the first metal pad 31. Examples of materials that can be used for the first positioning chip 61 include silicon, ceramics (Al2O3, AlN, etc.), glass, and metal. For example, a metal film 65 is provided on the surface of the first positioning chip 61 that faces the first metal pad 31. The metal film 65 has, for example, an Au film or an Sn film on the outermost surface, and in the case of an Au film, at least a Ni film is provided between the Au film and the first positioning chip 61, and in the case of an Sn film, at least a Cu film is provided between the Sn film and the first positioning chip 61.

[0026] The first positioning chip 61 is fixed to the first metal pad 31 by solder 90 (e.g., SnAgCu) provided between the metal film 65 and the first metal pad 31. The outer shape of the metal film 65 is the same as that of the first metal pad 31. Alternatively, as shown in FIG. 2, the outer edges of the metal film 65 of the first positioning chip 61 and the first metal pad 31 are attracted to each other by the surface tension of the solder 90 when melted, and the central positions of the first positioning chip 61 and the first metal pad 31 may have a dimensional difference between the patterns within a range in which the central positions of the first positioning chip 61 and the first metal pad 31 are self-aligned. In this case, the outer shape of the metal film 65 may be larger than the outer shape of the first metal pad 31, or the outer shape of the metal film 65 may be smaller than the outer shape of the first metal pad 31. It is preferable that the outer shape of the metal film 65 is larger than the outer shape of the first metal pad 31 within a range in which the surface tension of the solder 90 when melted works effectively. By configuring it in this manner, the outline of the first metal pad 31 does not extend beyond the outline of the metal film 65, and the outermost surface of the first positioning chip 61 can be configured to be closest to the first side portion 51 of the semiconductor module 50.

[0027] A second positioning chip 62 is fixed to the second metal pad 32. The same material as that of the first positioning chip 61 can be used as the material of the second positioning chip 62. Like the first positioning chip 61, the second positioning chip 62 is fixed to the second metal pad 32 by solder 90 provided between the second metal pad 32 and a metal film 65 provided on the surface facing the second metal pad 32. The first positioning chip 61 and the second positioning chip 62 are arranged facing in different directions from each other on the front surface 10a of the substrate 10.

[0028] The width of the second positioning chip 62 in the first direction X is larger than the width of the first positioning chip 61 in the first direction X. For example, the first positioning chip 61 and the second positioning chip 62 are chips of the same type, shape, and size arranged in different orientations. The second positioning chip 62 is the same chip as the first positioning chip 61, rotated by, for example, 90° in a plane parallel to the surface 10a of the substrate 10. By making the first positioning chip 61 and the second positioning chip 62 from the same material and with the same shape, it is not necessary to prepare multiple types of positioning chips, and the productivity and yield of the entire positioning chips are improved, and the quality, production number, and other management of the positioning chips are made easier. Furthermore, since the mounting process conditions of the first positioning chip 61 and the second positioning chip 62 are the same, the mounting productivity of the entire positioning chips is also improved.

[0029] After the first positioning chip 61 and the second positioning chip 62 are fixed to the positioning region 12 of the substrate 10, the semiconductor module 50 is mounted in the mounting region 11 of the substrate 10. One semiconductor module 50 is mounted in one mounting region 11. The pair of first positioning chips 61 are positioned to sandwich one semiconductor module 50 in the first direction X, and the pair of second positioning chips 62 are positioned to sandwich one semiconductor module 50 in the first direction X.

[0030] The semiconductor module 50 is moved from above the mounting area 11 downward with the terminal arrangement surface 55 facing the mounting area 11, and is mounted in the mounting area 11. At this time, a small gap is secured between the first side surface portion 51 of the semiconductor module 50 and the side surface 61a of the first positioning chip 61, and between the inner wall of the groove portion 56 and the side surface 62a of the second positioning chip 62, so that the first positioning chip 61 and the second positioning chip 62 do not interfere with the mounting of the semiconductor module 50 in the mounting area 11. Note that, depending on a slight positional deviation after mounting of the semiconductor module 50, a portion where the first side surface portion 51 and the side surface 61a of the first positioning chip 61 come into contact may be generated. Similarly, a portion where the inner wall of the groove portion 56 comes into contact with the side surface 62a of the second positioning chip 62 may be generated. The side surface 61a of the first positioning chip 61 and the side surface 62a of the second positioning chip 62 are the outermost portions in the normal direction (third direction Z) to the surface 10a of the substrate 10.

[0031] A terminal arrangement surface 55 of the semiconductor module 50 faces the mounting area 11. For example, the module terminals 40 arranged on the terminal arrangement surface 55 of the semiconductor module 50 directly contact and are electrically connected to the electrode pads 20 arranged in the mounting area 11. The semiconductor module 50 is pressed against the substrate 10 by a pressing member, and contact pressure between the module terminals 40 and the electrode pads 20 is maintained.

[0032] 3, an anisotropic conductive member 70 is disposed between the terminal arrangement surface 55 of the semiconductor module 50 and the mounting region 11 of the substrate 10. The semiconductor module 50 is pressed against the substrate 10 via the anisotropic conductive member 70 by a pressing member. The anisotropic conductive member 70 includes an insulating member 71 such as a silicone resin, and a plurality of conductive core wires 72 that penetrate and connect the upper and lower surfaces of the insulating member 71. The module terminal 40 and the electrode pad 20 are electrically connected via the conductive core wires 72 of the anisotropic conductive member 70. By forming the conductive core wires 72 obliquely with respect to the electrical connection direction (third direction Z) between the module terminal 40 and the electrode pad 20, it is possible to realize the tolerance of elastic deformation caused by pressing the module terminal 40 and the electrode pad 20 against the anisotropic conductive member 70 and the maintenance of electrical connectivity.

[0033] Whether the module terminal 40 and the electrode pad 20 are in direct contact or connected via the anisotropic conductive member 70, the semiconductor module 50 can be removed from the mounting area 11 and replaced by releasing the pressing force of the pressing member.

[0034] A pair of first side surface portions 51 of the semiconductor module 50 each face a side surface 61a of the first positioning chip 61. There is a slight gap between the first side surface portions 51 of the semiconductor module 50 and the side surface 61a of the first positioning chip 61. Alternatively, a slight misalignment after mounting of the semiconductor module 50 may cause the first side surface portions 51 of the semiconductor module 50 and the side surface 61a of the first positioning chip 61 to come into contact with each other.

[0035] A pair of first positioning chips 61 positioned to sandwich one semiconductor module 50 in the first direction X restricts movement of the semiconductor module 50 in the first direction X. Furthermore, one first positioning chip 61 restricts movement in the first direction X of two semiconductor modules 50 positioned to sandwich this first positioning chip 61 in the first direction X. This restricts misalignment in the first direction X between the module terminals 40 and the electrode pads 20. Furthermore, the first positioning chip 61 and the second positioning chip 62 restrict rotation of the semiconductor module 50 in a plane parallel to the front surface 10a of the substrate 10.

[0036] A part of the second positioning chip 62 is positioned in each of the pair of grooves 56 of the semiconductor module 50. A side surface 62a of the second positioning chip 62 faces the inner wall of the groove 56. There is a slight gap between the inner wall of the groove 56 and the side surface 62a of the second positioning chip 62. Alternatively, a slight misalignment after mounting of the semiconductor module 50 may cause the inner wall of the groove 56 and the side surface 62a of the second positioning chip 62 to come into contact with each other.

[0037] 5, a pair of inner walls 56a spaced apart from each other in the second direction Y of the groove portion 56 restricts movement of the semiconductor module 50 in the second direction Y. Furthermore, one second positioning chip 62 restricts movement in the second direction Y of two semiconductor modules 50 positioned on either side of the second positioning chip 62 in the first direction X. This restricts misalignment in the second direction Y between the module terminals 40 and the electrode pads 20.

[0038] The optical fiber 80 extends in the second direction Y from the second side portion 52 located between the pair of first side portion 51. When the semiconductor module 50 is mounted on the substrate 10, the optical fiber 80 restricts the position of the semiconductor module 50 relative to the substrate 10. If the structure for determining the position of the semiconductor module 50 in the second direction Y is only the pair of grooves 56, the semiconductor module 50 can be accurately positioned in the mounting area 11 of the substrate 10 even if the semiconductor module 50 is inclined relative to the substrate 10 in the plane formed by the second direction Y and the third direction Z by sliding the semiconductor module 50 in the second direction Y while being inserted between the first positioning chips 61 and mating with the second positioning chip 62. Thereafter, the semiconductor module 50 is pressed against the substrate 10 by a pressing member, whereby the semiconductor module 50 and the substrate 10 are fixed in a state in which they are parallel to each other and the positions in the first direction X and the second direction Y are accurately positioned, and the semiconductor module 50 is not displaced by an external force applied to the optical fiber 80.

[0039] The first positioning chip 61 and the second positioning chip 62 have a substantially rectangular parallelepiped shape, but may have a shape with chamfered corners. When the semiconductor module 50 is mounted on the substrate 10, the chamfered first positioning chip 61 and the second positioning chip 62 are less likely to physically interfere with the semiconductor module 50. The first positioning chip 61 and the second positioning chip 62 have the same shape but are mounted in different directions, and perform positioning in the first direction X and the second direction Y as shown in FIG. 1. For this purpose, the positioning chip needs to be asymmetric in the first direction X and the second direction Y on the surface 10a of the substrate 10, for example, rectangular. As a shape that allows the first positioning chip 61 and the second positioning chip 62 of the same shape to perform the same function, a similar configuration is also possible with a positioning chip that is triangular or rhombus on the surface 10a of the substrate 10.

[0040] According to this embodiment, by using the first positioning chip 61 and the second positioning chip 62, which are small and simply configured, without using a socket or the like, it is possible to accurately position the semiconductor module 50 in the mounting area 11 of the substrate 10 and to electrically connect the module terminals 40 and the electrode pads 20 with high reliability. Also, a plurality of semiconductor modules 50 can be arranged in the first direction X at a fine pitch.

[0041] The distance in the first direction X between the side surfaces 61a of two adjacent first positioning chips 61 in the first direction X, the distance in the first direction X between the side surfaces 62a of two adjacent second positioning chips 62 in the first direction X, and the distance in the second direction Y between the side surfaces 61a of the first positioning chip 61 and the side surfaces 62a of the second positioning chip 62 adjacent in the second direction Y are different from each other.

[0042] A distance L1 (shown in FIG. 2) in the first direction X between the side surface 61a of the first positioning chip 61 and the first side surface portion 51 of the semiconductor module 50 is preferably smaller than a distance L2 (shown in FIG. 5) in the first direction X between two module terminals 40 adjacent to each other in the first direction X. A difference (L3-L4) between a distance L3 (shown in FIG. 1) between two first positioning chips 61 adjacent to each other in the first direction X and a length L4 (shown in FIG. 5) in the first direction X of the semiconductor module 50 in a portion other than the groove portion 56 is preferably smaller than the distance L2. In addition, a distance L5 (shown in FIG. 5) in the second direction Y between the side surface 62a of the second positioning chip 62 and an inner wall 56a of the groove portion 56 of the semiconductor module 50 is preferably smaller than a distance L6 (shown in FIG. 5) in the second direction X between two module terminals 40 adjacent to each other in the second direction Y. It is preferable that the difference (L7-L8) between the distance L7 (shown in FIG. 5) in the second direction Y between the pair of inner walls 56a and the length L8 (shown in FIG. 1) in the second direction Y of the second positioning chip 62 is smaller than the distance L6. This allows for highly reliable connection even if the pitch of the multiple module terminals 40 becomes increasingly narrow.

[0043] The first positioning chip 61 and the second positioning chip 62 may be fixed to the first metal pad 31 and the second metal pad 32, respectively, by resin bonding or direct metal bonding, without being limited to solder connection. However, when solder is used, the first positioning chip 61 and the second positioning chip 62 can be easily and accurately positioned to the first metal pad 31 and the second metal pad 32, respectively, due to a self-alignment effect caused by the surface tension when the solder melts.

[0044] The first positioning chip 61 and the second positioning chip 62 are chips of the same type, shape, and size, but arranged in different orientations. Chips (e.g., ceramic chips) cut from the same wafer can be used as the first positioning chip 61 and the second positioning chip 62, and costs can be reduced in terms of productivity and yield compared to preparing the first positioning chip 61 and the second positioning chip 62 with different shapes, sizes, etc.

[0045] Moreover, by preparing rectangular chips of the same size, they can be used as both the first positioning chip 61 and the second positioning chip 62 simply by changing the arrangement direction. The length of the short side of this rectangular chip is made slightly smaller than the distance in the first direction X between the first side surface portions 51 of the semiconductor modules 50 adjacent to each other in the first direction X. The length of the short side of the rectangular chip is made slightly smaller than the distance in the second direction Y between the inner walls 56a of the groove portions 56 shown in FIG. 5. The length of the long side of the rectangular chip is made to be a length that allows the side surface on the long side of the chip to face the inner wall 56a of the groove portions 56 of the semiconductor modules 50 adjacent to each other in the first direction X.

[0046] The semiconductor module 50 is not limited to an optical transmission module. For example, the semiconductor module 50 may have a configuration in which a plurality of electrical wirings are connected to the semiconductor module 50 on the second side surface portion 52 of the semiconductor module 50.

[0047] Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included in the scope and spirit of the invention, and are included in the scope of the invention and its equivalents described in the claims. [Explanation of symbols]

[0048] 1...semiconductor module array device, 10...substrate, 11...mounting area, 12...positioning area, 20...electrode pad, 31...first metal pad, 32...second metal pad, 40...module terminal, 50...semiconductor module, 51...first side portion, 52...second side portion, 55...terminal arrangement surface, 56...groove portion, 61...first positioning chip, 62...second positioning chip, 70...anisotropic conductive member, 80...optical fiber, 90...solder

Claims

1. a substrate having a surface including a plurality of positioning regions arranged in a first direction and a mounting region located between two positioning regions adjacent to each other in the first direction among the plurality of positioning regions; A plurality of electrode pads arranged in the mounting area; a first metal pad and a second metal pad arranged side by side in a second direction perpendicular to the first direction in the positioning region; a plurality of semiconductor modules mounted in the mounting area of ​​the substrate and having terminal arrangement surfaces facing the mounting area; a plurality of module terminals arranged on the terminal arrangement surface and electrically connected to the electrode pads; a plurality of positioning chips having the same shape, the distance between the outermost portions in a normal direction to the surface of the substrate being different in the first direction and the second direction on the terminal arrangement surface; Equipped with the plurality of positioning chips include a first positioning chip fixed to the first metal pad and a second positioning chip fixed to the second metal pad; the first positioning chip and the second positioning chip are disposed on the surface of the substrate in different directions; The semiconductor module array device has a first side portion extending in the second direction and facing the first positioning chip, and a groove portion formed in part of the first side portion and in which a part of the second positioning chip is positioned.

2. 2 . The semiconductor module array device according to claim 1 , wherein a distance in the first direction between the first positioning chip and the first side portion of the semiconductor module is smaller than a distance in the first direction between two adjacent module terminals.

3. 3. The semiconductor module array device according to claim 1, wherein the distance in the second direction between the second positioning chip and a side wall of the groove of the semiconductor module is smaller than the distance in the second direction between two adjacent module terminals.

4. A semiconductor module array device as described in any one of claims 1 to 3, wherein the first positioning chip and the second positioning chip are fixed to the first metal pad and the second metal pad, respectively, by either solder connection, resin adhesion, or direct metal bonding.

5. A semiconductor module array device as described in any one of claims 1 to 4, further comprising an anisotropic conductive member arranged between the mounting area of ​​the substrate and the terminal arrangement surface of the semiconductor module, electrically connecting the electrode pads and the module terminals.

6. A semiconductor module array device as described in any one of claims 1 to 5, wherein the first positioning chip and the second positioning chip have a rectangular, triangular, or diamond shape when viewed from above the surface of the substrate, and are arranged with different orientations.

7. 7. The semiconductor module array device according to claim 1, further comprising an optical fiber extending in the second direction and connected to the semiconductor module at a second side portion of the semiconductor module extending in the first direction.

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